KR19990060857A - Transistor Formation Method of Semiconductor Device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a transistor in a semiconductor device, wherein after forming a semiconductor substrate into a recess structure, a gate is formed in the recess portion, lightly doped drain (LDD) ion implantation, and source / drain ions. Since the source / drain junction of the LED structure is formed in a region other than the recess by the injection, it has a step so that the actual thickness of the source / drain junction is shallow but the depth from the channel region is shallow so that it functions as a shallow junction. In addition, even when excessive etching is performed during the source / drain junction contact process, since the source / drain junction is thick, a method of forming a transistor of a semiconductor device capable of preventing short channel effects due to etch loss of the junction is prevented. It is about.

Description

Transistor Formation Method of Semiconductor Device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a transistor in a semiconductor device, and more particularly, to forming a contact hole for a junction contact at a shallow junction of a transistor, while preventing a short channel effect due to etch damage. A method of forming a transistor of a semiconductor device capable of facilitating depth control.

In general, as semiconductor devices become more integrated, transistors are required to form source / drain junctions having a shallow depth. As a method for forming shallow source / drain junctions, a method using low energy ion implantation, a double implantation method using the same, and a channeling effect by pre-crystallization Inhibition methods and the like have been proposed. These methods are still insufficient in identifying physical and chemical properties due to defect formation by implanted ions for the formation of shallow junctions of semiconductor devices of 0.1 µm or less class. There is a problem that the reliability of the device is degraded due to the short channel effect. Therefore, in the selective epitaxial growth method of forming a source / drain junction on the upper part of the substrate, instead of the conventional method of forming a shallow junction by ion implantation on the lower surface of the substrate such as silicon. Elevated source / drain junctions have been proposed. However, this method is a method of forming a thin film by selectively using a high temperature chemical vapor deposition method only on the portion where the oxide layer is selectively etched, or by depositing only undoped pure silicon and then forming a source / drain by ion implantation of a desired dopant If there is a disadvantage that the uniform distribution of the dopant is difficult. In addition, in order to solve this disadvantage, a method of forming a thin film uniformly distributed in-situ by using a gas for doping when forming a thin film has been proposed, It is very difficult to control the selective growth of the doped thin film by decomposition, and impurity ions such as boron, which are easily diffused, are difficult to do in-situ doping.

Accordingly, the present invention provides a method of forming a transistor of a semiconductor device capable of facilitating depth control of a shallow junction while preventing short channel effects due to etching damage in forming a contact hole for a junction contact. There is a purpose.

A method of forming a transistor of the present invention for achieving this object comprises the steps of forming a recess in a selected portion of a semiconductor substrate; Forming a gate oxide film and a gate in the recess portion after performing a channel forming impurity ion implantation process; Forming a low concentration impurity region by an LED ion implantation process; And forming a spacer insulating layer on a side surface of the gate, and then forming a high concentration impurity region by a source / drain ion implantation process, thereby forming a source / drain junction having an LED structure.

1A to 1D are cross-sectional views of a device for explaining a method of forming a transistor of a semiconductor device according to an embodiment of the present invention.

Explanation of symbols for the main parts of the drawings

1: semiconductor substrate 2: recess

3: channel region 4: gate oxide film

5: gate 6: low concentration impurity region

7: spacer insulating film 8: high concentration impurity region

9: interlayer insulating film 10: contact hole

68 source / drain junction

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1A to 1D are cross-sectional views of devices for describing a method of forming a transistor of a semiconductor device according to an embodiment of the present invention.

Referring to FIG. 1A, a recess 2 is formed in a selected portion of the semiconductor substrate 1.

In the above, the recess 2 may be formed by oxidizing the semiconductor substrate 1 by a selective high temperature oxidation process, and then removing the oxidized portion by an etching process. The semiconductor substrate 1 may be formed by an etching process using a mask layer. It may be formed by etching.

Referring to FIG. 1B, a channel region 3 is formed by performing an impurity ion implantation process for forming a channel, and a gate oxide film 4 and a gate 5 are formed in a recess 2. The lightly doped drain (LDD) ion implantation process forms a low concentration impurity region 6.

Referring to FIG. 1C, after forming the spacer insulating film 7 on the side of the gate 5, a high concentration impurity region 8 is formed by a source / drain ion implantation process, thereby forming an LDD structure. Source / drain junction 68 is formed.

In the above, the source / drain junction 68 is formed thick in a region other than the recess 2, and has a step with the channel region 3 by the recess 2 portion. That is, even when the channel region 3 is controlled to be lower than the source / drain junction 68, the depth of the source / drain junction 68 may be relatively thick, thereby performing the function of the shallow junction.

Referring to FIG. 1 (d), an interlayer insulating film 9 is formed on an entire structure including a transistor having a source / drain junction 68 having an LED structure, and then a source / drain junction contact process is performed to perform a source / drain junction contact process. A contact hole 10 through which the junction 68 is exposed is formed.

On the other hand, the influence of the short channel effect during the operation of the device is because the thickness t2 of the source / drain junction 68 under the channel region 3 determines the depletion width, so that the source / drain under the channel region 3 The thickness t2 of the junction portion 68 can perform the function of the shallow junction, and even if excessive etching occurs when the contact hole 10 is formed, the source / drain junction 68 is thick because the thickness t1 of the source / drain junction 68 is thick. Even if the junction 68 is etched, there is no problem that the electrical characteristics of the device due to the etch loss are degraded.

As described above, according to the present invention, the semiconductor substrate is formed into a recess structure, and then a gate is formed in the recess portion, and the source / drain junction of the LED structure is removed by the LED implantation and the source / drain ion implantation. Since the actual thickness of the source / drain junction is thick, but the depth from the channel region is shallow, it functions as a shallow junction, and even if excessive etching occurs during the source / drain junction contact process. Since the source / drain junction is thick, the short channel effect due to the etching loss of the junction can be prevented, thereby improving the reliability of the device and achieving high integration of the device.

Claims (3)

Forming a recess in the selected portion of the semiconductor substrate; Forming a gate oxide film and a gate in the recess portion after performing a channel forming impurity ion implantation process; Forming a low concentration impurity region by an LED ion implantation process; And After forming a spacer insulating film on the side of the gate, a high concentration impurity region is formed by a source / drain ion implantation process, thereby forming a source / drain junction of the LED structure of the semiconductor device Transistor formation method. The method of claim 1, wherein the recess is formed by oxidizing the semiconductor substrate by a selective high temperature oxidation process, and then removing the oxidized portion by an etching process. The method of claim 1, wherein the recess is formed by etching the semiconductor substrate by an etching process using a mask layer.