KR19990051227A - Array inspection method of liquid crystal panel - Google Patents

Abstract

For inspecting the array of the liquid crystal panel according to the present invention, the array wiring formed on the same layer is separated into odd-numbered wiring and even-numbered wiring, and each pad formed at both ends of the odd-numbered wiring is connected to a pair of first common pads. Connecting the respective pads formed at both ends of the even-numbered wiring to a pair of second common pads, thereby applying an electrical signal to one side of the first or second common pads and sensing the other side. Inspecting the short circuit and disconnection of the wiring connected to the first or second common pad, and checking the disconnection between the wiring connected to the common pad by applying and sensing an electrical signal by selecting the common pads located on different layers one by one. It is characterized by.

Description

Inspection method of array of liquid crystal panel

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an array inspection method of a liquid crystal panel, and more particularly, to an array inspection method of a liquid crystal panel capable of detecting wiring defects in a short time in an array process of a liquid crystal panel.

In the manufacturing process of the liquid crystal panel, various inspections are required in order to detect the quantity or defect of the product at each step. These inspections are roughly divided into inspections of process procedures and inspections of completed arrays. Inspection of the array process refers to inspection of the finished array condition.

Most of the defects generated in the array process of the liquid crystal panel are wiring defects. Such wiring defects are caused by disconnection of wirings, short circuits between wirings of the same layer, or short circuits between wirings of different layers. In order to detect such wiring defects, a test method called "open / short test" is used. The open / short test applies a constant voltage to one pad of the wiring and senses the current on the other pad to check for short-circuits or disconnections.

1A and 1B show an array wiring of a conventional thin film transistor liquid crystal panel and a state in which the wiring is disconnected and shorted, respectively.

Each of the n gate wirings 100 and the drain wirings 200 are arranged in a row and a column. In addition, the gate pads G1 / G'1..Gn / G'n and the drain pads D1 / D'1..Dn / D'n are respectively provided to apply electrical signals to the respective wirings. It is connected to both ends of the wiring. In the case of the VGA panel, the gate and drain wiring is composed of 480 lines of (480 pairs x 2) pads, and in the case of the SVGA panel, (600 pairs x 2) pads.

1A shows a case where the first gate wiring is disconnected.

In order to inspect the disconnection of the wiring, the probe pin 300 is connected to pads connected to both ends of the wiring to be inspected, that is, G1 and G′1. Then, one of the two pads (G1) is selected to apply a voltage and sense the current in the remaining pad (G'1).

If the wiring is broken, no current is sensed. The inspection of the disconnection of the drain is the same. Therefore, inspection of the disconnection of each wiring requires (2 x n) test sequences.

1B illustrates a case where the first gate wiring and the second gate wiring are short-circuited.

When the short circuit between the gate wirings, the drain wirings, or the gate and drain wirings is inspected, the pads of one of the two wirings to be checked and the pads of the remaining wirings at positions corresponding to the pad diagonals are selected, and then the probe pins 300 are selected. ), And apply voltage to one of the pads and sense current.

That is, as shown in the drawing, when the short circuit between the first gate line and the second gate line is inspected, a voltage is applied to the pad of G1 and the current is sensed by the pad of G ′ 2 at a diagonal position.

If the wiring is shorted, current is sensed. The same is true for the short circuit test between the drains. Inspection of disconnection of each wiring requires a test sequence of {(n × n) + 2 × (n−1)}.

As mentioned above, in the case of inspecting the open / short test of the wiring arranged in a matrix form and the wiring of the liquid crystal panel in which pads are formed at both ends of each wiring, the test sequence is lengthened because each wiring must be sequentially tested. There is a problem that (Throughput) is reduced. In addition, due to various models of the liquid crystal panel, when the pad pitch is changed, a new probe card must be manufactured accordingly, thereby increasing the manufacturing cost.

Accordingly, an object of the present invention is to provide a method for inspecting an array of liquid crystal panels that can be applied to various models of liquid crystal panels having different pad pitches and can improve throughput by reducing the overall open / short test sequence.

1A to 1B are diagrams showing an array wiring of a conventional thin film transistor liquid crystal panel and a state in which the wiring is disconnected and shorted, respectively.

2 is a diagram showing an array wiring of a thin film transistor liquid crystal panel according to the present invention;

(Explanation of symbols for the main parts of the drawing)

100: gate wiring 200: drain wiring

300: probe pin

In order to achieve the above object, in order to inspect the array of the liquid crystal panel according to the present invention, the array wiring formed on the same layer is separated into odd-numbered wiring and even-numbered wiring, and each pad formed at both ends of the odd-numbered wiring is used. Connecting to each of the first common pads of the pair, and connecting each pad formed at both ends of the even-numbered wiring to a pair of second common pads to apply an electrical signal to one of the first or second common pads. And checking the short circuit and disconnection of the wire connected to the first or second common pad by sensing on the other side, and selecting the common pads located on different layers one by one to apply and sense electrical signals to the common pad. It is characterized in that the disconnection between the connected wires.

(Example)

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 shows an array wiring of a thin film transistor liquid crystal panel according to the present invention.

Each of the n gate wirings 100 and the drain wirings 200 are arranged in a row and a column. In addition, the gate pads G1 / G'1..Gn / G'n and the drain pads D1 / D'1..Dn / D'n are respectively provided to apply electrical signals to the respective wirings. It is connected to both ends of the wiring. Here, n is an even number in order to facilitate the following description.

In addition, according to the present invention, only the odd-numbered wiring of the gate wiring 100 is separated, and the pads G1 and G3..G (n-1) formed at the left end of each wiring are connected to the common pad C1, respectively. The pads G'1 and G'3..G '(n-1) formed at the right end corresponding to the left end of the wiring are connected to C'1. Then, a resistance of 1 MΩ is provided between each pad at the left or right end of the odd-numbered wiring and the common pad of C1 or C'1 to which the respective pads are connected.

The pads G2 and G4..Gn of the even-numbered wirings are also connected to the pair of common pads C2 and C'2 in the same manner. Further, a resistance of 1 MΩ is provided between each pad at the left or right end of the even-numbered wiring and the common pad of C2 or C'2.

The same applies to the drain wiring 200, so that the pads of the odd-numbered wiring ((D1 / D'1..D (n-1) / D '(n-1)) are connected to the common pads C3 / C'3, respectively. The pads D2 and D4..Dn of the even-numbered wirings are connected to the common pads C4 and C ′ 4. A 1 MΩ resistor is provided between one end of the drain wiring and the common pads connected to these pads. .

Then, a pair of common pads are selected to apply an electrical signal to one side and sensed on the other side to check for shorts or disconnections in the wiring connected to these common pads.

For example, if you want to check the disconnection of the gate wiring, connect the probe pin to the common pad of C1 and C′1 or C2 and C′2, and then select one of the two common pads to apply voltage. And sense current from the remaining pads. By doing in this way, the disconnection of the odd-numbered or even-numbered wiring of a gate wiring can be examined. The same method applies to the disconnection of the drain wiring.

The reason why the external resistor is provided as described above is to increase the discrimination power of the disconnection by making the amount of current flowing through the wiring minutely change even with the change of the process variable, thereby increasing the reliability of the open / short test according to the present invention.

If you want to check the short circuit of the wiring, select the pad of one of the two wirings to be tested and the pad of the remaining wiring at the pad diagonal position to install the probe pin, and apply voltage to one of the pads. Sense current.

For example, when a short circuit of a gate wiring is to be checked, a voltage is applied to a common pad of C1 and a current is sensed at a common pad of C ′ 2 at a diagonal position. If a short circuit occurs even with one wiring, current flows.

In addition, when checking whether the odd-numbered gate line and the even-numbered drain line are short-circuited, by selecting a common pad of C1 and C4 and applying and sensing an electrical signal, it is possible to check whether the at least one wire is short-circuited.

In the above manner, disconnection or short circuit of the individual wirings cannot be inspected, but at least disconnection and short circuits of the wirings connected between the common pads can be inspected. Therefore, the quantity and defect of the array process of a liquid crystal panel can be examined in a short time. That is, in the case where n gate wirings and drain wirings are arranged in a matrix form, conventionally, a test sequence of (2n) in the case of inspecting disconnection of wiring and {(n × n) +2 in the case of inspecting a short circuit between the wirings Test sequence x (n-1)} was required. In the present invention, however, only four test sequences are required for disconnection of wiring and six test sequences for short circuits between wirings.

As described above, the present invention enables the open / short test in a short time by applying such a method to an array of liquid crystal panels of any type. In addition, even when the pad pitch is changed due to the liquid crystal panels of various models, the same probe card can be used by forming a common pad at a predetermined position for all models.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made without departing from the technical spirit of the present invention. It will be evident to those who have knowledge of.

Claims (3)

In order to inspect the array of the liquid crystal panel, the array wiring formed on the same layer is separated into odd-numbered wiring and even-numbered wiring, and each pad formed at both ends of the odd-numbered wiring is connected to a pair of first common pads, respectively. : Connecting each pad formed at both ends of the even-numbered wiring to a pair of second common pads; and The electrical signal is applied to one side of the first or second common pad and sensed at the other side to check for short-circuit and disconnection of the wiring connected to the first or second common pad, and the common layer is located on different layers. And checking the disconnection between the wires connected to the common pad by selecting the pads one by one and applying and sensing an electrical signal. The method of claim 1, wherein each of the array wirings has one resistor, and the resistors are provided between a pad formed on the array wiring and the common pad connected to the pad. The method of claim 2, wherein the resistance of the resistor is 1 M ?.