KR19990025246A - Manufacturing method of semiconductor device - Google Patents

Abstract

The present invention relates to a method for manufacturing a semiconductor device suitable for improving step coverage and resistivity characteristics. The method for manufacturing a semiconductor device for achieving the above object includes a process of forming an insulating layer on a semiconductor substrate, and a poly doped on the insulating layer. Forming a silicon layer, and forming a silicide layer containing excess metal on the doped polysilicon layer.

Description

Manufacturing method of semiconductor device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor devices, and more particularly, to a method for manufacturing a semiconductor device suitable for improving step coverage and resistivity characteristics.

In general, silicide was used in the process of forming the gate electrode and the wiring.

However, as the semiconductor device becomes more integrated, the line width of the wiring decreases and accordingly, the resistance of the wiring increases, so that the specific resistance increases, and the step coverage of the wiring increases, thereby deteriorating the operating characteristics of the device.

In order to solve such a problem, conventionally, a resistivity metal silicide such as tungsten silicide (WSi _x ), titanium silicide (TiSi ₂ ), or cobalt silicide (CoSi ₂ ) is formed on a polysilicon layer to increase specific resistance. It was attempted to prevent the increase (hereinafter, forming the formation metal silicide on the polysilicon layer is called polyside). However, the characteristics of the resistivity and the step coverage were not improved by this method. Accordingly, there is a need for a more improved method of forming polysides.

Hereinafter, a manufacturing method of a conventional semiconductor device will be described with reference to the accompanying drawings.

1A to 1C are process cross-sectional views showing a conventional method for manufacturing a semiconductor device, and FIGS. 2A to 2C are process cross-sectional views showing a conventional method for manufacturing a semiconductor device of a second method.

The polyside process used to reduce the resistivity and step coverage of the semiconductor device can be used to form the gate electrode and the bit line wiring.

First, a method of manufacturing a semiconductor device according to the first method, which is used for a gate electrode, is as follows.

As shown in FIG. 1A, a first oxide film 2 is deposited on the semiconductor substrate 1, and a polysilicon layer 3 is deposited on the first oxide film 2. At this time, the polysilicon layer 3 is water soluble and doped with P-type. Here, the doping of the polysilicon layer 3 is formed by ion implantation after the deposition of the non-doped polysilicon layer, POCl ₃ deposition (fockle doping), or the polysilicon layer is deposited to form a doping gas such as PH ₃ Formed by continuous infusion.

As shown in FIG. 1B, the semiconductor substrate 1 formed as described above to remove the natural oxide film (or glass) that may remain on the polysilicon layer 3 in the process of forming the polysilicon layer 3. Soak in HF solution.

Thereafter, a tungsten silicide layer 4 is formed by chemical vapor deposition in which tungsten fluoride (WF6) gas is injected into SiH ₄ or SiH ₂ Cl ₂ to form a polyside layer.

As shown in FIG. 1C, the tungsten silicide layer 4, the polysilicon layer 3, and the first oxide film 2 are anisotropically etched using a mask for forming a gate electrode. Accordingly, the gate cap silicide layer 4a, the gate electrode 3a, and the gate oxide film 2a are formed to be stacked. Then, the LDD regions 5 are formed on the semiconductor substrates 1 on both sides of the gate electrode 3a, and a second oxide film is deposited on the entire surface to remove the second oxide film by anisotropic etching to remove the gate cap silicide layer 4a and the gate electrode ( Sidewall insulating films 6 are formed on both sides of 3a) and gate oxide film 2a. Thereafter, high concentration impurity ions are implanted into both semiconductor substrates 1 of the sidewall insulating film 6 except for the lower portion of the gate electrode 3a to form the source / drain regions 7.

Next, a method of manufacturing a semiconductor device according to the second conventional method used for bit line wiring will be described.

As shown in FIG. 2A, an N-type impurity injection layer 8 is formed in one region of the P-type semiconductor substrate 1.

The interlayer insulating layer 9 is deposited on the semiconductor substrate 1 by chemical vapor deposition, and the contact insulating layer 10 is formed by selectively removing the interlayer insulating layer 9 so that the N-type impurity injection layer 8 is exposed. do.

As shown in FIG. 2B, the polysilicon layer 11 is formed on the entire surface. At this time, the polysilicon layer 11 is water soluble and doped with P-type. Here, the doping of the polysilicon layer 11 is formed by ion implantation after the deposition of the polysilicon layer 11, POCl ₃ deposition (fockle doping), or doping such as PH ₃ when the polysilicon layer is deposited. Doping is by continuously injecting gas.

As shown in FIG. 2C, in the process of forming the polysilicon layer 11, the natural oxide film (or glass) remaining on the polysilicon layer 11 is immersed in HF solution and cleaned.

Thereafter, tungsten fluoride (WF6) gas is injected into SiH ₄ or SiH ₂ Cl ₂ to form a tungsten silicide layer 12 on the polysilicon layer 11, and then selectively patterned to form a bit line wiring made of a polyside layer. Form.

The conventional method for manufacturing a semiconductor device as described above has the following problems.

First, the tungsten silicide layer was formed on the polysilicon layer in order to lower the specific resistance of the polysilicon layer having a specific resistance of 200 μ㎝ · ㎝ when forming the gate electrode, but the specific resistance of the polysilicon layer was halved because the specific resistance of the tungsten silicide layer was 100 μΩ · cm or more. You can only lower it. For this reason, in the highly integrated device that is reduced to 0.25 μm or less, it does not contribute significantly to the reduction of the resistivity of the polysilicon layer.

Second, the step coverage is greater than that of forming the bit line with the tungsten silicide layer formed by reducing SiH ₄ or SiH ₂ Cl ₂ according to the second method, rather than forming the bit line with the tungsten metal layer. For this reason, in the process of a device having a contact hole having a size of 0.25 μm or less and a contact hole having an aspect ratio of 3 or more, there is a problem in that the contact hole is not completely filled as shown in FIG. 2C.

The present invention has been made to solve the above problems, and an object thereof is to provide a method for manufacturing a semiconductor device suitable for improving step coverage and resistivity characteristics.

1A to 1C are cross-sectional views illustrating a method of manufacturing a semiconductor device according to a conventional first method.

2A to 2C are cross-sectional views illustrating a method of manufacturing a semiconductor device according to a conventional second method.

3A through 3C are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with a first embodiment of the present invention.

4A through 4D are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with a second embodiment of the present invention.

5 is a graph showing a change in the resistivity of the tungsten silicide layer (WSix) according to the change in the PH ₃ flow rate when the polysilicon layer is deposited in the method of manufacturing a semiconductor device of the present invention.

FIG. 6 is a graph showing changes in the component ratios of silicon atoms / tungsten atoms (Si / W) of the tungsten silicide layer (WSix) according to the change of the PH ₃ flow ratio with respect to the sputtering time for depositing the polysilicon layer of the present invention.

7 is a graph showing the composition change of the tungsten silicide layer (WSix) according to the deposition temperature of the tungsten silicide layer of the present invention

8 is a graph showing a change in formation energy according to the reaction temperature of the tungsten silicide layer formed according to the source gas injected into the doped polysilicon layer of the present invention

Explanation of symbols for the main parts of the drawings

21: semiconductor substrate 22: first oxide film

22a: gate oxide films 23 and 32: polysilicon layer

23a: gate electrode 24, 33: first tungsten silicide layer

24a, 33a: second tungsten silicide layer 24b: gate cap tungsten silicide film

25, 34 silicon nitride film 25a: gate cap nitride film

26: LDD region 27: side wall insulating film

28 source / drain region 29 N-type impurity implantation layer

30: contact hole 31: interlayer insulating layer

A method of manufacturing a semiconductor device according to the present invention for achieving the above object comprises the steps of forming an insulating layer on a semiconductor substrate, forming a doped polysilicon layer on the insulating layer, on the doped polysilicon layer It is characterized by including a step of forming a silicide layer containing an excess of metal.

Hereinafter, a method of manufacturing a semiconductor device of the present invention will be described with reference to the accompanying drawings.

3A through 3C are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with a first embodiment of the present invention, and FIGS. 4A through 4D are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with a second embodiment of the present invention.

The polyside forming process used to reduce the resistivity of the semiconductor device can be applied to form the gate electrode and the bit line wiring.

First, in the method of manufacturing a semiconductor device according to the first embodiment of the present invention, as illustrated in FIG. 3A, the first oxide film 22 is deposited on the semiconductor substrate 21 to have a thickness of 80 μs. Thereafter, the polysilicon layer 23 is formed to have a thickness of 1000 μs at 660 ° C. and 80 Torr using an integrated cluster tool (ICT). Next, the polysilicon layer 23 is doped. The polysilicon layer 23 is deposited using a source gas containing 50% SiH ₄ and 1% PH ₃ in H ₂ .

The semiconductor substrate 21 on which the polysilicon layer 23 is deposited is then transferred to the chamber for depositing the first tungsten silicide layer 24 so as not to be exposed to the atmosphere (ie, without vacuum interruption). Thereafter, tungsten is deposited on the polysilicon layer 23 to form the first tungsten silicide layer 24. The deposition of the first tungsten silicide layer 24 is carried out by fixing the flow rates of the source gases WF ₆ and SiH ₂ Cl ₂ to 4 and 175 sccm, and the deposition pressure to 0.9 Torr, respectively, and changing the deposition temperature to 500 to 600 ° C. . The first tungsten silicide layer 24 thus formed contains more tungsten atoms than silicon atoms (W excess WSix).

As shown in FIG. 3B, rapid thermal annealing (RTA) is performed for 30 seconds in nitrogen (N ₂ ), argon (Ar), or NH ₃ at a temperature of 900 ° C. FIG. At this time, the tungsten atoms contained in the first tungsten silicide layer 24 and the doped polysilicon layer 23 react to form a tetragonal phase second tungsten silicide layer 24a. The square second tungsten silicide layer 24a thus formed has a reduced resistivity than the conventional method. In the process where the second tungsten silicide layer 24a is formed by heat treatment in an NH ₃ atmosphere, a silicon nitride film 25 is formed on the surface of the second tungsten silicide layer 24a, which is an N-type of the polysilicon layer 23. Or it prevents the dopant (P-type dopant) to diffuse.

As shown in FIG. 3C, the second tungsten silicide layer 24a, the polysilicon layer 23, and the first oxide film 22 are anisotropically etched using a mask for forming a gate electrode. Accordingly, the gate cap silicide layer 24b, the gate electrode 23a, and the gate oxide film 22a are formed.

The LDD regions 26 are formed on both semiconductor substrates 21 of the gate electrode 23a, and a second oxide film is deposited on the entire surface to remove the second oxide film by anisotropic etching to remove the gate cap nitride film 25a and the gate cap tungsten silicide. A sidewall insulating film 27 is formed on the side of the film 24b, the gate electrode 23a, and the gate oxide film 22a. Thereafter, high concentration impurity ions are implanted into both semiconductor substrates 21 of the sidewall insulating layer 27 except for the gate electrode 23a to form the source / drain regions 28.

Next, a method of manufacturing a semiconductor device according to the second embodiment of the present invention used for bit line wiring will be described.

As shown in FIG. 4A, an N-type impurity ion implantation layer 29 is formed by implanting N-type impurity ions into a predetermined region of the P-type semiconductor substrate 21.

Then, the interlayer insulating layer 31 is deposited on the entire surface with an oxide film or a nitride film. Then, the interlayer insulating layer 31 is anisotropically etched to expose the N-type impurity injection layer 29, thereby contacting the N-type impurity injection layer 29. The hole 30 is formed.

As shown in FIG. 4B, a polysilicon layer 32 is deposited on the surface of the contact hole 30 and the interlayer insulating layer 31. At this time, the polysilicon layer 32 is deposited using a source gas containing 50% SiH ₄ and 1% PH ₃ in H ₂ .

Next, as shown in FIG. 4C, the semiconductor substrate 21 on which the polysilicon layer 32 is deposited is transferred to a chamber for depositing the first tungsten silicide layer 33 so as not to be exposed to the atmosphere. Thereafter, the first tungsten silicide layer 33 is formed on the polysilicon layer 32. In the deposition of the tungsten silicide layer 33, the flow rates of the source gases WF ₆ and SiH ₂ Cl ₂ are set to 4 and 175 sccm, respectively, and the deposition pressure is set to 0.9 Torr, followed by deposition while changing the deposition temperature to 500 to 600 ° C. The first tungsten silicide layer 33 thus formed is a first tungsten silicide layer 33 (W excess WSi _x ) containing more tungsten atoms than silicon atoms.

As shown in FIG. 4D, rapid thermal annealing (RTA) is performed for 30 seconds in nitrogen (N ₂ ) or argon (Ar) or NH ₃ at a temperature of 900 ° C. FIG. At this time, the second tungsten silicide layer 33a having a tetragonal phase is formed by reacting with the polysilicon layer 32 doped with tungsten atoms containing more silicon atoms in the first tungsten silicide layer 33. The square second tungsten silicide layer 33a thus formed has a lower resistivity than the conventional method because the grain size of the second tungsten silicide layer 33a is smaller than that of the conventional tungsten silicide layer. Because of the size. Since the grain size is large, silicon atoms present in the first tungsten silicide layer 33 are extracted to the surface of the first tungsten silicide layer 33 when the second tungsten silicide layer 33a is heat treated in an NH ₃ atmosphere. The silicon nitride film 34 is formed on the surface of the second tungsten silicide layer 33a. Accordingly, the polysilicon layer 32 is consumed to become thin. Here, the silicon nitride layer 34 prevents the N-type dopant or the P-type dopant of the polysilicon layer 32 from being diffused.

Here, instead of rapid thermal annealing (RTA) for 30 seconds in nitrogen (N ₂ ) or argon (Ar) or NH ₃ , heat treatment may be performed for 30 minutes in an N ₂ atmosphere of 900 ° C. FIG.

In addition, the second tungsten silicide layer 33a formed by the present invention is excessively reacted with the semiconductor substrate 21 during the heat treatment of silicon atoms existing on the semiconductor substrate 21 before the second tungsten silicide layer 33a is formed. It is superior to the tungsten silicide layer (WSi ₂ ) formed by heat treatment of conventional tungsten in that there is no risk of defects occurring during the process.

In this manner, the method of manufacturing a semiconductor device according to the second exemplary embodiment of the present invention is completed.

Hereinafter, the data analyzing the experimental results of the semiconductor device of the present invention formed by the above method will be described with reference to the drawings.

5 is a graph illustrating a change in specific resistance of a tungsten silicide layer (WSix) according to a change in PH ₃ flow ratio when a polysilicon layer is deposited in the method of manufacturing a semiconductor device of the present invention, and FIG. 6 is a polysilicon layer of the present invention. Figure 7 is a graph showing the variation of the component ratio of the silicon atom / tungsten atom (Si / W) of the tungsten silicide layer (WSix) with the change of the PH ₃ flow ratio with respect to the sputtering time for depositing, and Figure 7 is a tungsten silicide layer of the present invention Is a graph showing the composition change of the tungsten silicide layer (WSix) according to the deposition temperature of, Figure 8 is a change in the formation energy according to the reaction temperature of the tungsten silicide layer formed according to the source gas injected into the doped polysilicon layer of the present invention Is a graph.

First, the change in the resistivity and thickness of the tungsten silicide layer according to the change in the flow rate of the PH ₃ gas during deposition of the polysilicon layer will be described.

As shown in FIG. 5, as the concentration of P (Phosphorus) increases when doping the polysilicon layer, that is, as the flow rate of PH ₃ increases, the thickness (ie, deposition rate) of the tungsten silicide layer decreases. In addition, the resistivity of the tungsten silicide layer according to the present invention is also significantly reduced compared with the prior art.

For example, the specific resistance of the tungsten silicide layer in the absence of PH ₃ is 905 µPa · cm, and the specific resistance in the flow ratio of PH ₃ at 120 sccm or 240 sccm is 412 µµ · cm and 310 µµ · cm, respectively.

In addition, the variation of the component ratio of silicon atoms to tungsten atoms of the tungsten silicide layer according to the flow ratio of PH ₃ during deposition of the polysilicon layer is as follows.

In other words, when the tungsten silicide layer is formed by depositing tungsten on the doped polysilicon layer, a condition in which a tungsten silicide layer (W excess WSi _x ) containing a large amount of tungsten is formed at the interface between the polysilicon layer and the tungsten silicide layer is described. The analysis results using AES (Aug: Electron Spectroscopy) are described.

As shown in FIG. 6, as PH ₃ is added to the polysilicon layer and the doping concentration of the polysilicon layer increases, the portion of silicon and tungsten atoms (Si / W) is smaller at the interface between the tungsten silicide layer and the polysilicon layer. (W excess layer) appeared.

That is, a tungsten silicide layer containing more tungsten atoms was formed when the flow ratio of PH ₃ was small at the same sputtering time. For example, the tungsten silicide layer formed at 60 sccm contains more tungsten atoms than when the flow ratio of PH ₃ is increased to 240 sccm. The ratio of silicon atoms to tungsten atoms immediately after the tungsten silicide layer is deposited is set to 0.5 to 2.

Next, the composition change of the tungsten silicide layer according to the change of the deposition temperature of the tungsten silicide layer is as follows.

7 is a result of analyzing the tungsten silicide layer (WSi _x ) deposited by only changing the temperature under the same conditions by X-ray diffraction (XRD).

As shown in FIG. 7, when the temperature is gradually increased to 510 ° C., 525 ° C., 540 ° C., 555 ° C., 570 ° C., 585 ° C. and 600 ° C., the tungsten silicide layer deposited below 555 ° C. is amorphous. At temperatures higher than 555 ° C., a tungsten silicide layer containing amorphous and hcp-WSi _x was formed. Here, when the 2Θ (angle) of the tungsten silicide layer is 30 ° and about 40 °, the light intensity of the X-ray appears to be strong and diffracted. At this time, the tungsten silicide layer exhibits a crystal orientation of (111).

Hereinafter, the reason why the specific resistance and the step coverage of the tungsten silicide layer formed according to the present invention are excellent will be described thermodynamically with reference to FIG. 8.

FIG. 8 shows energy of formation according to reaction temperature when a tungsten silicide layer is formed by reaction of a tungsten fluoride (WF ₆ ) gas and a SiH ₂ Cl ₂ gas of a doped polysilicon layer ( G ) Is shown.

Where reaction of forming tungsten (W) and PF ₅ by WF ₆ gas and P ions {5WF ₆ + 6P → 5W + 6PF ₅ } is a reaction for forming tungsten silicide layer (WSi ₂ ) {2WF ₆ + 10SiH ₂ Since Cl ₂ → 2WSi ₂ + 3SiF ₄ + 3SiCl ₄ + 8HCl + 6H ₂ }, a tungsten silicide layer (W excess WSi _x ) containing a large amount of tungsten (W) is finally formed.

At this time, the formation enthalpy of WSi ₂ , PF _5, and WF ₆ ( Hf ) Are -31.0, -265.73, and 62.48 [kJ / gram.atom], respectively. Formation of PF ₅ is much more stable than WSi ₂ or WF ₆ , so PF ₅ is formed before WSi ₂ .

As a result of the experiment, when the doped polysilicon layer is exposed to the atmosphere, tungsten silicide layer containing a large amount of tungsten is formed because tungsten is formed even by the reaction of P atoms in the natural oxide film (P ₂ O ₅ ) occurring on the surface of the polysilicon layer. It may also form.

In addition, the formation of a tungsten silicide layer containing a lot of tungsten as described above is the same result in the process using a polysilicon layer doped with boron (B) or ashenic (As). First, BF ₃ and AsF ₃ are formed as reaction by-products on the polysilicon layer doped with boron or acenic, respectively. The enthalpy of formation is -279.97 and -196.44 [kJ / gram.atom]. Since tungsten (W) is formed before the tungsten silicide layer by the respective enthalpy of formation, a tungsten silicide layer (W excess WSi _x ) containing a large amount of tungsten is formed.

In addition, according to the thermodynamic relationship, a polyside layer may be formed using titanium (Ti) or tantalum (Ta) in addition to tungsten (W). In the case of using titanium (Ti), TiSi ₂ may be formed by using TiCl 4, TiI ₂ , SiH 4, or SiH ₂ Cl ₂ as a source gas, and in the case of using tantalum (Ta), TaCl ₅ , SiH ₄ , SiH ₂ Cl _2. TaSi ₂ can be formed using a source gas or the like.

The method of manufacturing a semiconductor device of the present invention as described above has the following effects.

First, the resistivity of the tungsten silicide layer is reduced due to the formation of a tungsten silicide layer containing a large amount of tungsten and a silicon nitride film formed by a heat treatment process (especially a rapid heat treatment process in an NH ₃ state) after the formation of the tungsten silicide layer. Improves the operation characteristics.

Second, since the polysilicon layer is doped with phosphorus (P), boron (B), or ashenic (As) ions having high formation energy, the tungsten silicide layer is formed on the polysilicon layer. Is formed. For this reason, a tungsten silicide layer containing much tungsten is formed. Therefore, as the highly integrated device increases the thickness of the tungsten silicide layer filling the contact hole, it is possible to improve the step coverage characteristics.

Claims (14)

Forming an insulating layer on the semiconductor substrate, Forming a doped polysilicon layer on the insulating layer; And forming a silicide layer containing excess metal on the doped polysilicon layer. The method of manufacturing a semiconductor device according to claim 1, wherein the silicide layer containing excess metal is made of a metal such as tungsten (W), titanium (Ti), or tantalum (Ta). The method of manufacturing a semiconductor device according to claim 1, wherein the heat treatment step of the silicide layer containing excess metal is carried out in an NH ₃ atmosphere at a temperature of 400 ° C to 900 ° C. The method of manufacturing a semiconductor device according to claim 2, wherein WF ₆ and SiH ₄ or WF ₆ and SiH ₂ Cl ₂ are used as a source gas in order to make excess of tungsten in the silicide layer. The method of manufacturing a semiconductor device according to claim 2, wherein TiCl ₄ or TiI ₂ and SiH ₄ or SiH ₂ Cl ₂ are used as a source gas in order to make the silicide layer contain excessive titanium (Ti). . The method of manufacturing a semiconductor device according to claim 2, wherein TaCl ₅ and SiH ₄ or SiH ₂ Cl ₂ are used as a source gas in order to contain excessive amount of tantalum (Ta) in the silicide layer. The method of manufacturing a semiconductor device according to claim 1, wherein after forming said polysilicon layer, a silicide layer containing excess of said metal is formed in a state in which vacuum is not broken. Forming an insulating layer on the semiconductor substrate, Forming a doped polysilicon layer on the insulating layer; Depositing a metal layer on the doped polysilicon layer; Forming a silicide layer containing excess metal on the metal layer; A method of manufacturing a semiconductor device, comprising the step of forming a second silicide layer by heat treatment using a gas containing nitrogen atoms. The method of claim 8, wherein tungsten (W), titanium (Ti), or tantalum (Ta) is used as the metal layer. The method of manufacturing a semiconductor device according to claim 9, wherein the source gas when tungsten (W) is used as the metal layer uses WF ₆ and SiH ₄ or SiH ₂ Cl ₂ . 9. The method of claim 8, wherein the first silicide layer is formed such that the ratio of silicon atoms / metal layer atoms is less than 1 so as to contain more metal layer atoms. 10. The method of claim 9, wherein the source gas in the case of using titanium (Ti) as the metal layer comprises TiCl ₄ or TiI ₂ and SiH ₄ or SiH ₂ Cl ₂ . 10. The method of claim 9, wherein the source gas when tantalum (Ta) is used as the metal layer uses TaCl ₅ and SiH ₄ or SiH ₂ Cl ₂ . The method of claim 8, wherein the silicon nitride film is formed on the second silicide layer when the heat treatment is performed using the gas containing the nitrogen atom.