KR19990023176A - Antistatic LCD Panel - Google Patents

Abstract

The present invention relates to an anti-static liquid crystal display panel, in order to prevent the static electricity, by floating the control terminal during the process, when the static electricity is generated by the antistatic element is conducted by the induced voltage to equalize the potential of the gate line and the data line, In order to prevent power failure and to measure or operate the panel after fabrication is completed, voltage is applied to the control terminal to insulate the gate line and the data line so that the load protection element is turned off. The present invention relates to an antistatic liquid crystal display panel that can be prevented from static electricity in one liquid crystal display panel and that measurement or operation can be performed after fabrication of the panel.

Description

Antistatic LCD Panel

The present invention relates to an antistatic liquid crystal display panel. In particular, in a liquid crystal display panel in which a pixel portion and a driving circuit portion are incorporated in the same substrate, an electrostatic prevention is possible during panel production, and a static electricity is allowed to measure or operate after panel production. It relates to a liquid crystal display panel for prevention.

During the process of manufacturing a liquid crystal display panel, a high voltage is instantaneously induced in a panel by effects, such as a friction and discharge, and instantaneous current generate | occur | produces by this. The instantaneous current flows through the wiring and the intersection of the wiring and the thin film transistor, causing short or open defects. Therefore, it is necessary to have a structure in which the liquid crystal display panel can remove static electricity.

Figure 1 shows a first example of the prior art for the antistatic.

A plurality of gate lines G1, G2, ..., GN and data lines D1, D2, ..., DM cross each other to form a matrix pixel array. Each of the gate lines G1, G2, ..., GN is connected to a gate driving circuit to transmit a gate signal, and each of the data lines D1, D2, ..., DM is connected to a data driving circuit to transfer a data signal. It is connected. The thin film transistor 10 and the pixel electrode 12 connected to each other are electrically connected to the intersection of the gate line and the data line. A common shorting bar SB is commonly connected to the plurality of gate lines G1, G2,..., GN and the data lines D1, D2..., DM. Therefore, when static electricity is generated during the fabrication of the liquid crystal display panel and the induced voltage is applied to the wiring, the common short line SB prevents the blackout by keeping the gate line and the data line at the equipotential.

However, this technology has a problem in that the process is required to remove the common short line after the completion of manufacturing the liquid crystal display panel for the measurement or operation because all the wiring is connected by a common short line.

Figure 2 shows a second example of the prior art for the antistatic.

As a typical liquid crystal display panel shows, a plurality of gate lines G1, G2, ..., GN and data lines D1, D2, ..., DM cross each other to form a matrix pixel array. Each of the gate lines G1, G2, ..., GN is connected to a gate driving circuit to transmit a gate signal, and each of the data lines D1, D2, ..., DM is connected to a data driving circuit to transfer a data signal. It is connected. The thin film transistor 10 and the pixel electrode 12 connected thereto are electrically connected to the intersection portion of the gate line and the data line. CMOS transistors are provided at each end of the plurality of gate lines G1, G2, ..., GN and the data lines D1, D2, ..., DM, and are commonly connected to the common short line SB. Therefore, since the CMOS transistor operates in the diode mode, when static electricity is generated during fabrication of the liquid crystal display panel, the electrostatic prevention is prevented by maintaining the induced voltage applied to the gate line or the data line at the equipotential. That is, each data line or gate line is connected to a common short line through the CMOS transistor, so that when a predetermined voltage is applied to the CMOS transistor by the static electricity applied to each data line or gate line, the conductive line is prevented.

However, because the transistor has a low turn on resistance, current flows between the gate line and the data line during panel test or operation, causing signal distortion.

Accordingly, the present invention has an object to solve the problems according to the prior art described above.

An object of the present invention is to provide an antistatic liquid crystal display panel by using a device that is turned on by the electrostatic voltage during manufacturing the liquid crystal display panel, and turned off by applying a predetermined control voltage during operation. That is, the present invention floats the control terminal during the process, and when the static electricity is generated, the electrostatic prevention element is conducted by the induced voltage to equalize the potential of the gate line and the data line, thereby preventing the electrostatic discharge, and the panel after the completion of production In the measurement or operation of the circuit, the gate prevention device is to insulate the gate line and the data line by applying a voltage to the control terminal so that the transistor which is an anti-loading element is turned off.

In accordance with an aspect of the present invention, a plurality of gate lines and data lines from gate and data driving circuits intersect to form a pixel array, and a switching element and a pixel electrode are electrically connected to each of the pixels. In the structure, a plurality of anti-static circuit portion provided at each end of the gate line and the data line having at least one switching element, and connected to each of the anti-static circuit portion to connect the gate line and the data line in common And one or more control stages connected to each of the antistatic circuit part and applying a control signal to turn off the switching element of the antistatic circuit part.

In this case, the antistatic circuit part includes a switching element having a source connected to the ends of the gate line and the data line, a drain connected to the common line in common, and a gate connected to the control terminal. It is possible. The antistatic circuit part may further include: a first switching element having a source connected to an end of the gate line and the data line, and having a drain connected to the common line in common; and a source of a gate of the first switching element. It is possible to have a second switching device is connected to the gate, the first control terminal to which the first control signal is applied, the second control device to which the drain is connected to the second control terminal to which the second control signal is applied.

1 is a first example of an antistatic liquid crystal display panel according to the related art.

2 is a second example of an antistatic liquid crystal display panel according to the related art.

3A and 3B illustrate an antistatic device implemented by the present invention.

4 is a liquid crystal display panel according to a first embodiment of the present invention.

5 is a signal input part of a liquid crystal display panel according to a second exemplary embodiment of the present invention.

6 is a liquid crystal display panel according to a third exemplary embodiment of the present invention.

7 shows a part of the planar structure in the third embodiment of the present invention.

Hereinafter, with reference to the accompanying drawings will be described the present invention.

3A and 3B show the first and second examples of the antistatic element used in the case of constructing the antistatic circuit portion according to the present invention.

In the transistor shown in the drawing, the source S and the drain D are connected to the A and B terminals, respectively, and the gate G is connected to the control terminal 30. The resistors R1 and R2 or the capacitors C1 and C2 are connected between the gate and the source and between the gate and the drain.

If any voltage is generated at terminal A, the voltage is applied to the gate G of the transistor, and the transistor is turned on to move the carrier from terminal A to terminal B. When a predetermined voltage from the control terminal 30, that is, a voltage having a magnitude that causes the transistor to turn off, is applied to the gate G, the transistor is turned off.

FIG. 4 is a schematic view of a liquid crystal display panel according to a first embodiment of the present invention, showing a case in which an antistatic circuit portion composed of the antistatic element shown in FIG. 3A is formed in the liquid crystal display panel. Although the technique of the present invention has been described by applying an NMOS device, it is applied to a structure employing a PMOS device as it is.

A plurality of gate lines G1, G2, ..., GN and data lines D1, D2, ..., DM cross each other to form a matrix pixel array. The gate lines G1, G2, ..., GN are connected to the gate driving circuits so as to transfer the gate signals to the respective pixels, and the data lines D1, D2, ..., DM can transfer the data signals to each of the pixels. It is connected to the data driving circuit. The thin film transistor 40 and the pixel electrode 42 connected thereto are electrically connected to the intersection of the gate lines G1, G2, ..., GN and the data lines D1, D2, ..., DM.

At the ends of the plurality of gate lines and data lines, antistatic circuit portions PR1 / PR2 are turned on by electrostatic voltages and turned off by applying an arbitrary control voltage during operation. Each of the antistatic circuit portions PR1 / PR2 includes an NMOS transistor 45. A source (or drain) of each NMOS transistor is connected to a gate line or a data line, respectively, and a drain (or source) is commonly connected to a common line CL. Gates of the transistors 45 of each of the antistatic circuits are commonly connected to each other by the control terminals 50-1 and 50-2 formed separately. The common wiring CL is connected to the panel test pads 51-1/51-2 through the device unit 58 that can be turned on / off by a predetermined electrical signal. The device portion 59 is floated during panel fabrication, so that the data lines and gate lines connected to the common wiring CL can maintain the same potential, and are turned off during panel test or panel operation. This function prevents shorting of the gate line and the data line.

At this time, the element portion 58 that can be turned on / off by a predetermined electric signal may be formed of a resistor or an element having the same structure as that of the element constituting the antistatic circuit portion. When the element portion 58 is formed of a resistor, it is advantageous to set a resistance value having a magnitude of 1 ㏁ or more. In addition, when the element 58 is formed of an element having the same structure as that of the antistatic circuit portion, the element portion 58 has the same structure as the element of the antistatic circuit portion and is formed on the common wiring, and a gate is connected to the control terminal and a source is provided. And drain may be configured to be connected to the common wiring, respectively, so that the same operation as the antistatic circuit part may be achieved.

Referring to the operation of the liquid crystal display panel configured as described above is as follows.

When static electricity is generated during panel fabrication and an induced voltage is applied to the gate lines G1, G2,..., And GN or the data lines D1, D2,..., DM, the transistor 45, which is an antistatic element, is induced by the induced voltage. The transistor 45 is turned on to transfer the static electricity to the common line CL. As a result, the static electricity is induced to the common wiring CL so that the potentials of the gate lines and the data lines of the panel become equal. That is, the transistors are turned on by the static electricity generated during the process so that the respective wirings have the same potential, thereby preventing the power failure. Therefore, insulation breakdown between the gate line and the data line can be prevented, and pixel switch characteristics can be preserved.

When the panel is tested or the panel is operated after the fabrication of the panel is completed, the gate line of the transistor 45 is applied to the gate of the transistor 45 by turning off the control voltage of the transistor 45, thereby electrically separating each gate line and the data line. As a result, each gate line and data line can be independently controlled. The control signal is obtained at each control stage 50-1/50-2 connected to the gate of the transistor 45 of the antistatic circuit section PR1 / PR2.

At this time, when the element portion 58 capable of being turned on / off by a predetermined electric signal is formed of a resistor, if the resistance is small, the signal is distorted, or a current continuously flows to increase power consumption. It is advantageous to set a resistance value having a magnitude of 1 dB or more. In addition, in the case where the element portion 58 is formed of the same transistor as the element of the antistatic circuit portion, one control terminal is connected to the gate of the transistor like the antistatic element 45 of the antistatic circuit portion, and the floating state is lost during panel fabrication. It connects the gate line with the data line and turns it off during panel test or operation to prevent the data line and gate line from shorting.

Reference numeral 59 denotes a signal input unit for applying data and gate signals to the data and gate driving circuits.

FIG. 5 is a schematic diagram of a liquid crystal display panel according to a second exemplary embodiment of the present invention, showing an example in which the antistatic element shown in FIG. 3A is formed on the signal input portion of the liquid crystal display panel.

In the signal input unit, an input pad 58 connected to the data driving circuit unit and the gate driving circuit unit is formed. A gate 55 is connected to the control terminal 50-3 and a transistor 55 connected to a drain of the common line CL is connected to these input pads 58. A resistor is formed between the source and the gate of the transistor and between the drain and the gate.

In order to reduce the phenomenon in which the element is destroyed by the static electricity generated from the control signal line mainly supplied to the gate of the element of the driving circuit unit, when the static electricity is generated, it is electrically connected through the antistatic element to make the equipotential between the pads 58. In addition, after the process is completed, during the panel operation or the panel test, the control terminal 50-3 applies an off signal to the control gate 55 to insulate the pads 58 from each other.

FIG. 6 is a schematic view of a liquid crystal display panel according to a third exemplary embodiment of the present invention, showing a case in which the antistatic element shown in FIG. 3B is formed on the liquid crystal display panel. Although the technique of the present invention has been described by applying an NMOS device, it is applied to a structure employing a PMOS device as it is.

A plurality of gate lines G1, G2, ..., GN and data lines D1, D2, ..., DM cross each other to form a matrix pixel array. Each of the gate lines G1, G2,..., GN is connected to a gate driving circuit so as to transmit a gate signal to each of the pixels, and each of the data lines D1, D2,..., And DM transmits a data signal to each pixel. Is connected to the data driving circuit. The thin film transistor 60 and the pixel electrode 62 connected thereto are electrically connected to the intersections of the gate lines G1, G2, ..., GN and the data lines D1, D2, ..., DM.

At the ends of the plurality of gate lines and data lines, antistatic circuit portions PR1 / PR2 are turned on by electrostatic voltages and turned off by applying an arbitrary control voltage during operation. Each of the antistatic circuit parts PR1 / PR2 includes two NMOS transistors. The antistatic circuit portion includes a first NMOS transistor TR1 and a second NMOS transistor TR2. The gate line and the data line are connected to the common line CL through the first transistor TR1 of the antistatic circuit part. The gate of the first transistor TR1 is connected to the second transistor TR2. The gate of the second transistor TR2 is connected to the first control terminal 68-1/68-2 to which the first control signal is applied, and the source of the second transistor TR2 is the second control. It is connected to the second control terminal 69-1 / 69-2 to which a signal is applied. In the first transistor TR1, capacitors C1 and C2 are provided between the gate and the source and between the gate and the drain.

The common wiring CL is connected to the panel test pads 70-1/70-2 through the device unit 78 that can be turned on / off by a predetermined electrical signal. The device portion 78 is floated during panel fabrication, so that the data lines and gate lines connected to the common wiring CL can maintain the same potential, and are turned off during panel test or panel operation. This function prevents shorting of the gate line and the data line.

At this time, the element portion 78 that can be turned on / off by a predetermined electric signal may be formed of a resistor or an element having the same structure as that of the element constituting the antistatic circuit portion. When the element portion 78 is formed of a resistor, it is advantageous to set a resistance value having a size of 1 ㏁ or more. In addition, when the element portion 78 that can be turned on / off by a predetermined electric signal is formed in the same structure as the elements of the antistatic circuit portions PR1 / PR2, the element portion 78 has the same structure as the elements of the antistatic circuit portion. And formed on the common wiring, the gate of the second transistor being connected to the first control terminal 68-1 / 68-2 to which the first control signal is applied, and the source (or drain) of the first transistor. The drain (or source) of the second transistor and the second transistor are connected to the common wiring (shown in FIG. 7) so that they can operate in the same way as the front branch circuit portion.

Referring to the operation of the liquid crystal display panel configured as described above is as follows.

During the fabrication of the panel, the control signal is not applied to the first control terminal 68-1 / 68-2 and the second control terminal 69-1 / 69-2, thereby providing the second transistor 62. It is in the off state, and the first transistor 61 is also in the off state. However, when static electricity is generated during fabrication of the panel and an induced voltage is applied to the gate lines G1, G2, ..., GN or the data lines D1, D2, ..., DM, the first transistor 65 is connected. The voltage is induced in the gate of the first transistor 65 by the capacitor, and the first transistor 65 is turned on to be electrically connected to the common line CL. Therefore, the gate line and the data line maintain the same potential through the common line CL, thereby preventing the power failure. At this time, the parasitic capacitance generated by the wiring blocks the second transistor 66, so that the voltage is accurately induced by the capacitor, and the first transistor 65 is efficiently turned on when static electricity is generated.

When the panel is tested or the panel is operated after the fabrication of the panel is completed, a predetermined electrical signal is transmitted to the first control stage 68-1 / 68-2 and the second control stage 69-1 and 69-2. Apply. When the first control signal is applied to the first control terminal 68-1/68-2, the second transistor 66 is turned on. When the second control signal is applied to the second control stages 69-1 and 69-2 with the second transistor 65 turned on, the signal passes through the second transistor 66 to generate the first control signal. The gate control signal of turning off the first transistor 65 is applied to the gate of the first transistor 65. That is, the gate line, the data line, and the common line CL are insulated from each other by applying a control voltage at which the first transistor 65 is turned off. That is, the gate line and the data line are electrically separated from each other by applying a control voltage to the gate where the transistor is turned off after fabrication of the panel is completed. As a result, each gate line and data line can be independently controlled.

At this time, when the device portion 78 capable of turning on / off by a predetermined electric signal is formed of a resistor, if the resistance is small, the signal may be distorted, or current may continuously flow to increase power consumption. Since it is a number, it is advantageous to set a resistance value having a magnitude of 1 dB or more.

In addition, in the case where the element portion 78 that can be turned on / off by a predetermined electric signal has the same structure as the element of the antistatic circuit portion PR1 / PR2, the antistatic circuit portion PR1 / PR2 has a structure. As described above, the gate of the second transistor is connected to the first control terminal 68-1/68-2 to which the first control signal is applied, and the source (or drain) of the second transistor is connected to the second control signal. It is composed of elements connected to the applied second control terminal (69-1) / (69-2), the source (or drain) of the first transistor and the source (or drain) of the second transistor is connected to the common wiring, respectively (Shown in FIG. 7), and can operate in the same way as the antistatic circuit part. Therefore, the panel is in a floating state to connect the gate line and the data line, and the panel line is turned off during the test or operation to prevent the short circuit and the data line.

Reference numeral 79 denotes a signal input unit for applying data and gate signals to the data and gate driving circuits.

As described above, in the present invention, during the process, the gate is floated by the control terminal, and when the static electricity is generated, the electrostatic prevention device is conducted by the induced voltage so that the potential of the gate line and the data line is equal, thereby preventing the power failure. After the fabrication is completed, during the measurement or operation of the panel, a voltage is applied to the control terminal to insulate the data line and the data line so that the transistor which is an anti-loading element is turned off. Therefore, the present invention can prevent structural failure of the panel caused by static electricity generated during manufacturing of the liquid crystal display panel, and after the production is completed, the panel can be safely operated without any additional process.

Claims (12)

A liquid crystal display panel structure in which a plurality of gate lines and data lines from gate and data driving circuits intersect to form a pixel array, and a switching element and a pixel electrode are electrically connected to each pixel. A plurality of antistatic circuit parts installed at ends of the gate line and the data line and having at least one switching element; A common wiring connected to each of the antistatic circuit parts and commonly connecting the gate line and the data line; And at least one control terminal connected to each of the antistatic circuit parts to apply a control signal to turn off the switching element of the antistatic circuit part. The control circuit of claim 1, wherein a source (or drain) is connected to an end of the gate line or the data line, and a drain (or source) is commonly connected to the common line. An antistatic liquid crystal display panel having a switching element configured to be connected to a gate thereof. The LCD of claim 1, wherein a resistance is formed between the source and the gate of the switching element and between the drain and the gate. The method according to claim 3, The common wiring is provided with an anti-static liquid crystal display panel, characterized in that the element portion is turned on or off by a predetermined electrical signal is provided. The method according to claim 4, The device unit is characterized in that the antistatic liquid crystal display panel is composed of a resistance of 1㏁ or more The method according to claim 2 or 4, The device unit has the same structure as the device of the antistatic circuit unit and is formed on the common line, wherein the gate is connected to the control terminal, and the source and the drain are respectively configured to be connected to the common line. . The method of claim 1, wherein the antistatic circuit unit, A first switching element having a source (or drain) connected to an end of the gate line or the data line, and a drain (or source) connected to the common line in common; A source (or drain) is connected to a gate of the first switching element, a gate is connected to a first control terminal to which the first control signal is applied, and a drain (to a second control terminal to which the second control signal is applied). Or an antistatic liquid crystal display panel having a second switching element connected to the source. The method according to claim 7, And a second capacitor formed between the source and the gate of the first switching element, and a second capacitor formed between the drain and the gate of the first switching element. The method according to claim 8, The common wiring is provided with an anti-static liquid crystal display panel, characterized in that the element portion is turned on or off by a predetermined electrical signal is provided. The method according to claim 9, The device unit is characterized in that the antistatic liquid crystal display panel is composed of a resistance of 1㏁ or more The method according to claim 7 or 9, The device unit has the same structure as the antistatic circuit part including a first switching device and a second switching device, and is formed on the common wiring, and a first control terminal is connected to a gate of the second switching device. An antistatic liquid crystal display panel, characterized in that the source (or drain) of the first switching element and the source (or drain) of the second switching element are respectively connected to a common wiring. The method according to claim 2 or 7, A plurality of signal input pads for transmitting external signals to the gate and data driving circuits; An antistatic circuit unit including a switching element connected to each of the signal input pads; A common wiring connected to each of the antistatic circuit parts and commonly connecting the signal input terminals; And a control terminal connected to each of the antistatic circuit parts to apply a control signal to turn off the switching element of the antistatic circuit part.