KR19990020096A - Method of forming isolation film for semiconductor device - Google Patents

Abstract

The present invention relates to a method of forming an isolation layer of a semiconductor device, and more particularly, to a method of forming an isolation layer of a semiconductor device suitable for preventing dishing of an isolation layer into a trench when forming an isolation layer having an STI structure. The isolation layer forming method of the semiconductor device may include sequentially forming first and second insulating layers and a semiconductor layer on a substrate, and defining a trench region to selectively remove the semiconductor layer, the second and first insulating layers of the trench region. Forming a trench by etching the substrate of the trench region to a predetermined depth; forming a third insulating film having a polishing rate lower than that of the semiconductor layer on an entire surface of the semiconductor layer including the trench; Polishing the semiconductor layer to expose an upper surface of the second insulating film, and polishing the third insulating film to have the same height as the second insulating film.

Description

Method of forming isolation film for semiconductor device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a separator of a semiconductor device, and more particularly, to a method for forming a separator of a semiconductor device suitable for preventing dishing of a separator into a trench when forming a separator having an STI structure.

As semiconductor devices are increasingly integrated, one of various solutions is to reduce the size of the device isolation region and the device formation region (active region).

A LOCOS (LOCal Oxidation of Silicon) process was used as a technique for forming a device isolation region. The isolation region forming process using the LOCOS process has been widely used because of its advantages that the process is simple and excellent in reproducibility.

However, when the isolation region is formed by the LOCOS process as the device is gradually integrated, the area of the active region is reduced due to the occurrence of bird beak in the edge of the isolation oxide that extends into the active region, which is a characteristic of the isolation oxide formed by LOCOS. It is not suitable for use in DRAMs of more than 64MB.

Therefore, in the conventional method of forming an isolation region using LOCOS, an advanced LOCOS process is proposed such as preventing the formation of bud beak or removing the bud beak to reduce the isolation region and increase the active region. Or in the manufacturing process of 256MB DRAM. However, in the process of forming the isolation region using the advanced advanced process, the problem of the large area of the isolation region and the field formed by the LOCOS process in the GIGA class or more DRAM requiring the cell area of 0.2 μm ² or less. As the oxide film is formed at the interface with the silicon substrate, the concentration of the silicon substrate is lowered due to the coupling with the field oxide film, resulting in problems such as leakage current, resulting in poor isolation characteristics. As a method of forming the isolation region, an isolation region formation method using a trench that can easily control the thickness of the isolation region and increase the isolation effect has been proposed.

Hereinafter, a method of forming a separator of a conventional semiconductor device will be described with reference to the accompanying drawings.

First, as shown in FIG. 1A, a pad oxide film 2 and a nitride film 3 are sequentially formed on the semiconductor substrate 1, and then an isolation region is defined to define the nitride film 3 and the oxide film 2 in the isolation region. Is selectively patterned (photolithography process + etching process) to expose the semiconductor substrate 1 in the isolation region.

As shown in FIG. 1B, the exposed semiconductor substrate 1 is etched to a predetermined depth to form a trench 4.

As shown in Fig. 1C, a CVD oxide film 5 is formed on the entire surface of the substrate including the trench 4 by chemical vapor deposition using a high density plasma method. At this time, in the deposition method using the high density plasma method, desorption phenomenon occurs in the edge portion of the nitride film 3 above the trench 4 due to the sputtering effect during the deposition process, and the trench 4 after filling the trench 4 An edge portion of the nitride film 3 on the upper side is etched a predetermined portion to form a rounded shape.

As shown in FIG. 1D, the CVD oxide film 5 is polished so as to remain only in the trench 4 in the polishing process using chemical mechanical mirror polishing to form the isolation film 5a. At this time, the etching rate of the nitride film 3 is lower than the etching rate of the CVD oxide film 5 so that a dishing phenomenon occurs in which the central portion of the isolation film 5a enters the trench 4.

In the conventional method of forming an isolation layer of a semiconductor device, when the CVD oxide layer forming the isolation layer is deposited, the edge portion of the nitride layer on the upper side of the trench is etched to form a round shape. Since the polishing rate is faster than the polishing rate for the nitride film, dishing occurs, resulting in a problem of deterioration in flattening characteristics and reliability as an isolation film.

The present invention has been made to solve the problems of the conventional method of forming an isolation film of a semiconductor device as described above, and the upper edge portion of the nitride film is formed by forming a semiconductor layer having a higher polishing rate than an oxide film deposited by a high density chemical vapor deposition method on the nitride film. It is an object of the present invention to provide a method of forming an isolation layer of a semiconductor device capable of preventing a round shape, as well as preventing dishing from occurring, thereby improving reliability.

1A to 1D are cross-sectional views of a process of forming a separator of a conventional semiconductor device

2A to 2F are cross-sectional views of an isolation film forming process of a semiconductor device according to the present invention.

Explanation of symbols for main parts of the drawings

11 semiconductor substrate 12 first insulating film

13 second insulating film 14 semiconductor layer

15: trench 16a: separator

In the method of forming an isolation layer of a semiconductor device according to the present invention, the method may include forming first and second insulating layers and a semiconductor layer on a substrate, and defining a trench region to selectively select the semiconductor layer, the second and first insulating layers of the trench region. Forming a trench by etching the substrate of the trench region to a predetermined depth; forming a third insulating layer having a lower polishing rate than the semiconductor layer on the entire surface of the semiconductor layer including the trench; Polishing the insulating film and the semiconductor layer to expose an upper surface of the second insulating film, and polishing the third insulating film to have the same height as the second insulating film.

Such a method of forming an isolation layer of a semiconductor device of the present invention will be described with reference to the accompanying drawings.

2A to 2F are cross-sectional views of the isolation film forming process of the semiconductor device of the present invention.

First, as shown in FIG. 2A, first and second insulating films 12 and 13 are sequentially formed on the semiconductor substrate 11. Subsequently, a semiconductor layer 14 is formed on the second insulating film 13. In this case, the semiconductor layer 14 is formed using polysilicon. The first insulating film 12 is formed of an oxide film, and the second insulating film 13 is formed of a nitride film. Instead of the semiconductor layer 14, an oxide film may be formed using a general chemical vapor deposition method.

As shown in FIG. 2B, a photosensitive film PR is coated on the entire surface of the semiconductor layer 14. Subsequently, an isolation region is defined to remove the photoresist film PR of the isolation region. Subsequently, the semiconductor layer 14, the second insulating layer 13, and the first insulating layer 12 are selectively removed by an etching process using the photoresist layer PR as a mask.

As shown in FIG. 2C, the semiconductor substrate 11 is subsequently etched to form a trench 15.

As shown in FIG. 2D, the photosensitive film PR is removed. Subsequently, a CVD insulating film 16 is formed on the trench 15 and the semiconductor layer 14 using a high density plasma chemical vapor deposition method. At this time, the CVD insulating film 16 is formed by a high-density plasma chemical vapor deposition method in which deposition and desorption occur simultaneously. As the CVD insulating film 16 is deposited, the edge portion of the semiconductor layer 14 on the upper side of the trench 15 is rounded by a predetermined distance. It is removed in a true shape. That is, the second insulating film 13 is not damaged at all. The CVD insulating film 16 is formed of an oxide film.

As shown in Fig. 2E, the CVD insulating film 16 is polished by chemical mechanical mirror polishing. At this time, since the polishing rate of the semiconductor layer 14 formed of polysilicon is faster than that of the CVD insulating film 16 formed by using the high density plasma vapor deposition method, the semiconductor layer 14 before the polishing process is completed. This is completely removed to expose the upper surface of the second insulating film 13. In addition, even when the oxide film using the chemical vapor deposition method is formed instead of the semiconductor layer 14, the polishing rate is faster than that of the CVD insulating film 16 formed using the high density plasma chemical vapor deposition method, thereby obtaining the same result.

As shown in FIG. 2F, the CVD insulating film 16 is polished to the same height as the upper surface of the second insulating film 13 in a continuous polishing process to form the isolation film 16a by leaving only the trench 15. . At this time, since the polishing rate of the CVD insulating film 16 formed of an oxide film is faster than that of the second insulating film 13 formed of a nitride film, the isolation film 16a is formed at the same height as the second insulating film 13. It can be seen. Although not shown in the drawing, the second insulating film 13 and the insulating film 16a are further polished by a continuous polishing process.

In the method of forming the isolation layer of the semiconductor device according to the present invention, a polysilicon layer is formed on the upper surface of the nitride film to form a round shape of the nitride film edge portion due to the desorption phenomenon occurring at the nitride film edge portion at the upper side of the trench during the high density plasma chemical vapor deposition process. When forming the isolation layer by leaving the CVD oxide layer only in the trench, the polysilicon layer, which is faster than the CVD oxide layer, is polished first, and thus the dishing process is prevented because the upper side of the nitride layer is continuously polished. Therefore, it is possible to provide a method of forming a separator of a semiconductor device having excellent flatness and high reliability.

Claims (4)

Sequentially forming a first and a second insulating film and a semiconductor layer on the substrate; Defining a trench region to selectively remove the semiconductor layer, the second and first insulating layers of the trench region; Etching the substrate in the trench region to a predetermined depth to form a trench; Forming a third insulating film on the entire surface of the semiconductor layer including the trench at a polishing rate lower than that of the semiconductor layer; Polishing the third insulating film and the semiconductor layer to expose an upper surface of the second insulating film; And grinding the third insulating film to have the same height as the second insulating film. The method of claim 1, wherein the third insulating film is formed by using a high density plasma chemical vapor deposition method. The method of claim 1, wherein the semiconductor layer is formed of polysilicon. 2. The method of claim 1, wherein an oxide film is formed by chemical vapor deposition instead of the semiconductor layer.