KR19990018829A - Thin film type optical path control device and its manufacturing method - Google Patents

Abstract

The present invention provides a method of forming a transistor having a source region, a gate electrode, and a drain region between field oxide layers of a driving substrate, forming an interlayer insulating layer over the transistor and over the field oxide layer; Forming a first metal layer having a source line and a drain pad on top of the transistor, forming a lower protective layer on top of the first metal layer and an interlayer insulating layer formed on the gate electrode, and lower protection Forming a second metal layer on top of the layer, forming an opening by removing a predetermined portion of the second metal layer, forming an upper protective layer on top of the second metal layer and the opening, and Forming a third metal layer, forming an etch stop layer on top of the upper protective layer and the third metal layer, and applying an actuator to the top of the etch stop layer. And forming the emitter.

Description

Thin film type optical path control device and its manufacturing method

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film type optical path adjusting device and a method of manufacturing the same. In particular, a thin film type optical path adjusting which can block a light current incident on a driving substrate through an opening formed in a second metal layer, thereby preventing a photocurrent from flowing through the driving substrate. An apparatus and a method of manufacturing the same.

In general, a spatial light modulator, a device for projecting optical energy onto a screen, is a direct view type image display device and a projected image display according to a method of projecting a light beam incident from a light source onto a screen. It is divided into devices.

The direct view image display device includes a CRT (Cathod Ray Tube), and the projection image display device includes a liquid crystal display (hereinafter referred to as an LCD), a DMD (deformable mirror device), or an AMA (Actuated). Mirror Arrays).

The CRT device is an excellent display device that has an average brightness of 100 ft-L (white display) or more, a contrast ratio of 30: 1 or more, and a lifetime of 10,000 hours or more. However, since the CRT has a large weight and volume and maintains high mechanical strength, it is difficult to make the screen completely flat, which causes distortion of the peripheral part.

Therefore, LCDs have been developed to solve the above-mentioned problems of CRT. The advantages of such LCDs are explained in comparison with CRTs. LCDs operate at low voltages, consume less power, and provide images without distortion.

However, the LCD has a low light efficiency of 1 to 2% due to the polarization of the light beam despite the above-mentioned advantages, and the LCD has a problem in that the response speed of the liquid crystal material is slow.

Accordingly, devices such as DMD or AMA have been developed to solve the problems of LCD as described above. Currently, AMA can achieve a light efficiency of 10% or more, while DMD has a light efficiency of about 5%. In addition, the AMA is not only affected by the polarity of the incident luminous flux but also does not affect the polarity of the luminous flux.

In general, each of the actuators formed inside the AMA causes deformation in accordance with the electric field generated by the applied image signal and the bias voltage. When this actuator causes deformation, each of the mirrors mounted on top of the actuator is inclined in proportion to the magnitude of the electric field.

Thus, these inclined mirrors can reflect light incident from the light source at a predetermined angle. Piezoelectric ceramics such as PZT (Pb (Zr, Ti) O ₃ ), or PLZT ((Pb, La) (Zr, Ti) O ₃ ) are used as a constituent material of the actuator for driving the respective mirrors. As the constituent material of this actuator, electrodistorted ceramics such as PMN (Pb (Mg, Nb) O ₃ ) can be used.

The AMA is classified into a bulk type and a thin film type, and a thin film type optical path control device is widely used.

1 is a plan view of a conventional thin film type optical path control device, Figure 2 is a cross-sectional view taken along the line AA 'of the device shown in FIG.

Referring to FIG. 1, one side of the membrane 70 has a rectangular concave portion at a central portion thereof, and the concave portion is formed to have a stepped shape toward both edges. The other side of the membrane 70 has a rectangular protrusion which narrows stepwise toward the central portion corresponding to the concave portion described above. Therefore, the protrusion of the membrane adjacent to the recessed portion of the membrane 70 is inserted, and the protrusion of the membrane 70 is inserted into the recessed portion of the adjacent membrane. In addition, a stripe 90 is formed at the central portion of the upper electrode 85 to uniformly operate the upper electrode 85 to prevent diffuse reflection of the incident light beam.

Referring to FIG. 2, the thin film type optical path adjusting device includes a driving substrate 1 and an actuator 105 formed thereon.

The driver substrate 1 includes a transistor including a source region 15a, a gate electrode 15b, and a drain region 15c having an M × N (M, N is an integer) matrix form between the field oxide layers 20. A portion of the source region 15a and the drain region 15c, and an interlayer insulating layer formed so that the gate electrode 15b is not electrically connected to the source region 15a and the drain region 15b. 25, the first metal layer 30 including the source line 30a and the drain pad 30b, the upper portion of the first metal layer 30, and the interlayer insulating layer 25 surrounding the gate electrode 15b. An opening 45 formed by removing a lower protective layer 35 formed on the upper portion, a second metal layer 40 formed on the lower protective layer 35, and a predetermined portion of the second metal layer 40. And an etch stop formed on the upper protective layer 50 and the upper protective layer 50 formed on the second metal layer 40 and the opening 45. Layer 55.

The actuator 105 has one side in contact with a predetermined portion of the etch stop layer 55 in which the drain pad 30b is formed, and the other side is spaced apart from the etch stop layer 55 through the air gap 65. Formed on the membrane 70, the lower electrode 75 formed on the membrane 70, the strained layer 80 formed on the lower electrode 75, and the strained layer 80. And an upper electrode 85 having a stripe 90 formed in the center thereof, and a distribution hole 95 and a distribution hole 95 formed vertically from an upper portion of one side of the strained layer 80 to the drain pad 30b. And a distributor 100 formed vertically in the interior thereof.

3A to 3C are manufacturing process diagrams of the apparatus shown in FIG. 2.

Referring to FIG. 3A, a transistor 15 including a source region 15a, a gate electrode 15b, and a drain region 15c is formed between the field oxide layers 20.

The interlayer insulating layer 25 is formed while exposing the upper portion of the field oxide layer 20 and a part of the source region 15a and the drain region 15c. In addition, the interlayer insulating layer 25 is formed so that the gate electrode 15b does not electrically contact the source region 15a and the drain region 15c.

The first metal material layer 30 is formed on the interlayer insulating layer 25 and the exposed source region 15a and the drain region 15c. Subsequently, a portion of the first metal material layer 30 formed on the interlayer insulating layer 25 surrounding the gate electrode 15b is removed to form the first metal layer 30. As such, when a predetermined portion of the first metal layer 30 is removed, the first metal layer 30 is divided into a source line 30a and a drain pad 30b, and the source line 30a and the drain pad 30b are separated from each other. Electrically isolated.

Referring to FIG. 3B, the lower passivation layer 35 is formed on the upper portion of the first metal layer 30 and the exposed interlayer insulating layer 25 by using the silicate glass PSG. The lower protective layer 35 is formed to have a thickness of about 8000 kPa by chemical vapor deposition (CVD). The lower protective layer 35 prevents the first metal layer 30 and its lower portion from being damaged.

A second metal layer 40 of titanium metal is formed on the lower passivation layer 35. In general, most of the luminous flux incident from the light source is reflected by the upper electrode 85, which will be described later, but a small amount of luminous flux is transmitted to the driving substrate 1 through a portion where the upper electrode 85 is not formed, thereby driving the driving substrate ( Photocurrent flows inside 1). Thus, the second metal layer 40 blocks the luminous flux transmitted to the driving substrate 1.

Subsequently, an opening 45 is formed by patterning a portion of the second metal layer 40 in which the distribution hole 95 is to be formed in a subsequent process. As described above, the luminous flux transmitted to the driving substrate 1 is mostly blocked by the second metal layer 40, but a small amount of luminous flux is transmitted to the driving substrate 1 through the opening 45 so that the luminous flux of the driving substrate 1 is reduced. Photoelectric current flows inside, causing the actuator 105 to malfunction.

The upper protective layer 50 is formed of the silicate glass PSG in the upper portion of the second metal layer 40 and in the opening 45. The upper protective layer 50 prevents the second metal layer 40 and its lower portion from being damaged.

An etch stop layer 55 is formed on the upper passivation layer 50. The etch stop layer 55 is formed to have a thickness of 1000 to 2000 GPa of nitride by a low pressure chemical vapor deposition method. The etch stop layer 55 prevents the upper protective layer 50 and its lower portion from being damaged during subsequent processing.

The sacrificial layer 60 is formed on the etch stop layer 55. The sacrificial layer 60 is formed so that the silicate glass has a thickness of about 2.0 to 3.3 μm by an atmospheric pressure chemical vapor deposition method. At this time, since the flatness of the sacrificial layer 60 is very poor, the sacrificial layer 60 is flattened using a spin on glass (SOG) method or a CMP method. Subsequently, a portion of the sacrificial layer 60 in which the drain pad 30b is formed is removed to expose a portion of the etch stop layer 55.

Referring to FIG. 3C, the membrane material layer 70 ′ is stacked on the exposed etch stop layer 55 and the sacrificial layer 60. The membrane material layer 70 ′ is formed to have a thickness of about 1000 to 3000 kPa of nitride by low pressure chemical vapor deposition.

The lower electrode material layer 75 'is formed on top of the membrane material layer 70' using an electrically conductive material such as platinum, tantalum, platinum-tanalum, or the like. The lower electrode material layer 75 'is formed to have a thickness of about 2000 to 4000 micrometers by a sputtering method.

On the lower electrode material layer 75 ', a strain material layer 80' made of PZT or PLZT is formed. The deformable material layer 80 'is formed to have a thickness of about 4000 to 6000 kPa using a sol-gel method, a sputtering method, or a chemical vapor deposition method. Subsequently, the strained material layer 80 ′ is subjected to rapid heat treatment (RTA) to cause phase change.

An upper electrode material layer 85 'is formed on one side of the strained material layer 80'. The upper electrode material layer 85 'is formed of a metal having excellent electrical conductivity and reflective properties, for example, metal such as aluminum, silver, or platinum. In addition, the upper electrode material layer 85 'is formed to have a thickness of about 2000 to 6000 microns by a sputtering method.

Subsequently, the upper electrode material layer 85 'is patterned to have a predetermined pixel shape to form the upper electrode 85. The upper electrode 85 is applied with a bias signal as a common electrode. In addition, a stripe 90 is formed at the center of the upper electrode 85 to uniformly operate the upper electrode 85 to prevent diffuse reflection of the light beam incident from the light source.

Subsequently, the strained material layer 80 ′, the lower electrode material layer 75 ′, and the membrane material layer 70 ′ are patterned to have a predetermined pixel shape, respectively, so that the strained layer 80, the lower electrode 75, and the membrane ( 70). At this time, the sacrificial layer 60 formed under the membrane 70 is exposed.

Subsequently, the lower electrode 75, the membrane 70, the etch stop layer 55, the upper passivation layer 50, and the lower passivation layer 35 are sequentially etched from the other side of the strained layer 80, thereby distributing the distribution holes 95. To form. Therefore, the distribution hole 95 is vertically formed from the other side of the strained layer 80 to the drain pad 30b.

Then, the inside of the distribution hole 95 is laminated with a material having excellent electrical conductivity, such as tungsten, aluminum, or titanium, by a sputtering method and then patterned to form a power distribution 100. Therefore, the distributor 100 electrically connects the drain pad 30b and the lower electrode 75 so that the image signal is transmitted to the lower electrode 75.

Finally, the exposed sacrificial layer 60 is removed with hydrofluoric acid gas to form an air gap 65, followed by cleaning and drying to complete the actuator 105.

Referring to the operation of the above-described thin film type optical path control device, the externally applied image signal is transmitted to the lower electrode 75 via the transistor 15, the drain pad 15c and the distributor 100 built in the driving substrate 1. Is applied to. At the same time, a bias signal is applied to the upper electrode 85. Therefore, an electric field is generated between the upper electrode 85 and the lower electrode 75.

The deformation layer 80 formed between the upper electrode 85 and the lower electrode 75 causes deformation by the electric field generated between the upper electrode 85 and the lower electrode 75 as described above. The strained layer 80 contracts in a direction perpendicular to the above-described electric field, and thus the actuator 105 including the strained layer 80 is bent at a predetermined angle in proportion to the magnitude of the applied electric field.

In addition, the upper electrode 85 functions as a mirror that reflects a light beam and is inclined at a predetermined angle as the actuator 105 is bent. Thus, the light beam reflected by the upper electrode 85 passes through the slit to form an image on the screen.

However, in the conventional thin film type optical path adjusting device, the light flux incident on the light source is transmitted to the driving substrate 1 through the opening 45 formed in the second metal layer 40, so that a photocurrent is generated inside the driving substrate 1. Will flow.

Therefore, since the actuator 105 is operated by the photocurrent flowing through the driving substrate 1 before the image signal is applied to the lower electrode 75, there is a problem that an undesirable image is provided.

The present invention has been made to solve the conventional problems as described above, an object of the present invention is to block the luminous flux transmitted to the driving substrate to prevent the photocurrent flowing inside the driving substrate to prevent the actuator from malfunction before the image signal is applied It is an object of the present invention to provide a thin film type optical path control apparatus and a method of manufacturing the same that can be prevented.

In order to achieve the above object, the present invention provides a method of forming a transistor having a source region, a gate electrode, and a drain region between field oxide layers of a driving substrate; Forming a first metal layer having a source line and a drain pad on top of the interlayer insulating layer and the transistor; and lower protection on top of the interlayer insulating layer formed on the first metal layer and on the gate electrode. Forming a layer, forming a second metal layer on top of the lower protective layer, removing a predetermined portion of the second metal layer to form an opening, and forming an upper protective layer on top of the second metal layer and the opening. Forming a third metal layer on the upper passivation layer, and forming an etch stop layer on top of the upper passivation layer and the third metal layer. And a system and forming the actuator on top of the etch stop layer.

The above objects and various advantages of the present invention will become more apparent from the preferred embodiments of the invention described below by those skilled in the art.

1 is a plan view of a conventional thin film type optical path control device,

FIG. 2 is a cross-sectional view of the apparatus shown in FIG. 1 taken along line A-A ',

3a to 3c is a manufacturing process diagram of the apparatus shown in FIG.

4 is a plan view of a thin film type optical path control apparatus according to the present invention,

5 is a cross-sectional view taken along line B-B 'of the apparatus shown in FIG. 4;

6A to 6E are manufacturing process diagrams of the apparatus shown in FIG.

* Explanation of symbols for main parts of the drawings

500: driving substrate 515: transistor

515a: source region 515b: gate electrode

515c: drain region 520: field oxide layer

525: interlayer insulating layer 530: first metal layer

530a: source line 530b: drain pad

535: lower protective layer 540: second metal layer

545: opening 550: upper protective layer

555: etch stop layer 560: sacrificial layer

565: air gap 570: membrane

575: lower electrode 580: strained layer

585: upper electrode 590: stripe

595 Power Distribution Hall 600 Power Distribution

605: actuator 610: third metal layer

Hereinafter, a thin film type optical path adjusting apparatus according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

4 is a plan view of a thin film type optical path control apparatus according to an embodiment of the present invention, Figure 5 is a cross-sectional view taken along the line B-B 'of the device shown in FIG.

Referring to FIG. 4, one side of the membrane 570 has a rectangular concave portion at a central portion thereof, and the concave portion is formed in a stepped shape toward both edges. The other side of the membrane 570 has a quadrangular protrusion that narrows stepwise toward the central portion corresponding to the concave portion described above. Therefore, the protrusion of the membrane adjacent to the recessed portion of the membrane 570 is inserted, and the protrusion of the membrane 570 is inserted into the recessed portion of the adjacent membrane. In addition, a stripe 590 is formed at the center of the upper electrode 585 to uniformly operate the upper electrode 585 to prevent diffuse reflection of the incident light beam.

Referring to FIG. 5, the thin film type optical path adjusting apparatus includes a driving substrate 500 and an actuator 605 formed thereon.

The driving substrate 500 includes a transistor 515 including M × N (M, N is an integer) source region 515a, a gate electrode 515b, and a drain region 515c between the field oxide layer 520. An interlayer insulating layer 525 formed to expose portions of the source region 515a and the drain region 515c, and the gate electrode 515b not to be electrically connected to the source region 515a and the drain region 515c; A first metal layer 530 including a source line 530a and a drain pad 530b, an upper portion of the first metal layer 530, and an interlayer insulating layer 525 surrounding the gate electrode 515b. A lower protective layer 535, a second metal layer 540 formed on the lower protective layer 535, an opening 545 formed by removing a predetermined portion of the second metal layer 540, and a second The M-shaped structure is removed by removing a predetermined portion of the upper protective layer 550 and the upper protective layer 550 formed on the metal layer 540, the opening 545. Being, provided with an etch stop layer 555 is formed on top of the second metal layer 540 and third metal layer 610 and the upper protective layer 550 formed to be electrically isolated from the third metal layer (610).

The actuator 605 contacts one side of a portion of the etch stop layer 555 in which the drain pad 515c is formed, and the other side is spaced apart from the etch stop layer 555 by a predetermined distance through the air gap 565. Formed on the membrane 570, the lower electrode 575 formed on the membrane 570, the strained layer 580 formed on the lower electrode 575, and the strained layer 580. And an upper electrode 585 having a stripe 590 formed at the center thereof, and a distribution hole 595 and a distribution hole 595 vertically formed from one upper portion of the strained layer 580 to the drain pad 530b. And a distributor 600 formed perpendicularly to the inside thereof.

6A to 6E are manufacturing process diagrams of the apparatus shown in FIG.

Referring to FIG. 6A, a transistor 515 including a source region 515a, a gate electrode 515b, and a drain region 515c is formed between the field oxide layers 520.

The interlayer insulating layer 525 is formed while exposing the top of the field oxide layer 515 and a portion of the source region 515a and the drain region 515c. In addition, the interlayer insulating layer 520 is formed such that the gate electrode 515b does not electrically contact the source region 515a and the drain region 515c.

The first metal material layer 530 ′ is formed on the interlayer insulating layer 520 and the exposed source region 515a and the drain region 515c. Next, a portion of the first metal layer 530 formed on the interlayer insulating layer 525 surrounding the gate electrode 515b is removed to form the first metal layer 530. As such, when a predetermined portion of the first metal material layer 530 'is removed, the first metal layer 530 is divided into a source line 530a and a drain pad 530b, and the source line 530a and the drain pad ( 530b) is electrically isolated.

Subsequently, the lower passivation layer 535 is formed by using the silicate glass PSG on the upper portion of the first metal layer 530 and the exposed interlayer insulating layer 525. The lower protective layer 535 is formed to have a thickness of about 8000 Å by chemical vapor deposition (CVD). The lower protective layer 535 prevents the first metal layer 530 and its lower portion from being damaged.

A second metal layer 540 of titanium metal is formed on the lower passivation layer 535. In general, most of the light beams incident from the light source are reflected by the upper electrode 585, which will be described later. However, a small amount of the light beam is transmitted to the driving substrate 500 through a portion where the upper electrode 585 is not formed, thereby driving the driving substrate ( The photocurrent flows inside the 500). Therefore, the second metal layer 540 blocks the luminous flux transmitted to the driving substrate 500.

Subsequently, an opening 545 is formed by patterning a portion of the second metal layer 540 in which the distribution hole 595 is to be formed in a subsequent process.

Referring to FIG. 6B, the upper protective layer 550 is formed of the silicate glass PSG on the upper portion of the second metal layer 540 and the opening 545. The upper protective layer 550 prevents the second metal layer 540 and the lower portion thereof from being damaged.

Both sides of the portion of the upper protective layer 550 in which the opening 545 is formed at the lower portion thereof are removed. In this case, the horizontal distance d ₂ of the portion where the upper protective layer 550 is removed is greater than the width d ₁ of the opening 545. In addition, the second metal layer 540 is not exposed when the upper protective layer 550 is removed. This is because the third metal layer 610 and the second metal layer 540 which are subsequently formed should be electrically separated. Subsequently, an electrically conductive third metal material layer 610 ′ is deposited on the portion from which the upper protective layer 550 and the upper protective layer 550 are removed by a sputtering method.

Referring to FIG. 6C, the third metal material layer 610 ′ formed in the other portions, leaving the third metal material layer 610 ′ formed between the portions where the upper protective layer 550 is removed. Next, the third metal layer 610 having a 'M' shape is formed. The third metal layer 610 blocks the luminous flux from being transmitted to the driving substrate 500 through the opening 545 formed in the second metal layer 540. As a result, a photocurrent is generated inside the driving substrate 500. Prevent flow.

An etch stop layer 555 is formed on the upper passivation layer 550 and the third metal layer 610. The etch stop layer 555 is formed to have a thickness of 1000-2000 kPa with nitride by low pressure chemical vapor deposition. The etch stop layer 555 prevents the upper protective layer 550 and its lower portion from being damaged during subsequent processing.

The sacrificial layer 560 is formed on the etch stop layer 555. The sacrificial layer 560 is formed such that the silicate glass has a thickness of about 2.0 to 3.3 μm by an atmospheric pressure chemical vapor deposition method. In this case, since the flatness of the sacrificial layer 560 is very poor, the sacrificial layer 560 is flattened by using a spin on glass (SOG) method or a CMP method. Subsequently, a portion of the sacrificial layer 560 in which the drain pad 530b is formed is removed to expose a portion of the etch stop layer 555.

Referring to FIG. 6D, a membrane material layer 570 ′ is stacked on the exposed etch stop layer 555 and on the sacrificial layer 560. The membrane material layer 570 'is formed so as to have a thickness of about 1000 to 3000 kPa of nitride by low pressure chemical vapor deposition.

The lower electrode material layer 575 'is formed on top of the membrane material layer 570' using an electrically conductive material, for example, platinum, tantalum, platinum-tantalum, or the like. The lower electrode material layer 575 'is formed to have a thickness of about 2000 to 4000 micrometers by a sputtering method.

On top of the lower electrode material layer 575 'is formed a strained material layer 580' consisting of PZT or PLZT. The deformable material layer 580 'is formed to have a thickness of about 4000 to 6000 kPa using a sol-gel method, a sputtering method, or a chemical vapor deposition method. Subsequently, the strained material layer 580 ′ is subjected to rapid heat treatment (RTA) to cause phase change.

An upper electrode material layer 585 'is formed on one side of the strained material layer 580'. The upper electrode material layer 585 'is formed of a metal having excellent electrical conductivity and reflective properties, for example, a metal such as aluminum, silver, or platinum. In addition, the upper electrode material layer 585 'is formed to have a thickness of about 2000 to 6000 microns by a sputtering method.

Subsequently, the upper electrode material layer 585 ′ is patterned to have a predetermined pixel shape to form the upper electrode 585. The upper electrode 585 is applied with a bias signal as a common electrode. In addition, a stripe 590 is formed at the center of the upper electrode 585 to uniformly operate the upper electrode 585 to prevent diffuse reflection of the light beam incident from the light source.

Subsequently, the strained material layer 580 ′, the lower electrode material layer 575 ′, and the membrane material layer 570 ′ are patterned to have a predetermined pixel shape, respectively, so that the strained layer 580, the lower electrode 575, and the membrane ( 570 is formed. In this case, the sacrificial layer 560 formed under the membrane 570 is exposed.

The lower electrode 575, the membrane 570, the etch stop layer 555, the third metal layer 610, the upper protective layer 550, and the lower protective layer 535 are sequentially formed from the other side of the strained layer 580. It is etched to form a distribution hole 595. Therefore, the distribution hole 595 is vertically formed from the other side of the strained layer 580 to the drain pad 530b.

The inside of the distribution hole 595 is laminated with a material having excellent electrical conductivity, such as tungsten, aluminum, or titanium, by a sputtering method and then patterned to form a power distribution 600. Therefore, the distributor 600 electrically connects the drain pad 530b and the lower electrode 575 to transmit the image signal to the lower electrode 575.

Referring to FIG. 6E, the exposed sacrificial layer 560 is removed with hydrofluoric acid gas to form an air gap 565, and then cleaned and dried to complete the actuator 605.

As described above, the thin film type optical path adjusting device according to the present invention blocks the transmission of the light beam to the driving substrate through an opening formed in the second metal layer, so that the third metal layer having the shape of 'M' blocks the inside of the driving substrate. Since the photocurrent does not flow, the actuator can be prevented from malfunctioning before the image signal is applied.

As described above, although described with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified without departing from the spirit and scope of the invention described in the claims below. And can be changed.

Claims (6)

A transistor having a source region 515a, a gate electrode 515b, and a drain region 515c formed in a matrix form of M × N (M and N are integers) between the field oxide layers 520 of the driving substrate 500. 515, the interlayer insulating layer 525 formed so that the source region 515a, the gate electrode 515b, and the drain region 515c are electrically separated from each other, and a source line on the interlayer insulating layer 525. A first metal layer 530 having a 530a and a drain pad 530b, a lower passivation layer 535 formed on the first metal layer 530 and the gate electrode 515b, and the lower protection A second metal layer 540 formed on an upper portion of the layer 535, an opening 545 formed by removing a portion of a portion of the second metal layer 540 in which the drain pad 530b is formed, and the The upper protective layer 550 formed on the second metal layer 540 and the opening 545 and the upper protective layer 550 formed on the opening 545. A third metal layer 610 formed to have a (M) 'shape, an etch stop layer 555 formed on the upper passivation layer 550 and the third metal layer 610, and the etch stop layer ( A thin film type optical path control device having an actuator (605) formed on the upper portion of the (555). The method of claim 1, wherein the width d ₂ of the third metal layer 610 is greater than the width d _{1 of} the opening 545 to block the light beam incident on the opening 545. Thin film type optical path control device. The method of claim 1, wherein one side of the actuator 605 contacts a predetermined portion of the etch stop layer 555 in which the drain pad 530b is formed, and the other side of the actuator 605 is disposed through the air gap 565. The membrane 570 formed to be spaced apart from the prevention layer 555 by a predetermined distance, the lower electrode 575 formed on the membrane 570, and the strained layer 580 formed on the lower electrode 575. ), An upper electrode 585 formed at an upper portion of the strained layer 580, and having a stripe 590 formed at the center thereof, and from one upper side of the strained layer 580 to the drain pad 530b. A thin film type optical path control device comprising: a distribution hole (595) formed vertically; and a distribution unit (600) formed perpendicularly to the inside of the distribution hole (595). Forming a transistor 515 having a source region 515a, a gate electrode 515b, and a drain region 515c between the field oxide layers 520 of the driving substrate 500, and forming an upper portion of the transistor 515. And forming an interlayer insulating layer 525 on the field oxide layer 520, and a source line 530a and a drain pad 530b on the interlayer insulating layer 525 and the transistor 515. Forming a first metal layer 530 having a lower protective layer 535 on the interlayer insulating layer 525 formed on the first metal layer 530 and on the gate electrode 515. Forming a second metal layer 540 on the lower passivation layer 535, removing a predetermined portion of the second metal layer 540, and forming an opening 545; Forming an upper passivation layer 550 over the second metal layer 540 and the opening 545; Forming a third metal layer 610 on the passivation layer 550, forming an etch stop layer 555 on the upper passivation layer 550 and the third metal layer 610, and the etch stop layer Method of manufacturing a thin film type optical path control device comprising the step of forming an actuator (605) on top of the (555). The method of claim 4, wherein the forming of the third metal layer 610 comprises removing both sides of a portion of the upper passivation layer 550 in which the opening 545 is formed, and the upper passivation layer. Stacking the third metal material layer 610 ′ on the portion 550 and a portion from which the portion is removed, and the third metal material layer formed between the portion of the upper protective layer 550 removed ( And removing other portions, leaving 610 '). The method of claim 5, wherein the third metal layer (610) is formed so as not to be electrically connected to the second metal layer (540).