KR19990005470A - Aluminum alloy etching method - Google Patents
Aluminum alloy etching method Download PDFInfo
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- KR19990005470A KR19990005470A KR1019970029668A KR19970029668A KR19990005470A KR 19990005470 A KR19990005470 A KR 19990005470A KR 1019970029668 A KR1019970029668 A KR 1019970029668A KR 19970029668 A KR19970029668 A KR 19970029668A KR 19990005470 A KR19990005470 A KR 19990005470A
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- 238000005530 etching Methods 0.000 title claims abstract description 39
- 229910000838 Al alloy Inorganic materials 0.000 title claims abstract description 35
- 238000000034 method Methods 0.000 title claims abstract description 16
- 238000006243 chemical reaction Methods 0.000 claims abstract description 18
- 239000007795 chemical reaction product Substances 0.000 claims abstract description 6
- 229910052782 aluminium Inorganic materials 0.000 claims description 9
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 8
- 229910052751 metal Inorganic materials 0.000 abstract description 15
- 239000002184 metal Substances 0.000 abstract description 15
- 238000001312 dry etching Methods 0.000 abstract description 4
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 238000004898 kneading Methods 0.000 description 3
- 238000001465 metallisation Methods 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910018125 Al-Si Inorganic materials 0.000 description 1
- 229910018520 Al—Si Inorganic materials 0.000 description 1
- 229910017758 Cu-Si Inorganic materials 0.000 description 1
- 229910017931 Cu—Si Inorganic materials 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- AZDRQVAHHNSJOQ-UHFFFAOYSA-N alumane Chemical group [AlH3] AZDRQVAHHNSJOQ-UHFFFAOYSA-N 0.000 description 1
- 239000006227 byproduct Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000000678 plasma activation Methods 0.000 description 1
- 238000010791 quenching Methods 0.000 description 1
- 230000000171 quenching effect Effects 0.000 description 1
- 238000012421 spiking Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
- H01L23/53219—Aluminium alloys
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Drying Of Semiconductors (AREA)
Abstract
본 발명은 알루미늄 합금의 식각시, 식각 잔유물의 발생을 방지함과 동시에 알루미늄 합금 상부의 너칭 현상을 방지하는 금속 식각 방법을 제공하는데 그 목적이 있는 것으로, 이를 위해 본 발명은 알루미늄 합금을 금속배선화 하기 위한 건식 식각에 있어서, 알루미늄 식각후 발생되는, 반응챔버 내의 반응생성가스의 증기압이 높아지는 방향으로 상기 알루미늄 합금의 화학반응을 진행시켜 알루미늄 합금을 식각하는 것을 특징으로 하며, 바람직하게, 상기 반응챔버 내의 반응생성가스의 증기압이 높아지는 방향으로 상기 알루미늄 합금의 화학반응을 진행시키기 위하여, 챔버내의 압력을 3mT 내지10mT 로 조절하고, 상기 챔버내에 플라즈마를 생성하기 위한 RF 파워는 100W 내지 600W, 바이어스 파워는 1W 내지 300W로 조절하는 것을 특징으로 한다.The present invention is to provide a metal etching method for preventing the occurrence of etching residues and at the same time to prevent the etching residue on the aluminum alloy during the etching of the aluminum alloy, the present invention for this purpose is to wire the aluminum alloy In the dry etching, the aluminum alloy is etched by etching the aluminum alloy in a direction in which the vapor pressure of the reaction product gas in the reaction chamber increases after etching the aluminum alloy, preferably in the reaction chamber. In order to proceed the chemical reaction of the aluminum alloy in the direction of increasing the vapor pressure of the reaction product gas, the pressure in the chamber is adjusted to 3mT to 10mT, RF power for generating plasma in the chamber is 100W to 600W, bias power is 1W To 300W.
Description
본 발명은 반도체 장치 제조 방법에 관한 것으로, 특히 금속배선 형성을 위해 배선용 금속으로 알루미늄 합금을 사용하는데, 이때의 알루미늄 합금을 식각하는 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to an aluminum alloy as a metal for wiring to form metal wiring, and to a method of etching an aluminum alloy at this time.
통상적으로, 알루미늄(Al)은 증착하기 쉽고, 식각도 용이하면서, 비저항이 낮아 반도체 장치의 동작에 매우 우수하기 때문에 배선용 금속으로 사용되고 있다. 그러나 순수 알루미늄만을 사용할 때에는 전도막으로 사용되는 실리콘과 연결될 때 두 물질의 용해도 차이로 인하여 상호간에 원자 확산이 발생하게되고, 이는 실리콘 기판에 형성된 접합(junction)의 성질이 변하여 반도체 소자의 동작에 치명적인 악영향을 미친다. 이를 접합 스파이킹(junction spiking)이라 하며, 이의 방지를 위하여 알루미늄에 소량의 실리콘(Si)을 첨가한 Al-Si 금속을 배선용 금속으로 사용한다. 또한, Cu도 소량 첨가하는데 이는 금속배선에 전류가 흐를 때 발생하는 전장 때문에 알루미늄 원자가 움직여서 금속배선이 끊어지는 현상(EM : Electro Migration)을 막기 위해서이다.Generally, aluminum (Al) is used as a wiring metal because it is easy to deposit, easy to etch, and has a low specific resistance and is very excellent in the operation of a semiconductor device. However, when pure aluminum is used, atomic diffusion occurs between the two materials due to the difference in solubility of the two materials when they are connected to silicon used as a conductive film, which is fatal to the operation of the semiconductor device due to a change in the nature of the junction formed on the silicon substrate. Adversely affects. This is called junction spiking. In order to prevent this, Al-Si metal containing a small amount of silicon (Si) is used as a wiring metal. In addition, a small amount of Cu is added to prevent the electromechanical breakdown (EM: Electromigration) due to the movement of aluminum atoms due to the electric field generated when current flows through the metal wiring.
그러나, Al에 첨가한 Si과 Cu 등의 존재는 금속배선을 형성하기 위한 식각 과정에서 그레인 바운더리(Grain Boundary)에 많이 존재하는 Cu와 Al, Si등이 뭉쳐서 쉽게 식각되지 않고 잔사 형태의 잔존물로 남아서 브리지(bridge)를 유발하는 단점이 있다.However, the presence of Si, Cu, etc. added to Al is not easily etched because Cu, Al, Si, etc., which are present in the grain boundary (Grain Boundary) agglomerate in the etching process for forming metal wiring, remains as a residue in the form of residue. There is a disadvantage of causing a bridge.
이러한 잔존물의 제거를 위해서는 건식식각시 플라즈마를 발생시키는 소오스 파워(Source Power, 혹은 RF 파워라고도 함)와 바이어스(bias) 파워를 높여야만 한다. 그러나 파워의 증가는 식각 마스크로 형성되어 있는 레지스트(resist)와의 선택비를 떨어뜨려서 식각 잔유물은 없으나, 금속배선의 상부에 너칭(Notching)을 일으켜 원하는 전류의 양을 흘릴 수 없는 단점이 존재한다.In order to remove these residues, source power (also referred to as source power, or RF power) and bias power that generate plasma during dry etching must be increased. However, the increase in power lowers the selectivity with a resist formed as an etch mask, so there is no etch residue, but there is a disadvantage in that it cannot cause a desired amount of current due to notching on the upper part of the metal wiring.
도 1은 알루미늄내에 포함되어 있는 Si, Cu 등에 의해, 식각 후 식각잔유물이 잔존하는 보여주는(도면에서 알루미늄 합금 배선 이외 지역에 나타나는 흰 부분) 평면도이고, 도 2a 및 도 2b는 식각 잔유물을 제거하기 위하여 플라즈마 활성화를 위한 파워를 증가시켰을 때, 금속 윗부분에서 너칭이 발생되는 것을 보여준다.FIG. 1 is a plan view showing etching residues remaining after etching (Si white, which appears in areas other than aluminum alloy wiring in the drawing) by Si, Cu, etc. contained in aluminum, and FIGS. 2A and 2B are diagrams for removing etch residues. When increasing the power for plasma activation, it is shown that the kneading occurs on top of the metal.
본 발명은 알루미늄 합금의 식각시, 식각 잔유물의 발생을 방지함과 동시에 알루미늄 합금 상부의 너칭 현상을 방지하는 금속 식각 방법을 제공하는데 그 목적이 있다.SUMMARY OF THE INVENTION An object of the present invention is to provide a metal etching method for preventing the occurrence of etching residues while preventing etching of an upper portion of an aluminum alloy during etching of an aluminum alloy.
도 1은 종래의 식각 잔유물이 잔존하는 것을 보여주는 평면도.1 is a plan view showing that the conventional etching residues remain.
도 2a 및 도 2b는 종래의 너칭 현상을 보여주는 평면도.2a and 2b is a plan view showing a conventional kneading phenomenon.
도 3a 및 도 3b는 Lam Research 사의 TCP9608 장비를 사용하여, 본 발명에 따라 알루미늄 합금의 배선을 형성한 상태의 평면도.3A and 3B are plan views of the aluminum alloy wirings formed according to the present invention using TCP9608 equipment of Lam Research.
상기 목적을 달성하기 위하여 본 발명의 알루미늄합금 식각 방법은, 알루미늄 합금을 금속배선화 하기 위한 건식 식각에 있어서, 알루미늄 식각후 발생되는, 반응챔버 내의 반응생성가스의 증기압이 높아지는 방향으로 상기 알루미늄 합금의 화학반응을 진행시켜 알루미늄 합금을 식각하는 것을 특징으로 하며, 바람직하게, 상기 반응챔버 내의 반응생성가스의 증기압이 높아지는 방향으로 상기 알루미늄 합금의 화학반응을 진행시키기 위하여, 챔버내의 압력을 3mT 내지10mT 로 조절하고, 상기 챔버내에 플라즈마를 생성하기 위한 RF 파워는 100W 내지 600W, 바이어스 파워는 1W 내지 300W로 조절하는 것을 특징으로 한다. 또한, 알루미늄 식각을 위한 주 에천트를 Cl2가스로하고, 식각 프로파일의 개선을 위해 BCl3와 N2를 소량 첨가하며, 이때 상기 Cl2와 BCl3의 비율을 3 : 1∼1 : 3으로 조절하고, 상기 Cl2와N3의 비율을 4:1 이하로 조절하는 것을 특징으로 한다.In order to achieve the above object, the aluminum alloy etching method of the present invention, in the dry etching for metallization of the aluminum alloy, the chemical reaction of the aluminum alloy in the direction of increasing the vapor pressure of the reaction product gas in the reaction chamber generated after the aluminum etching. Characterize the aluminum alloy by etching the reaction, preferably, in order to advance the chemical reaction of the aluminum alloy in the direction of increasing the vapor pressure of the reaction product gas in the reaction chamber, the pressure in the chamber is adjusted to 3mT to 10mT In addition, the RF power for generating a plasma in the chamber is characterized in that to adjust the power to 100W to 600W, 1W to 300W. Further, the etchant week for aluminum etching gas, and Cl 2, and the small amount of BCl 3 and N 2 for the improvement of the etching profile, wherein the ratio of the Cl 2 and BCl 3 3: 1~1: 3 adjusts And it is characterized by adjusting the ratio of Cl 2 and N 3 to 4: 1 or less.
이하, 본 발명을 상세히 설명한다.Hereinafter, the present invention will be described in detail.
본 발명은 반도체 장치를 제조함에 있어, 알루미늄 합금을 금속 배선으로 형성하기 위한 건식 식각 공정시, 챔버 내의 압력을 낮추어줌으로써, 알루미늄 식각후 발생되는 부산물인 AICIx의 증기압이 높아지는 방향으로 화학반응이 진행되도록 조절하는 것이다. 다시 말하면, 알루미늄 합금의 화학반응에 의한 식각을 촉진시켜서 너칭을 피하면서, 효과적으로 잔유물을 제거하는 것이다.According to the present invention, in the manufacture of a semiconductor device, during a dry etching process for forming an aluminum alloy as a metal wiring, by lowering the pressure in the chamber, a chemical reaction proceeds in a direction in which the vapor pressure of AICI x , a byproduct generated after aluminum etching, increases Adjust as much as possible. In other words, it promotes the etching by the chemical reaction of the aluminum alloy to avoid the nugget, while effectively removing the residue.
본 발명에서는, 알루미늄이 주 에천트(Main Etchant)인 Cl2가스와 활발한 화학 반응을 일으킬 수 있도록 식각 처리(etch recipe)를 조절하기 위해서, 먼저 반응챔버 내의 압력을 10mT 이하로 낮추었다. 낮은 압력에서는 식각이 진행되면서 발생된 챔버 내부의 AlClx의 증기압이 낮기 때문에 반응은 증기압을 높이는 방향으로 진행된다. 이는 결국 알루미늄 합금과의 화학반응을 촉진시켜 식각이 빨라지고 이를 통하여 Al-Cu-Si 등의 혼합형태로 존재하는 잔유물을 효과적으로 제거한다.In the present invention, the pressure in the reaction chamber is first lowered to 10 mT or less in order to control the etch recipe so that aluminum may cause an active chemical reaction with Cl 2 gas, which is the main etchant. At low pressure, the reaction proceeds in the direction of increasing the vapor pressure because the AlClx vapor pressure inside the chamber generated during etching is low. This accelerates the chemical reaction with the aluminum alloy and thus speeds up the etching, thereby effectively removing the residues present in the mixed form of Al-Cu-Si.
동시에 플라즈마를 일으키는 RF 파워를 600W 이하로 조절하고, 바이어스 파워를 300W이하로 조절하여, 금속 식각시 레지스트와의 선택비를 향상시킴으로써 금속배선의 상부 너칭 현상을 제거할 수 있다.At the same time, by adjusting the RF power to generate a plasma to 600W or less, and the bias power to 300W or less to improve the selectivity with the resist during metal etching, it is possible to eliminate the upper kneading phenomenon of the metal wiring.
또한, 알루미늄 합금의 배선을 위한 식각시, 가스는 Cl2를 주 에천트로 하고, 식각되는 배선의 프로파일 개선을 위하여, BCl3와 N2를 소정량 첨가한다.In addition, when etching for the wiring of the aluminum alloy, the gas is Cl 2 as the main etchant, and in order to improve the profile of the wiring to be etched, a predetermined amount of BCl 3 and N 2 is added.
Cl2와 BCl3의 비는 3 : 1 ∼ 1 : 3 사이의 비율로 하고, Cl2와N3의 비율을 4:1 이하로하여 N2는 Cl2양의 20% 이하로 조절하고, 웨이퍼가 올려지는 전극의 온도는 0℃∼80℃ 범위로 제어한 상태에서, 식각을 실시한다.The ratio of Cl 2 to BCl 3 is set to 3: 1 to 1: 3, the ratio of Cl 2 to N 3 is 4: 1 or less, and N 2 is adjusted to 20% or less of the amount of Cl 2 , and the wafer The temperature of the electrode to be raised is etched in a controlled state in the range of 0 ° C to 80 ° C.
도 3a 및 도 3b는 Lam Research 사의 TCP9608 장비를 사용하여, 본 발명에 따라 알루미늄 합금의 배선을 형성한 상태에서, SEM 장비를 사용하여 금속배선을 촬영한 결과를 나타내는 평면도로서, 도면에 도시된 바와같이 식각 잔유물과 너칭 현상이 없이 양호한 금속배선을 얻을 수 있음을 보여준다.3A and 3B are plan views illustrating the results of photographing metal wirings using SEM equipment in a state in which aluminum alloy wirings are formed according to the present invention using TCP9608 equipment of Lam Research, as shown in the drawings. Similarly, it shows that good metallization can be obtained without etching residue and no quenching phenomenon.
본 발명에 의하면, 기존의 금속배선 형성 공정에서 가장 큰 문제가 되었던 식각 잔유물에 의한 브리지 문제를 개선함으로써 반도체 소자의 안전적인 동작을 통하여 신뢰성이 향상되고 아울러 수율의 향상이 기대된다. 또한 식각 잔유물 제거를 위해서 무리하게 식각 타겟을 증가(파워 증가)시키지 않아도 되므로 레지스트와의 선택비의 감소에 따른 너칭 문제를 염려하지 않아도 된다.According to the present invention, by improving the bridge problem due to the etch residue, which has been the biggest problem in the existing metallization process, the reliability is improved and the yield is improved through the safe operation of the semiconductor device. In addition, since the etching target does not have to be excessively increased (power increase) to remove the etching residue, there is no need to worry about the nuggeting problem caused by the decrease in selectivity with the resist.
Claims (7)
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019970029668A KR100324606B1 (en) | 1997-06-30 | 1997-06-30 | Method for etching Aluminum alloy layer |
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| KR1019970029668A KR100324606B1 (en) | 1997-06-30 | 1997-06-30 | Method for etching Aluminum alloy layer |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR100450239B1 (en) * | 2002-06-05 | 2004-09-24 | 아남반도체 주식회사 | Method of fuse disconnection |
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| JPH03218013A (en) * | 1990-01-24 | 1991-09-25 | Hitachi Ltd | Dry etching method |
| JP3200949B2 (en) * | 1992-03-28 | 2001-08-20 | ソニー株式会社 | Dry etching method |
| JPH0697127A (en) * | 1992-09-14 | 1994-04-08 | Hitachi Ltd | Formation of wiring |
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| KR100450239B1 (en) * | 2002-06-05 | 2004-09-24 | 아남반도체 주식회사 | Method of fuse disconnection |
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