KR19980076963A - Bump Formation Method of Semiconductor Chip - Google Patents

Abstract

The present invention relates to a bump forming method of a semiconductor chip, and the plurality of pads formed on the upper surface of the semiconductor chip are reconfigured to be distributed over the entire surface of the active region of the chip using the same number of metal pads, and then the plurality of metals are thus reconstituted. A bump is formed of a semiconductor chip by depositing a conductive material on a pad to a predetermined height to form a bump, and connecting the bump and the original pad by a metal line to form a large-pitch bump. Such a bump forming method of a semiconductor chip according to the present invention comprises reconfiguring the pads of chips arranged in fine-pitch to have a large-pitch distributed over the entire surface of the chip, and then forming bumps on the reconfigured pads. It is possible to overcome the bump formation limit of the pitch. In addition, the bump formation can be performed over the entire surface of the chip to maximize the freedom of the bump location, thereby easily coping with chip bonding to the substrate and design limitations of the substrate. In addition, even in the case of a pad having a small size due to the reduction in size and size of the chip, it is possible not only to form a bump having high reliability and shear strength, but also to minimize a defect in bump formation and a defect that may occur during chip bonding.

Description

Bump Formation Method of Semiconductor Chip

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming bumps for electrical conduction and mounting with an external device on a pad formed on an upper surface of a semiconductor chip. Particularly, bump formation of a chip having fine-pitch pads is provided. It relates to a bump forming method of a semiconductor chip suitable for.

In general, an active area of a semiconductor chip manufactured through a predetermined number of unit processes is provided with an electrode, that is, a pad, for electrical conduction to the outside. In such a pad, an external connection pad is connected, or in some cases a bump is formed and used as an external connection pad. In other words, in the flip chip, chip on glass, chip on board, and chip on flex, as described above, a separate conductive bump is formed on the pad to allow external It is used as a connection terminal.

The bumps as described above are generally formed by forming an under barrier metal to a predetermined thickness on an upper surface of a semiconductor chip, that is, a surface on which a pad is formed, and then aligning and etching the mask. Looking at it in more detail as follows.

As shown, a conventional bump forming method includes depositing an under barrier metal to a predetermined thickness on an upper surface of a wafer that has been subjected to a predetermined unit process, coating a photoresist on the metal layer, and a pad of the coating layer. Mask-aligning the formation position, exposing and developing the mask-aligned coating layer to open the pad position, plating the conductive material on the exposed portions in the above step, photoresist stripping step; The final under barrier metal etching step is performed.

However, the bump forming method of a general semiconductor chip as described above has a problem that bump formation is impossible in the case of a fine-pitch pad. In addition, as part of the fine pitch configuration, as the pad size of the chip is reduced, there is a problem that the reliability and shear strength of bump formation are deteriorated. In addition, the conventional bump forming method has a problem that defects frequently occur during bump formation and defects occur during bonding by forming bumps on pads of fine pitch as they are, and improvement is required.

SUMMARY OF THE INVENTION An object of the present invention is to provide a bump formation method for a semiconductor chip capable of forming large-pitch bumps by distributing bumps over the entire active region of the chip.

Another object of the present invention is to provide a bump forming method of a semiconductor chip capable of forming bumps having excellent reliability and shear strength even when the pad size of the chip is small by having a large number of pads.

1 is a process flowchart illustrating a bump forming method of a conventional general semiconductor chip.

2 to 8 are diagrams for explaining a bump forming method of a semiconductor chip according to the present invention,

2A is a top view of a wafer,

2B is a plan view showing an Hanan die extracted from the wafer;

2C is a cross-sectional view of FIG. 2B;

3 is a cross-sectional view of the photoresist coated on the die shown in FIG. 2C;

4A and 4B are cross-sectional and partial plan views of a developed / exposed state after mask aligning the coated photoresist;

5A and 5B are a cross-sectional view and a partial plan view of a bump formation state,

6A and 6B are a cross-sectional view and a partial plan view of a state in which photoresist is removed after bump formation;

7 is a sectional view of a re-photoresist coating state;

FIG. 8 is a partial plan view of a developed / exposed state after mask alignment of the re-coated photoresist of FIG. 7.

* Description of the symbols for the main parts of the drawings *

1: wafer 2: semiconductor chip

3: under barrier metal layer 4: adhesive metal layer

5: first photoresist layer 6: bump

7: second photoresist layer 8: metal line

An object of the present invention as described above, after reconstituting a plurality of pads formed on the upper surface of the semiconductor chip to be distributed over the entire surface of the active region of the chip using the same number of metal pads, and then a conductive material on the plurality of metal pads It is achieved by providing a bump forming method of a semiconductor chip, characterized in that to form a bump by depositing to a predetermined height, and the bump and the original pad is connected by a metal line to form a large-pitch bump.

Such a bump forming method of a semiconductor chip according to the present invention comprises reconfiguring the pads of chips arranged in fine-pitch to have a large-pitch distributed over the entire surface of the chip, and then forming bumps on the reconfigured pads. By overcoming the bump formation limit of the pitch, bumps with high reliability can be formed in the chip pad in any case.

EXAMPLE

Best Mode for Carrying Out the Invention Preferred embodiments of the present invention will be described below with reference to the accompanying drawings.

2 to 8 are views for explaining a bump forming method of a semiconductor chip according to the present invention. FIG. 2A is a plan view of the wafer, FIG. 2B is a plan view of Hanan's die taken from the wafer, FIG. 2C is a sectional view of FIG. 2B, and FIG. 3 is a photoresist coated on the die shown in FIG. 2C. It is a cross section of the condition. 4A and 4B are cross sectional and partial plan views of a developed / exposed state after mask aligning the coated photoresist, FIGS. 5A and 5B are sectional and partial plan views of a bump formation state, and FIGS. 6A and 6B are bump formations It is sectional drawing and a partial plan view of the state after removing a photoresist. 7 is a cross-sectional view of the re-photoresist coating state, and FIG. 8 is a partial plan view of the developed / exposure state after mask alignment of the re-coated photoresist of FIG. 7.

In the drawing, reference numeral 1 denotes a wafer, and 2 denotes a semiconductor chip extracted from the above-described wafer 1, and as illustrated, a plurality of pads 2a are fine on the upper edge of the semiconductor chip 2. It is arranged in pitch. According to the present invention, the fine-pitch paddles are reconfigured and distributed in large-pitch over the upper surface of the chip 2, and the reconstruction step of the pad is as follows.

The first step for the reconstruction of the pads (which is also the first step of the bump forming method according to the present invention) is that of the wafer 1 (which contains a plurality of semiconductor chips) which has been subjected to a predetermined number of unit processes. A barrier metal is deposited on the entire surface to form the under barrier metal layer 3 having a predetermined thickness. Here, as the barrier metal, Ti / W / Au, Cu / Ni + Cr / Cu, or the like may be used, and the thickness may be about 2000 μs to 7500 μs. In addition, a method of depositing a barrier metal may use a conventional deposition method or a vapor deposition method.

In FIG. 2C, reference numeral 4 denotes an adhesive metal layer, which is formed to improve adhesion to a photoresist described later, and is formed by depositing gold or copper by sputtering or vapor deposition.

After forming the under barrier metal layer as described above, a photoresist is coated on the metal layers 3 and 4 to form a photoresist layer 5 having a predetermined thickness. At this time, it is appropriate that the thickness of the photoresist layer be at least 10 μm and at most 200 μm.

Thereafter, the metal pad formation positions of the photoresist layer 5 are aligned with a mask, and the size of the metal pad to be formed is at least 50 × 50 μm or more.

Then, when the mask-aligned photoresist layer is opened through an exposure and development process, the under-barrier metal is exposed to form a metal pad, thereby reconstructing the pad.

The conductive metal is plated on the metal pad reconstructed by the process as described above to form the bumps 6 and the remaining photoresist is removed. The bump may be formed using an electroplating or an electroless dipping method.

After the process as described above, the process of electrically connecting the bump 6 and the original pad (1a) proceeds, which consists of the following process.

After the second photoresist layer 7 is formed on the entire upper surface of the chip on which the bumps 6 are formed, the photoresist layer 7 is mask aligned. The alignment portion is a portion from the original pad portion to the metal pad. Align the area except for.

When the photoresist is exposed and developed after alignment of the mask as described above, the original pad and the connection part are step covered by the photoresist, and all the remaining parts are exposed by the under barrier metal. In this state, the exposed under barrier metal is etched. After the photoresist is removed, a metal line 8 is formed by the under barrier metal between the original pad and the bump to connect the original pad and the bump. Here, the second photoresist layer may be formed to a thickness of 5 μm or more lower than the height of the bump, and the width of the metal line may be about 10 μm to 100 μm.

Finally, passivation is performed to the exposed original pads and metal lines to form large-pitch bumps distributed over the entire surface of the semiconductor chip.

That is, the present invention reconstructs the pads arranged in fine-pitch to be distributed in fine pitch over the entire surface of the chip, and then forms bumps in the reconfigured pads to form large-pitch bumps. It is possible to form bumps with high reliability by overcoming bump forming limits.

As described above, in the bump forming method of the semiconductor chip according to the present invention, the pads of the chips arranged in fine-pitch are reconfigured to be distributed in large-pitch over the entire upper surface of the chip, and then bumps are formed on the reconfigured pads. By forming, it is possible to overcome the bump forming limit of fine-pitch. In addition, the bump formation can be performed over the entire surface of the chip to maximize the freedom of the bump location, thereby easily coping with chip bonding to the substrate and design limitations of the substrate. In addition, even in the case of a pad having a small size due to the reduction in size and size of the chip, it is possible not only to form a bump having high reliability and shear strength, but also to minimize a defect in bump formation and a defect that may occur during chip bonding.

Although one embodiment for carrying out the method for forming a bump of a semiconductor chip according to the present invention has been shown and described above, the present invention is not limited to the above-described embodiment, and the gist of the present invention as claimed in the following claims. Various changes can be made by those skilled in the art without departing from the scope of the present invention.

Claims (5)

The pads formed on the upper surface of the semiconductor chip are reconfigured to be distributed over the upper surface of the chip by using the same number of metal pads, and then bumps are formed on the metal pads, and the original pads and the metal pads are connected by metal lines. A bump forming method of a semiconductor chip formed by a pitch bump, Forming an under barrier metal layer on the entire upper surface of the chip; Coating a photoresist on the under barrier metal layer and mask aligning a metal pad formation position of the photoresist layer; Exposing and developing a mask aligned photoresist layer to open a metal pad formation position; Plating and filling a conductive material at an open metal pad position of the photoresist layer; Removing the photoresist to expose the bumps and forming a second photoresist layer on the structure at a height lower than the height of the bumps; Mask aligning the entire surface of the second photoresist layer except for the original pad position and the metal line position; Exposing and developing the mask aligned second photoresist layer to expose the under barrier metal layer of the mask aligned portion; And etching the under barrier metal layer exposed by the above step, removing the photoresist to expose the original pad and the metal line. The bump forming method of claim 1, wherein the under barrier metal layer is formed by depositing Ti / W / Au or Cu / Ni + Cr / Cu with a thickness of at least 2000 kPa and up to 7500 kPa. The metal pad to be reconstituted is formed with a size of at least 50 ㎛ × 50 ㎛ to a maximum of 200 ㎛ × 200 ㎛ with a spacing of 100 ~ 200 ㎛, located on the front of the chip or left / right of the original pad The bump forming method of a semiconductor chip, characterized in that. The bump forming method of claim 1, wherein the metal line has a width of about 10 μm to about 100 μm. 2. The method of claim 1, further comprising a passivation process for protecting the exposed original pads and metal lines.