KR19980061777A - Frame Relay Matching Device in ATM Switching System - Google Patents

Abstract

The present invention relates to a matching device for connecting a frame relay network or a terminal to an ATM network implemented as an ATM switch.

Such an apparatus of the present invention includes a physical layer processor 45 which provides a physical connection with a DS1E link; A frame relay matching unit 44 for providing a frame relay service through the physical layer processing unit; AAL5 reconstructs the data input through the frame relay matching unit, converts the data into AAL5 form, forms an ATM cell, transfers it to the ATM network, assembles the ATM cell received from the ATM network into AAL5 type, and outputs the AAL5 to the frame relay matching unit. A processor 42; A cellbus matching unit 43 for matching with the cellbus to connect the AAL5 processing unit to a multiplexing device on the switching side; And a module controller 41 which transmits / receives an IPC with an upper network management system and controls the respective functional blocks to connect a frame relay network or a terminal to an ATM network.

Description

Frame Relay Matching Device in ATM Switching System

The present invention relates to a technique for connecting a frame relay network or a terminal to an ATM network implemented as an ATM switch, and more particularly, to an apparatus for matching a frame relay service to an ATM switch through a plurality of DS1E links.

In general, an ATM switch is a system that performs a node function to connect an ATM network, an ATM network, or a subscriber to an ATM network in the case of a public network based on an ATM method. (VP) is divided into exchanges.

The ATM switching system is implemented with a subscriber matching device, a switch network, a relay line matching device, and the like and processors for controlling them.

The subscriber matching device performs UPC traffic control functions along with UNI physical layer matching, ATM layer processing, IPC cell and user cell separation delivery, header conversion, and OAM processing. In addition, the subscriber matching device may include a low and low speed subscriber matching function for the existing subscriber service as well as ATM subscriber.

ATM switch networks are realized by multiple stages of unit switches capable of high-speed switching of hundreds of Mbits. ATM unit switches are divided into input buffers, output buffers, common memories, common buses, cross point switches, and the like according to the configuration.

ATM trunk line matching device performs NNI interface physical layer processing, ATM layer processing, OAM processing, and the traffic control function works in conjunction with switch network. It also includes interworking with other networks such as existing telephone network, N-ISDN, packet network, frame relay network, etc.

On the other hand, the ATM switch is a large-capacity ATM switch for performing the function as a core node of the B-ISDN according to its capacity, and a local information communication network (MAN) to support ATM communication locally required in the process of B-ISDN. (Metropolitan Area Network) can be divided into a small amount of ATM switch used in the construction. In other words, ATM-MSS can be directly interworked with broadband ISDN and ATM-based MAN Switching System to accommodate the services that broadband ISDN can provide. )to be.

Such a small ATM switch needs to connect various subscribers. To this end, a remote switching node (RSN) for connecting subscribers, a hub switching node (HSN) for connecting a plurality of remote switching nodes, and a system are managed. It is a switch of a distributed exchange structure composed of a network management system (MSS-EMS).

On the other hand, the frame relay network used for high-speed data transmission prior to the ATM network is widely used, and 'FRAME RELAY' is a technology grown in the ISDN standard, and used in the link access protocol D (LAP-D). Based on the data link layer protocol, the bit error rate of digital data transmission has drastically decreased according to the development of transmission method and switching system, thus eliminating the need to correct errors in each link in the circuit. .

That is, the basic feature of the frame relay is to perform only some of the functions of Layer 2, which are essential for data transmission, in order to minimize the burden on the network and to achieve high efficiency (i.e., high-speed transmission), and instead to link data between end terminals. It is to perform all the functions of the layer. This is made possible by the reduction of the error rate with the development of the transmission system.

This frame relay structure is similar to other ISDN bearer services, but separates the user channel connection configuration and data transmission, but can provide data service up to 2Mbps and is provided by the core function of Q.922 in the user area. Flexing-this is done by the address area of the Q.922 core function called Data Link Connection Identifier (DLCI).

Therefore, when the existing frame relay network is connected to the ATM network, the types of services are diversified, thereby increasing the satisfaction of the existing subscribers.

Accordingly, an object of the present invention is to provide a frame relay matching device capable of connecting an ATM network and a frame relay network by connecting a frame relay through a plurality of DS1E links in a small capacity ATM switch.

In order to achieve the above object, in the apparatus of the present invention, a frame relay matching board for providing a frame relay service through a plurality of DS1E links is connected to a multiplexing and demultiplexing board through a cell bus, and this multiplexing and demultiplexing is performed. In the ATM switch, the board multiplexes and demultiplexes the frame relay subscriber's cells and connects them to the cell switching board. The cell switching board includes a network management board and a node access board.

The frame relay matching board may include a physical layer processor configured to provide a physical connection with a DS1E link; A frame relay matching unit for providing a frame relay service through the physical layer processing unit; Reconstruct the data inputted through the frame relay matching unit, convert the data into AAL5 form, form an ATM cell, transfer the result to the ATM network, assemble the ATM cell received from the ATM network into AAL5 type, and output the same to the frame relay matching unit. An AAL5 processor; A cell bus matching unit for matching with the cell bus to connect the AAL 5 processing unit to a multiplexing device on a switching side; And a module control unit which transmits / receives an IPC with an upper network management system and controls the respective functional blocks.

1 is a block diagram showing the overall structure of an ATM switch to which the present invention is applied;

FIG. 2 is a detailed block diagram of the remote switching node RSN shown in FIG. 1;

3 is a detailed block diagram of the hub switching node (HSN) shown in FIG.

4 is a block diagram showing the configuration of a frame relay matching device according to the present invention;

5 is an embodiment of a frame relay matching device according to the present invention.

* Explanation of symbols for main parts of the drawings

41: Module control function unit 42: PAAL5 function unit

43: Selbus matching unit 44: Frame relay matching unit

45: physical layer functional unit 300: processor

301: Romans 302

310: E1 transmitter and receiver 320: frame relay controller

330: AAL 5 matching unit 340: Selbus matching unit

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram showing the structure of an ATM switch to which the present invention is applied, FIG. 2 is a detailed block diagram of a remote switching node (RSN) shown in FIG. 1, and FIG. 3 is a hub switching node shown in FIG. Detailed block diagram of (HSN).

As shown in FIG. 1, the small-capacity ATM switch 1 to which the present invention is applied has a plurality of Remote Switching Nodes (RSNs) 10-1 to 10-5 for accommodating DS1E or DS3 level subscribers. And a hub switching node (HSN) 20 for connecting a plurality of remote switching nodes (RSNs) and a network management system (EMS) 30 for managing a system. At this time, another ATM switch 2 is connected to the hub switching node (HSN) 20 to configure a B-ISDN network.

As shown in FIG. 2, the remote switching node RSN includes a subscriber matching module (SIM) 110, a cell switching module (CSM) 120, a remote switching node control module (RNCM) 130, and a node access module (NIM). The subscriber matching module (SIM: 110) includes a subscriber matching board (SAD3: 111) for matching DS3 level subscribers and a subscriber matching board (SAE1: 113) for matching DS1 level subscribers. And a subscriber registration board (FRIA: 114) for matching frame relays, a first multiplexing / demultiplexing board (D3MA: 112) for multiplexing and demultiplexing cells of a DS3 class subscriber, and multiplexing and demultiplexing a cell of a DS1 class subscriber. A second multiplexing / demultiplexing board (D1MA) 115 is provided for multiplexing.

The cell switching module (CSM) 120 is composed of a plurality of cell switching boards (CSA), the node connection module (NIM) 140 is composed of a plurality of node connection boards (NIA), and a remote switching node control module (RNCM: 130 is composed of a hard disk drive (HDD: 132), a remote node management board (RNMA: 134).

Referring to Figure 2, the node management board (RNMA: 134) performs the agent function of performance management, failure management, configuration management, security management, billing management function specified in the TMN, node management of the hub switching node (HSN) It establishes an ATM connection with the board (HNMA) and communicates with the network management system (EMS) connected to the node management board (HNMA) of the hub switching node (HSN) via Ethernet.

The cell switching board (CSA) 120 receives a cell from each board in a node and transfers the cell to a corresponding destination board based on a routing field of a header. The cell switching board (CSA) 120 typically has 8x8 ports and each port exchanges a cell of up to 155Mbps. Have the ability. To support point-to-multipoint connections, cell copying can be performed as indicated in the cell header, and buffers are provided to prevent temporary congestion.

The node connection module (NIM: 140) is composed of a plurality of node connection boards (NIA: 142,144), and serves to connect the hub switching node (HSN) and the remote switching node (RSN), and the node connection board (NIA) It connects hub switching node (HSN) and remote switching node (RSN) through one STM-1 link, and provides physical layer and physical layer management function, ATM layer and ATM layer management function, traffic management function, protection switching function, etc. Perform.

Here, the physical layer function performs the function of terminating and generating the 155.52 Mbps line signal, terminating and generating the STM-1 frame, cell matching, and the physical layer management function extracts the performance coefficient of the physical layer, and the node management board It consists of a performance management function that reports to the RNMA and a failure management function that detects and recovers from failures in the physical layer, records the occurrence and release of it, and makes an emergency report.

ATM layer functions include cell multiplexing and demultiplexing, cell generation and termination, discarding unassigned and invalid cells, and cell header conversion. ATM layer management functions are instructed by the Node Management Board (RNMA: 134). Performance monitoring, connectivity check, loopback, etc. are performed for the connection, and the result is reported or an alarm cell is generated and transmitted for the failure condition of a specific connection. The traffic management function extracts and reports the traffic parameters of the link.

Subscriber matching module (SIM) 110 connects DS1E and DS3-class subscribers. Frame relay access board (FRIA) is connected to frame relay switch to send and receive frame relay packet, and circuit emulation access board (CIE) is the circuit of DS1E. Perform emulation function.

In addition, the subscriber matching board (SAE1: 113) is connected to the DS1E multiplexing board (D1MA: 115) through four DS1E links. Cells received from each DS1E link are transmitted to the DS1E multiplexing board, and cells received from the DS1E multiplexing board are demultiplexed and transmitted to the corresponding link (port) based on the routing field of the header.

The subscriber matching board (SAE1: 113) performs physical layer, physical layer management function, ATM layer and ATM layer management function, traffic management function, protection switching function, etc., and the physical layer function terminates and generates 2.048Mbps line signal. , CRC multiframe termination and generation, and cell matching. The physical layer management function consists of a performance management function that extracts the performance coefficient of the physical layer, reports it to the RNMA, and detects and recovers from a failure state of the physical layer, records the occurrence and release of the physical layer, and makes an emergency report.

ATM layer functions include cell multiplexing and demultiplexing, cell generation and termination, discarding unallocated and invalid cells, and cell header translation. ATM layer management function performs the performance monitoring, connectivity check, loopback, etc. for the connection indicated by the node management board (RNMA), and reports the result or forms an alarm cell for the failure of a specific connection. Do this. The traffic management function extracts and reports the traffic parameters of the link.

The DS1E Multiplexing Board (D1MA: 115) receives 16 DS1E signals and maps them into one STM-1 signal. The DS3 Multiplexing Board (D3MA) receives three DS3 signals and receives one STM-1. Performs the function of mapping to a grade signal.

The DS3 subscriber matching board (SAD3: 111) transmits the cell received through the DS3 link to the DS3 multiplexing board 112 through the three DS3 links, and the cell received from the DS3 multiplexing board 113 is based on the routing field of the header. Demultiplex and transmit to the link.

DS3 subscriber matching board (SAD3: 111) performs physical layer and physical layer management function, ATM layer and ATM layer management function, and traffic management function. The physical layer function is used to terminate and generate 44.736Mbps line signal and terminate PLCP frame. And perform functions such as generation and cell matching.

Frame relay matching board (FRIA: 114) according to the present invention is responsible for the interworking function of the existing frame relay communication network and ATM switch. The connection speed with frame relay network is 4 2.048Mbps.

That is, frame relay matching board (FRIA: 114) has physical layer and physical layer management function, ATM layer and ATM layer management function, traffic management function, AAL and AAL management function, and physical layer function is frame and multiframe boundary. It performs identification and configuration, error checking, line coding and line interface functions.

The AAL function is an AAL type 5 function that performs the transparent forwarding, error detection and processing of CPCS-SDUs, the delivery of congestion information and loss priority information, extraction and generation of frame relay frames, congestion control, and protocol mapping. The AAL management function manages and reports on the AAL's performance functions, maintains status information, FR matching functions, management functions for PVC services, and connection management functions.

In addition, as shown in FIG. 3, the hub switching node (HSN) 20 includes a node connection module (NIM: 210), a cell switching module (CSM: 220), an exchanger connection module (EIM: 230), and a hub switching node control module. (HNCM: 240), the node connection module (NIM: 210) is composed of a plurality of node connection boards (NIA: 211, 212, 213), the cell switching module (CSM: 220) is composed of a cell switching board (CSA) The exchanger connection module (EIM) 230 is composed of the exchanger connection boards (EIA) 231 and 232. The hub switching node control module (HNCM: 240) is composed of an HDD 241, a hub switching matching board (HNMA: 242), a test board (TSA: 243), a clock distribution board (CDA: 244), and the like. The system (EMS: 30) is connected to the node management board (HNMA: 242) by Ethernet.

Referring to Figure 3, the network management board (HNMA: 242) performs the agent of the performance management, failure management, configuration management, security management, billing management functions specified in the TMN, node management board of the remote switching node (RSN) (RNMA: 134) and the network management system (EMS: 30).

The clock distribution board (CDA) 244 provides clocks and network synchronizer clocks necessary for each board, and the HDD 241 stores various information such as management information model, module-specific operation program, and statistical data in the node.

The cell switching module (CSM) 220 receives a cell from each board in the node and delivers the cell to the corresponding board based on the routing field of the header, and has 16 x 16 ports, each of which has a cell switching capability of up to 155 Mbps. .

The node connection module (NIM: 210) is composed of a set of node-to-node connection boards (NIA: 211, 212, 213). The node connection board (NIA) connects RSNs and HSNs through one STM-1 link. It handles layer management function, ATM layer and ATM layer management function, traffic management function and protection switching function.

The physical layer function performs functions such as termination and generation of 155.52 Mbps line signal, termination and generation of STM-1 frame, cell matching, and physical layer management function is composed of performance management function and fault management function.

ATM layer functions include cell multiplexing and demultiplexing, cell generation and termination, discarding unallocated and invalid cells, and cell header conversion. The ATM layer management function performs performance monitoring, connectivity check, loopback, etc. on the connection indicated by the network node management board (HNMA), reports the result, or generates and transmits an alarm cell for a specific connection failure condition. .

The exchanger connection module (EIM: 230) consists of a set of access boards (EIA: 231,232) between other exchange nodes, and the exchanger connection board (EIA: 231,232) connects to other exchanges through one STM-1 link to the ATM exchanger. It is the function to connect the other exchange. The exchange access board (EIA) has a physical layer and a physical layer management function, an ATM layer and an ATM layer management function, a traffic management function, and a protection switching function.

On the other hand, Figure 4 is a block diagram showing the configuration of a frame relay matching device according to the present invention, Figure 5 is an embodiment of a frame relay matching device according to the present invention.

As shown in FIG. 4, the frame relay matching device according to the present invention includes a module control function unit 41, a PAAL5 function unit 42, a Cellbus matching unit 43, and a frame relay (FR) matching unit. 44, a physical layer functional unit 45 is provided.

Referring to Fig. 4, a module control function unit (i.e., a module control unit or a functional unit or unit is called a processing unit or unit: 41) is a frame such as initialization of the matching board and IPC communication, frame relay matching unit, and control function of the AAL5 processing unit. It is responsible for the overall control of the relay matching device.

The physical layer processing unit 45 performs line interface function, protection against overload, frame / multiframe boundary identification and configuration, CRC check, alarm function and line encoding function for four Ds1E frames connected at 2.048Mbps. Perform.

The frame relay matching unit 44 extracts a frame of the frame relay from the frames extracted from the physical layer processing unit 45, and then examines valid frames, performs congestion control, and forms an ATM cell. A data unit (FR-SSCS-PDU) is configured to handle the protocol mapping process.

The AAL5 processing unit 42 provides SAR and CPCS functions such as boundary identification and transparency of CPCS-SDUs, transparent transmission between CPCS users, error detection and processing of CPCS-SDUs, padding, congestion information delivery, loss priority information delivery, and SAR. Perform the function.

The cell bus matching unit 43 transmits the ATM cell formed by the AAL5 processing unit 42 to the multiplexing / demultiplexing device (D1MA) on the switch side via the cell bus with a data width of 16 bits, and transfers the ATM cell from the cell bus. It receives the input and delivers it to the AAL processing unit 42.

In the embodiment in which the configuration of the present invention is more specifically implemented, as shown in FIG. 5, the module controller 41 may include a processor 300, a ROM 301, a RAM 302, a buffer 303, and a P RAM. 304, the physical layer processor 45 is implemented by the E1 transceiver 310, and the frame relay matcher 44 is implemented by the frame relay controller 320.

At this time, in the embodiment of the present invention, the E1 transmitter and receiver 310 is implemented with four PM6341 chips to provide four DS1E links, and the frame relay controller 320 is implemented with four MK5025.

Here, MK5025 is a frame relay-related communication chip of SGS Thomson, based on ITU Q.933, and enables frame relay communication by providing bit stuffing, FCS, and PVC functions. At this time, the frame relay frame is composed of 1 byte flag, 2 bytes of header, variable length information field, 2 bytes of FCS, and 1 byte of flag. In the header, DLCI maps a given frame to each logical link. Multiplexing function is used as an identifier to make it 'BECN' set this bit to 1 in the frame sent in the direction of congestion in the network and 'FECN' is sent in the direction of congestion in the network. Set this bit to 1 in the frame.

In addition, the AAL processor 42 is implemented with an SRAR transmit chip (SARA-S: 335) and a SARA receive (SARA-R: 332) chip, and the Sarah transmit chip 335 is placed on the bus through the buffer 331-3. It is connected to the packet RAM 337 connected to the bus through the control RAM 336 and the buffer 331-4 to be connected to receive the FR-SSCS-PDU formed by the frame relay matching unit to form a CPAAL5-PDU After splitting the payload into 48 bytes, attaching the ATM header to form a 53-byte cell, the Sara-R chip 332 is a control RAM 333 connected to the bus through the buffer 331-1. And the packet RAM 334 connected to the bus through the buffer 331-2, recombine the ATM cells input through the cell bus to form a CPAAL5-PDU, and then transfer them to the frame relay matching unit. At this time, CRC error is checked during the recombination process. If an error occurs in the recombined frame, the frame is discarded.

Here, look at the operation of the AAL processing unit 330 in more detail, the ATM communication method is based on the ATM cell, the user's long message is divided into ATM cells and transmitted, the received ATM cells are reassembled into a single message It is delivered to the parent user.

Here, the ATM cell is divided into a 5-byte header (H: Header) section and a 48-byte user information section, and the 5-byte header includes a header structure and a network node interface (UNI: User Network Interface). It is divided into header structure in NNI: Network Node Interface, and header structure in user network interface (UNI) is the first byte of 4-bit generic flow control (GFC) and 4-bit virtual path identification number. (VPI: Virtual Path Identifier), and the second byte consists of a 4-bit Virtual Path Identifier (VPI) and a 4-bit Virtual Channel Identifier (VCI), and the third byte is 8 bits. Fourth byte consists of a 4-bit virtual channel identification number (VCI), a 3-bit payload type (PT) and a 1-bit cell abandonment ranking (CLP: Cell). Loss Priority), and the fifth byte is an 8-bit header error control (HEC). The lure is.

Here, the last bit of the 3-bit payload type (PL) is a user bit (AUU: ATM_USER to ATM_USER), which is useful in the AAL 5 protocol. When the first bit is 1, the operation type is OAM (Operations, Administration). , and Management).

This ATM communication system has a hierarchical structure as shown in Table 1 and has standardized standards for each layer.

Hierarchy Tier function Upper hierarchy - Higher layer function ATM Adaptation Layer Convergence (CS) sublayer Convergence function Cut and Rejoin (SAR) Cutting function and recombination function ATM layer - General Flow Control and Cell Header Processing Physical layer Transmission Convergence (TC) HEC signal generation and extraction function Physical medium Bit time information function

As shown in Table 1, the ATM communication method is divided into vertical structures such as a physical layer, an ATM layer, an ATM adaptation layer (AAL), and a higher protocol layer. The AAL layer is a cut and recombination sublayer (SAR). The Segmentation And Reassembly sublayer (CS) and Convergence Sublayer (CS) sublayers are subdivided, and the physical layers are subdivided into Physical Media (PM) and Transmission Convergence (TC) sublayers.

In addition, the AAL layer is divided horizontally as AAL1, AAL2, AAL3 / 4, AAL5 in order to efficiently handle the service according to the type of service. It is designed to be suitable for high speed data communication by reducing overhead of AAL 3/4 layer that delivers data of AAL, and transparently delivers service data unit (U-SDU) from service user and transmit error. Detects and divides variable-length data received from the convergence layer layer (CS) and the convergence layer layer (CS), which performs the function of identifying and buffering information, makes an ATM cell, transfers it to the ATM layer, and transfers the ATM cell from the ATM layer. The data is reassembled into a truncation and recombination sublayer (SAR) that receives and reassembles the MS-PDU (CS-Protocol Data Unit). In addition, the Convergence (CS) sublayer includes a Common Part Convergence Sublayer (CPCS) that performs functions common to the connectivity and connectionless services, and a service specific convergence layer layer (CPCS) for providing a specific AAL user service. SSCS: Service Specific Convergence Layer.

The data flow between layers according to the AAL 5 protocol is performed by the user service data unit (U-SDU) of the upper layer after passing through the AAL service access point (AAL-SAP). SDU) and stored in the FIFO, and in the AAL 5 CPCS layer, a CPCS trailer is added to the AAL Service Data Unit (AAL-SDU) to form a Convergence Protocol Unit (CPCS-PDU), and then to a SLA layer. Send it down through the FIFO. In the AAL SAR layer, a CPCS-PDU whose length is variable is divided into 48 bytes according to a message to be transmitted by a user, and a truncation and reassembly protocol unit (SAR-PDU) is formed, and a 4-byte ATM header is added. The bytes are sent down to the ATM layer via the ATM-SAP.

The ATM layer attaches 1-byte header error control (HEC) to a 52-byte segment, forms a 53-byte ATM cell, and transmits the physical layer to the switch side of the ATM switch.

At this time, the AAL 5 convergence layer adds only 8 bytes of trailer without headers and adds 0 to 48 bytes of pads to the last cell containing the trailer so that the total message length is a multiple of 48. In this example, the CPCS-PDU, which is a multiple length of 48 bytes, is divided into 48-byte SAR-PDU segments, and the AUU bit of the payload type (PL) of the ATM header of the last segment is set to 1 and transmitted. Therefore, overhead is reduced during data transmission according to the AAL 5 protocol, and the procedure is simplified to enable high-speed transmission.

The cell bus matching unit 43 is first-in-first-out (FIFO) buffer 343 for storing ATM cells input from the transmission chip 335, and is matched with the transmission cell bus by the buffer 344, and the buffer 342 The ATM cell input from the receiving cell bus is stored in the first-in first-out (FIFO) buffer 341 and then transferred to the receiving chip 332. At this time, the IPC message is processed together with the user cell without passing through a separate cell bus.

Referring to FIG. 5, in the frame relay network, the frame relay data link layer transmits a predetermined flag pattern (ie, 01111110) to the frame relay matching unit 44 until there is user information to transmit. The frame relay matching unit 44 removes all flags and bits due to stuffing from the received frame and then checks the bit error using the frame check sequence FCS.

If an error occurs in a frame, the frame is discarded and the frame in which no error occurs is removed to the Frame Relay-Service Specific Convergence Sublayer (FR-SSCS) after the Frame Check Sequence (FCS) is removed. Is sent. The FR-SSCS forms a FR-SSCS-PDU (protocol data unit) by modifying the 'BECN' included in the header of the received frame and delivers it to the AAL5 processor 42.

The AAL5 processing unit 330 creates a CPAAL5-PDU using the FR-SSCS-PDU as a service data unit (SDU). CRC-32 is used in the CPAAL5-PDU instead of CRC-16 included in the frame relay data link layer.

Subsequently, the CPAAL5-PDU is divided into 48-byte units in the SAR layer and delivered to the ATM layer. In the ATM layer, a 5-byte header including VPI / VCI is added to form a 53-byte ATM cell.

The ATM cell is stored in the FIFO 343 of the cell bus matching unit 340 and then transferred to the switch side through the cell bus, and the cell received through the FIFO 341 from the switch side is transferred to the AAL5 processing unit 330.

The AAL5 processing unit 330 checks the CRCs of the ATM cells received in the 53-byte ATM cell, recombines the valid cells to form a CPAAL-PDU, and if an error occurs by checking the CRC of the recombined frame, the corresponding PDU If the error is not generated, the frame recombined to the Frame Relay Service Specific Convergence Sublayer (FR-SSCS) is transmitted along with the CI and the LP.

The FR-SSCS modifies the Forward Explicit Congestion Notification (FECN) by calculating the logical sum of the CI received from CPAAL5 and the FECN already present in the frame. In addition, FR-SSCS modifies DE field by logical sum of LP received from CPAAL5 and DE already in frame according to network operator's choice, or accepts DE field value in FR-SSCS-PDU without modification. The processed information is transmitted to the frame relay data link layer and transmitted to the frame relay network or the frame relay terminal through an external interface.

As described above, the frame relay matching device according to the present invention can add a frame relay network or a frame relay terminal to an ATM switch, thereby providing various services.

Claims (3)

Frame relay matching boards for providing frame relay services through multiple DS1E links are connected to multiplexing and demultiplexing boards via cellbus, and the multiplexing and demultiplexing boards multiplex and demultiplex the cells of the frame relay subscribers. Connected to the cell switching board, the cell switching board is connected to the network management board and node access board in the ATM switch, The frame relay matching board, A physical layer processor 45 which provides a physical connection with the DS1E link; A frame relay matching unit 44 for providing a frame relay service through the physical layer processing unit; AAL5 reconstructs the data input through the frame relay matching unit, converts the data into AAL5 form, forms an ATM cell, transfers it to the ATM network, assembles the ATM cell received from the ATM network into AAL5 type, and outputs the AAL5 to the frame relay matching unit. A processor 42; A cellbus matching unit 43 for matching with the cellbus to connect the AAL5 processing unit to a multiplexing device on the switching side; And Frame relay matching device composed of a module control unit 41 for controlling each function block by transmitting and receiving IPC with the upper network management system. The SAL transmitting chip 335 and the packet memory 337 and the control memory 336 and the SARA receiving chip 332 connected to the AAL5 processor 42 and the packet connected thereto. Frame relay matching device of the ATM switch, characterized in that consisting of a memory and a control memory. The frame relay matching device of claim 1, wherein the cell bus matching unit (45) comprises a FIFO (341, 343) and a buffer connected thereto for transmission and reception.