KR19980029663U - Phase-locked loop with lock-up time adjustment - Google Patents

Abstract

The present invention relates to a phase-locked loop having a lock-up time adjustment terminal capable of adjusting the lock-up time by varying the time constant of the low pass filter according to a signal applied to the terminal. In the loop, a voltage controlled oscillator oscillating at a frequency according to a control voltage, a first divider for dividing an oscillation frequency output from the voltage controlled oscillator at a predetermined division ratio to make a low frequency, oscillating at a set reference frequency, and A temperature compensating oscillator for always outputting a constant frequency by correcting a frequency change according to the change, a second divider for dividing a reference frequency output from the temperature compensating oscillator at a set division ratio, and the first and second dividers Phase detection, which detects the phase difference between two frequency signals inputted from the circuit and outputs a voltage corresponding to the phase difference And a DC voltage which prevents an AC component of the voltage output from the phase detector, as a control voltage to the voltage controlled oscillator, and has a lock-up time adjustment terminal to vary the time constant according to a control signal applied to the adjustment terminal. And a low pass filter.

Description

Phase-locked loop with lock-up time adjustment

The present invention relates to a phase lock loop (PLL) provided in a wireless telephone, and more specifically, a lock-up time for adjusting a lock-up time during a channel search and a call. The present invention relates to a phase locked loop capable of adjusting uptime.

In general, a wireless telephone is connected to a public wired telephone network (PSTN) and comprises a main body having a wireless transmission / reception unit, and a mobile phone having a wireless transmission / reception unit and wirelessly connected to the main body. Communicate in about 900MHz band. The communication channel between the main body and the mobile phone has about 40 channels having a bandwidth of 25 kHz left and right in the 900 MHz band. The main body has a pass request signal from a public switched telephone network (PSTN). Search sequentially and set the channel with the highest sensitivity. Exchange the signal through the set channel with the mobile phone.

1 is a block diagram showing the configuration of a phase-locked loop for oscillating a communication frequency (an arbitrary channel frequency of 40 channels) in a radiotelephone as described above, and a voltage controlled oscillator 11 for oscillating a frequency according to a control voltage. And a low pass filter 12 for blocking the AC component of the output voltage from the phase detector 14 and adjusting the DC voltage to a DC voltage, and a frequency division ratio of the frequency signal output from the voltage controlled oscillator 11 (that is, 1). / N) compares the phase of the first divider 13 divided by the signal output from the first divider 13 and the signal output from the second divider 15, and the voltage corresponding to the phase difference. And a second divider 15 for dividing the output signal of the temperature compensation oscillator 16 at a predetermined division ratio (ie, 1 / M) and outputting the output signal to the phase detector 14. , Temperature compensation and oscillation at the set reference frequency (ie 21.25MHz) It comprises a group (16).

However, in the conventional phase-locked loop as described above, since the lock-up time by the low pass filter is fixed, it can satisfy both the channel search requiring fast lock-up time and the call requiring slow lock-up time. There was a problem of disappearing.

In other words, the channel search requires fast speed, and the change-up time is about 25㎑, so the lock-up time is fast. As soon as there is a problem that the call quality deteriorates, slow lock-up time is required. However, the conventional phase-locked loop has a problem that cannot be completely satisfied during both channel search and call because it is fixed to a middle value between the lock-up time when the channel is searched for lock-up time and the lock-up time when the phone is called. .

The present invention has been made to solve the above-described problems, and its purpose is to provide a lock-up time adjustment terminal so that the time constant of the low pass filter is variable according to the signal applied to the terminal to adjust the lock-up time. It is to provide a phase-locked loop with adjustable lock-up time.

1 is a block diagram showing a conventional phase locked loop.

2 (A) is a block diagram showing a phase locked loop according to the present invention.

FIG. 2B is a circuit diagram showing an embodiment of a low pass filter provided in a phase locked loop according to the present invention.

* Description of the symbols for the main parts of the drawings *

11: Voltage Controlled Oscillator (VCO)

12: Low Pass Filter (LPF) 13: First Divider

14 Phase Detector 15 Second Divider

16: Temperature Compensation Oscillator (TCXO: Temperature Compansated X-Tal Oscillator)

As a technical means for achieving the object of the present invention as described above, the present invention is a phase-locked loop;

A voltage controlled oscillator oscillating at a frequency according to the control voltage;

A first divider dividing the oscillation frequency output from the voltage controlled oscillator at a predetermined division ratio to make a low frequency;

A temperature compensation oscillator oscillating at a set reference frequency and always outputting a constant frequency by correcting a frequency change according to a change in ambient temperature;

A second divider for dividing the reference frequency output from the temperature compensation oscillator at a set division ratio;

A phase detector for detecting a phase difference between two frequency signals input from the first and second dividers and outputting a voltage corresponding to the phase difference;

A low voltage whose time constant is varied in accordance with a control signal applied to the adjustment terminal by applying a DC voltage, which blocks the alternating current of the voltage output from the phase detector, to the voltage controlled oscillator as a control voltage. A pass filter is provided.

Hereinafter, with reference to the accompanying drawings will be described in detail the configuration and operation of the present invention.

FIG. 2A is a block diagram showing a phase-locked loop according to the present invention. The voltage-controlled oscillator 21 and the output voltage output from the phase detector 24 oscillate a frequency signal according to the tuning voltage Vt. Is a low pass filter 22 which applies a DC voltage to the voltage controlled oscillator 21 as a tuning voltage and divides a frequency signal output from the voltage controlled oscillator 21 at a set division ratio. A phase detector 24 which detects a phase difference between the first divider 23 and the signal input from the first divider 23 and the signal input from the second divider 25 and outputs a voltage corresponding to the phase difference. ), A second frequency divider 25 for dividing the reference frequency signal output from the temperature compensation oscillator 26 and inputting it to the phase detector 24, and a temperature compensation oscillator 26 for temperature compensation when oscillating at the set reference frequency. ).

FIG. 2B is a circuit diagram showing an embodiment of a low pass filter provided in a phase-locked loop according to the present invention, and includes a resistor R2 in series between an input terminal Vin and an output terminal Vout. A capacitor C1 is provided between one end of the resistor R2 and the ground, and another capacitor C2 is connected to one end of the capacitor C1, and the other end of the capacitor C2 is an adjusting stage through which a control signal is input. Connect to

Next, the operation of the present invention by the above-described configuration will be described.

In FIG. 2, the voltage controlled oscillator 21 oscillates at a frequency according to the control voltage Vt, so that the frequency output from the voltage controlled oscillator 21 is one of about 40 channels of the wireless telephone. Frequency signal (for example, about 900 MHz). That is, the frequency signal output from the voltage controlled oscillator 21 is amplified to a predetermined level by an amplifier (not shown) and transmitted through the antenna. The signal output from the voltage controlled oscillator 21 is divided by the first divider 23 at a predetermined division ratio. For example, when a high frequency signal of about 900 MHz is output from the voltage controlled oscillator 21. This signal is divided by the first divider 23 to be 6.25 Hz. The output signal (eg, 6.25 MHz) from the first divider 21 is applied to one input terminal of the phase detector 24.

In addition, a reference frequency to be compared with a phase is input to the type force stage of the phase detector 24, which has a signal of a predetermined frequency (for example, 21.25 MHz) oscillated by the temperature compensation oscillator 26. It is a frequency (ie, 6.25 MHz) signal divided by the divider 25 at a predetermined division ratio. The oscillation frequency of the temperature compensation oscillator 26 is fixed and always oscillates at a constant frequency (that is, 21.25 MHz) by correcting a frequency variation according to the ambient temperature.

Accordingly, the phase detector 24 detects a phase difference between the frequency signal f1 applied from the first divider 23 and the frequency signal f2 applied from the second divider 25 and corresponds to the phase difference. Output the voltage that can be. That is, if there is no phase difference, a voltage of 0V is output, and a larger voltage is output as the phase difference is large. Since the output voltage of the phase detector 24 includes a small amount of alternating current, the low pass filter 22 is passed through and the DC voltage Vt which blocks the alternating current is input to the voltage controlled oscillator 21. The voltage controlled oscillator 21 oscillates by receiving the control voltage according to the phase difference, and the output frequency of the voltage controlled oscillator 21 is shifted by a change amount.

Here, the time for correcting the phase difference (that is, frequency variation) detected by the phase detector 24, that is, the time for the voltage controlled oscillator 21 to oscillate by shifting the frequency by the changed frequency is locked-up. This lock-up time depends on the time constant of the low pass filter 22. In other words, the output voltage ratio to the input voltage of the low pass filter 24 changes exponentially with time. The time taken for the output voltage ratio to the input voltage of the low pass filter 24 to be equal depends on the time constant of the low pass filter 24. That is, the smaller the time constant, the faster the time taken for the output voltage ratio to the input voltage to be equal (ie, lock-up time).

In Fig. 2A, the low pass filter 22 has a variable time constant in accordance with a control signal applied from the outside (for example, a microcomputer). One embodiment of the low pass filter 22 is shown in FIG. In the example of FIG. 2B, when the high level B + is applied as the control signal, the low pass filter 22 is formed only by the resistor R1 and the capacitor C1, and thus the time constant? Becomes R1C1. On the contrary, when a low level (for example, 0V) voltage is applied to the control signal, the low pass filter 22 is formed by the resistor R1 and the two capacitors C1 and C2. At this time, the capacitor C1 and the capacitor C2 are coupled in parallel, and the time constant τ is R1 × (C1 + C2). Therefore, the lock-up time is slowed because it is larger than the time constant (τ = R1 × C1) when the high level control signal is applied.

As described above, when the change speed of the frequency is fast (that is, when the frequency change range is large), a high-level control signal is applied to the low pass filter 22 to speed up the lock-up time, thereby following the fast change. When the change rate of the frequency is slow (that is, when the frequency change range is small), a low level control signal is applied to the low pass filter 22 to slow the lock-up time.

That is, the radiotelephone is provided with a phase-locked loop according to the present invention, and a high level control signal is applied to the low pass filter 22 during channel search, and a low level control signal to the low pass filter 22 during a call. In this case, a fast search is performed during channel search, and a slow frequency estimation is performed during a call, thereby making it possible to stabilize call quality.

As described above, the phase-locked loop according to the present invention has an effect of adjusting the lock-up time of the phase-locked loop by varying the time constant of the low pass filter. Faster, slower lock-up time during the call, and has an excellent effect of satisfying both fast channel search and stable call quality.

Claims (2)

In the phase locked loop, A voltage controlled oscillator oscillating at a frequency according to the control voltage; A first divider dividing the oscillation frequency output from the voltage controlled oscillator at a predetermined division ratio to make a low frequency; Oscillation at the set reference frequency and the temperature compensation oscillator that always outputs a constant frequency by correcting the frequency change according to the change of ambient temperature, A second divider for dividing the reference frequency output from the temperature compensation oscillator at a set division ratio; A phase detector for detecting a phase difference between two frequency signals input from the first and second dividers and outputting a voltage corresponding to the phase difference; A low voltage whose time constant is variable in accordance with a control signal applied to the adjustment terminal by applying a direct current voltage, which blocks the AC portion of the voltage output from the phase detector, to the voltage control oscillator as a control voltage. A phase-lock loop with lock-up time adjustment characterized by a pass filter. The method of claim 1, The low pass filter connects an input terminal connected to an output terminal of the phase detector and an output terminal connected to a control voltage application terminal of the voltage controlled oscillator with a resistor, and includes a first capacitor between the resistor and ground, and the first capacitor. And a second capacitor connected to one end of the second capacitor, and the other end of the second capacitor connected to the lock-up time adjustment terminal.