KR19980028662A - Ferroelectric memory device and manufacturing method thereof - Google Patents

Abstract

A novel ferroelectric memory device and a manufacturing method thereof are disclosed. A capacitor formed by stacking a lower electrode, a ferroelectric film, and an upper electrode; And a barrier layer formed on the capacitor and made of any one of Y 2 O 3 and SrTiO 3. The barrier layer can be thinned and residual polarization, bipolar and leakage current characteristics can be improved.

Description

Ferroelectric memory device and manufacturing method thereof

The present invention relates to an inert memory device and a method of manufacturing the same, and more particularly to a ferroelectric random access memory (FRAM) device and a method of manufacturing the same.

Dynamic random access memory (DRAM) has the advantages of high integration and fast operation speed, while information charge accumulated in the cell's storage capacity decreases over time due to leakage current. The disadvantage is that operation is required. On the other hand, non-volatile memory (NVM), such as electrically erasable programmable read only memory (EEPROM) and flash memory, has advantages in terms of data storage, but high operating voltage, high integration, and slow operation speed. Has its drawbacks. Accordingly, there is an active attempt to develop a memory device that can utilize both of the above advantages by using the physical properties of the ferroelectric material.

The ferroelectric material has a residual polarization inside the material by applying an external electric field, and a part of the residual polarization remains after the external electric field is removed, and the direction of the external polarization is changed by changing the direction of the external electric field. It can be a substance. Since the bistable nature of ferroelectrics coincides with the basic concept of binary memory, which is now the basis of widely used digital memory devices, ferroelectrics such as PZT have attracted attention as memory materials from early on. . The first memory devices using ferroelectrics are made of bulk materials, and their size and operating voltage are not suitable for fabricating highly integrated memory devices. However, with the recent advances in thin film manufacturing techniques such as sol-gel, sputtering, and metal organic chemical vapor deposition (MOCVD), ferroelectric thin film manufacturing techniques such as PZT With this great advance, commercial production and sale of ferroelectric memory devices using PZT is under way.

There are two main methods for manufacturing a memory device using a ferroelectric thin film. One of them is a method of manufacturing a ferroelectric capacitor and using transistors to read and write signals in two directions stored in the capacitor, so-called one transistor / one capacitor (1T / 1C) or two transistors / two capacitors (2T / 2C). Such a memory device, commonly referred to as a FRAM, has a basic concept corresponding to the operation principle of a DRAM. Unlike a DRAM, the memory device does not require refreshing and does not erase stored information even when electricity is turned off. However, since the FRAM device uses the inversion and non-inversion of the polarization stored in the capacitor, since the information is erased when the stored information is read once, the information destruction type that requires the same information as when reading again ( destructive read out (DRO) memory device.

In such FRAM devices, platinum (Pt) is most often used as the upper and lower electrode materials of ferroelectric capacitors. In order to suppress the barrier layer (barrier layer) is formed. Typically, the barrier layer is formed of titanium oxide (TiO 2), and the PZT film is degraded by the interaction between the PZT film and the TiO 2 film, thereby lowering the residual polarization (Pr) value and depolarization (Pd). Difficulty occurred. In addition, there is a disadvantage in that a thick TiO 2 film must be formed to compensate for the leakage current characteristics.

SUMMARY OF THE INVENTION An object of the present invention is to provide a ferroelectric memory device capable of improving residual polarization, double polarity, and leakage current characteristics by forming a barrier layer of yttrium oxide (Y 2 O 3) or SrTiO 3.

Another object of the present invention is to provide a method of manufacturing a ferroelectric memory device which is particularly suitable for manufacturing the ferroelectric memory device.

1 is a cross-sectional view showing the structure of a ferroelectric memory device according to the present invention.

2A and 2B are diagrams illustrating peeling of the upper electrode Pt according to the substrate temperature when the Y 2 O 3 film is deposited on the Pt / PZT / Pt structure.

3A and 3B are graphs showing hysteresis curves of PZT films when barrier layers are formed of TiO 2 and Y 2 O 3, respectively.

4 to 7 are graphs showing residual polarization (Pr), bipolar (Pd), leakage current (I), and electric field (Vc) characteristics when barrier layers are formed of TiO 2 and Y 2 O 3, respectively.

8 is a graph showing an XRD peak of a PZT / Y 2 O 3 / Si structure annealed at 650 ° C. for 30 minutes.

Explanation of symbols for main parts of the drawings

10 ... semiconductor substrate 12 ... device isolation film

14 ... gate 16 ... first interlayer insulating film

18 ... diffusion barrier 20 ... lower electrode

22 ... ferroelectric film 24 ... upper electrode

26 ... barrier layer

According to an aspect of the present invention, there is provided a ferroelectric memory device including a capacitor in which a lower electrode, a ferroelectric layer, and an upper electrode are stacked; And a barrier layer formed on the capacitor and made of any one of Y 2 O 3 and SrTiO 3.

The barrier layer is formed on the side and top surfaces of each of the lower and upper electrodes and the side of the ferroelectric.

The ferroelectric film is preferably formed of PZT.

The lower electrode and the upper electrode is preferably formed of Pt.

According to another aspect of the present invention, there is provided a method of manufacturing a ferroelectric memory device, the method including: forming a lower electrode on a semiconductor substrate and separating the cell into units of cells; Depositing and patterning a ferroelectric film and an upper electrode on the entire surface of the resultant to form a ferroelectric capacitor; And depositing any one of Y 2 O 3 and SrTiO 3 on the entire surface of the resultant to form a barrier layer.

The barrier layer is preferably formed by reactive ionized cluster beam deposition (hereinafter referred to as RICBD). When the barrier layer is formed of Y 2 O 3, it is preferable to deposit in an O 2 or O 3 atmosphere with a vacuum degree of 10-5 torr at a substrate temperature of 300 ± 100 ° C. and an acceleration voltage of 3 kV.

The barrier layer is preferably formed to a thickness of 100 ~ 500 100.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a cross-sectional view showing the structure of a ferroelectric memory device according to the present invention.

Referring to FIG. 1, a device isolation region 12 is formed on a semiconductor substrate 10 to separate active and inactive regions, and then a gate oxide film and a gate electrode 14 are formed on the resultant substrate. ) And a transistor consisting of a source / drain. Subsequently, a first interlayer insulating film 16 for insulating the transistor is formed on the entire surface of the resultant, for example, a borophosphosilicate glass (BPSG) film, and then diffused to suppress a silicide reaction of the lower electrode material of the capacitor to be formed in a subsequent step. The prevention film 18 is formed. Titanium nitride (TiN) is commonly used as the material of the diffusion barrier 18.

Subsequently, for example, platinum (Pt) is deposited on the diffusion barrier layer 18 on the capacitor's lower electrode 20, and then the lower electrode 20 and the diffusion barrier layer 18 are formed on a cell-by-cell basis by a photolithography process. Pattern to separate. After depositing a PZT film, for example, a PZT film, on the entire surface of the resultant material, Pt is subsequently deposited thereon to form the upper electrode 24 of the capacitor. Next, the upper electrode 24 and the ferroelectric film 22 are patterned by a photolithography process to complete the ferroelectric capacitor.

Subsequently, any one of, for example, Y 2 O 3 or SrTiO 3 is deposited to a thickness of 100 to 500 kV by the RICBD method as a barrier layer 26 on the entire surface of the resultant ferroelectric capacitor. At this time, when the barrier layer 26 is formed of Y 2 O 3, a substrate temperature of 300 ± 100 ° C. and 3 kV to prevent lifting of the Pt film of the upper electrode 24 as shown in FIGS. 2A and 2B. It is preferable to deposit in an O 2 or O 3 atmosphere at a vacuum degree of 10-5 torr with an acceleration voltage of. In addition, the characteristics of the barrier layer 26 may be improved by performing oxidation treatment to stabilize the quality of the barrier layer 26. In the present invention, even if Y2O3 or SrTiO3 is thinly deposited by the RICBD method to a thickness of 500 kΩ or less, the residual polarization, bipolar and leakage current characteristics of the barrier layer can be improved.

Next, after forming the second interlayer insulating film 28 to insulate the capacitor on the entire surface of the product on which the barrier layer 26 is formed, a metal contact and metal wiring process is performed to form the first metal wiring layer 30. do. Subsequently, by forming a third interlayer insulating film 32 on the first metal wiring layer 30 and performing a metal contact and metal wiring process to form a second metal wiring layer 34, a double metal wiring structure is completed. .

2A and 2B are diagrams illustrating the peeling phenomenon of the upper electrode Pt according to the substrate temperature when the Y 2 O 3 film is deposited on a capacitor having a Pt / PZT / Pt structure. Figure 2a shows a case of depositing a Y2O3 film at a substrate temperature of 300 ℃, Figure 2b, it can be seen that the lifting of the upper electrode Pt film occurs when depositing the Y2O3 film at a substrate temperature of 500 ℃ .

3A and 3B are graphs showing hysteresis curves of PZT films when barrier layers are formed of TiO 2 and Y 2 O 3, respectively. 4 to 7 show the residual polarization Pr, the double pole Pd, and the leakage current I according to the wafer positions T, C, B, L, and R when the barrier layers are formed of TiO 2 and Y 2 O 3, respectively. , And graphs showing coersive voltage (Vc) characteristics, respectively. (Triangle | delta) and (circle) show the characteristic of a Y2O3 film | membrane, and x and (square) show the characteristic of a TiO2 film | membrane here.

Referring to the drawings, it can be seen that the use of the Y2O3 film as the barrier layer shows the excellent properties of higher residual polarization (Pr) value and lower polarization (Pd) and leakage current (I) than the case of using the TiO2 film as the barrier layer. Can be. In addition, when the Y2O3 film was used as the barrier layer, the hysteresis curve of the typical PZT was observed in the polarization characteristic according to the driving voltage, and the constant electric field (Vc) was less than 2V.

FIG. 8 is a graph showing the results of X-ray diffraction (XRD) analysis to determine reactant formation when PZT and Y2O3 films are exposed to high temperatures. PZT 2500 annealed at 650 ° C. for 30 minutes. XRD peaks of the / Y2O3 100kV / Si structure and the Y2O3 150kV / Si structure, respectively.

Referring to FIG. 8, when the PZT / Y2O3 / Si structure is exposed to high temperature, there is no interaction between the PZT film and the Y2O3 film.

As described above, according to the present invention, Y2O3 or SrTiO3 is used as a barrier layer of the ferroelectric capacitor in the FRAM device. Therefore, the reaction between the barrier layer, the interlayer insulating film (oxide film) and the ferroelectric film (PZT film) does not occur, so that the residual polarization, bipolar and leakage current characteristics are superior to those of the conventional TiO2 barrier layer. In addition, the barrier layer can be thinned to a thickness of 500 kPa or less.

Claims (10)

A capacitor formed by stacking a lower electrode, a ferroelectric film, and an upper electrode; And And a barrier layer formed on the capacitor and formed of any one of Y 2 O 3 and SrTiO 3. The ferroelectric memory device of claim 1, wherein the barrier layer is formed on side and top surfaces of each of the lower and upper electrodes and a side of the ferroelectric. The ferroelectric memory device of claim 1, wherein the ferroelectric layer is formed of PZT. The ferroelectric memory device of claim 1, wherein the lower electrode and the upper electrode are formed of Pt. Forming a lower electrode on the semiconductor substrate and separating the cell into cell units; Depositing and patterning a ferroelectric film and an upper electrode on the entire surface of the resultant to form a ferroelectric capacitor; And And depositing either Y2O3 or SrTiO3 on the entire surface of the resultant to form a barrier layer. The method of manufacturing a ferroelectric memory device according to claim 5, wherein the ferroelectric film is formed of PZT. The method of claim 5, wherein the lower electrode and the upper electrode are formed of Pt. The method of claim 5, wherein the barrier layer is formed by a reactive ionization cluster beam deposition (RICBD) method. The ferroelectric memory device of claim 8, wherein when the barrier layer is formed of Y 2 O 3, deposition is performed in an O 2 or O 3 atmosphere having a vacuum degree of 10-5 torr at a substrate temperature of 300 ± 100 ° C. and an acceleration voltage of 3 kV. Way. 6. The method of manufacturing a ferroelectric memory device according to claim 5, wherein the barrier layer is formed to a thickness of 100 to 500 GPa.