KR19980021815A - LCD and its manufacturing method - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method for manufacturing the same. In particular, in a liquid crystal display device using a polysilicon thin film transistor as a pixel switching element, it is possible to reduce the leakage current in the off state while reducing the number of processes during manufacturing. A liquid crystal display device having a thin film transistor structure and a method of manufacturing the same. According to an exemplary embodiment of the present invention, a liquid crystal display includes a thin film transistor, which is a plurality of switching elements, and a plurality of pixel electrodes connected to the thin film transistor, wherein the thin film transistor comprises: an insulating substrate; An active layer formed on the insulating substrate, a gate insulating film formed on the active layer, a first gate electrode formed at a predetermined position of the gate insulating film to define a channel region in the active layer, and on the first gate electrode. A second gate electrode positioned at a side of the first gate electrode and having a lower surface wider than a lower surface of the first gate electrode to define a leakage current control region on both sides of a channel region of the active layer; and an outer side of the leakage current control region in the active layer. Source and drain regions formed on the substrate, the second gate electrode, the first gate electrode, and an exposed group It is formed on, and a drain electrode connected to the interlayer insulating film, a source electrode and said drain region connected to the source region to expose the source region and the drain region.

Description

LCD and its manufacturing method

1 is a plan view of a liquid crystal display according to the related art.

2 is a manufacturing process diagram of a liquid crystal display device according to the prior art

3 is a view showing a first embodiment of a liquid crystal display according to the present invention.

4 is a manufacturing process diagram of the present invention shown in FIG.

5 is a view showing a second embodiment of a liquid crystal display according to the present invention.

6 is a manufacturing process diagram of the present invention shown in FIG.

7 is a view showing a third embodiment of a liquid crystal display device according to the present invention.

Explanation of symbols for main parts of the drawings

31. Active layer. 35-1. First gate electrode.

36-1. Second gate electrode. 35-2. First scan line.

36-2. Second scan line. 42. First storage capacitor electrode.

38a. First pixel electrode. 37. Second pixel electrode.

40. Source electrode and signal line. 41. Drain electrode.

32. Gate insulation film.

39. Interlayer insulating film.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method for manufacturing the same. In particular, in a liquid crystal display device using a polysilicon thin film transistor as a pixel switching element, it is possible to reduce the leakage current in the off state while reducing the number of processes during manufacturing. A liquid crystal display device having a thin film transistor structure and a method of manufacturing the same.

Polycrystalline silicon generally has higher carrier mobility than amorphous silicon used in the manufacture of thin film transistors. Therefore, when a polycrystalline silicon thin film transistor is adopted, an active driving liquid crystal display device having a driving circuit inside the liquid crystal display panel is used. AMLCD: Active Matrix Liquid Crystal Display device However, when the polysilicon thin film transistor is adopted as the pixel switching element, there is a problem in that the signal voltage of the pixel cannot be properly maintained because of a large leakage current in the off state. Accordingly, a thin film transistor structure has been proposed as a pixel switching element having an offset region or an LDD (lightly doped drain) region between a source / drain region and a channel region.

FIG. 1 is a plan view of a liquid crystal display device using a thin film transistor having a conventional LED region as a pixel switching element, and (a) to (b) of FIG. 2 are cross-sectional views taken along the cutting line II of FIG. It is a manufacturing sectional drawing to make.

The structure of the conventional liquid crystal display device will be described with reference to FIGS. 1 and 2, by way of example. First, the source / drain regions 11-1 and 11-2 and the channel region 11 on the insulating substrate 10 are described. -3) and the active layer 11 on which the LED region 11-4 is defined, the gate electrode 13-1 and the gate bus line 13-2 with the gate insulating film 12 therebetween. There is). Then, the interlayer insulating film 15 is disposed over the entire surface of the substrate, and the source region 11-1 and the drain region (through the first contact hole T ₁ formed in the interlayer insulating film 15 and the gate insulating film 12). There are a source electrode, a data bus line 16 and a drain electrode 17 connected to 11-2). A protective film 1S is disposed thereon, and a pixel electrode 19 connected to the drain electrode 17 is formed in a portion of the substrate through the second contact hole T ₂ formed in the protective film 18.

In order to manufacture such a conventional liquid crystal display, first, as shown in FIG. 2A, an active layer 11 of a phase is formed on an insulating substrate 10.

Next, as shown in FIG. 2B, a gate insulating film 12 is formed over the entire substrate on the active layer 11. Subsequently, the gate electrode 13-1 is formed on the gate insulating layer 12 so as to overlap the channel forming region of the active layer 11.

Next, as shown in FIG. 2C, pentavalent ions are implanted into the entire surface of the substrate using the gate electrode 13-1 as a mask to form n ⁻ regions in the active layer 11.

Next, as shown in (d) of FIG. 2, the active layers 11 at both lower sides of the gate electrode 13-1 are covered with the ion implantation mask 14, and pentavalent ions are injected at a high dose, thereby making the active layer 11 Two LED regions 11-4, a source region 11-1, and a drain region 11-2 are formed on the channel region 11-3 with respect to the channel region 11-3.

The process of (c) and (d) of FIG. 2 is an example of a process for forming an n-channel thin film transistor, and trivalent ions are implanted to form a p-channel thin film transistor.

Next, as shown in FIG. 2E, after removing the ion implantation mask, an interlayer insulating film 15 is formed on the entire surface of the substrate, and the gate insulating film on the source region 11-1 and the drain region 11-2 is formed. 12 and the interlayer insulating layer 15 are contact patterned to form first contact holes T ₁ .

Next, as in the 2-degree (F), a first contact hole (T _l) filled therein, and a source electrode and data bus line 15 is formed in a portion of the upper interlayer insulating layer 15 and the drain with a conductive material The electrode 17 is formed.

Next, as shown in FIG. 2, the passivation layer 18 is formed on the entire surface of the substrate on which the source electrode, the data bus line 16, and the drain electrode 17 are formed, and contact patterning is performed to form a second contact hole T. ₂ ) form. Subsequently, the pixel whole curve 19 is formed of a transparent conductive material to manufacture a liquid crystal display device.

In the liquid crystal display device manufactured by the above process, first, an ion implantation mask is required during the ion implantation process to form the LED region or the offset region. In addition, the length of the LED region or the offset region may vary according to the mask alignment error, and one pattern mask is required to form the gate electrode and the pixel electrode, respectively. In addition, two contact patterns are required throughout the process, which leads to a problem of increasing the number of process steps.

An object of the present invention is to provide a liquid crystal display device having a polysilicon thin film transistor as a pixel switching element that can reduce the number of masks as a whole and has an effect of reducing leakage current in an off state, and a manufacturing method thereof.

To this end, the liquid crystal display of the present invention includes a thin film transistor, which is a plurality of switching elements, and a plurality of pixel electrodes connected to the thin film transistor, respectively, wherein the thin film transistor comprises: an insulating substrate; An active layer formed on the insulating substrate, a gate insulating film formed on the active layer, a first gate electrode formed at a predetermined position of the gate insulating film to define a channel region in the active layer, and on the first gate electrode. A second gate electrode positioned at a side of the first gate electrode and having a lower surface wider than a lower surface of the first gate electrode to define a leakage current control region on both sides of a channel region of the active layer; and an outer side of the leakage current control region in the active layer. Source and drain regions formed in the second and second gate electrodes and the first gate electrode It is formed in the plate, and a drain electrode connected to the interlayer insulating film, a source electrode and said drain region connected to the source region to expose the source region and the drain region.

In addition, the present invention provides a method of manufacturing a liquid crystal display device having a thin film transistor portion and a pixel electrode portion, after laminating a semiconductor layer on an insulating substrate, forming an active layer on the conductive layer, the active layer and the exposed insulating substrate Sequentially stacking a first insulating layer, a first conductive layer, and a second conductive layer over the entire surface; first etching the second conductive layer to extend the first gate electrode and the first gate electrode; And a second gate bus line extending to the second gate electrode and a second gate electrode defining a channel region in the active layer, wherein the first gate electrode protrudes by photolithography the first conductive layer. And ion implantation or ion doping the active layer with the first gate electrode as a mask to source portions of the active layer corresponding to the outer region of the first gate electrode. Forming reverse and drain regions, defining a leakage current breakdown region between the channel region, the source region and the drain region, forming a second insulating film over the entire surface of the substrate; Photo-etching the first insulating layer to form contact holes exposing the source and drain regions of the active layer; and stacking a third conductive layer on the inside of the contact holes and on the entire surface of the substrate, and patterning the source electrode and the source electrode. And forming a data bus line and a drain electrode extending to the source electrode.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

FIG. 3 is a diagram illustrating a first embodiment of a liquid crystal display according to the present invention. FIG. 3A is a plan view of a liquid crystal display device centered on one pixel, and FIG. 3B is a cutaway view. A cross-sectional view of the portion of the thin film transistor cut along the line II-II, and (c) of FIG. 3 is a cross-sectional view of the storage capacity cut along the cut line III-III.

First, referring to the region where the thin film transistor is formed, the active layer 31 on the glass substrate 30 is formed on the glass substrate 30, as shown in FIG. 3A and 3B. A gate electrode composed of the first gate electrode 35-1 and the second gate electrode 36-1 is formed through the gate insulating film 32. First and second gate bus lines 35-2 and 36-2 extend in one direction on the first and second gate electrodes 35-1 and 36-1. In this case, the first gate electrode 35-1 and the first gate bus line 35-2 are patterned to be narrower than the second gate electrode 36-1 and the second gate bus line 36-2, and thus the gate electrode. And a step is formed such that the profile of the gate bus line has a table shape. Accordingly, the channel region 31-3 defined on the active layer is determined by the first gate electrode 35-1, and the boundary between the source region 31-1 and the drain region 31-2 is defined by the second gate. The first gate electrode determined by the electrode 36-1, between the source region 31-1 and the channel region 31-3, and between the drain region 31-2 and the channel region 31-3. An offset region 31-4 having a length related to the step depth between 35-1 and the second gate electrode 36-1 is defined. Upper and side portions of the first gate electrode 35-1 and the second gate electrode 36-1 are surrounded by the interlayer insulating layer 39, and the interlayer insulating layer 39 is formed on the exposed surface of the gate insulating layer 32. ) Is formed. The source electrode 40 formed on the interlayer insulating layer 39 through the contact hole formed in the gate insulating layer 32 and the interlayer insulating layer 39 is connected to the source region 31-1 of the active layer, and the source electrode 40 is formed. The drain electrode 41 formed on the interlayer insulating layer 39 and separated from the drain electrode 41 is connected to the drain region 31-2 of the active layer.

(image)

Next, referring to the pixel electrode part, the first pixel electrode layer 37 formed of the same material as the first gate electrode 35-1 is formed on the gate insulating layer 32, and the first pixel electrode layer 37 There is a second pixel electrode layer 38a formed of the same material as the second gate electrode 36-1 so that a portion of the region overlaps the outer portion.

At this time, the second pixel electrode layer 38a has a pattern like an edge having a predetermined width so as to define an exposed area of the lower first pixel electrode layer 37 in plan view. The outer side of the second pixel electrode layer 38a protrudes from the edge of the first pixel electrode layer 37 below.

On the other hand, in the case of forming a storage capacity for the purpose of flicker prevention or the like, the structure of the storage capacity has a gate insulating film 32 at the bottom, as shown in FIG. 3C, and a first storage capacitor electrode and a gate thereon. As a bus line, a first gate bus line 35-2 and a wide second gate bus line 35-2 are formed thereon. Therefore, a partial region of the second gate bus line 36-2 serves as the first storage capacitor electrode. An interlayer insulating film 39 is formed over the gate insulating film 32, and the second storage capacitor is extended by being connected to the first pixel electrode layer 37 of the pixel electrode part with the interlayer insulating film 39 therebetween. The electrode 42 is formed to overlap the second gate bus line 36-2 in a partial region.

4A to 4B are manufacturing process diagrams illustrating a thin film transistor and its surrounding area in each manufacturing step in manufacturing a liquid crystal display device according to the present invention.

First, as shown in FIG. 4A, amorphous silicon is deposited on the glass substrate 30 on the entire surface of the glass substrate by using a chemical vapor deposition method, and then pattern-etched using a photolithography process, onto the glass substrate 30. The conductive layer 31 of the conductive phase is formed.

Next, as shown in FIG. 4B, the gate insulating film 32 having a single or double structure is formed on the glass substrate 30 and the active layer 31 by using a silicon nitride film or a silicon oxide film. A transparent metal such as ITO) is laminated on the entire surface of the gate insulating film 32 by the sputtering method to form the first metal layer 33.

Subsequently, the second metal layer 34 is formed by stacking chromium, aluminum, or the like, which is usually used as a gate electrode, on the top thereof by a sputtering method.

Next, as shown in FIG. 4C, the second metal layer is pattern-etched by a photolithography process so as to remain only in the gate bus line, the gate electrode, and the pixel electrode formation region. The pixel electrode layer 38 is formed. Subsequently, the first gate electrode 35-1 is formed by etching the second gate electrode 36-1 with the mask as the first metal layer. At this time, the second gate electrode 36-1 is excessively etched so that the cross-sectional profile of the first gate electrode 35-1 and the second gate electrode 35-1 becomes a stepped table shape. This etching is also performed in the pixel region to form the first pixel electrode layer 37 using the second pixel electrode layer 38 as a mask to have the same profile.

Next, as shown in FIG. 4D, when the second gate electrode 36-1 is implanted with p-type or n-type ions into the active layer 31 by ion doping or ion implantation, the active layer 31 is formed. ) Is defined with a source region 31-1 and a drain region 31-2 doped with impurities (n-type ions or p-type ions). On the other hand, the active layer covered by the second gate electrode 36-1 has the same doping characteristics, but after completion of the process, two regions which are distinguished from each other are defined. The channel, which is the region under the first gate electrode 35-1, is defined. A leakage current control region 31-4 is defined which is formed between the region 31-3 and the channel region 31-3 and the two impurity regions 31-1 and 31-2, respectively.

Next, as shown in FIG. 4E, after the silicon oxide film or the silicon nitride film is laminated by chemical vapor deposition to cover the exposed entire surface, the source region 31-1 on the pixel electrode region active layer 31 and The interlayer insulating film 39 is formed by removing the silicon oxide film or the silicon nitride film in the drain region 31-2. The interlayer insulating film 39 is formed so as to contact only a part of the outer region of the second pixel electrode layer 38. In this case, the contact hole T ₂ is formed by removing the source region 31-1 on the active layer 31 and the gate insulating layer 32 on the drain region 31-2. Subsequently, the second pixel electrode layer 38 is etched using the interlayer insulating layer 39 remaining on the pixel electrode portion as a mask to expose the surface of the first pixel electrode layer 37 to form an upper portion of a portion outside the first pixel electrode layer 37. Only the second pixel electrode layer 38a left in the rectangular frame is formed.

Next, as shown in FIG. 4B, a source / drain electrode forming metal, that is, a low resistance metal such as aluminum or chromium, is laminated on the exposed hole and on the exposed entire surface, and then pattern-etched to form the source electrode 40. And the drain electrode 41 are formed. At this time, the source electrode 40 is formed with the data bus line overlapping and overlapping the gate bus line 36-2 formed extending to the gate electrode at the bottom, as shown in FIG. One end of the drain electrode 41 is formed to contact the first pixel electrode layer 37 of the pixel electrode part.

5A to 5D illustrate each step of forming a storage capacity in the method of manufacturing a liquid crystal display device.

First, as shown in FIG. 5A, an active layer is formed in a thin film transistor region, and then a gate insulating film 32 having a double or single structure is formed of a silicon cut film or a silicon oxide film on an exposed surface of the glass substrate 30. do. Thereafter, the first metal layer 33 is formed on the surface of the transparent metal material by a sputtering method, and the second metal layer 34 is formed on the top thereof by aluminum or chromium.

Next, as shown in (b) of FIG. 5, the second metal layer is patterned to form a second gate bus line 36-2, and the first metal layer is etched using the mask to form the first gate bus line 35-. 2) form. At this time, the first metal layer is overetched to the lower portion of the second gate bus line 35-2 so that the cross-sectional profile becomes a table shape having a step. Here, the first and second gate bus lines 35-2 and 36-2 become first storage capacitor electrodes.

Next, as shown in FIG. 5C, a silicon nitride film and a silicon oxide film are laminated on the exposed entire surface by chemical vapor deposition to form an interlayer insulating film 39. Subsequently, after the interlayer insulating film 39 of the pixel electrode portion is selectively removed, the second pixel electrode layer 38 is removed using the interlayer insulating film 39 of the pixel electrode portion as a mask to expose the first pixel electrode layer 37. . Unexplained reference numeral 38a denotes a second pixel electrode layer pattern-etched in a rectangular frame using the interlayer insulating film as a mask.

Next, as shown in FIG. 5D, a source / drain electrode forming metal material is stacked on the interlayer insulating layer 39 by a sputtering method, and then pattern-etched to form the second gate bus line 365-2. A second storage capacitor electrode 42 overlapping the partial region and contacting the first pixel electrode layer 37 of the pixel electrode part is formed.

6A through 6B show a cross-sectional profile of the first gate electrode 35-1 and the second gate electrode 36-1 as a second embodiment of the liquid crystal display according to the present invention. And cross-sectional profiles of the first pixel electrode layer 37 and the second pixel electrode layer 38a are formed without a step, and are separated from the source electrode 40 and the drain electrode 41, and the second gate electrode 36-1. The third gate electrode 43 is formed of the same material as that of the source / drain forming metal material through the interlayer insulating film 39 on the upper part of?). The third gate electrode 43 has a contact hole T ₃ formed on the interlayer insulating layer 39 to expose the second gate bus line 36-2 or the second gate electrode 36-1. It is connected. In the liquid crystal display device having such a structure, the active layer of the thin film transistor region has the channel region 31-3 under the first gate electrode 35-1 and the third gate electrode 43 on both sides thereof, as shown in FIG. 3. The source region 31-1 and the drain doped with impurities on the opposite side of the channel region 31-3 with respect to the leakage current control region 31-4 and the two leakage current control region 31-4 defined to overlap each other. The area 31-2 is defined.

In the liquid crystal display of the structures illustrated in FIGS. 6A and 6B, the leakage current control region 31-4 is controlled by the third gate electrode 43 when the thin film transistor is operated. The leakage current in the off state can be easily controlled.

Meanwhile, a method of manufacturing a liquid crystal display device having the structures shown in FIGS. 6A and 6B will be described with reference to FIGS. 4A through 4F. After the processes illustrated in FIGS. 1A and 4B are performed, the second gate electrode 36-1 is formed in step 4C, and the first metal layer is etched in the same pattern. Thus, the first gate electrode 35-1 is formed. In this case, the first pixel electrode layer 37 and the second pixel electrode layer 38 of the pixel electrode part are formed such that there is no step between the outer surfaces of the two layers.

Next, in the step (d) of FIG. 4, ion implantation masks having a predetermined thickness are formed on both sides of the first and second gate electrodes 35-1 and 36-1 at the time of ion purchase. The source region 31-1, the drain region 31-2, the two leakage current control regions 31-4 and the channel region 31-3 are defined, and the ion implantation mask is removed. At this time, depending on the nature of the ion implantation mask, it may not proceed separately.

Next, in the step illustrated in FIG. 4E, the interlayer insulating films of the source region 31-1 and the drain region 31-2 are patterned while simultaneously exposing a partial region of the pixel electrode layer 38 of the pixel electrode portion. Let's do it. Subsequently, the first pixel electrode layer is exposed by photolithography of the exposed second pixel electrode layer using the interlayer insulating film as a mask.

Next, in the step illustrated in FIG. 4B, the source electrode 40 and the drain electrode 41 are formed, and the leakage current control region 31-4 defined on the second gate electrode and the active layer is formed. The third gate electrode 43 is formed by leaving the source / drain electrode forming metal material in the overlapping region.

In the present specification, the liquid crystal display device and a method of manufacturing the same have been described above. However, FIGS. 7A and 7B illustrate a technical concept of the LCD and the manufacturing method of the present invention. And a plan view and a cross-sectional view exemplified for describing an embodiment applied to a manufacturing method.

As shown in Figs. 7A and 7B, the gate electrode 55-1 and the pixel electrode 56 are made of a metal having good reflectivity, such as chromium or aluminum, having an active layer 51 at the bottom thereof and interposing a gate insulating film. Is formed and a source electrode 58 and a drain electrode 59 are formed via an interlayer insulating film 57 having a contact hole T ₄ thereon. The drain electrode 59 has a gate electrode 55. It has the structure connected to the pixel electrode 56 formed on the same layer with the same material as -1).

The method of improving the reflective liquid crystal display device to which the technical spirit of the present invention is applied is as follows.

First, the active layer 51 is formed on the glass substrate 50, and then the gate insulating layer 52 is formed on the exposed entire surfaces of the active layer 51 and the glass substrate 50. Subsequently, a metal material having good reflectivity is stacked on the gate insulating layer 52, and then pattern-etched to form the gate electrode 55-1, the gate bus line 55-2, and the pixel electrode 55. Subsequently, the gate electrode 55-1 is masked to implant ions into the active layer 51, so that the source / drain regions 51-1 and 51-2 and the leakage current control region 51-4 are applied to the active layer 51. ) And the channel region 51-3. Thereafter, an interlayer insulating layer 57 is formed on the upper portion, and then contact holes T ₄ are formed on the source / drain regions in the interlayer insulating layer 57 and the upper portion of the pixel electrode 55 is exposed. Subsequently, the source / drain electrode forming metal material is stacked on the contact hole and the entire exposed surface, and then pattern-etched to form the source electrode 58 and the drain electrode 59. At this time, the drain electrode 59 is formed in contact with a part of the pixel electrode 56.

In the liquid crystal display of the present invention, since the first gate electrode is excessively etched to have a step in the thin film transistor, the thickness of the gate insulating film becomes thicker for the active layer overlapping the second gate electrode to which the lower surface is exposed. Thus, the electric field of the drain junction portion in the off state is weakened to reduce the leakage current. In addition, since the second pixel electrode layer remaining in the outer portion of the pixel electrode portion does not transmit light, the second pixel electrode layer may partially serve as a matrix.

Further, in the liquid crystal display device of the present invention, a liquid crystal display device can be used using fewer process steps, and a liquid crystal display device having a low leakage current can be manufactured.

Claims (15)

10. A liquid crystal display device comprising: a thin film transistor as a plurality of switching elements and a plurality of pixel electrodes connected to the thin film transistor, each thin film transistor comprising: an insulating substrate, an active layer formed on the insulating substrate; A gate insulating film formed on the active layer, a first gate electrode formed at a predetermined position of the gate insulating film to define a channel region in the active layer, and positioned on the first gate electrode, A second gate electrode formed to have a lower surface wider than a lower surface to define a leakage current control region on both sides of a channel region of the active layer, a source region and a drain region formed outside the leakage current control region in the active layer; It is formed on the second gate electrode, the first gate electrode and the exposed substrate, and formed on the source region The liquid crystal display device having an interlayer insulating film, the drain electrode is a source electrode coupled to the source region and connected to the drain region to expose the drain region. The liquid crystal display of claim 1, wherein the first gate electrode is formed of a transparent conductive material such as indium oxide (ITO). The liquid crystal display of claim 1, wherein the second gate electrode is formed of a metal material such as aluminum (Al), chromium (Cr), titanium silicide (TiSix), or molybdenum silicide (MoSix). The first pixel electrode layer of claim 2 or 3, wherein the pixel electrode is connected to a drain electrode of the thin film transistor and is formed of the same material as the first gate electrode on a gate insulating layer formed on the insulating substrate; And a second pixel electrode layer formed of the same material as the second gate electrode so as to overlap a portion of an outer portion of the first pixel electrode layer. 5. The first storage capacitor electrode of claim 4, wherein a portion of the first and second gate bus lines extending in the same structure as the first and second gate electrodes is a first storage capacitor electrode, and the first insulating capacitor is interposed therebetween. And a storage capacitor which partially overlaps the storage capacitor electrode and includes the first pixel electrode layer and the second storage capacitor electrode extended. The semiconductor device of claim 1, wherein the second gate electrode is formed to have the same shape as the first gate electrode, and is disposed on the interlayer insulating layer to form a leakage current control region between the channel region and the source / drain region of the semiconductor layer. And an auxiliary gate electrode connected to a second gate bus line extending to the second gate electrode through a contact hole formed in the second gate electrode and the interlayer insulating layer. 7. The liquid crystal display device according to claim 6, wherein the auxiliary gate electrode is formed of the same wiring agent as the source electrode and the drain electrode. 10. A liquid crystal display device comprising a thin film transistor, which is a plurality of switching elements, and a plurality of pixel electrodes connected to the thin film transistor, each of the plurality of pixels, comprising: an insulating substrate, an active layer formed on the insulating substrate, and an active layer; A gate insulating film to be formed, a gate electrode formed of a material having high reflectivity at a predetermined position of the gate insulating film to define a channel region in the active layer, source and drain regions formed at both sides of the active layer, and in the active layer A leakage current control region defined between the source region and the channel region, and between the drain region and the channel region, the gate electrode and the exposed substrate, and exposing the source region and the drain region. An interlayer insulating film, a source electrode connected to the source region, and the drain region Doedoe connected to a drain electrode and a drain electrode of the thin film transistor connected to the liquid crystal display device comprising the pixel electrode formed of a material such as the gate electrode on the gate insulating film. In the method of manufacturing a liquid crystal display device comprising a thin film transistor portion and a pixel electrode portion, 1) laminating a semiconductor layer on an insulating substrate, and then forming an active layer on the conductive layer, 2) sequentially stacking a first insulating layer, a first conductive layer, and a second conductive layer over the active layer and the entire surface of the insulating substrate; 3) photographing the second conductive layer to form a first gate electrode and a first gate bus line extending to the first gate electrode; 4) photographing the first conductive layer so that the first gate electrode protrudes, and forming a second gate electrode defining a channel region in the active layer and a second gate bus line extending to the second gate electrode; Wow, 5) An ion implantation or an ion doping into the active layer with the first gate electrode as a mask to form a source region and a drain region in the portion of the active layer corresponding to the outer region of the first gate electrode, the channel region and the source region Defining a leakage current adjusting region between the drain regions; 7) forming a second insulating film over the entire substrate; 7) forming contact holes exposing the source region and the drain region of the active layer by photo etching the second insulating layer and the first insulating layer; 8) manufacturing a liquid crystal display device comprising forming a source electrode, a data bus line and a drain electrode extending on the source electrode and patterning the third conductive layer in the contact holes and on the entire surface of the substrate. Way. The liquid crystal display device according to claim 9, wherein in the step 1), the active layer is formed by stacking amorphous silicon by a chemical vapor deposition method, and then activating by heat treatment or laser annealing. The method of claim 9, wherein the first conductive layer is formed of a transparent conductive material such as indium oxide (ITO). The method of claim 9, wherein the second conductive layer is formed of one of a conductive material such as aluminum (Al), chromium (Cr), titanium silicide (TiSix), molybdenum silicide (MoSix), or doped polycrystalline silicon (doped polySi). Liquid crystal display device manufacturing method characterized in that. The method of claim 9, wherein the first and second portions of the second conductive layer and the first conductive layer are left in the pixel electrode part, and the contact hole exposing the source and drain regions of the active layer is formed. Photo-etching the insulating film and the remaining second conductive layer to expose the first conductive layer, and when forming the drain electrode, connecting the drain electrode to the exposed first conductive layer; A method of manufacturing a liquid crystal display device. The second storage capacitor electrode of claim 9, wherein in the etching of the third conductive layer, the gate bus line is formed as a first storage capacitor electrode by overlapping the gate bus line with the second insulating layer interposed therebetween. Method of manufacturing a liquid crystal display device comprising the step of forming a. The method of claim 9, wherein the second gate electrode is formed to have the same shape as the first gate electrode to define a channel region in the active layer, and the third conductive layer is photo-etched on the second insulating layer. And forming an auxiliary gate electrode connected to one gate bus line to define a current leakage control region in the active layer.