KR102669437B1 - Apparatus for time synchronization integrated with a satellite antenna - Google Patents

Abstract

It relates to a satellite antenna-integrated time synchronization device that generates a time synchronization signal from a satellite signal received from a satellite. It includes a case, a 1PPS synchronization module placed within the case and generating a 1PPS signal from a satellite signal, and a 1PPS synchronization module placed within the case. It includes signal processing means for generating an IRIG signal and communication data using the 1PPS signal input from the synchronization module.

Description

Satellite antenna integrated time synchronization device {APPARATUS FOR TIME SYNCHRONIZATION INTEGRATED WITH A SATELLITE ANTENNA}

The present invention relates to a time synchronization device, and in particular, to a satellite antenna-integrated time synchronization device in which an antenna for receiving satellite information and a time synchronization device are integrated into one body.

Various studies are being conducted to monitor the power supply situation in the power system in a wide area, and for this purpose, visual synchronization of the entire power system is essential.

Such time synchronization technology includes, for example, technology described in Patent Documents 1 and 2.

As shown in FIG. 1, these conventional time synchronization devices generate a 1PPS (Pulse Per Second) signal from an antenna 10 for receiving satellite information and a satellite signal received through this antenna, and an IRIG signal is generated from the generated 1PPS signal. (Inter-Range Instrumentation Group) Time synchronization means 50 that generate signals, etc. are connected to each other through a connection cable 30.

There are many power device control devices currently installed and operated in the power system that control various power devices, such as circuit breakers, that do not provide a time synchronization function, and it is necessary to add a time synchronization function to these power device control devices. To do this, it is necessary to additionally install a time synchronization device having an antenna for receiving satellite information (10) and a time synchronization means (50) that generates and outputs a signal for time synchronization from the satellite information received by the antenna. For this, the existing time synchronization device must be installed. It is necessary to secure additional space to install a time synchronization device inside the installed power device control device. However, this requires work such as replacing the enclosure for the power equipment control device with a larger one, making it realistically difficult to secure additional space.

In addition, time synchronization technology requires a high level of time synchronization precision between each device, but in the conventional time synchronization device of FIG. 1, the antenna 10 and the time synchronization means 50 are formed as separate devices, and a cable is connected between them. Since they are connected to each other using (30), a time delay problem may occur between the antenna (10) and the time synchronization means (50).

In addition, in many cases, existing power device control devices do not have a means to visually check information on the current operating status of the power device controlled by the control device, and for this purpose, the existing power device control device is controlled. It is good if the time synchronization device added to the device is provided with a means for visually checking the current operating state of the power equipment control device as well as the operating state of the time synchronizing device itself.

However, as confirmed by the present applicant, no prior art regarding a time synchronization device having such a function was found.

Publication of Patent No. 10-2011-0042659 (published on April 27, 2011) Publication of Patent No. 10-2012-0017274 (published on February 28, 2012)

The present invention was made in consideration of the above problems of the prior art, and provides a satellite antenna-integrated time synchronization device that integrates an antenna for receiving satellite signals and a signal processing device that generates signals necessary for time synchronization from the satellite signals received by the antenna. The purpose is to provide

In addition, the present invention provides a time synchronization device that includes means for visually confirming the operating state of the power equipment control device from the outside, including the operating state of the time synchronization device itself.

The time synchronization device of the present invention for solving the above problems is a satellite antenna-integrated time synchronization device that generates a time synchronization signal from a satellite signal received from a satellite, and is disposed in a case and the case, and receives at least 1 PPS from the satellite signal. It includes a 1PPS synchronization module that generates a signal, and a signal processing means disposed in the case and generating an IRIG signal and communication data using the 1PPS signal input from the 1PPS synchronization module.

In addition, the time synchronization device of the present invention is a satellite antenna-integrated time synchronization device that generates a time synchronization signal from a satellite signal received from a satellite and outputs it to a power equipment control device, and includes a 1PPS signal and satellite connection status information from the satellite signal. It includes a 1PPS synchronization module that generates a signal for UART communication, and a signal processing means that generates a signal necessary for time synchronization of the power device control device using the signal output from the 1PPS synchronization module, wherein the signal processing means includes the It includes a 1PPS signal verification means for verifying the 1PPS signal, and a 1PPS synchronization IRIG signal generation means for generating and outputting an IRIG signal synchronized to the 1PPS signal using the 1PPS signal verified by the 1PPS signal verification means.

The present invention integrates an antenna for receiving satellite signals and a signal processing device that generates signals necessary for time synchronization from the satellite signals received by the antenna, so when adding a time synchronization function to already installed power equipment, etc., the time synchronization device is used. It has an advantageous effect in terms of securing installation space.

In addition, the present invention can easily visually check the operating state of the power equipment control device, including the operating state of the time synchronization device itself, from the outside.

1 is a diagram showing the appearance of a conventional time synchronization device;
Figure 2 is a diagram showing the structure of a satellite antenna-integrated time synchronization device according to a preferred embodiment of the present invention;
3 is a functional block diagram of a phase synchronizer of a preferred embodiment of the present invention;
4 is a block diagram showing the configuration of a signal processing module of a preferred embodiment of the present invention;
5 is a functional block diagram of the signal processing unit of the preferred embodiment of the present invention;
Figure 6 is a flow chart showing the flow of 1PPS signal verification processing;
Figure 7 is a step-by-step output waveform of 1PPS signal verification processing;
Figure 8 is a flow chart showing the flow of IRIG signal and NMEA sentence generation processing;
Figure 9 is an output waveform diagram of each part of the signal processing module,
10 is a flow chart showing the flow of display processing for displaying the operating state of the power equipment control device;
Fig. 11 is a flow chart showing the flow of display processing for displaying the operating state of the time synchronization device.

Hereinafter, a satellite antenna-integrated time synchronization device according to a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

First, the structure of the time synchronization device of a preferred embodiment of the present invention will be described with reference to FIG. 2. Figure 2 is a diagram showing the structure of a satellite antenna-integrated time synchronization device of a preferred embodiment of the present invention, where (a) is an exploded perspective view of the time synchronization device and (b) is a cross-sectional view.

As shown in FIG. 2, the time synchronization device 100 of a preferred embodiment of the present invention includes a case body consisting of an upper case 110 and a lower case 130, a 1PPS synchronization module 150 installed in the case body, and a signal Includes a processing unit 170.

The 1PPS synchronization module 150 is responsible for the antenna function through which the time synchronization device 100 receives satellite signals from the satellite.

In addition, a permanent magnet 180 is installed at an appropriate position on the lower surface of the lower case 130 of the time synchronization device 100, and the time synchronization device 100 of the present invention is connected to a magnetic material by this permanent magnet 180. It can be easily attached to the outside of the enclosure of the power equipment control device made of material. However, the method of installing the time synchronization device 100 in the power device control device is not limited to this. For example, a hole for installing the time synchronization device 100 is drilled in the case of the power device control device, and the time synchronization device 100 is installed using a screw connection method. A method such as directly mounting the synchronous device 100 to the power device control device may be used.

In addition, the time synchronization device 100 has a cable outlet 190 installed on one side of the upper case 110 or the lower case 130, and the signal processing unit 170 outputs the signal through this cable outlet 190. A signal is output to the power device control device 200.

Next, the internal structure of the time synchronization device 100 of a preferred embodiment of the present invention will be described. Figure 3 is a functional block diagram of a phase synchronization device of a preferred embodiment of the present invention.

As shown in FIG. 3, the time synchronization device 100 of this embodiment includes an antenna (ANT), a 1PPS synchronization module 150, and a signal processing unit 170, and the output signal of the signal processing unit 170 is a power device. It is output to the control device 200.

Satellites such as the US's Global Positioning System (GPS) and Russia's GLONASS can be used, and the antenna (ANT) receives satellite information including time information and location information from these satellites.

The 1PPS synchronization module 150 generates a 1PPS signal (a), satellite connection status information (b), and a UART communication signal (c) from the satellite signal received by the antenna (ANT) and outputs them to the signal processing unit 170.

The 1PPS signal (a) is a signal generated from a satellite signal received by the antenna (ANT), and is a signal in which one pulse is output per second. Satellite connection status information (b) is a signal indicating the connection status (on/off status) between a satellite such as GPS and the time synchronization device 100. In addition, the UART (Universal asynchronous receiver/transmitter) communication signal (c) is a signal representing time and location information generated from satellite signals received by the antenna (ANT), and is used internationally to transmit information such as time, latitude, and longitude. It is output in the standard NMEA (National Marine Electronics Association 0183) data format (also called NMEA sentence).

In this embodiment, the 1PPS synchronization module 150 uses a known configuration, so further detailed description is omitted here.

The signal processing unit 170 generates a 1PPS signal (A), a 1PPS synchronization IRIG signal (B), and communication data (C) from the output signal of the 1PPS synchronization module 150 and outputs them to the power device control device 200.

Next, details of the signal processing unit 170 will be described.

First, the configuration of the signal processing unit 170 will be described. Figure 4 is a block diagram showing the configuration of a signal processing module of a preferred embodiment of the present invention.

As shown in FIG. 4, the signal processing unit 170 includes a signal processing module 171, a time delay compensation circuit 172, a gate driver 173, an RS485 converter 174, an RS232 converter 175, and a display unit 176. Includes.

The 1PPS signal (a) input from the 1PPS synchronization module 150 to the signal processing unit 170 is input to the signal processing unit 170 and is also input to the time delay compensation circuit 172. In addition, part of the 1PPS signal input to the signal processing unit 170 is output to the power device control device 200 as it is input without undergoing any processing in the signal processing unit 170. In addition, among the output signals of the 1PPS synchronization module 150, the satellite connection status information (b) and the UART communication signal (c) are also used in the signal processing module 171.

The signal processing module 171 synchronizes the time of the power device control device 200 using the 1PPS signal (a), satellite connection status information (b), and UART communication signal (c) input from the 1PPS synchronization module 150. The necessary IRIG signals, etc. are generated and output to the power device control device 200, and at the same time, information about the time synchronization device 100 itself and the operating status of the power device control device 200 is visually displayed.

Details of the signal processing module 171 will be described with reference to FIG. 5. Figure 5 is a functional block diagram of a signal processing unit of a preferred embodiment of the present invention.

The signal processing module 171 includes a 1PPS signal verification unit 1711, a satellite connection status check, a 1PPS synchronization unit 1712, a 1PPS synchronization IRIG signal generation unit 1713, a communication data generation unit 1714, and a control device status confirmation unit. It includes (1715), an internal RTC (1716), an IRIG status check unit (1717), and a control unit (1719).

The 1PPS signal verification unit 1711 verifies the legitimacy of the 1PPS signal input from the 1PPS synchronization module 150. The satellite connection status confirmation and 1PPS synchronization unit 1712 checks the connection status between the antenna (ANT) of the time synchronization device 100 and the satellite from the satellite connection status information (b) input from the 1PPS synchronization module 150, If the satellite connection status is determined to be normal, the satellite connection status information (b) is synchronized with the 1PPS signal to generate satellite connection status information synchronized to the 1PPS signal. Details of the 1PPS signal verification method and satellite connection status confirmation method will be described later.

The 1PPS synchronization IRIG signal generator 1713 uses the 1PPS signal (a) input from the 1PPS synchronization module 150 to generate an IRIG signal synchronized to the 1PPS signal. The 1PPS synchronization IRIG signal generator in this embodiment (1713) generates a signal in IRIG format synchronized to the 1PPS signal.

The IRIG signal is a signal format that includes data necessary for time synchronization among satellite information. It consists of a predetermined number of characters indicating the time information format and a predetermined number of numbers indicating the properties of the IRIG signal. These are all known technologies, so here they are referred to as IRIG. A detailed description of the signal and the method of generating this signal will be omitted.

The communication data generator 1714 generates an NMEA sentence using the UART communication signal (c) input from the 1PPS synchronization module 150. Since the NMEA sentence also uses known technology, detailed description will be omitted here.

The control device status check unit 1715 communicates with the power device control device 200 and determines the status of the power device controlled by the power device control device 200, for example, whether the power device is currently in the input state or is open. Check the current status of the power device control device 200, such as whether the power device control device is operating normally, and display the results so that the user can visually check them using the display unit 176, which will be described later. do.

The internal RTC (Real Time Clock, 1716) is a real-time clock generator built into the signal processing module 171, and as a result of checking the satellite connection status and confirmation by the 1PPS synchronization unit 1712, it processes the signal when the satellite connection status is not normal. The module 171 uses the internal RTC 1716 to generate a 1PPS synchronization IRIG signal (B) and communication data (C).

The IRIG status checker 1717 checks the output status of the IRIG generated and output by the 1PPS synchronized IRIG signal generator 1713 and displays it on the display unit 176.

The control unit 1719 controls each of the above units. For reference, in FIG. 5, the control unit 1719 is shown independently from other components, but this is for convenience of illustration, and in fact, it is connected to each component of the signal processing module 171.

Next, the 1PPS signal verification process by the 1PPS signal verification unit 1711 will be described using FIGS. 6 and 7. Figure 6 is a flow chart showing the flow of the 1PPS signal verification process, and Figure 7 is a step-by-step output waveform diagram of the 1PPS signal verification process.

First, in step S11, if a 1PPS signal interrupt occurs, the process proceeds to step S12. In step S12, the control unit 1719 controls the 1PPS signal verification unit 1711 to set the internal timer (not shown) of the 1PPS signal verification unit 1711. Start counting. The internal timer of the 1PPS signal verification unit 1711 counts one number per 1 ms, and since the 1PPS signal is a pulse signal that occurs once per second, there is a time difference of 1,000 ms between the 1PPS signal and the next 1PPS signal. In step S13, the 1PPS signal verification unit 1711 checks the count number of the internal timer at the time of the next 1PPS signal generation, and determines that the count number of the internal timer at the time of the next 1PPS signal generation is between 999 ms and 1001 ms (999 ms ≤ internal timer If the count number ≤ 1001 ms) (step S13 = YES), the process proceeds to step S14.

In step S14, the control unit 1719 checks the satellite connection status and controls the 1PPS synchronization unit 1712 to check whether satellite connection status information (b) is input from the 1PPS synchronization module 150 to check the satellite connection status.

Subsequently, if the satellite connection status is normal as a result of confirmation in step S14 (step S14 = YES), the control unit 1719 checks the satellite connection status and controls the 1PPS synchronization unit 1712 to establish the satellite connection input from the 1PPS synchronization module 150. The status information (b) is synchronized with the 1PPS signal to generate and output satellite connection status information synchronized to the 1PPS signal, and then steps S11 to S15 are repeated.

As a result of checking in step S13, if the count number of the internal timer is not between 999 ms and 1001 ms at the next 1PPS signal generation time (step S13 = YES), the process proceeds to step S18, and in step S18, the control unit 1719 initializes the internal timer. Then, the process proceeds to step S17 and waits until the next 1PPS signal occurs. When the next 1PPS signal occurs, the process from step S11 is repeated.

Referring to FIG. 7, if a 1PPS signal interrupt occurs at time t1, the internal timer starts counting in step S12, and if the count number of the internal timer in step S13 is (999ms≤count number of internal timer≤1001ms), time t2. In step S15, the satellite connection status information obtained from the satellite connection status information (b) input from the 1PPS synchronization module 150 is checked. At this time, the satellite connection status information (b) input from the 1PPS synchronization module 150 may not be synchronized with the 1PPS signal, but according to this embodiment, the satellite connection status is at time t2, that is, the time when the next 1PPS signal interrupt occurs. By synchronizing information (b), 1PPS signal synchronization satellite connection status information is generated and output.

Next, the IRIG signal and NMEA sentence generation processing will be described with reference to FIGS. 8 and 9. Figure 8 is a flow chart showing the flow of IRIG signal and NMEA sentence generation processing, and Figure 9 is an output waveform diagram of each part of the signal processing module.

First, when a 1PPS interrupt occurs in step S21, the control unit 1719 controls the 1PPS signal verification unit 1711 to perform 1PPS signal verification processing in step S22. The 1PPS signal verification process in step S22 is the process previously described using FIGS. 6 and 7.

When the 1PPS signal is verified in step S22, the control unit 1719 controls the 1PPS synchronization IRIG signal generator 1713 and the communication data generator 1714 in step S23 to generate the 1PPS synchronization IRIG signal and communication data synchronized to the 1PPS signal ( NMEA sentence format) is generated and output.

Next, proceeding to step S24, the control unit 1719 controls the satellite connection status confirmation unit 1712 to check whether the satellite connection status information (b) is normally input from the 1PPS synchronization module 150, thereby detecting the antenna (ANT). ) and the satellite, and if the satellite connection is good (step S24=YES), return to step 22 and repeat the steps thereafter.

If the satellite connection status is poor as a result of step S24 (step S24 = NO), the control unit 1719 controls the internal RTC 1716 to generate an internal real-time clock, and then proceeds to step S25. The processing from step S23 is executed.

Next, going back to FIG. 4, and referring to FIG. 9 showing the output waveforms of each part of the signal processing module, the signal processing unit 170 of the IRIG signal generated by the 1PPS synchronized IRIG signal generating unit 1713 of the signal processing module 171 ) will be further explained.

For example, the IRIG signal generated by the 1PPS synchronization IRIG signal generator 1713 is generated through the processing described in FIGS. 6 and 8, and for example, a delay of the time t in FIG. 9 occurs so that it is not synchronized with the 1PPS signal. The problem arises that it doesn't fit.

Therefore, in this embodiment, the delay time is compensated using the delay time compensation circuit 172 to synchronize the IRIG signal output by the signal processing module 171 with the 1PPS signal (see the IRIG signal after compensation in FIG. 9). .

In addition, the IRIG signal output from the signal processing module 171 is, for example, a signal with a voltage level of 3.3V, and the signal processing module 171, which uses a microcontroller composed of semiconductor elements, has a high impedance load due to its structure. There is a problem of not being able to supply power.

Therefore, in the signal processing unit 170 of this embodiment, a gate driver 173 is additionally installed in the signal processing module 171 to increase the load impedance of the IRIG signal output to the power device control device 200. The voltage level is boosted to, for example, 5V (see IRIG signal after boosting in FIG. 9).

In addition, the communication data generated and output from the communication data generator 1714 of the signal processing module 171 is converted to be suitable for RS485 communication and RS232 communication through the RS485 converter 174 and RS232 converter 175, respectively, and is converted to a power device. It is output to the control device 200. Therefore, the power device control device 200 can select and use a method suitable for its communication method among the RS485 method or the RS232 method.

In addition, as described above, the signal processing unit 170 of this embodiment provides the 1PPS signal along with the IRIG signal generated using the 1PPS signal to the power device control device 200 at the same time, so the power device control device ( 200) can select and use a signal suitable for their method.

Next, processing for displaying the operating state of the power equipment control device 200 will be described with reference to FIG. 10 . Fig. 10 is a flow chart showing the flow of display processing for displaying the operating state of the power equipment control device.

First, in step S31, the control unit 1719 controls the control device status check unit 1715 to receive current state information from the power device control device 200. Here, the status information is, for example, information about whether the power device controlled by the power device control device 200 is in an on or open state, or whether the power device control device 200 is operating normally. .

Next, in step S32, the control device status check unit 1715 checks whether the power device controlled by the power device control device 200 is in the closed state or the open state, and if in the closed state, indicates the closed state of the power device. For example, the red LED of the display unit 176 is turned on (step S33), and if it is determined that the power device is in an open state as a result of the determination in step S32, the display portion 176, for example, indicating the open state of the power device, is turned on. Turn on the green LED (step S34).

Here, the display unit 176 is a display device that is disposed at an appropriate location of the time synchronization device 100, for example, the upper case 110, and can display a plurality of different colors on, off, or blinking, LED can be used as the light source.

Next, proceeding to step S35, the control device status check unit 1715 determines whether there is an abnormality in the power device control device 200. If there is an abnormality as a result of the confirmation, in step S36, for example, the abnormal state display LED of the display unit 176, which indicates the abnormal state of the power equipment control device 200, is displayed in a blinking state, and if there is no abnormality, in step S33 or step S34 Maintain the lighting state (step S37).

As a result, the user can visually and simply check the operating state of the power device control device 200 through the display unit 176 of the time synchronization device 100.

Next, a method of checking and displaying the satellite connection status and the output status of the IRIG signal will be described with reference to FIG. 11. Fig. 11 is a flow chart showing the flow of display processing for displaying the operating state of the time synchronization device.

First, in step S41, the control unit 1719 controls the 1PPS signal verification unit 1711 to check whether the satellite signal is normally received. The satellite signal reception status can be confirmed by checking whether the 1PPS signal (a) is normally received from the 1PPS synchronization module 150.

If it is confirmed that the satellite signal is being received normally as a result of step S41, the control unit 1719 controls the satellite connection status check unit 1712 to check the satellite connection status in step S42. The satellite connection status can be confirmed by checking whether the satellite connection status information (b) is normally received from the 1PPS synchronization module 150.

If it is determined that the satellite connection status is poor as a result of step S42 (step S42 = abnormal), proceed to step S43 to store the abnormal occurrence time in the storage medium of the unused city, and perform the satellite connection status confirmation unit 1712 in step S44. After resetting, the count number of the reset occurrence counter (not shown) is increased by 1 in step S45.

Next, proceed to step S46 to check the count number of the reset occurrence counter, and if the count number of the reset occurrence counter is 3 or more (step S46 = YES), a satellite connection status abnormality occurrence event is recorded in a storage medium not shown, and the display unit ( 176), the display LED indicating the satellite connection status abnormality is turned on to indicate the satellite connection status abnormality, and then returns to step S41.

Additionally, if the count of the reset occurrence counter is less than 3 as a result of checking in step S46, the process returns to step S42 and the subsequent routine is repeated.

If it is determined that the satellite connection status is normal as a result of the determination in step S42, the process proceeds to step S48 and the display LED indicating the normal satellite connection status in the display unit 176 is turned on to indicate that the satellite connection status is normal, and the reset occurrence counter is reset in step S49. After initializing, return to step S41.

In addition, if it is determined in step S41 that the satellite signal is being received normally, the process proceeds to step S50, and the control unit 1719 controls the IRIG status check unit 1717 to generate and output the 1PPS synchronization IRIG signal generator 1713. Check whether the 1PPS synchronization IRIG signal is abnormal.

As a result of the confirmation in step S50, if it is determined that an abnormality has occurred, for example, the 1PPS synchronization IRIG signal (B) is not normally output from the 1PPS synchronization IRIG signal generator 1713, the abnormal occurrence time is stored in step S51, In step S52, the 1PPS synchronization IRIG signal generator 1713 is reset. Next, the count number of the reset counter (not shown) is increased by 1 in step S53, and then the count number of the reset counter is checked in step S54.

As a result of the confirmation in step S54, if the count number of the reset occurrence counter is 3 or more, an abnormality occurrence event of the 1PPS synchronization IRIG signal (B) is recorded in a storage device (not shown) in step S55, and the 1PPS synchronization IRIG signal (B) of the display unit 176 is recorded. After turning on the abnormal state display LED, return to step S50 and repeat the subsequent routine.

Also, if the count number of the reset generation counter is less than 3 in step S54, the process returns to step S50 and the subsequent routine is repeated.

In addition, if it is determined that the 1PPS synchronization IRIG signal (B) is normal as a result of the determination in step S50, the process proceeds to step S56, and in step S56, the LED for displaying the normal state of the 1PPS synchronization IRIG signal (B) in the display unit 176 is turned on. , initialize the reset occurrence counter in step S57, then return to step S50 and repeat the subsequent routine.

Although the present invention has been described in terms of preferred embodiments, the present invention is not limited to the above embodiments, and various changes or modifications may be made without departing from the scope of the present invention as set forth in the claims.

100 visual synchronizer
110 upper case
130 lower case
150 1PPS synchronous module
170 Signal processing unit
171 Signal processing module
172 Delay time compensation circuit
173 gate driver
174 RS485 converter
175 RS232 converter
176 display
180 permanent magnet
200 Power Appliance Control Unit

Claims (11)

delete delete delete It is a satellite antenna-integrated time synchronization device that generates a time synchronization signal from the satellite signal received from the satellite and outputs it to the power equipment control device.
A 1PPS synchronization module that generates a 1PPS signal, satellite connection status information, and a UART communication signal from the satellite signal,
Comprising a signal processing means for generating a signal necessary for time synchronization of the power device control device using the signal output from the 1PPS synchronization module,
The signal processing means is,
1PPS signal verification means for verifying the 1PPS signal,
1PPS synchronization IRIG signal generating means for generating and outputting an IRIG signal synchronized to the 1PPS signal using the 1PPS signal verified by the 1PPS signal verification means;
It includes a satellite connection status confirmation means for generating satellite connection status information synchronized to the 1PPS signal using the satellite connection status information,
The 1PPS signal verification means starts counting the internal timer when the 1PPS signal is generated and then compares the count number of the internal timer up to the time of 1PPS signal generation with a preset range,
The satellite connection status checking means checks the satellite connection status by checking whether the satellite connection status information is input from the 1PPS synchronization module when the count number of the internal timer is within a preset range, and if the satellite connection status is normal, the satellite connection status confirmation means is configured to check the satellite connection status. Synchronizes the satellite connection status information input from the 1PPS synchronization module to the next 1PPS signal to generate satellite connection status information synchronized to the 1PPS signal,
The 1PPS synchronization IRIG signal generating means generates the 1PPS synchronization IRIG signal synchronized to the next 1PPS signal when the count number of the internal timer is within a preset range, and generates the 1PPS synchronization IRIG signal according to the satellite connection status information input from the 1PPS synchronization module. A satellite antenna-integrated time synchronization device that generates the 1PPS synchronization IRIG signal using an internal real-time clock when the satellite connection is poor. delete In claim 4,
The signal processing means further includes a gate driver that boosts the voltage level of the IRIG signal synchronized to the 1PPS signal. In claim 4,
The signal processing means further includes a communication data generating means for generating and outputting communication data using a 1PPS signal synchronized to the 1PPS signal and satellite connection status information synchronized to the 1PPS signal. A time synchronization device integrated with a satellite antenna. The method of any one of claims 4, 6, and 7,
The signal processing means includes a control device status checking means for checking the operating status of the power device control device and the power device controlled by the power device control device,
A satellite antenna-integrated time synchronization device further comprising display means for visually displaying the operation states of the power device control device and the power device according to a confirmation result of the control device status check means. The method of any one of claims 4, 6, and 7,
The signal processing means includes an IRIG status checking means for verifying whether the IRIG signal synchronized to the 1PPS signal is abnormal,
A satellite antenna-integrated time synchronization device further comprising display means for visually displaying whether an IRIG signal synchronized to the 1PPS signal is abnormal according to a confirmation result of the IRIG status confirmation means. In claim 4,
A satellite antenna-integrated time synchronization device further comprising display means for visually displaying the satellite connection status according to a confirmation result of the satellite connection status confirmation means. The method of any one of claims 4, 6, and 7,
The signal processing means is a satellite antenna-integrated time synchronization device that outputs the 1PPS signal and the IRIG signal synchronized to the 1PPS signal.