CN101706580A - PXIe bus based GNSS signal simulator and implementation method thereof - Google Patents
PXIe bus based GNSS signal simulator and implementation method thereof Download PDFInfo
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- CN101706580A CN101706580A CN200910238050A CN200910238050A CN101706580A CN 101706580 A CN101706580 A CN 101706580A CN 200910238050 A CN200910238050 A CN 200910238050A CN 200910238050 A CN200910238050 A CN 200910238050A CN 101706580 A CN101706580 A CN 101706580A
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Abstract
The invention provides a PXIe bus based GNSS signal simulator and an implementation method thereof. The simulator constructs the whole system platform based on the PXIe bus. A hardware signal generator comprises a synchronous control card, an intermediate frequency modulator card, an up converter card and a combiner card which are inserted into a standard PXIe case in the form of boards. The system adopts the synchronous control card to generate and transmit reference clocks and reset and time base signals through an equal-length clock line, a single end and a differential star trigger line of the PXIe bus. All the boards can be controlled by upper computer software through the PXIe bus. The system of the invention has excellent flexibility, compatibility and expandability, and can support the multi-constellation and multi-frequency point satellite navigation signals for integrated navigation in the present and future signal systems.
Description
Technical field
The present invention relates to the satellite navigation field, relate in particular to a kind of based on PXIe (PXI EXPRESS, PCIeXtensions for Instrumentation) GNSS of bus (Global Navigation SatelliteSystem, GLONASS (Global Navigation Satellite System)) signal simulator and its implementation.
Background technology
The GNSS signal simulator can be simulated and be produced the satellite navigation signals broadcast of GNSS constellation institute, process spatial transmission arrival receiver, being used for providing under laboratory environment the user definable, test scene repeatably, is the various signals tests and the indispensable instrument and equipment of receiver test of satellite navigation system.
Develop the GPS/GLONASS/Galileo/ Big Dipper signal simulator of multiple model both at home and abroad successively, these simulators have the branch of single channel hyperchannel, the embedded system structures that adopt computer card formula or standalone chassis more, but the dirigibility of its system architecture and expandability are subject to old interface or bussing technique and the definition of existing spacing wave, make it that significant limitation be arranged when the many constellations of simulation, multifrequency point, new GNSS signal structure and multipath and undesired signal.Along with the upgrading of existing GNSS system and the construction upsurge of new system, and the development of high performance bus technology, press for a kind of satellite navigation signal simulator that can give full play to new technology advantage, compatible multiple signal system, the multisystem integrated navigation test of the new system of support and possess high flexibility and high expandability.
Not at present international and domestic also not retrieving about report based on the GNSS signal simulator system and method for PXIe bus.
Summary of the invention
In order to satisfy growing function and the performance requirement to satellite navigation signal simulator, the present invention proposes GNSS signal simulator and its implementation based on the PXIe bus.This simulation system and method are being inherited our unit's patent applied for " multistage output BD2/GPS/Galileo satellite navigation signal simulator and signal generating method thereof " (application number: 200810132412.5) the many signals of compatible BD-2/GPS/Galileo multisystem multifrequency point, possess multichannel and multistage output power of test and multiple dynamically and undesired signal represent on the basis of ability, fully faying face is to the technical advantage of the PXIe of instrument system bus architecture, make the transmission of reference clock signal and a plurality of signal generator integrated circuit board so that more convenient synchronously between multiple instruments, strengthened regularly net synchronization capability, improved the dirigibility of system, compatibility and expandability have been improved the modularization of instrument simultaneously, soundness and mechanical encapsulation characteristic.The present invention can not only produce based on many constellations of the support integrated navigation of existing signal system, the satellite navigation signals of multifrequency point, and can increase and decrease easily constellation and frequency quantity, change signal modulation system to realize support to following signal system, make the integrated more flexible and efficient of simulator and other surveying instrument equipment simultaneously.
The objective of the invention is to be achieved through the following technical solutions:
Employing is based on the card insert type structure of PXIe bus, to form by hardware signal generator and upper computer software. the hardware signal generator is made up of synchro control card, intermediate frequency modulator card, upconverter card, combiner card, adopts the integrated circuit board form to insert in the standard P XIe cabinet; The size that depends on the pairing calculated load of instrument configuration scale, upper computer software can run on the PXIe embedded controller card that is equipped with Windows, also can run on by on interface cable and the computing machine that the PXIe cabinet is connected. intermediate frequency modulator is stuck in upper computer software control and produces analog if signal down, by the appointment frequency of upconverter card up-conversion to L-band. the 10MHz reference clock is provided, resets and time base synchronizing signal for all integrated circuit boards by the synchro control card that is positioned at PXIe cabinet SYSTEM TIMING slot, and utilize the PXIe bus to transmit these signals.By combiner the satellite-signal of many constellations, multifrequency point is closed road output, and be divided into two paths of signals by power splitter, the fixed value attenuator of wherein leading up to decay back output low-power level signal, another road directly output is used for the high-power signal of self-correcting and test.
An intermediate frequency modulator card and two upconverter cards are one group in the described hardware signal generator, can simulate the satellite-signal that produces two frequencies for every group; Constellation and the frequency quantity that can be simulated by the mode expanding system that increases integrated circuit board quantity, unit case instrument can be simulated the restriction that constellation and frequency number only are subjected to employed PXIe cabinet slot count; Can provide unified by the synchro control card and reset, clock and time-base signal, and support the multiple cases expansion.
The described synchro control jig that is positioned at cabinet SYSTEM TIMING slot has plate to carry OCXO, this integrated circuit board also can connect outer frequency marking simultaneously, and can select use plate to carry OCXO or outer frequency marking produces the 10MHz reference clock by software, the reference clock that is produced is connected with the PXI_CLK10_IN signal wire of PXIe bus.The also 10MHz reference clock that can select use the PXIe cabinet to be provided by software.The 10MHz reference clock is connected to each integrated circuit board by the PXI_CLK10 signal wire of PXIe bus, and the reference clock that can guarantee all integrated circuit boards is synchronous.
The synchro control card that is positioned at cabinet SYSTEM TIMING slot can produce synchronous reset signal, be connected to each integrated circuit board by the single-ended star-like triggering line of the PXI_STAR of PXIe bus, can use software or mechanical button to make all integrated circuit boards realize synchronous warm reset or synchronous hard reset as reset source.
Base synchronizing signal when the synchro control card that is positioned at cabinet SYSTEM TIMING slot can produce, this time base synchronizing signal include but not limited to that time-base signal is interrupted in host computer transmission that the pps pulse per second signal (or the pps pulse per second signal that is produced according to the synchro control card) according to the outside input is generated and intermediate frequency modulator card signal state upgrades time-base signal.Time base synchronizing signal is connected to each integrated circuit board by the star-like triggering line of the PXIe_DSTAR difference group of PXIe bus, can guarantee between each integrated circuit board the time base synchronously; The generation of time base synchronizing signal can be controlled by upper computer software.
The synchro control jig that is positioned at cabinet SYSTEM TIMING slot has pulse per second (PPS) input, output port, be used to realize and miscellaneous equipment between synchronously.When the 1PPS inbound port had the pps pulse per second signal input, the synchro control card can make the reference clock signal edge of its generation align with the pulse per second (PPS) of input by adjusting clock phase; When the 1PPS inbound port does not have pps pulse per second signal when input, the synchro control card can generation and whole second of reference clock signal and the selected reference time system the simulated pps pulse per second signal that aligns of edge constantly, and exports by the 1PPS outbound port.
Described intermediate frequency modulator clamping is received reference clock from the synchro control card, is resetted and synchronizing signal, and finish the signal modulation of each system each visible satellite respective channel of each component of signal of each frequency according to the moonscope data that receive from upper computer software and navigation message, realize the accurate control of Doppler, code phase, carrier phase and relative level, generate the analog if signal output of appointment; The signal controlling information that sends according to upper computer software is crossed PXIe bus Local Bus to the upconverter cartoon that is connected and is sent frequency and power control instruction simultaneously.
Described upconverter card is converted to the analog if signal of input L-band according to frequency and power control instruction from PXIe bus Local Bus by the mode of orthogonal modulation appointment frequency, and the power of radiofrequency signal controlled in certain scope, simultaneously the local oscillator lock-out state is returned to the intermediate frequency modulator card by Local Bus.
As seen from the above technical solution provided by the invention, compare with domestic and international existing GNSS signal simulator, the GNSS signal simulator that the embodiment of the invention provides has following technological merit:
(1) Xian Jin synchronization mechanism: guaranteed between the polylith integrated circuit board clock, reset and time base synchronously, thereby can use the polylith integrated circuit board to realize simulation to many constellations, multi-frequency-point satellite navigation signal, and by to clock, reset and the time base synchronizing signal the simulation that is controlled to be support the signal of integrated navigation checking that perfect support is provided.
(2) Gao Du dirigibility, customizability and expandability: the integrated circuit board quantity of the operation platform of upper computer software, hardware signal generator is all customizable; Can not only produce based on many constellations of the support integrated navigation of existing signal system, the satellite navigation signals of multifrequency point, and can increase and decrease easily constellation and frequency quantity, change signal modulation system to realize support to following signal system, make the integrated more flexible and efficient of simulator and other surveying instrument equipment simultaneously.
(3) make full use of towards the technical advantage of the PXIe bus architecture of instrument system, improved modularization, reliability and the mechanical encapsulation characteristic of instrument.
Description of drawings
The present invention is further described below in conjunction with accompanying drawing.
The GNSS signal simulator system architecture synoptic diagram that Fig. 1 provides for the embodiment of the invention;
System function module and intermodule interface signal schematic representation that Fig. 2 provides for the embodiment of the invention;
The structural representation of a kind of intermediate frequency modulator card that Fig. 3 provides for the embodiment of the invention;
The structural representation of a kind of upconverter card that Fig. 4 provides for the embodiment of the invention;
The structural representation of a kind of synchro control card that Fig. 5 provides for the embodiment of the invention;
Fig. 6 is that the clock phase of a kind of synchro control card in the embodiment of the invention is adjusted process flow diagram.
Embodiment
Describe the present invention in detail below in conjunction with accompanying drawing, the structural representation of the described GNSS signal simulator of the embodiment of the invention mainly comprises following six parts as shown in Figure 1: PXIe cabinet, PXIe embedded controller card (or interchangeable computing machine that is connected with the PXIe cabinet by interface cable), synchro control card, upconverter card, intermediate frequency modulator card and combiner/power splitter.
In Fig. 1, the PXIe cabinet is the standard PC case that satisfies the PXIe code requirement, and the slot quantity of cabinet has determined the constellation that the multipotency of unit case simulator produces, the quantity of frequency.PXIe embedded controller card is the embedded controller card that is equipped with Windows and is applicable to the PXIe bus, is used for moving upper computer software, and by the PXIe bus hardware signal generator is controlled; When the constellation of configuration and frequency scale when increasing to a certain degree, PXIe embedded controller card can be replaced with the computing machine that is connected in the PXIe cabinet by interface cable and move upper computer software to realize control and friendly man-machine interface to the hardware signal generator.The hardware signal generator is made up of a synchro control card, polylith intermediate frequency modulator card, upconverter card and combiner card in each cabinet.Wherein the synchro control card is inserted in the SYSTEM TIMING slot of cabinet, communicates by letter with upper computer software by the PXIe bus, produces the system reference clock, resets and time base synchronizing signal according to clock and the synchronizing signal control information that host computer sent.Intermediate frequency modulator card and upconverter card are used for producing the physical signalling of institute's emulation, every intermediate frequency modulator card can produce the analog if signal of two frequencies, every upconverter card can be specified frequency with analog if signal up-conversion to the L-band of a frequency, so an intermediate frequency modulator card and two upconverter cards are one group, when increase and decrease integrated circuit board quantity, should with the group unit.The radiofrequency signal of all upconverter card outputs uses combiner to close the road, and is divided into two paths of signals by power splitter, the fixed value attenuator of wherein leading up to decay back output, and directly export on another road.
System function module that the embodiment of the invention provides and intermodule interface signal are as shown in Figure 2, upper computer software passes through the PXIe bus with the moonscope data, navigation message sends to the intermediate frequency modulator card, the intermediate frequency modulator card produces analog if signal according to the moonscope data with navigation message. and the intermediate frequency modulator card uses concentric cable to be connected with the upconverter card, analog intermediate frequency being converted to the appointment frequency of L-band by the upconverter card. the intermediate frequency modulator card is controlled the frequency and the power of upconverter signal that card produces by the Local Bus signal wire of PXIe bus according to the signal controlling information that upper computer software sends.Every intermediate frequency modulator card can produce the analog if signal of two frequencies, and can with two upconverter card connection, thereby produce the radiofrequency signal of two frequencies.Can see that by Fig. 1 the intermediate frequency modulator card is inserted in the centre of two upconverter cards, this arrangement is because every intermediate frequency modulator card will be by two upconverter cards of Local Bus control, and PXIe regulation and stipulation Local Bus only connects two adjacent slots, and simultaneously such arrangement can also make the isometric easier realization of the concentric cable of transmitting two paths analog if signal.Upper computer software sends to the synchro control card that is positioned at PXIe cabinet SYSTEM TIMING slot by the PXIe bus with the control information that reference clock generates, the synchro control card selects to use plate carrier frequency mark or outer frequency marking to produce the clock signal of 10MHz according to this control information, and the PXI_CLK10_IN of clock cable with the PXIe bus be connected, this signal will send to each integrated circuit board by the PXI_CLK10 signal wire by the PXIe bus under the control of cabinet clock circuit.Synchronizing signal is produced according to the synchronizing signal control information that upper computer software sends by the synchro control card, and the star-like triggering line (StarTrigger) by the PXIe bus is sent to other each integrated circuit boards.The star-like triggering line of PXIe bus has two kinds, a kind of PXI_STAR signal wire for the transmission single-ended signal, another kind is the PXIe_DSTAR signal wire of differential signal transmission, and wherein the PMI_STAR signal wire is used for the transmitting synchronous reset signal, base synchronizing signal when PXIe_DSTAR is used for transmitting.The reset source of synchronous reset signal can be upper computer software or mechanical button.
The structure of a kind of intermediate frequency modulator card that the embodiment of the invention provides as shown in Figure 3.The main effect of intermediate frequency modulator card is band spectrum modulation, sub-carrier modulation and a carrier modulation of finishing each system each visible satellite respective channel of each component of signal of each frequency according to the moonscope data that receive from upper computer software and navigation message, realizes the accurate control of Doppler, code phase, carrier phase and the relative level of different channel signals; And close the analog intermediate frequency level signal output that road, Digital Up Convert, DAC, amplification and filtering generate appointment through numeral.Simultaneously, the intermediate frequency modulator card also will stick into row control to the upconverter that is connected according to the signal controlling information that upper computer software sends.The intermediate frequency modulator card is except that moonscope data, navigation message and the signal controlling information of direct reception from upper computer software, also receive 10MHz reference clock from the synchro control card, reset and the time base synchronizing signal, to guarantee the synchronization action between all intermediate frequency modulator cards.
The structure of a kind of upconverter card that the embodiment of the invention provides as shown in Figure 4.The effect of upconverter card is according to steering order the analog if signal that receives to be converted to the appointment frequency of L-band by the mode of orthogonal modulation, and the power of radiofrequency signal is controlled in certain scope.In an embodiment of the present invention, the intermediate frequency modulator card is a steering order with the signal controlling decoding of information that upper computer software sent, send to the upconverter card by PXI_LBL6, PXI_LBR6 signal wire among the PXIe bus Local Bus, thereby realize the frequency of upconverter signal that card produces and the control of power.Microcontroller on the upconverter card becomes control signal that concrete circuit is controlled the instruction translation that receives as instruction decode.Local oscillator combiner circuit on the upconverter card can change the frequency of local oscillator according to instruction, quadrature modulator, automatic gain control circuit and power control circuit can or be closed according to instruction unpack, and the local oscillator lock-out state can be returned to the intermediate frequency modulator card by Local Bus.
The structure of a kind of synchro control card that the embodiment of the invention provides as shown in Figure 5.The synchro control card is used for producing the 10MHz reference clock, reset and the time base synchronizing signal.The PXI_CLK10_IN signal wire of PXIe bus links to each other with the switch of a SP4T, can select the source of 10MHz reference clock by this switch of control.In 4 ports of SP4T switch respectively with outer frequency marking, plate carries constant-temperature crystal oscillator (OCXO, Oven-Controlled CrystalOscillator), FPGA links to each other with the clock synthesizer. when selecting FPGA to be output as the clock source, and when the output pin of FPGA is made as high resistant, with the 10MHz clock that uses cabinet to provide as the reference clock. because the phase place of the clock signal that FPGA and clock synthesizer are produced is controlled, so when selecting FPGA or clock synthesizer the pps pulse per second signal input to be arranged, the edge of 10MHz reference clock can be alignd with pps pulse per second signal as clock source and pulse per second (PPS) (1PPS) inbound port, thereby realization system and other equipment is synchronous. the adjustment process of clock phase is as shown in Figure 6. when 1PPS inbound port no signal, the synchro control card will produce the pps pulse per second signal that constantly alignd in whole second with 10MHz reference clock edge and the selected reference time system simulated and by the output of 1PPS outbound port, this output can be used as the synchronous base of miscellaneous equipment. and the synchro control jig has the 10MHz plate to carry OCXO, so when the output of selecting FPGA or clock synthesizer can select during as the clock source to use plate carry OCXO or outside frequency marking as frequency standard. the 10MHz reference clock that the synchro control card is produced by the PXI_CLK10 signal wire transmits of PXIe bus to each integrated circuit board, according to the PXIe standard, the PXI_CLK10 signal wire is isometric to the cabling of all slots by the clock fan-out device of cabinet in all standard P XIe cabinets, so can guarantee that the reference clock of all integrated circuit boards is synchronous. the synchro control card can also reset integrated circuit boards all in the system by the PXI_STAR signal wire according to the action of reset source, this reset source can be that upper computer software also can be the reset button that is positioned on the synchro control card, because PXIe regulation and stipulation PXI_STAR in all PXIe standard PC cases is isometric to the cabling of all slots by SYSTEM TIMING slot, so can guarantee the synchronism that each integrated circuit board resets.Simultaneously, the synchro control card can be according to the pps pulse per second signal of outside input (or synchro control card produce pps pulse per second signal) base synchronizing signal when producing, this time base synchronizing signal include but not limited to that time-base signal is interrupted in the host computer transmission and intermediate frequency modulator card signal state upgrades time-base signal.Time base synchronizing signal is sent to each integrated circuit board by the star-like triggering line of PXIe_DSTAR difference group, equally, the star-like triggering line of PXIe_DSTAR difference group is isometric to the cabling of all slots by SYSTEM TIMING slot in standard P XIe cabinet, can guarantee that the time base between each integrated circuit board is synchronous.Have 3 pairs of PXIe_DSTAR signal wires in the standard P XIe cabinet, the synchro control card all has been connected 3 pairs of whole PXIe_DSTAR signal wires with all intermediate frequency modulator cards in an embodiment of the present invention, so can utilize the star-like triggering line of redundant PXIe_DSTAR difference to realize complicated synchronization mechanism when needed.All parameters of synchro control card can be provided with by upper computer software, and send the synchro control card to by the PXIe bus.
Claims (8)
1. the GNSS signal simulator based on the PXIe bus is characterized in that, adopts the card insert type structure based on the PXIe bus, is made up of hardware signal generator and upper computer software.The hardware signal generator is made up of synchro control card, intermediate frequency modulator card, upconverter card, combiner card, adopts the integrated circuit board form to insert in the standard P XIe cabinet; The size that depends on the pairing calculated load of instrument configuration scale, upper computer software can run on the PXIe embedded controller card that is equipped with Windows, also can run on by on interface cable and the computing machine that the PXIe cabinet is connected.Intermediate frequency modulator is stuck in upper computer software control and produces analog if signal down, by the appointment frequency of upconverter card up-conversion to L-band.The 10MHz reference clock is provided, resets and time base synchronizing signal for all integrated circuit boards by the synchro control card that is positioned at PXIe cabinet SYSTEMTIMING slot, and utilize the PXIe bus to transmit these signals.By combiner the satellite-signal of many constellations, multifrequency point is closed road output, and be divided into two paths of signals by power splitter, the fixed value attenuator of wherein leading up to decay back output low-power level signal, another road directly output is used for the high-power signal of self-correcting and test.
2. GNSS signal simulator according to claim 1 is characterized in that, an intermediate frequency modulator card and two upconverter cards are one group in the described hardware signal generator, can simulate the satellite-signal that produces two frequencies for every group; Constellation and the frequency quantity that can be simulated by the mode expanding system that increases integrated circuit board group number, unit case instrument can be simulated the restriction that constellation and frequency number only are subjected to employed PXIe cabinet slot count; Can provide unified by the synchro control card and reset, clock and time-base signal, and support the multiple cases expansion.
3. GNSS signal simulator according to claim 1, it is characterized in that, the described synchro control jig that is positioned at cabinet SYSTEM TIMING slot has plate to carry OCXO, this integrated circuit board also can connect outer frequency marking simultaneously, and can select use plate to carry OCXO or outer frequency marking produces the 10MHz reference clock by software, the reference clock that is produced is connected with the PXI_CLK10_IN signal wire of PXIe bus.The also 10MHz reference clock that can select use the PXIe cabinet to be provided by software.The 10MHz reference clock is connected to each integrated circuit board by the PXI_CLK10 signal wire of PXIe bus, and the reference clock that can guarantee all integrated circuit boards is synchronous.
4. GNSS signal simulator according to claim 1, it is characterized in that, described synchro control card can produce synchronous reset signal, be connected to each integrated circuit board by the single-ended star-like triggering line of the PXI_STAR of PXIe bus, can use software or mechanical button to make all integrated circuit boards realize synchronous warm reset or synchronous hard reset as reset source.
5. GNSS signal simulator according to claim 1, it is characterized in that, base synchronizing signal when described synchro control card can produce, this time base synchronizing signal includes but not limited to that time-base signal is interrupted in host computer transmission that pulse per second (PPS) (1PPS, the 1Pulse Per Second) signal (or the pps pulse per second signal that is produced according to the synchro control card) according to the outside input is generated and intermediate frequency modulator card signal state upgrades time-base signal.Time base synchronizing signal is connected to each integrated circuit board by the star-like triggering line of the PXIe_DSTAR difference group of PXIe bus, can guarantee between each integrated circuit board the time base synchronously; The generation of time base synchronizing signal can be controlled by upper computer software.
6. GNSS signal simulator according to claim 1 is characterized in that, described synchro control jig has pulse per second (PPS) input, output port, be used to realize and miscellaneous equipment between synchronously.When the 1PPS inbound port had the pps pulse per second signal input, the synchro control card can make the reference clock signal edge of its generation align with the pulse per second (PPS) of input by adjusting clock phase; When the 1PPS inbound port does not have pps pulse per second signal when input, the synchro control card can generation and whole second of reference clock signal and the selected reference time system the simulated pps pulse per second signal that aligns of edge constantly, and exports by the 1PPS outbound port.
7. GNSS signal simulator according to claim 1, it is characterized in that: described intermediate frequency modulator clamping is received reference clock from the synchro control card, is resetted and synchronizing signal, and finish the signal modulation of each system each visible satellite respective channel of each component of signal of each frequency according to the moonscope data that receive from upper computer software and navigation message, realize the accurate control of Doppler, code phase, carrier phase and relative level, generate the analog if signal output of appointment; The signal controlling information that sends according to upper computer software is crossed PXIe bus Local Bus to the upconverter cartoon that is connected and is sent frequency and power control instruction simultaneously.
8. according to the described GNSS signal simulator of claim 1, it is characterized in that: described upconverter card is converted to the analog if signal of input L-band according to frequency and power control instruction from PXIe bus Local Bus by the mode of orthogonal modulation appointment frequency, and the power of radiofrequency signal controlled in certain scope, simultaneously the local oscillator lock-out state is returned to the intermediate frequency modulator card by Local Bus.
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