KR102664574B1 - Liquid Crystal Display Device - Google Patents

Abstract

A liquid crystal display device according to an embodiment of the present invention includes a second substrate facing a first substrate including a plurality of pixels consisting of a first sub-pixel, a second sub-pixel, and a third sub-pixel, and a gate line on the first substrate. and a data line, a thin film transistor in a region where the gate line and the data line intersect, and a pixel electrode on the thin film transistor and connected to the thin film transistor, between the first substrate and the second substrate of the first sub-pixel. The distance is greater than the distance between the first and second substrates of the second sub-pixel and the third sub-pixel.

Description

Liquid Crystal Display Device

The present invention relates to a liquid crystal display device, and more specifically, to a liquid crystal display device that can minimize the occurrence of image quality defects and improve transmittance.

With the advent of the full-fledged information age, the display field, which visually displays electrical information signals, is rapidly developing. Accordingly, research is continuing to improve the performance of various display devices such as thinner, lighter, and lower power consumption.

Representative examples of such display devices include Liquid Crystal Display devices (LCD), Plasma Display Panel devices (PDP), Field Emission Display devices (FED), and organic light emitting display devices ( Organic Light Emitting Display device (OLED), etc. may be mentioned.

Among them, liquid crystal displays are currently being used the most, replacing CRTs (Cathode Ray Tubes) as mobile image display devices due to their excellent image quality, light weight, thinness, and low power consumption. Liquid crystal display devices are being developed for various purposes, such as televisions and computer monitors that receive and display broadcast signals, in addition to mobile applications such as laptop computers.

A liquid crystal display (LCD) includes a color filter array substrate on which color filters are formed, a thin film transistor array substrate on which thin film transistors are formed, and a liquid crystal layer formed between the color filter array substrate and the thin film transistor array substrate.

Among the liquid crystal display devices in various liquid crystal modes, the horizontal electric field type liquid crystal display device forms a horizontal electric field between the pixel electrode and the common electrode arranged in parallel on the lower substrate to switch the liquid crystal layer in an in-plane switching (IPS) method. Run . This in-plane switching liquid crystal display device has the advantage of a wide viewing angle, but has the disadvantage of low aperture ratio and low transmittance.

In order to improve the shortcomings of the IPS mode liquid crystal display device, a fringe field switching (FFS) type liquid crystal display device operated by a fringe field has been proposed. A fringe field switching liquid crystal display device includes a common electrode and a pixel electrode positioned in each pixel area with an insulating layer in between, and a parabolic fringe field is formed on top of the common electrode and the pixel electrode. By allowing all liquid crystal molecules interposed between the upper and lower substrates to operate by the fringe field, the aperture ratio and transmittance can be improved compared to an IPS mode liquid crystal display device.

The liquid crystal display device includes a lower substrate including a thin film transistor in a sub-pixel formed in each area where a gate line and a data line intersect, an upper substrate located opposite the lower substrate and having a black matrix and a color filter, and the lower substrate. It includes a liquid crystal layer formed between the substrate and the upper substrate. That is, the liquid crystal display device is completed by manufacturing the lower substrate and the upper substrate respectively and then bonding the lower substrate and the upper substrate.

A liquid crystal display device has a response time required for liquid crystal molecules in the liquid crystal layer to be aligned vertically or horizontally depending on the electric field. In the case of such a liquid crystal display device, the difference in response time between a plurality of sub-pixels may cause an afterimage, that is, a motion blur phenomenon, in which a red-colored image is dragged when the screen of a specific pattern is driven. Motion blur can be said to be a phenomenon in which the boundaries of moving objects in a video are unclear and appear blurred, causing the image to appear blurred.

Due to the motion blur phenomenon described above, the color reproduction rate of the liquid crystal display device may deteriorate, which may cause problems with the display quality and reliability of the liquid crystal display device.

The present invention was developed to solve the above problems, and the cell gap of the red sub-pixel is made larger than the cell gap of the green sub-pixel and the blue sub-pixel, thereby creating a space between a plurality of sub-pixels. By adjusting the response time to an equal level, a liquid crystal display device is provided that can minimize the occurrence of image quality defects due to motion blur and improve transmittance.

Problems to be solved according to embodiments of the present invention are not limited to the problems mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the description below.

In order to solve the problems described above, a liquid crystal display device is provided that can minimize the occurrence of image quality defects due to motion blur and improve transmittance.

A liquid crystal display device according to an embodiment of the present invention includes a first substrate including a plurality of pixels consisting of a first sub-pixel, a second sub-pixel, and a third sub-pixel, a second substrate facing the first substrate, and a second substrate facing the first substrate. 1. It includes a gate line and a data line on a substrate, a thin film transistor in an area where the gate line and the data line intersect, and a pixel electrode on the thin film transistor and connected to the thin film transistor, and a first substrate of a first sub-pixel and a second pixel. The distance between the two substrates is greater than the distance between the first and second substrates of the second sub-pixel and the third sub-pixel.

In another aspect, a first substrate including a plurality of pixels including a first sub-pixel, a second sub-pixel, and a third sub-pixel, and including a gate line, a data line, and a thin film transistor, and opposite to the first substrate, A liquid crystal display device according to an embodiment of the present invention including a second substrate located on the thin film transistor includes a planarization layer on a thin film transistor, the planarization layer has a first thickness in the first sub-pixel, the second sub-pixel and the first sub-pixel. It has a second thickness in 3 sub-pixels, and the first thickness is smaller than the second thickness.

Specific details of other embodiments are included in the detailed description and drawings.

In the liquid crystal display device according to an embodiment of the present invention, the thickness of the planarization layer in the red sub-pixel is formed to be smaller than the thickness of the planarization layer in the green sub-pixel and the blue sub-pixel, so that the cell gap of the red sub-pixel is smaller than the thickness of the planarization layer in the green sub-pixel and the blue sub-pixel. By forming a larger cell gap between the pixel and the blue sub-pixel, the response time of the liquid crystal between the plurality of sub-pixels can be adjusted to the same level, and the occurrence of motion blur phenomenon can be minimized.

Additionally, the liquid crystal display device according to an embodiment of the present invention can improve display quality and reliability of the liquid crystal display device by minimizing the occurrence of motion blur.

In addition, the liquid crystal display device according to an embodiment of the present invention increases the transmittance of the liquid crystal display device by setting the angle of the connection between the first region and the second region of the pixel electrode to be the same in the red sub-pixel, green sub-pixel, and blue sub-pixel. It can be improved.

The effects of the present invention are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the description below.

Since the content of the invention described above in the problem to be solved, the means for solving the problem, and the effect do not specify the essential features of the claim, the scope of the claim is not limited by the matters described in the content of the invention.

1 is a diagram schematically showing the structure of a liquid crystal display device according to an embodiment of the present invention.
Figure 2 is a diagram showing the planar structure of a liquid crystal display device according to an embodiment of the present invention.
FIG. 3 is a diagram illustrating a cross-sectional structure taken along AB of FIG. 2 of a liquid crystal display device according to an embodiment of the present invention.
FIG. 4 is a diagram showing a cross-sectional structure of a liquid crystal display device according to an embodiment of the present invention on the CD of FIG. 2.
Figure 5 is a diagram showing the planar structure of a pixel electrode of a liquid crystal display device according to an embodiment of the present invention.
FIG. 6 is a diagram showing a change in response time as the cell gap of a red sub-pixel of a liquid crystal display device according to an embodiment of the present invention increases.

The advantages and features of the present invention and methods for achieving them will become clear by referring to the embodiments described in detail below along with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and will be implemented in various different forms. These embodiments only serve to complete the disclosure of the present invention, and are not limited to the embodiments disclosed below, and are known to those skilled in the art in the technical field to which the present invention pertains. It is provided to fully inform those who have the scope of the invention, and the present invention is only defined by the scope of the claims.

The shapes, sizes, proportions, angles, numbers, etc. disclosed in the drawings for explaining embodiments of the present invention are illustrative, and the present invention is not limited to the matters shown. Like reference numerals refer to like elements throughout the specification. Additionally, in describing the present invention, if it is determined that a detailed description of related known technologies may unnecessarily obscure the gist of the present invention, the detailed description will be omitted. When 'includes', 'has', 'consists of', etc. mentioned in the specification are used, other parts may be added unless 'only' is used. When a component is expressed in the singular, the plural is included unless specifically stated otherwise.

When interpreting a component, it is interpreted to include the margin of error even if there is no separate explicit description. In the case of a description of a positional relationship, for example, if the positional relationship of two parts is described as 'on top', 'on the top', 'on the bottom', 'next to', etc., 'immediately' Alternatively, there may be one or more other parts placed between the two parts, unless 'directly' is used.

Additionally, first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are merely used to distinguish one component from another. Accordingly, the first component mentioned below may also be the second component within the technical spirit of the present invention.

Each feature of the various embodiments of the present invention can be combined or combined with each other partially or entirely, and various technical interconnections and operations are possible, and each embodiment can be implemented independently of each other or together in a related relationship. It may be possible.

Hereinafter, a liquid crystal display device according to an embodiment of the present invention will be described in detail with reference to the attached drawings.

1 is a diagram schematically showing the structure of a liquid crystal display device according to an embodiment of the present invention.

Referring to FIG. 1, the liquid crystal display device 100 according to an embodiment of the present invention includes a plurality of gate lines GL, a plurality of data lines DL, and a plurality of gate lines GL and a plurality of data lines DL. ) is configured to include a first substrate 101 including a plurality of display pixels (P) connected to.

Additionally, the gate driving integrated circuit (IC) 130 and the data driving IC 135 of the liquid crystal display device 100 according to an embodiment of the present invention are formed in the active area or a non-display area outside the display area. The gate driving IC 130 and data driving IC 135 are configured to provide gate signals and data signals on the gate line GL and data line DL, respectively, so that the display pixel P in the active area operates. do.

Each display pixel P includes a thin film transistor (TFT) having a gate electrode, a source electrode, and a drain electrode. Additionally, each display pixel P includes a capacitor formed of a pixel electrode 118 and a common electrode 114.

The gate electrode of the thin film transistor (TFT) is connected to the gate line (GL), the source electrode of the thin film transistor (TFT) is connected to the data line (DL), and the drain electrode of the thin film transistor (TFT) is connected to the display pixel (P). It is connected to the pixel electrode 118.

The gate line GL supplies a scan signal from the gate driving IC 130 through the gate pad, and the data line DL supplies a pixel signal from the data driving IC 135 through the data pad. These gate lines (GL) and data lines (DL) intersect with a gate insulation layer in between to define each display pixel (P) area. Here, the active area may be an area where the display pixel P is located and displayed, and may also be referred to as a display area. Additionally, the non-active area is located outside the active area and can also be referred to as a non-display area.

In FIG. 1, the gate driver IC 130 and the data driver IC 135 are each shown as separate components in the liquid crystal display device 100, but some or all of these driver ICs may be integrated into a single component. It may be possible. For example, the gate driving IC 130 may be formed on the first substrate 101 and provided as a part of the first substrate 101 .

In addition, the data driving IC 135 is connected to common signal wires and data lines formed on the first substrate 101 along with a touch driving IC configured to transmit and receive signals related to touch sensing on the liquid crystal display device 100. It may also be formed on the same printed circuit board.

Additionally, the display pixels P of the liquid crystal display device 100 according to an embodiment of the present invention may include capacitive elements or electrodes that can be used for display functions and touch sensing functions. For example, the common electrode 114 of the liquid crystal display device 100 according to an embodiment of the present invention may be divided into a plurality of common electrode blocks.

Figure 2 is a diagram showing the planar structure of a liquid crystal display device according to an embodiment of the present invention.

Additionally, FIG. 3 is a diagram showing a cross-sectional structure taken along line A-B of FIG. 2 of a liquid crystal display device according to an embodiment of the present invention.

Additionally, FIG. 4 is a diagram showing a cross-sectional structure taken along line C-D of FIG. 2 of a liquid crystal display device according to an embodiment of the present invention.

Hereinafter, the detailed structure of the liquid crystal display device according to an embodiment of the present invention will be described in detail with reference to FIGS. 2 to 4.

Referring to FIG. 2, the liquid crystal display device 100 according to an embodiment of the present invention is configured to include a plurality of sub-pixels. The plurality of sub-pixels may be arranged in the following order: Green sub-pixel, Blue sub-pixel, and Red sub-pixel. For example, the first sub-pixel, which is the Nth sub-pixel ((N)Sub-PXL), is a green sub-pixel, and the second sub-pixel, which is the N+1th sub-pixel ((N+1)Sub-PXL), is green. is a blue sub-pixel, and the third sub-pixel, which is the N+2-th sub-pixel ((N+2)Sub-PXL), is a red sub-pixel, and the N+3-th sub-pixel ((N+3)Sub The 4th sub-pixel (-PXL) may be a green sub-pixel, and the 5th sub-pixel ((N+4)Sub-PXL) may be a blue sub-pixel. It is not necessarily limited.

2 and 3, on the first substrate 101 of the liquid crystal display device 100 according to an embodiment of the present invention, a gate electrode 106, a semiconductor layer 108, a source electrode 109, and a drain electrode are formed. A thin film transistor (TFT) with an inverted staggered structure including (110) is formed. The thin film transistor (TFT) includes a gate electrode 106, a source electrode 109, and a drain electrode 110 on a first substrate 101.

In this specification, the thin film transistor is described as having an inverse staggered structure, but it is not limited thereto, and thin film transistors of various structures, including a coplanar structure, can be used in the liquid crystal display device 100 according to an embodiment of the present invention. there is.

The first substrate 101 is used to support various components of the liquid crystal display device 100 and is made of an insulating material. For example, the first substrate 101 may be made of glass or a plastic substrate such as PET (PolyEthylene Terephthalate), PEN (PolyEthylene Naphthalate), or polyimide.

A gate electrode 106 is formed on the first substrate 101. The gate electrode 106 is made of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), or an alloy thereof. It can be done. In addition, it may be made of a single layer or at least two or more multi-layers of the metal or alloy, but is not necessarily limited thereto.

And, referring to FIG. 2, the gate electrode 106 is branched from the gate line GL arranged in the first horizontal direction on the first substrate 101 to correspond to each display pixel P area. is formed by

Referring to FIG. 3, a gate insulating layer 107 is formed on the entire surface of the first substrate 101 on the gate electrode 106 to cover the gate electrode 106.

The gate insulating layer 107 may be made of a single layer or at least two or more layers of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.

A semiconductor layer 108 is formed on the gate insulating layer 107 to overlap at least a portion of the gate electrode 106.

The semiconductor layer 108 is made of amorphous silicon, poly crystalline silicon, and metal oxide semiconductor materials such as indium gallium zinc oxide (IGZO) and zinc tin oxide. : ZTO) and zinc indium oxide (ZIO), but is not necessarily limited thereto.

A source electrode 109 and a drain electrode 110 are formed on both sides of the semiconductor layer 108, respectively, overlapping with the semiconductor layer 108 and positioned to be spaced apart from each other.

The source electrode 109 and the drain electrode 110 may be made of aluminum (Al), molybdenum (Mo), titanium (Ti), copper (Cu), or an alloy thereof, and may be a single layer or two layers of the metal or alloy. It may be composed of the above multiple layers, but is not necessarily limited thereto.

And, referring to FIG. 2, the source electrode 109 is connected to each display pixel (P) from the data line (DL) arranged in the second direction perpendicular to the first direction on the gate insulating layer 107. It is formed in a branched form to correspond to the area.

Also, referring to FIG. 3, the source electrode 109 and the drain electrode 110 are formed by sequentially stacking the semiconductor layer 108 on the gate insulating layer 107 using a halftone mask. By being patterned together, they can be formed through a single mask process.

And, a semiconductor layer 108 is formed on the entire surface of the first substrate 101 on the source electrode 109 and the drain electrode 110 to cover the source electrode 109 and the drain electrode 110, and the drain electrode 110 A first protective layer 112 is formed having contact holes 113a and 113b exposing a portion of the .

The first protective layer 112 may be made of an organic insulating material with a flat surface such as photo-acryl or benzocyclobutene (BCB), and may include a planarization layer ( It may be a planarization layer).

The first protective layer 112 of the liquid crystal display device 100 according to an embodiment of the present invention is formed from the N+2-th sub-pixel ((N+2)Sub-PXL) to the N+3-th sub-pixel ((N+3) )Sub-PXL) and the N+4th sub-pixel ((N+4)Sub-PXL).

More specifically, the first protective layer 112 is formed to have a first thickness in the N+2-th sub-pixel ((N+2)Sub-PXL), and the first protective layer 112 is formed to have a first thickness in the N+3-th sub-pixel ((N+3) Sub-PXL) may be formed to have a second thickness greater than the first thickness, and may be formed to have a third thickness greater than the first thickness in the N+4th sub-pixel ((N+4)Sub-PXL). there is. Here, the thickness of the first protective layer 112 in the N+3-th sub-pixel ((N+3)Sub-PXL) and the first protective layer in the N+4-th sub-pixel ((N+4)Sub-PXL) The thickness of (112) may be formed to be the same.

That is, the liquid crystal display device 100 according to an embodiment of the present invention has a cell gap of the N+2-th sub-pixel ((N+2)Sub-PXL), that is, the N+2-th sub-pixel ((N In +2)Sub-PXL), the distance between the first substrate 101 and the second substrate 121 is the cell gap of the N+3th sub-pixel ((N+3)Sub-PXL), that is, Distance between the first substrate 101 and the second substrate 121 of the N+3th sub-pixel ((N+3)Sub-PXL) and the distance between the N+4th sub-pixel ((N+4)Sub-PXL) is formed larger than the cell gap, that is, the distance between the first substrate 101 and the second substrate 121 of the N+4th sub-pixel ((N+4)Sub-PXL). In other words, the cell gap of the red sub-pixel is made larger than that of the green sub-pixel and the blue sub-pixel, so that the response time of the liquid crystal between the plurality of sub-pixels is adjusted to an equal level, thereby reducing motion blur. The occurrence of the (motion blur) phenomenon can be minimized.

A third protective layer 111 may be further included below the first protective layer 112. The third protective layer 111 may be made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx), but is not necessarily limited thereto. And, the third protective layer 111 has a contact hole exposing a portion of the lower drain electrode 110.

Referring to FIG. 3, a common electrode 114 is formed on the first protective layer 112. The common electrode 114 has a plate shape and may be made of a transparent conductive material such as indium tin oxide (ITO) on the front surface of the first substrate 101, but is not necessarily limited thereto. The common electrode 114 is formed to include a common electrode hole 115 that exposes a portion of the drain electrode 110.

A second protective layer 116 is formed on the entire surface of the first substrate 101 on the common electrode 114. The second protective layer 116 is formed to cover the common electrode 114 and has a second protective layer contact hole 117 that exposes a portion of the drain electrode 110. The second protective layer 116 may be made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx), but is not necessarily limited thereto.

A pixel electrode 118 is formed on the second protective layer 116. The pixel electrode 118 has a contact hole provided in the third protective layer 111, a contact hole 113 provided in each of the first protective layer 112 and the second protective layer 116, and a contact hole in the second protective layer. It is connected to the drain electrode 110 through (117).

In FIG. 3 , it is assumed that the thin film transistor is a P-type thin film transistor, and the pixel electrode 118 is connected to the drain electrode 110. However, if the thin film transistor is an N-type thin film transistor, the pixel electrode 118 may be connected to the source electrode 109.

Additionally, the pixel electrode 118 may have a structure including a plurality of fingers and may be formed to have at least one curved portion.

The pixel electrode 118 forms a fringe field with the common electrode 114 on a different layer with the second protective layer 116 interposed therebetween. Additionally, the liquid crystal molecules of the liquid crystal layer 140 rotate due to dielectric anisotropy due to the fringe field, and the light transmittance passing through the display pixel (P) area varies depending on the degree of rotation of the liquid crystal molecules, thereby creating an image.

Referring to FIG. 3, the pixel electrode 118 of the liquid crystal display device 100 according to an embodiment of the present invention is formed to have at least one curved portion, and includes a first region P1 extending in different directions and a first region P1 extending in different directions. It may include two areas (P2).

More specifically, the N+2th sub-pixel ((N+2)Sub-PXL), the N+3th sub-pixel ((N+3)Sub-PXL), and the N+4th sub-pixel ((N+4) The pixel electrode 118 of Sub-PXL includes a first region P1 extending in the first direction, a second region P2 extending in the second direction, and a first region P1 and a second region P2. ) may be configured to include a connection part that connects. The first region P1 and the second region P2 of the pixel electrode 118 may be formed to be symmetrical to each other with respect to a connection portion where the first region P1 and the second region P2 are connected.

2 and 3, on the second substrate 121 located opposite to the first substrate 101 of the liquid crystal display device 100 according to an embodiment of the present invention, an opening area of the display pixel P and A black matrix (BM, 122) defining a light blocking area is formed.

The area where the black matrix 122 is formed is defined as a light blocking area, and the area where the black matrix 122 is not formed is defined as an opening area. Various driving elements and wiring, such as a thin film transistor (TFT), gate line (GL), and data line (DL), are formed in the area corresponding to the light blocking area, and the common electrode 114 and the pixel electrode are formed in the area defined as the opening area. (118) is formed.

The black matrix 122 is formed on the second substrate 121 to overlap at least one of the thin film transistor, gate line GL, and data line DL of the first substrate 101.

More specifically, the black matrix 122 may include a gate BM 122a disposed along the gate line GL and a data BM 122b disposed along the data line DL. The black matrix 122 may be made of an opaque organic material, for example, black resin. Additionally, the black matrix 122 may be formed to have at least one curved portion according to the shape of the pixel electrode 118. Additionally, the data line DL may be formed to have at least one curved portion according to the shape of the pixel electrode 118.

Referring to FIG. 2, the gate BM 122a formed on the second substrate 121 may be formed to have a width of X1 to cover the gate line GL and the thin film transistor area disposed below. Additionally, the data BM 122b may be formed to have a width of X2 so as to cover the data line DL area disposed below.

Referring to Figures 3 and 4, a color filter including a red color filter 124, a green color filter 125, and a blue color filter 126 is formed on the black matrix 122a. The color filters 124, 125, and 126 can express red, green, and blue colors by absorbing or transmitting light of a specific wavelength through the red, green, and blue pigments they contain, respectively. Additionally, the color filters 124, 125, and 126 may be formed to have at least one curved portion according to the shape of the pixel electrode 118.

An overcoat 127 is formed on the color filters 124, 125, and 126. The overcoat 127 may serve to protect the color filters 124, 125, and 126, and may be made of an organic or inorganic material with excellent planarization characteristics.

Additionally, a liquid crystal layer 140 made of liquid crystal (LC) having dielectric anisotropy may be formed between the first substrate 101 and the second substrate 121.

The liquid crystal layer 140 is formed between the lower alignment layer 156 formed on the pixel electrode 118 on the first substrate 101 and the upper alignment layer 157 formed on the overcoat 127 on the second substrate 121. do. The lower alignment film 156 and the upper alignment film 157 serve to determine and maintain the initial orientation of the liquid crystal (LC) in the liquid crystal layer 140.

The alignment state of the liquid crystal (LC) included in the liquid crystal layer 140 is adjusted by the electric field formed by the common electrode 114 and the pixel electrode 118. Liquid crystal (LC) with negative dielectric anisotropy, that is, negative liquid crystal, is a liquid crystal with a negative dielectric anisotropy (△ε=ε∥ - ε⊥), where the vertical dielectric constant is greater than the horizontal dielectric constant. has On the other hand, in the case of positive liquid crystal, the dielectric constant anisotropy is positive (+), and the horizontal dielectric constant is larger than the vertical dielectric constant.

In the liquid crystal (LC) having negative dielectric anisotropy, that is, the negative liquid crystal (LC), the director of the liquid crystal (LC) is arranged in a direction perpendicular to the direction of the electric field. Therefore, when an electric field is formed between the common electrode 114 and the pixel electrode 118, not only the liquid crystal in the area between the common electrode 114 and the pixel electrode 118 but also the upper area between the common electrode 114 and the pixel electrode 118 All liquid crystal directors of are arranged parallel to the horizontal planes of the first substrate 101 and the second substrate 121. Therefore, compared to positive liquid crystal, negative liquid crystal (LC) has improved light transmittance and can exhibit relatively excellent luminance characteristics.

2 and 3, the liquid crystal display device 100 according to an embodiment of the present invention includes a first spacer 119, which is a bump spacer, formed on the first substrate 101. .

The first spacer 119 includes a first area 119a of the first spacer, a second area 119b of the first spacer, and a third area 119c of the first spacer, and the first substrate 101 ) is formed on the second protective layer 116 and the pixel electrode 118.

The first area 119a of the first spacer is disposed at a position corresponding to the second spacer 128, and is in contact with the second spacer 128 formed on the second substrate 121 to form a cell gap ( It functions as a bump spacer to maintain the cell gap.

In addition, the second area 119b of the first spacer is disposed at a position corresponding to the third spacer 129, and has a certain distance from the third spacer 129 formed on the second substrate 121 without contacting the second area 119b. It functions as a bump spacer that is positioned spaced apart.

The first spacer 119 may be made of a single layer of an inorganic film or an organic film, or a multi-layer of two or more layers of an inorganic film or an organic film, but is not necessarily limited thereto. That is, the first region 119a of the first spacer, the second region 119b of the first spacer, and the third region 119c of the first spacer may all be formed of the same material in the same layer.

The first area 119a of the first spacer, the second area 119b of the first spacer, and the third area 119c of the first spacer each have a bar-shaped planar structure, and the data line DL The gate line GL may be formed to be longer in the extended direction than in this extended direction.

2 and 3, the first spacer 119, that is, the first area 119a of the first spacer, the second area 119b of the first spacer, and the third area 119c of the first spacer It is located on the gate line GL and is formed to cover at least a portion of the contact hole provided in the first protective layer 112, which serves as a planarization layer on the thin film transistor.

More specifically, referring to FIGS. 2 and 3, the first region 119a of the first spacer formed on the first substrate 101 of the liquid crystal display device 100 according to an embodiment of the present invention is the Nth sub A first contact hole 113a corresponding to a pixel ((N)Sub-PXL), i.e., a first sub-pixel, and an N+1-th sub-pixel ((N+1)Sub-PXL), i.e., a second sub-pixel, respectively. It is formed to cover the second contact hole 113b. That is, the first area 119a of the first spacer is formed to cover at least a portion of the first contact hole 113a and the second contact hole 113b, so that the first substrate (119a) is formed by the contact holes 113a and 113b. 101) It can play a role in reducing the step difference in the top.

And, the second region 119b of the first spacer formed on the first substrate 101 is the N+3-th sub-pixel ((N+3)Sub-PXL), that is, the 4th sub-pixel and the N+4-th sub-pixel. It is formed to cover the third contact hole 113c and the fourth contact hole 113d respectively corresponding to the pixel ((N+4)Sub-PXL), that is, the fifth sub-pixel. That is, the second area 119b of the first spacer is formed to cover at least a portion of the third contact hole 113c and the fourth contact hole 113d, thereby forming the first substrate (119b) by the contact holes 113c and 113d. 101) It can play a role in reducing the step difference in the top.

And, the third region 119c of the first spacer located between the first region 119a of the first spacer formed on the first substrate 101 and the second region 119b of the first spacer is N+2. It is formed to cover the fifth contact hole 113e corresponding to the th sub-pixel ((N+2)Sub-PXL), that is, the third sub-pixel. That is, the third area 119c of the first spacer is formed to cover at least a portion of the fifth contact hole 113e and can serve to reduce the level difference on the first substrate 101 caused by the contact hole 113e. there is.

Also, referring to Figures 2 and 3, the liquid crystal display device 100 according to an embodiment of the present invention is formed on a second substrate 121, and the first spacer formed on the first substrate 101 It is configured to include a second spacer 128 located corresponding to the area 119a. That is, the second spacer 128 is disposed in a form that overlaps at least a portion of the first region 119a of the first spacer formed on the thin film transistor of the first substrate 101 and crosses each other.

The second spacer 128 has a bar-shaped planar structure and may be formed to be longer in the direction in which the data line DL extends than in the direction in which the gate line GL extends.

The second spacer 128 is formed on the overcoat 127 of the second substrate 121, and is in contact with the first region 119a of the first spacer formed on the first substrate 101 to form a liquid crystal display device. It functions as a gap spacer to maintain the cell gap.

The second spacer 128 is a data line between the first sub-pixel, which is the N-th sub-pixel ((N)Sub-PXL), and the second sub-pixel, which is the N+1-th sub-pixel ((N+1)Sub-PXL). It can be positioned to correspond to the light blocking area on the black matrix 122 so that at least part of it overlaps with (DL). However, it is not necessarily limited to this, and the second spacer 128 is used for the third sub-pixel, which is the N+2-th sub-pixel ((N+2)Sub-PXL), and the third sub-pixel, which is the N+3-th sub-pixel ((N+3)Sub- It may be located corresponding to the light blocking area on the black matrix 122 between the fourth sub-pixels (PXL).

The second spacer 128 may be made of a single layer of an inorganic or organic film or a multi-layer of two or more inorganic or organic films stacked, but is not limited thereto. The second spacer 128 may be made of the same material as the first area 119a of the first spacer.

Also, referring to FIG. 2, the liquid crystal display device 100 according to an embodiment of the present invention is formed on a second substrate 121, and the first spacer second region 119b formed on the first substrate 101 It is configured to include a third spacer 129 located corresponding to.

The third spacer 129 is disposed so as to at least partially overlap the first spacer second region 119b formed on the thin film transistor of the first substrate 101. The third spacer 129 may be formed to have a circular planar structure.

The third spacer 129 is formed on the overcoat 127 of the second substrate 121, and has a certain distance from the first spacer second region 119b formed on the first substrate 101 without contacting the second region 119b. They are positioned spaced apart and serve as push spacers that form a push gap of the liquid crystal display device. In other words, damage to the liquid crystal display device due to external pressure can be prevented by the pressing spacer.

The third spacer 129 may be formed at a lower height than the second spacer 128, and the third spacer 129 and the second spacer 128 may be formed through a halftone process using a halftone mask. can be formed simultaneously.

Additionally, the third spacer 129 stores data between the first sub-pixel, which is the N-th sub-pixel ((N)Sub-PXL), and the second sub-pixel, which is the N+1-th sub-pixel ((N+1)Sub-PXL). It may be positioned to correspond to the light blocking area on the black matrix 122 so that at least part of the line DL overlaps. However, it is not necessarily limited to this, and the third spacer 129 includes the third sub-pixel, which is the N+2-th sub-pixel ((N+2)Sub-PXL), and the N+3-th sub-pixel ((N+3)Sub -PXL) may be located corresponding to the light blocking area on the black matrix 122 between the fourth sub-pixels.

The third spacer 129 may be made of a single layer of an inorganic film or an organic film, or a multi-layer of two or more layers of an inorganic film or an organic film, but is not necessarily limited thereto. The third spacer 129 may be made of the same material as the second region 119b of the first spacer.

Referring to FIG. 4, the liquid crystal display device 100 according to an embodiment of the present invention has a cell gap of the N+2-th sub-pixel ((N+2)Sub-PXL), that is, the N+2-th sub-pixel. The distance C1 between the first substrate 101 and the second substrate 121 of the pixel ((N+2)Sub-PXL) is the cell of the N+3th sub-pixel ((N+3)Sub-PXL). Gap (cell gap), that is, the distance (C2) between the first substrate 101 and the second substrate 121 of the N+3-th sub-pixel ((N+3)Sub-PXL) and the N+4-th sub-pixel Cell gap of ((N+4)Sub-PXL), that is, between the first substrate 101 and the second substrate 121 of the N+4th sub-pixel ((N+4)Sub-PXL) It is formed larger than the distance (C3) of . More specifically, the distance between the lower alignment layer 156 and the upper alignment layer 157 in the N+2-th sub-pixel ((N+2)Sub-PXL) is the distance between the lower alignment layer 156 and the upper alignment layer 157 in the N+3-th sub-pixel ((N+3)Sub- PXL) and the distance between the lower alignment layer 156 and the upper alignment layer 157 in the N+4th sub-pixel ((N+4)Sub-PXL).

The distance (C1) between the first substrate 101 and the second substrate 121 of the N+2-th sub-pixel ((N+2)Sub-PXL) and the N+3-th sub-pixel ((N+3) The distance C2 between the first substrate 101 and the second substrate 121 of the Sub-PXL) and the distance C2 between the first substrate 101 and the second substrate 121 of the N+4th sub-pixel ((N+4)Sub-PXL) The difference in distance C3 between the two substrates 121 is the thickness of the first protective layer 112 in the N+2-th sub-pixel ((N+2)Sub-PXL) at the N+3-th sub-pixel (( This can be achieved by forming a thickness different from that of the first protective layer 112 in the (N+3)Sub-PXL) and the (N+4)th sub-pixel ((N+4)Sub-PXL).

More specifically, referring to FIG. 4, the first protective layer 112 on the thin film transistor is formed to have a first thickness H1 in the N+2-th sub-pixel ((N+2)Sub-PXL), It is formed to have a second thickness (H2) greater than the first thickness (H1) in the N+3th sub-pixel ((N+3)Sub-PXL), and the N+4th sub-pixel ((N+4)Sub -PXL) may be formed to have a third thickness (H3) greater than the first thickness (H1).

That is, the thickness (H1) of the first protective layer 112 in the N+2-th sub-pixel ((N+2)Sub-PXL) is greater than that in the N+3-th sub-pixel ((N+3)Sub-PXL). It may be formed to be smaller than the thickness H2 of the first protective layer 112 and the thickness H3 of the first protective layer 112 in the N+4th sub-pixel ((N+4)Sub-PXL). Here, the thickness (H2) of the first protective layer 112 in the N+3-th sub-pixel ((N+3)Sub-PXL) and the thickness (H2) of the first protective layer 112 in the N+4-th sub-pixel ((N+4)Sub-PXL) 1 The thickness H3 of the protective layer 112 may be formed to be the same.

Thickness (H1) of the first protective layer 112 in the N+2-th sub-pixel ((N+2)Sub-PXL), first protection in the N+3-th sub-pixel ((N+3)Sub-PXL) The difference between the thickness (H2) of the layer 112 and the thickness (H3) of the first protective layer 112 in the N+4th sub-pixel ((N+4)Sub-PXL) is calculated using a halftone mask. This can be achieved by a halftone process. A halftone mask is a mask that has a light-shielding part, a light-transmitting part, and a semi-transmissive part. The light-shielding part is a part that blocks light, the light-transmitting part is a part that transmits light, and the semi-transmissive part transmits light more than the light transmitting part. It refers to a small part. When using such a halftone mask, patterns of different heights can be formed simultaneously by differentially applying the amount of light.

Thickness (H1) of the first protective layer 112 in the N+2-th sub-pixel ((N+2)Sub-PXL) and the first protection in the N+3-th sub-pixel ((N+3)Sub-PXL) The difference between the thickness H2 of the layer 112 and the thickness H3 of the first protective layer 112 in the N+4th sub-pixel ((N+4)Sub-PXL) is the response time between the plurality of sub-pixels. It can be set considering the difference in response time, and can be formed at a level of 1.0㎛ to 1.5㎛.

The response time may decrease as the cell gap increases, and using this characteristic, the thickness of the first protective layer 112 is adjusted to form a cell gap, thereby increasing the sub-pixel The response time between devices can be set to the required level. For example, the thickness (H2) of the first protective layer 112 in the N+3th sub-pixel ((N+3)Sub-PXL) and the thickness (H2) of the N+4th sub-pixel ((N+4)Sub-PXL) When the thickness (H3) of the first protective layer 112 is formed to be 3.0 ㎛, the thickness (H1) of the first protective layer 112 in the N+2th sub-pixel ((N+2)Sub-PXL) Can be formed at the level of 1.5㎛ to 2.0㎛.

And, the N+2th sub-pixel ((N+2)Sub-PXL) is a red sub-pixel, the N+3th sub-pixel ((N+3)Sub-PXL) is a green sub-pixel, and the N+4th sub-pixel is ((N+4)Sub-PXL) may be a blue sub-pixel. That is, in the case of the liquid crystal display device 100 according to an embodiment of the present invention, the cell gap in the red sub-pixel may be formed to be larger than the cell gap in the green sub-pixel and the blue sub-pixel. .

As above, the cell gap in the N+2th sub-pixel ((N+2)Sub-PXL), i.e., the red sub-pixel, is reduced to the N+3th sub-pixel ((N+3)Sub-PXL), i.e. If the cell gap of the green sub-pixel and the N+4th sub-pixel ((N+4)Sub-PXL), that is, the blue sub-pixel, is formed larger, the transmittance in the long-wavelength red sub-pixel can be improved. And, accordingly, the transmittance of the liquid crystal display device can be improved.

That is, in the liquid crystal display device according to an embodiment of the present invention, the thickness of the planarization layer in the red sub-pixel is formed to be smaller than the thickness of the planarization layer in the green sub-pixel and the blue sub-pixel, thereby reducing the cell gap of the red sub-pixel. By forming a larger cell gap compared to the green sub-pixel and the blue sub-pixel, the response time of the liquid crystal between multiple sub-pixels can be adjusted to the same level and the occurrence of motion blur phenomenon can be minimized. there is.

Additionally, the liquid crystal display device according to an embodiment of the present invention can improve display quality and reliability of the liquid crystal display device by minimizing the occurrence of motion blur.

Figure 5 is a diagram showing the planar structure of a pixel electrode of a liquid crystal display device according to an embodiment of the present invention.

In FIG. 5 , for convenience of explanation, the pixel electrode 118a of the N+2-th sub-pixel ((N+2)Sub-PXL) and the N+3-th sub-pixel in the liquid crystal display device 100 according to an embodiment of the present invention are shown in FIG. Only the pixel electrode 118b of the sub-pixel ((N+3)Sub-PXL) and the pixel electrode 118c of the N+4th sub-pixel ((N+4)Sub-PXL) are shown.

Referring to FIG. 5, the pixel electrode 118 of the liquid crystal display device 100 according to an embodiment of the present invention is formed to have at least one curved portion. That is, the pixel electrode 118a of the N+2-th sub-pixel ((N+2)Sub-PXL), the pixel electrode 118b of the N+3-th sub-pixel ((N+3)Sub-PXL), and the N+ The pixel electrode 118c of the fourth sub-pixel ((N+4)Sub-PXL) has a first area (P1) and a second area (P2) extending in different directions, and the first area (P1) and the second area (P2), respectively. It may be configured to include a connection part connecting two areas (P2).

More specifically, referring to FIG. 5, the first region P1 of the pixel electrode 118a of the N+2-th sub-pixel ((N+2)Sub-PXL) is located in the direction in which the gate line GL extends. It is formed to extend to have an angle of A1 in the first direction (D1) with respect to the third direction (D3). And, the second area P2 of the pixel electrode 118a of the N+2-th sub-pixel ((N+2)Sub-PXL) is oriented in the third direction D3, which is the direction in which the gate line GL extends. It may be formed to extend in the second direction D2 to have an angle of A2.

Here, the absolute value of the angle A1 of the first area P1 of the pixel electrode 118a and the angle A2 of the second area P2 of the pixel electrode 118a may be the same. That is, the first region P1 and the second region P2 of the pixel electrode 118a may be formed to be symmetrical to each other with respect to the connection portion where the first region P1 and the second region P2 are connected.

Additionally, referring to FIG. 5, the first area P1 of the pixel electrode 118b of the N+3-th sub-pixel ((N+3)Sub-PXL) is located in the third area in the direction in which the gate line GL extends. It is formed to extend at an angle A4 in the fourth direction D4 with respect to the direction D3, and is the second region of the pixel electrode 118b of the N+3-th sub-pixel ((N+3)Sub-PXL). (P2) may be formed to extend at an angle of A5 in the fifth direction (D5) with respect to the third direction (D3), which is the direction in which the gate line (GL) extends.

Here, angle A4 of the first area (P1) of the pixel electrode 118b of the N+3-th sub-pixel ((N+3)Sub-PXL) and the angle A4 of the N+3-th sub-pixel ((N+3)Sub-PXL) ) The absolute value of the angle A5 of the second area P2 of the pixel electrode 118b may be the same. That is, the first region P1 and the second region P2 of the pixel electrode 118b may be formed to be symmetrical to each other with respect to the connection portion where the first region P1 and the second region P2 are connected.

Additionally, referring to FIG. 5, the first area P1 of the pixel electrode 118c of the N+4th sub-pixel ((N+4)Sub-PXL) is located in the third area in the direction in which the gate line GL extends. The second region of the pixel electrode 118c of the N+4th sub-pixel ((N+4)Sub-PXL) is formed to extend at an angle of A6 in the sixth direction D6 with respect to the direction D3. (P2) may be formed to extend at an angle of A7 in the seventh direction (D7) with respect to the third direction (D3), which is the direction in which the gate line (GL) extends.

Here, angle A6 of the first area P1 of the pixel electrode 118c of the N+4th sub-pixel ((N+4)Sub-PXL) and the angle A6 of the N+4th sub-pixel ((N+4)Sub-PXL) ) The absolute value of the angle A7 of the second area P2 of the pixel electrode 118c may be the same. That is, the first region P1 and the second region P2 of the pixel electrode 118c may be formed to be symmetrical to each other with respect to the connection portion where the first region P1 and the second region P2 are connected.

Due to differences in the response time of the liquid crystal between a plurality of sub-pixels in a liquid crystal display device, motion blur, an afterimage that appears as if a red image is being dragged, may occur when the screen of a specific pattern is driven. . More specifically, motion blur occurs when the black pattern moves quickly while the background screen has red sub-pixels of 245 gray, green sub-pixels of 178 gray, and blue sub-pixels of 66 gray. , the response time of the red sub-pixel is faster than that of the green sub-pixel and blue sub-pixel, which may cause the user to perceive the red screen first.

In order to minimize the motion blur phenomenon as described above, in the case of a liquid crystal display device, the angle of the curved portion of the pixel electrode is set differently for each sub-pixel. That is, the angle formed by the first area of the pixel electrode of the N+2-th sub-pixel ((N+2)Sub-PXL) with the direction in which the gate line GL extends, and the angle formed by the direction in which the gate line GL extends, and the angle formed by the first area of the pixel electrode of the N+2-th sub-pixel ((N+2)Sub-PXL) ) The angle formed by the first area of the pixel electrode of the (Sub-PXL) with the direction in which the gate line (GL) extends, and the first area of the pixel electrode of the N+4th sub-pixel ((N+4)Sub-PXL) The angle formed by the direction in which the gate line (GL) extends is formed differently for each sub-pixel.

If the angles of the curved portions of the pixel electrodes between sub-pixels are formed differently, the overall transmittance of the liquid crystal display device may be lowered. In particular, when the angle between the first or second area of the pixel electrode and the direction in which the gate line GL extends is set to be small, the response time of the corresponding sub-pixel can be reduced, but the transmittance of the liquid crystal display device is low. Losing problems may arise.

In order to solve the above problem, in the case of the liquid crystal display device 100 according to an embodiment of the present invention, the first pixel electrode 118a of the N+2th sub-pixel ((N+2)Sub-PXL) A1, which is the angle between the area P1 and the third direction D3, which is the direction in which the gate line GL extends, of the pixel electrode 118b of the N+3-th sub-pixel ((N+3)Sub-PXL). A4 and the pixel electrode 118c of the N+4th sub-pixel ((N+4)Sub-PXL), which is the angle formed between the first area P1 and the third direction D3, which is the direction in which the gate line GL extends. ), the angle A6 formed by the first area P1 with the third direction D3, which is the direction in which the gate line GL extends, may all be set to be the same. The angle A1 of the pixel electrode 118a, the angle A4 of the pixel electrode 118b, and the angle A6 of the pixel electrode 118c may be set according to the response time characteristics of each sub-pixel and may be formed at 75 to 80 degrees. You can.

That is, according to another feature of the present invention, the angle formed by the curved portion of the pixel electrode in the third direction D3 in which the gate line GL is extended is the N+2th sub-pixel ((N+2)Sub-PXL). , may be the same in both the N+3-th sub-pixel ((N+3)Sub-PXL) and the N+4-th sub-pixel ((N+4)Sub-PXL).

As described with reference to FIG. 4, the thickness of the first protective layer 112 serving as a planarization layer in the N+2th sub-pixel ((N+2)Sub-PXL), that is, the red sub-pixel, is N+3. Thickness of the first protective layer 112 in the N+4th sub-pixel ((N+3)Sub-PXL), i.e., the green sub-pixel, and the N+4th sub-pixel ((N+4)Sub-PXL), i.e., the blue sub-pixel. form smaller. Therefore, the cell gap of the N+2-th sub-pixel ((N+2)Sub-PXL) is divided into the N+3-th sub-pixel ((N+3)Sub-PXL) and the N+4-th sub-pixel ( If set larger than the cell gap of (N+4)Sub-PXL), the difference in response times in the red sub-pixel, green sub-pixel, and blue sub-pixel can be adjusted to an equal level. Therefore, the occurrence of motion blur phenomenon due to differences in response time between sub-pixels can be minimized. Additionally, since the angles of the curved portions of the pixel electrodes in the red sub-pixel, green sub-pixel, and blue sub-pixel can all be set to be the same, the transmittance of the liquid crystal display device can be improved.

That is, in the liquid crystal display device according to an embodiment of the present invention, the thickness of the planarization layer in the red sub-pixel is formed to be smaller than the thickness of the planarization layer in the green sub-pixel and the blue sub-pixel, thereby reducing the cell gap of the red sub-pixel. By forming a larger cell gap compared to the green sub-pixel and the blue sub-pixel, the response time of the liquid crystal between multiple sub-pixels can be adjusted to the same level and the occurrence of motion blur phenomenon can be minimized. there is.

Additionally, the liquid crystal display device according to an embodiment of the present invention can improve display quality and reliability of the liquid crystal display device by minimizing the occurrence of motion blur.

In addition, the liquid crystal display device according to an embodiment of the present invention sets the angle of the connection between the first region and the second region of the pixel electrode to be the same in all of the red sub-pixel, green sub-pixel, and blue sub-pixel, thereby increasing the transmittance of the liquid crystal display device. can be improved.

FIG. 6 is a diagram showing a change in response time as the cell gap of a red sub-pixel of a liquid crystal display device according to an embodiment of the present invention increases. In Figure 6, the horizontal axis represents time (Time, [msec)], and the vertical axis represents transmittance (Transmittance, [a.u.]).

In the case of the liquid crystal display device of the comparative example, the cell gaps of the red sub-pixel, green sub-pixel, and blue sub-pixel were all set to 3.2 ㎛. In the case where motion blur occurs in the liquid crystal display device of the comparative example, the red sub-pixel is set to 245 gray, the green sub-pixel is set to 178 gray, and the blue sub-pixel is set to 66 gray. Looking at the rising time, which is the response time from the (off) state to the on state, the rising time of the red sub-pixel is 15.2 ms, the rising time of the green sub-pixel is 24.8 ms, and the rising time of the blue sub-pixel is 24.8 ms. The rise time was 27.8ms. Therefore, in the case of the liquid crystal display device of the comparative example, the difference in rising time between the red sub-pixel and the green sub-pixel was about 9.6 ms, and the difference in rising time, that is, response time, between these sub-pixels caused motion blur. (motion blur) phenomenon occurred.

Referring to FIG. 6, when the cell gap in the red sub-pixel is increased by about 1.0 μm from 3.2 μm to 4.2 μm, as in the liquid crystal display device according to an embodiment of the present invention, the rising time of the red sub-pixel time), that is, it can be seen that the response time is delayed to about 9.5ms.

Therefore, when motion blur occurs, the red sub-pixel is 245 gray, the green sub-pixel is 178 gray, and the blue sub-pixel is 66 gray. When increasing the cell gap to 4.2㎛, the rising time of the red sub-pixel can be set to 24.7ms, and the rising time of the red sub-pixel can be set to the cell gap. It can be adjusted to a level similar to the rise time of 24.8 ms, which is the rise time of the green sub-pixel with a cell gap of 3.2 μm, and 27.8 ms, which is the rise time of the blue sub-pixel, which has a cell gap of 3.2 μm.

Therefore, when increasing the cell gap of the red sub-pixel from 3.2 ㎛ to 4.2 ㎛ or more, that is, from 1.0 ㎛ to 1.5 ㎛, the response time of the red sub-pixel must be set to a level equivalent to that of the green sub-pixel and the blue sub-pixel. You can. Accordingly, the occurrence of motion blur phenomenon due to differences in response time between a plurality of sub-pixels can be minimized.

That is, the liquid crystal display device according to an embodiment of the present invention forms the cell gap of the red sub-pixel to be larger than the cell gap of the green sub-pixel and the blue sub-pixel, thereby adjusting the response time between the plurality of sub-pixels to an equal level, thereby reducing motion The occurrence of image quality defects due to motion blur can be minimized and the transmittance of the liquid crystal display device can be improved.

A liquid crystal display device according to an embodiment of the present invention can be described as follows.

A liquid crystal display device according to an embodiment of the present invention includes a plurality of pixels consisting of a first sub-pixel, a second sub-pixel, and a third sub-pixel, and a first substrate and a second substrate facing each other with a liquid crystal layer interposed therebetween. and a gate line and a data line on the first substrate, a thin film transistor in an area where the gate line and the data line intersect, and a pixel electrode on the thin film transistor and connected to the thin film transistor, the first substrate of the first sub-pixel, and The distance between the second substrates is greater than the distance between the first and second substrates of the second sub-pixel and the third sub-pixel. That is, in the liquid crystal display device according to an embodiment of the present invention, the thickness of the planarization layer in the red sub-pixel is formed to be smaller than the thickness of the planarization layer in the green sub-pixel and the blue sub-pixel, thereby reducing the cell gap of the red sub-pixel. By forming a larger cell gap compared to the green sub-pixel and the blue sub-pixel, the response time of the liquid crystal between multiple sub-pixels can be adjusted to the same level and the occurrence of motion blur phenomenon can be minimized. there is.

Additionally, the liquid crystal display device according to an embodiment of the present invention can improve display quality and reliability of the liquid crystal display device by minimizing the occurrence of motion blur.

In addition, the liquid crystal display device according to an embodiment of the present invention increases the transmittance of the liquid crystal display device by setting the angle of the connection between the first region and the second region of the pixel electrode to be the same in the red sub-pixel, green sub-pixel, and blue sub-pixel. It can be improved.

According to another feature of the present invention, a planarization layer is included on the thin film transistor, and the thickness of the planarization layer of the first sub-pixel may be smaller than the thickness of the planarization layers of the second and third sub-pixels.

According to another feature of the present invention, the first sub-pixel may be a red sub-pixel, the second sub-pixel may be a green sub-pixel, and the third sub-pixel may be a blue sub-pixel.

According to another feature of the present invention, the difference in thickness of the planarization layers of the first sub-pixel, the second sub-pixel, and the third sub-pixel may be achieved through a halftone process.

According to another feature of the present invention, the difference in thickness of the planarization layer may be 1.0 μm to 1.5 μm.

According to another feature of the present invention, the pixel electrode includes a first region extending in a first direction and a second region extending in a second direction, wherein the first region and the second region are the first region and the second region. They may be symmetrical to each other based on the connection portion of .

According to another feature of the present invention, the angle formed by the first direction in which the first region of the pixel electrode is extended and the third direction in which the gate line is extended is all in the first sub-pixel, the second sub-pixel, and the third sub-pixel. may be the same.

According to another feature of the invention, the angle may be 75 to 80 degrees.

According to another feature of the present invention, the angle formed by the first area and the second area may be the same in all of the first sub-pixel, the second sub-pixel, and the third sub-pixel.

According to another feature of the present invention, it further includes a lower alignment layer on the first substrate and an upper alignment layer on the second substrate, and the distance between the lower alignment layer and the upper alignment layer of the first sub-pixel is that of the second sub-pixel and the third sub-pixel. It may be greater than the distance between the lower alignment layer and the upper alignment layer.

In another aspect, it includes a plurality of pixels consisting of a first sub-pixel, a second sub-pixel, and a third sub-pixel, a first substrate including a gate line, a data line, and a thin film transistor, and a first substrate positioned opposite the first substrate. A liquid crystal display device according to an embodiment of the present invention including a second substrate includes a planarization layer on a thin film transistor, the planarization layer has a first thickness at the first sub-pixel, the second sub-pixel and the third The sub-pixel has a second thickness, and the first thickness is smaller than the second thickness. That is, in the liquid crystal display device according to an embodiment of the present invention, the thickness of the planarization layer in the red sub-pixel is formed to be smaller than the thickness of the planarization layer in the green sub-pixel and the blue sub-pixel, thereby reducing the cell gap of the red sub-pixel. By forming a larger cell gap compared to the green sub-pixel and the blue sub-pixel, the response time of the liquid crystal between multiple sub-pixels can be adjusted to the same level and the occurrence of motion blur phenomenon can be minimized. there is.

Additionally, the liquid crystal display device according to an embodiment of the present invention can improve display quality and reliability of the liquid crystal display device by minimizing the occurrence of motion blur.

In addition, the liquid crystal display device according to an embodiment of the present invention increases the transmittance of the liquid crystal display device by setting the angle of the connection between the first region and the second region of the pixel electrode to be the same in the red sub-pixel, green sub-pixel, and blue sub-pixel. It can be improved.

According to another feature of the present invention, the difference between the first thickness and the second thickness of the planarization layer may be 1.0 μm to 1.5 μm.

According to another feature of the present invention, the first sub-pixel may be a red sub-pixel.

According to another feature of the present invention, it is on the planarization layer and includes a pixel electrode connected to a thin film transistor, and the pixel electrode may include a first region and a second region extending in different directions.

According to another feature of the present invention, the angle between the first area of the pixel electrode and the direction in which the gate line extends may be the same in all of the first sub-pixel, the second sub-pixel, and the third sub-pixel.

According to another feature of the invention, the angle may be 75 to 80 degrees.

According to another feature of the present invention, the planarization layer may be formed by a halftone process.

According to another feature of the present invention, the distance between the first and second substrates in the first sub-pixel may be increased to improve transmittance.

Although embodiments of the present invention have been described in more detail with reference to the accompanying drawings, the present invention is not necessarily limited to these embodiments, and may be implemented with various modifications without departing from the technical spirit of the present invention. there is. Accordingly, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention, but are for illustrative purposes, and the scope of the technical idea of the present invention is not limited by these embodiments. Therefore, the embodiments described above should be understood in all respects as illustrative and not restrictive. The scope of protection of the present invention should be interpreted in accordance with the claims, and all technical ideas within the equivalent scope should be interpreted as being included in the scope of rights of the present invention.

100: liquid crystal display device
101: first substrate
106: gate electrode
107: Gate insulation layer
108: semiconductor layer
109: source electrode
110: drain electrode
111: third protective layer
112: first protective layer
113a: first contact hole
113b: second contact hole
113c: third contact hole
113d: 4th contact hole
113e: 5th contact hole
114: common electrode
115: common electrode hole
116: second protective layer
117: second protective layer contact hole
118: pixel electrode
119: first spacer
119a: first spacer first area
119b: first spacer second area
119c: first spacer third area
121: second substrate
122: Black Matrix (BM)
122a: Gate BM
122b: data BM
124: Red color filter
125: Green color filter
126: Blue color filter
127: Overcoat
128: second spacer
129: third spacer
130: Gate driving IC
135: data driving IC
140: liquid crystal layer
156: lower alignment film
157: upper alignment film
GL: Gate line
DL: data line
P: display pixel
(N)Sub-PXL: 1st sub-pixel
(N+1)Sub-PXL: 2nd sub pixel
(N+2)Sub-PXL: Third sub pixel
(N+3)Sub-PXL: 4th sub-pixel
(N+4)Sub-PXL: 5th sub-pixel

Claims (18)

A first substrate including a plurality of pixels including a first sub-pixel, a second sub-pixel, and a third sub-pixel;
a second substrate facing the first substrate;
a gate line and a data line on the first substrate;
a thin film transistor in a region where the gate line and the data line intersect;
a first spacer disposed in a bar shape along the gate line on the first substrate, across two sub-pixels of the first sub-pixel, the second sub-pixel, and the third sub-pixel;
a second spacer disposed on the second substrate along the data line at a boundary between the two sub-pixels, at least partially overlapping with the first spacer and intersecting each other; and
It is on the thin film transistor and includes a pixel electrode connected to the thin film transistor,
The liquid crystal display device wherein the distance between the first substrate and the second substrate of the first sub-pixel is greater than the distance between the first substrate and the second substrate of the second sub-pixel and the third sub-pixel. According to claim 1,
Includes a planarization layer on top of the thin film transistor,
A liquid crystal display device wherein the thickness of the planarization layer of the first sub-pixel is smaller than the thickness of the planarization layer of the second sub-pixel and the third sub-pixel. According to claim 2,
The first sub-pixel is a red sub-pixel, the second sub-pixel is a green sub-pixel, and the third sub-pixel is a blue sub-pixel. According to claim 2,
The first spacer is formed to cover at least a portion of the contact hole provided in the planarization layer. According to claim 2,
A liquid crystal display device wherein the thickness difference of the planarization layer is 1.0㎛ to 1.5㎛. According to claim 1,
The pixel electrode includes a first area extending in a first direction and a second area extending in a second direction,
The liquid crystal display device wherein the first region and the second region are symmetrical to each other with respect to a connection portion of the first region and the second region. According to claim 1,
It further includes a third spacer located on the second substrate to correspond to the first spacer and spaced apart from the first spacer,
The liquid crystal display device wherein the third spacer has a circular planar structure. According to claim 6,
An angle formed between the first direction in which the first region of the pixel electrode extends and the third direction in which the gate line extends is 75 to 80 degrees. According to claim 6,
An angle formed by the first area and the second area is the same in all of the first sub-pixel, the second sub-pixel, and the third sub-pixel. According to claim 1,
Further comprising a lower alignment layer on the first substrate and an upper alignment layer on the second substrate,
A liquid crystal display device wherein the distance between the lower alignment layer and the upper alignment layer of the first sub-pixel is greater than the distance between the lower alignment layer and the upper alignment layer of the second sub-pixel and the third sub-pixel. A first substrate including a plurality of pixels including a first sub-pixel, a second sub-pixel, and a third sub-pixel, and including a gate line, a data line, and a thin film transistor, and a second substrate positioned opposite the first substrate. A liquid crystal display device including a planarization layer on the thin film transistor, and in two sub-pixels of the first sub-pixel, the second sub-pixel, and the third sub-pixel on the first substrate. It includes a first spacer disposed in a bar shape along the gate line, and at least a portion of the first spacer overlaps and intersects with the first spacer along the data line at the boundary of the two sub-pixels on the second substrate. and a second spacer disposed in a shape, wherein the planarization layer has a first thickness at the first sub-pixel, a second thickness at the second sub-pixel and the third sub-pixel, and the first thickness is: A liquid crystal display device smaller than the second thickness. According to claim 11,
A difference between the first thickness and the second thickness of the planarization layer is 1.0 μm to 1.5 μm. According to claim 11,
The liquid crystal display device wherein the first sub-pixel is a red sub-pixel. According to claim 11,
It is on the planarization layer and includes a pixel electrode connected to the thin film transistor,
The pixel electrode includes a first region and a second region extending in different directions. According to claim 11,
The first spacer is formed to cover at least a portion of the contact hole provided in the planarization layer. According to claim 14,
An angle between the first region of the pixel electrode and the direction in which the gate line extends is 75 to 80 degrees. According to claim 11,
It further includes a third spacer located on the second substrate to correspond to the first spacer and spaced apart from the first spacer,
The liquid crystal display device wherein the third spacer has a circular planar structure. According to claim 11,
A liquid crystal display device in which transmittance is improved by increasing the distance between the first substrate and the second substrate in the first sub-pixel.

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