KR102632382B1 - 메모리 액세스 커맨드를 위한 전송 디스크립터 - Google Patents
메모리 액세스 커맨드를 위한 전송 디스크립터 Download PDFInfo
- Publication number
- KR102632382B1 KR102632382B1 KR1020187013674A KR20187013674A KR102632382B1 KR 102632382 B1 KR102632382 B1 KR 102632382B1 KR 1020187013674 A KR1020187013674 A KR 1020187013674A KR 20187013674 A KR20187013674 A KR 20187013674A KR 102632382 B1 KR102632382 B1 KR 102632382B1
- Authority
- KR
- South Korea
- Prior art keywords
- instruction
- descriptor
- command
- processing device
- memory device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30192—Instruction operation extension or modification according to data descriptor, e.g. dynamic data typing
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
- G06F3/0647—Migration mechanisms
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30185—Instruction operation extension or modification according to one or more bits in the instruction, e.g. prefix, sub-opcode
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
- G06F9/342—Extension of operand address space
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Bus Control (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
- Memory System (AREA)
- Information Transfer Between Computers (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/934,707 | 2015-11-06 | ||
| US14/934,707 US9977619B2 (en) | 2015-11-06 | 2015-11-06 | Transfer descriptor for memory access commands |
| PCT/US2016/060995 WO2017079769A1 (en) | 2015-11-06 | 2016-11-08 | Transfer descriptor for memory access commands |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20200028280A KR20200028280A (ko) | 2020-03-16 |
| KR102632382B1 true KR102632382B1 (ko) | 2024-01-31 |
Family
ID=58663110
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020187013674A Active KR102632382B1 (ko) | 2015-11-06 | 2016-11-08 | 메모리 액세스 커맨드를 위한 전송 디스크립터 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US9977619B2 (enExample) |
| EP (1) | EP3398075B1 (enExample) |
| JP (1) | JP6888019B2 (enExample) |
| KR (1) | KR102632382B1 (enExample) |
| CN (1) | CN108292277B (enExample) |
| WO (1) | WO2017079769A1 (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111258491B (zh) * | 2018-11-30 | 2021-10-15 | 北京忆芯科技有限公司 | 降低读命令处理延迟的方法与装置 |
| CN111782267B (zh) * | 2019-04-04 | 2022-12-09 | 安徽寒武纪信息科技有限公司 | 数据处理方法及装置以及相关产品 |
| CN112347186B (zh) * | 2019-08-09 | 2023-02-28 | 安徽寒武纪信息科技有限公司 | 数据同步方法及装置以及相关产品 |
| CN111831337B (zh) * | 2019-04-19 | 2022-11-29 | 安徽寒武纪信息科技有限公司 | 数据同步方法及装置以及相关产品 |
| CN111782577B (zh) * | 2019-04-04 | 2023-03-24 | 安徽寒武纪信息科技有限公司 | 数据处理装置及方法以及相关产品 |
| CN111831329B (zh) * | 2019-04-19 | 2022-12-09 | 安徽寒武纪信息科技有限公司 | 数据处理方法及装置以及相关产品 |
| US11243699B2 (en) * | 2019-05-22 | 2022-02-08 | Micron Technology, Inc. | System using a restricted operation mode memory indicator |
| CN110457232A (zh) * | 2019-07-31 | 2019-11-15 | 联想(北京)有限公司 | 数据处理方法、装置、计算设备及介质 |
| US11221776B2 (en) * | 2019-12-30 | 2022-01-11 | Micron Technology, Inc. | Metadata indication for a memory device |
| US11385820B2 (en) * | 2020-03-04 | 2022-07-12 | Micron Technology, Inc. | Command batching for a memory sub-system |
| CN117992123B (zh) * | 2024-04-02 | 2024-07-05 | 摩尔线程智能科技(北京)有限责任公司 | 指令执行方法、装置、电子设备、存储介质 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100198998A1 (en) * | 2009-01-30 | 2010-08-05 | Fujitsu Limited | I/o controller and descriptor transfer method |
| US20120131309A1 (en) * | 2010-11-18 | 2012-05-24 | Texas Instruments Incorporated | High-performance, scalable mutlicore hardware and software system |
Family Cites Families (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3739352A (en) | 1971-06-28 | 1973-06-12 | Burroughs Corp | Variable word width processor control |
| US5761740A (en) | 1995-11-30 | 1998-06-02 | Unisys Corporation | Method of and apparatus for rapidly loading addressing registers |
| US5941959A (en) | 1995-12-20 | 1999-08-24 | Tandem Computers Incorporated | System for transferring a data stream to a requestor without copying data segments to each one of multiple data source/sinks during data stream building |
| US5961639A (en) | 1996-12-16 | 1999-10-05 | International Business Machines Corporation | Processor and method for dynamically inserting auxiliary instructions within an instruction stream during execution |
| US6115761A (en) | 1997-05-30 | 2000-09-05 | Lsi Logic Corporation | First-In-First-Out (FIFO) memories having dual descriptors and credit passing for efficient access in a multi-processor system environment |
| US6145016A (en) | 1998-09-03 | 2000-11-07 | Advanced Micro Devices, Inc. | System for transferring frame data by transferring the descriptor index data to identify a specified amount of data to be transferred stored in the host computer |
| US6434649B1 (en) | 1998-10-14 | 2002-08-13 | Hitachi, Ltd. | Data streamer |
| US6754732B1 (en) * | 2001-08-03 | 2004-06-22 | Intervoice Limited Partnership | System and method for efficient data transfer management |
| US7363467B2 (en) | 2002-01-03 | 2008-04-22 | Intel Corporation | Dependence-chain processing using trace descriptors having dependency descriptors |
| US7747808B2 (en) | 2003-05-15 | 2010-06-29 | St-Ericsson Sa | USB host controller with memory for transfer descriptors |
| JP4340519B2 (ja) * | 2003-11-04 | 2009-10-07 | 富士通株式会社 | 情報処理端末 |
| US7293121B2 (en) | 2004-02-25 | 2007-11-06 | Analog Devices, Inc. | DMA controller utilizing flexible DMA descriptors |
| US7496695B2 (en) | 2005-09-29 | 2009-02-24 | P.A. Semi, Inc. | Unified DMA |
| US8683143B2 (en) * | 2005-12-30 | 2014-03-25 | Intel Corporation | Unbounded transactional memory systems |
| US20090119460A1 (en) * | 2007-11-07 | 2009-05-07 | Infineon Technologies Ag | Storing Portions of a Data Transfer Descriptor in Cached and Uncached Address Space |
| US7877524B1 (en) * | 2007-11-23 | 2011-01-25 | Pmc-Sierra Us, Inc. | Logical address direct memory access with multiple concurrent physical ports and internal switching |
| US8549182B2 (en) * | 2010-06-23 | 2013-10-01 | International Business Machines Corporation | Store/store block instructions for communicating with adapters |
| JP2012014436A (ja) * | 2010-06-30 | 2012-01-19 | Toshiba Corp | ダイレクトメモリアクセス制御装置及び方法 |
| US9436629B2 (en) * | 2011-11-15 | 2016-09-06 | Marvell World Trade Ltd. | Dynamic boot image streaming |
| CN104247436A (zh) * | 2012-04-25 | 2014-12-24 | 三星电子株式会社 | 在数字广播系统中用于发送和接收的信令信息的装置和方法 |
| US20140181427A1 (en) * | 2012-12-21 | 2014-06-26 | Advanced Micro Devices, Inc. | Compound Memory Operations in a Logic Layer of a Stacked Memory |
| CN103593437A (zh) * | 2013-11-14 | 2014-02-19 | 浪潮电子信息产业股份有限公司 | 一种基于dma的数据压缩芯片结构及其实现方法 |
| US9785565B2 (en) * | 2014-06-30 | 2017-10-10 | Microunity Systems Engineering, Inc. | System and methods for expandably wide processor instructions |
-
2015
- 2015-11-06 US US14/934,707 patent/US9977619B2/en active Active
-
2016
- 2016-11-08 JP JP2018543080A patent/JP6888019B2/ja active Active
- 2016-11-08 EP EP16863185.1A patent/EP3398075B1/en active Active
- 2016-11-08 WO PCT/US2016/060995 patent/WO2017079769A1/en not_active Ceased
- 2016-11-08 CN CN201680070312.7A patent/CN108292277B/zh active Active
- 2016-11-08 KR KR1020187013674A patent/KR102632382B1/ko active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100198998A1 (en) * | 2009-01-30 | 2010-08-05 | Fujitsu Limited | I/o controller and descriptor transfer method |
| US20120131309A1 (en) * | 2010-11-18 | 2012-05-24 | Texas Instruments Incorporated | High-performance, scalable mutlicore hardware and software system |
Also Published As
| Publication number | Publication date |
|---|---|
| EP3398075A4 (en) | 2019-07-10 |
| CN108292277A (zh) | 2018-07-17 |
| JP6888019B2 (ja) | 2021-06-16 |
| US9977619B2 (en) | 2018-05-22 |
| KR20200028280A (ko) | 2020-03-16 |
| JP2018537800A (ja) | 2018-12-20 |
| EP3398075A1 (en) | 2018-11-07 |
| EP3398075B1 (en) | 2022-02-16 |
| CN108292277B (zh) | 2021-08-17 |
| US20170131939A1 (en) | 2017-05-11 |
| WO2017079769A1 (en) | 2017-05-11 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0105 | International application |
Patent event date: 20180515 Patent event code: PA01051R01D Comment text: International Patent Application |
|
| PG1501 | Laying open of application | ||
| PA0201 | Request for examination |
Patent event code: PA02012R01D Patent event date: 20211026 Comment text: Request for Examination of Application |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20230620 Patent event code: PE09021S01D |
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| E701 | Decision to grant or registration of patent right | ||
| PE0701 | Decision of registration |
Patent event code: PE07011S01D Comment text: Decision to Grant Registration Patent event date: 20240119 |
|
| GRNT | Written decision to grant | ||
| PR0701 | Registration of establishment |
Comment text: Registration of Establishment Patent event date: 20240129 Patent event code: PR07011E01D |
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| PR1002 | Payment of registration fee |
Payment date: 20240129 End annual number: 3 Start annual number: 1 |
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| PG1601 | Publication of registration |