KR102584001B1 - 벡터 산술 명령 - Google Patents

벡터 산술 명령 Download PDF

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Publication number
KR102584001B1
KR102584001B1 KR1020187003580A KR20187003580A KR102584001B1 KR 102584001 B1 KR102584001 B1 KR 102584001B1 KR 1020187003580 A KR1020187003580 A KR 1020187003580A KR 20187003580 A KR20187003580 A KR 20187003580A KR 102584001 B1 KR102584001 B1 KR 102584001B1
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South Korea
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vector
source operand
components
bit size
operand
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KR1020187003580A
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English (en)
Korean (ko)
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KR20180035211A (ko
Inventor
니겔 존 스테펜스
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에이알엠 리미티드
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Publication of KR20180035211A publication Critical patent/KR20180035211A/ko
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G06F9/30014—Arithmetic instructions with variable precision
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Data Mining & Analysis (AREA)
  • Computing Systems (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Complex Calculations (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
KR1020187003580A 2015-07-31 2016-06-23 벡터 산술 명령 Active KR102584001B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB1513511.4A GB2540943B (en) 2015-07-31 2015-07-31 Vector arithmetic instruction
GB1513511.4 2015-07-31
PCT/GB2016/051868 WO2017021681A1 (en) 2015-07-31 2016-06-23 Vector arithmethic instruction

Publications (2)

Publication Number Publication Date
KR20180035211A KR20180035211A (ko) 2018-04-05
KR102584001B1 true KR102584001B1 (ko) 2023-10-04

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ID=54062956

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020187003580A Active KR102584001B1 (ko) 2015-07-31 2016-06-23 벡터 산술 명령

Country Status (9)

Country Link
US (1) US11003447B2 (https=)
EP (1) EP3329363B1 (https=)
JP (1) JP7071913B2 (https=)
KR (1) KR102584001B1 (https=)
CN (1) CN107851016B (https=)
GB (1) GB2540943B (https=)
IL (1) IL256663B (https=)
TW (1) TWI739754B (https=)
WO (1) WO2017021681A1 (https=)

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CN107315717B (zh) * 2016-04-26 2020-11-03 中科寒武纪科技股份有限公司 一种用于执行向量四则运算的装置和方法
EP3428792B1 (en) * 2017-07-10 2022-05-04 Arm Ltd Testing bit values inside vector elements
JP6604393B2 (ja) * 2018-03-08 2019-11-13 日本電気株式会社 ベクトルプロセッサ、演算実行方法、プログラム
US10528346B2 (en) 2018-03-29 2020-01-07 Intel Corporation Instructions for fused multiply-add operations with variable precision input operands
US20210389948A1 (en) * 2020-06-10 2021-12-16 Arm Limited Mixed-element-size instruction
US12182570B2 (en) * 2021-06-25 2024-12-31 Intel Corporation Apparatuses, methods, and systems for a packed data convolution instruction with shift control and width control
CN114296798B (zh) * 2021-12-10 2024-08-13 龙芯中科技术股份有限公司 向量移位方法、处理器及电子设备

Citations (3)

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US20050125631A1 (en) * 2003-12-09 2005-06-09 Arm Limited Data element size control within parallel lanes of processing
US20050240870A1 (en) * 2004-03-30 2005-10-27 Aldrich Bradley C Residual addition for video software techniques
WO2015048825A1 (en) * 2013-09-27 2015-04-02 Intel Corporation Vector indexed memory access plus arithmetic and/or logical operation processors, methods, systems, and instructions

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US6408320B1 (en) * 1998-01-27 2002-06-18 Texas Instruments Incorporated Instruction set architecture with versatile adder carry control
US6282634B1 (en) * 1998-05-27 2001-08-28 Arm Limited Apparatus and method for processing data having a mixed vector/scalar register file
WO2006048828A1 (en) * 2004-11-03 2006-05-11 Koninklijke Philips Electronics N.V. Programmable data processing circuit that supports simd instruction
US20080091924A1 (en) * 2006-10-13 2008-04-17 Jouppi Norman P Vector processor and system for vector processing
GB2464292A (en) * 2008-10-08 2010-04-14 Advanced Risc Mach Ltd SIMD processor circuit for performing iterative SIMD multiply-accumulate operations
GB2474901B (en) * 2009-10-30 2015-01-07 Advanced Risc Mach Ltd Apparatus and method for performing multiply-accumulate operations
JP5699554B2 (ja) * 2010-11-11 2015-04-15 富士通株式会社 ベクトル処理回路、命令発行制御方法、及びプロセッサシステム
GB2488985A (en) * 2011-03-08 2012-09-19 Advanced Risc Mach Ltd Mixed size data processing operation with integrated operand conversion instructions
WO2013095658A1 (en) 2011-12-23 2013-06-27 Intel Corporation Systems, apparatuses, and methods for performing a horizontal add or subtract in response to a single instruction
US9336000B2 (en) * 2011-12-23 2016-05-10 Intel Corporation Instruction execution unit that broadcasts data values at different levels of granularity
US20140089634A1 (en) 2011-12-23 2014-03-27 Victor W. Lee Apparatus and method for detecting identical elements within a vector register
CN104137055B (zh) * 2011-12-29 2018-06-05 英特尔公司 点积处理器、方法、系统和指令
US10133577B2 (en) * 2012-12-19 2018-11-20 Intel Corporation Vector mask driven clock gating for power efficiency of a processor
US9292298B2 (en) * 2013-07-08 2016-03-22 Arm Limited Data processing apparatus having SIMD processing circuitry
US9323524B2 (en) * 2013-09-16 2016-04-26 Oracle International Corporation Shift instruction with per-element shift counts and full-width sources
US10489155B2 (en) * 2015-07-21 2019-11-26 Qualcomm Incorporated Mixed-width SIMD operations using even/odd register pairs for wide data elements
US10146535B2 (en) * 2016-10-20 2018-12-04 Intel Corporatoin Systems, apparatuses, and methods for chained fused multiply add

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Publication number Priority date Publication date Assignee Title
US20050125631A1 (en) * 2003-12-09 2005-06-09 Arm Limited Data element size control within parallel lanes of processing
US20050240870A1 (en) * 2004-03-30 2005-10-27 Aldrich Bradley C Residual addition for video software techniques
WO2015048825A1 (en) * 2013-09-27 2015-04-02 Intel Corporation Vector indexed memory access plus arithmetic and/or logical operation processors, methods, systems, and instructions

Also Published As

Publication number Publication date
KR20180035211A (ko) 2018-04-05
GB2540943B (en) 2018-04-11
US11003447B2 (en) 2021-05-11
WO2017021681A1 (en) 2017-02-09
IL256663B (en) 2020-02-27
CN107851016A (zh) 2018-03-27
JP7071913B2 (ja) 2022-05-19
GB201513511D0 (en) 2015-09-16
US20180203692A1 (en) 2018-07-19
TW201721409A (zh) 2017-06-16
IL256663A (en) 2018-02-28
JP2018521423A (ja) 2018-08-02
EP3329363A1 (en) 2018-06-06
TWI739754B (zh) 2021-09-21
GB2540943A (en) 2017-02-08
EP3329363B1 (en) 2020-10-14
CN107851016B (zh) 2022-05-17

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