KR102581460B1 - Display apparatus - Google Patents

Abstract

The display device includes a display panel including an impact alleviating member, and a touch sensor layer disposed on the display panel, wherein the touch sensor layer includes a first conductive layer disposed on the display panel, and a first conductive layer disposed on the first conductive layer. It includes a first insulating layer, a second conductive layer disposed on the first insulating layer, and a second insulating layer disposed on the second conductive layer, wherein the second insulating layer covers the impact alleviating member, and A portion of the top surface of the display panel may have a curved shape, and a portion of the bottom surface of the touch sensor layer may have a curved shape.

Description

DISPLAY APPARATUS}

The present invention relates to a display device, and more specifically, to a display device in which crack occurrence defects are alleviated.

Various display devices used in multimedia devices such as televisions, mobile phones, tablet computers, navigation, game consoles, etc. are being developed. Input devices for display devices include a keyboard or mouse. Additionally, recently display devices are equipped with a touch panel as an input device.

The purpose of the present invention is to provide a display device with reduced crack occurrence when bending or folding.

A display device according to an embodiment of the present invention includes a display panel including an impact alleviating member, and a touch sensor layer disposed on the display panel, wherein the touch sensor layer includes a first conductive layer disposed on the display panel, It includes a first insulating layer disposed on the first conductive layer, a second conductive layer disposed on the first insulating layer, and a second insulating layer disposed on the second conductive layer, wherein the second insulating layer is It covers the impact alleviating member, a portion of the upper surface of the display panel may have a curved shape, and a portion of the bottom surface of the touch sensor layer may have a curved shape.

The display panel includes a base member, a circuit layer disposed on the base member, a display layer disposed on the circuit layer, and a thin film encapsulation layer disposed on the display layer, and the impact alleviating member is disposed on the base member. You can.

An end of the circuit layer protrudes further than an end of the thin film encapsulation layer, and a portion of the circuit layer not covered by the thin film encapsulation layer may be in contact with the second insulating layer.

The end of the first insulating layer may be aligned with the end of the thin film encapsulation layer.

The thin film encapsulation layer may include a first inorganic thin film, an organic thin film, and a second inorganic thin film sequentially stacked.

A portion of the upper surface of the thin film encapsulation layer may have a curved shape, and a portion of the bottom surface of the touch sensor layer may have a curved shape.

A first area that overlaps the circuit layer and a second area that does not overlap the circuit layer are defined in the base member, and the end of the second insulating layer is greater than the end of the first insulating layer. may protrude further toward.

The first insulating layer may be an inorganic layer.

The second insulating layer may be an organic layer.

The touch sensor layer further includes an inorganic insulating layer disposed between the first conductive layer and the display panel, and the inorganic insulating layer may be in direct contact with the display panel.

The impact alleviating member may include patterns spaced apart from each other.

The second insulating layer may cover all of the patterns.

The impact alleviating member may further include a cover member that covers all of the patterns, and the second insulating layer may completely cover the cover member.

A display device according to an embodiment of the present invention includes a display panel including a buffer layer with a defined opening, and a touch sensor layer disposed on the display panel, wherein the touch sensor layer includes a first conductive layer disposed on the display panel. a layer comprising: a first insulating layer disposed over the first conductive layer, a second conductive layer disposed over the first insulating layer, and a second insulating layer disposed over the second conductive layer; A portion of may be filled in the opening, a portion of the upper surface of the display panel may have a curved shape, and a portion of the bottom surface of the touch sensor layer may have a curved shape.

The display panel includes a base member, a circuit layer disposed on the base member, a display layer disposed on the circuit layer, and a thin film encapsulation layer disposed on the display layer, and the buffer layer is between the base member and the circuit layer. can be placed in

When viewed in a plan view, the opening of the buffer layer may not overlap the circuit layer.

When viewed on a plane, the opening of the buffer layer may not overlap with the thin film encapsulation layer.

The end of the circuit layer protrudes further than the end of the thin film encapsulation layer, the end of the first insulating layer is aligned with the end of the thin film encapsulation layer, and the end of the circuit layer not covered by the thin film encapsulation layer is A portion may be in contact with the second insulating layer.

The first insulating layer may be an inorganic layer, and the second insulating layer may be an organic layer.

The touch sensor layer further includes an inorganic insulating layer disposed between the first conductive layer and the display panel, and the inorganic insulating layer may be in direct contact with the display panel.

According to the display device according to an embodiment of the present invention, crack occurrence defects during bending or folding can be improved.

Figure 1A is a perspective view of a display device according to an embodiment of the present invention.
Figure 1B is a cross-sectional view of a display device according to an embodiment of the present invention.
Figure 2A is a perspective view of a display device according to an embodiment of the present invention.
Figure 2b is a cross-sectional view of a display device according to an embodiment of the present invention.
3A and 3B are perspective views of a display device according to an embodiment of the present invention.
Figure 4a is a plan view of an organic light emitting display panel according to an embodiment of the present invention.
Figure 4b is a cross-sectional view of a display module according to an embodiment of the present invention.
5A is an equivalent circuit diagram of a pixel according to an embodiment of the present invention.
Figure 5b is a partial cross-sectional view of an organic light emitting display panel according to an embodiment of the present invention.
Figure 5c is a partial cross-sectional view of an organic light emitting display panel according to an embodiment of the present invention.
Figures 6a to 6c are cross-sectional views of thin film encapsulation layers according to an embodiment of the present invention.
Figure 7a is a cross-sectional view of a touch sensor layer according to an embodiment of the present invention.
7B to 7E are plan views of a touch sensor layer according to an embodiment of the present invention.
Figure 7f is a partially enlarged view of the BB area of Figure 7e.
FIGS. 8A to 8D are partial enlarged views of area AA of FIG. 4B.
FIGS. 9A to 9I are cross-sectional views sequentially showing the manufacturing method of the display module shown in FIG. 8C.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In this specification, when a component (or region, layer, part, etc.) is referred to as being “on,” “connected to,” or “coupled to” another component, it is directly connected/connected to another component. This means that they can be combined or a third component can be placed between them.

Like reference numerals refer to like elements. Additionally, in the drawings, the thickness, proportions, and dimensions of components are exaggerated for effective explanation of technical content. “And/or” includes all combinations of one or more that the associated configurations may define.

Terms such as first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The above terms are used only for the purpose of distinguishing one component from another. For example, a first component may be named a second component, and similarly, the second component may also be named a first component without departing from the scope of the present invention. Singular expressions include plural expressions unless the context clearly dictates otherwise.

Additionally, terms such as “below,” “on the lower side,” “above,” and “on the upper side” are used to describe the relationship between the components shown in the drawings. The above terms are relative concepts and are explained based on the direction indicated in the drawings.

Terms such as “include” or “have” are intended to designate the presence of features, numbers, steps, operations, components, parts, or combinations thereof described in the specification, but do not include one or more other features, numbers, or steps. , it should be understood that it does not exclude in advance the possibility of the existence or addition of operations, components, parts, or combinations thereof.

Hereinafter, a display device according to an embodiment of the present invention will be described.

Figure 1A is a perspective view of a display device according to an embodiment of the present invention.

As shown in FIG. 1A, the display surface IS of the display device DD may include a plurality of areas. The display device DD includes a display area DD-DA where the image IM is displayed and a non-display area DD-NDA adjacent to the display area DD-DA. The non-display area (DD-NDA) is an area where images are not displayed. Figure 1a shows a vase as an example of an image (IM). As an example, the display area (DD-DA) may have a rectangular shape. The non-display area (DD-NDA) may surround the display area (DD-DA). The non-display area (DD-NDA) may have various shapes and is not limited to any one embodiment.

A portion of the display device DD may have a bent shape. For example, as shown in FIG. 1A , the display device DD may be divided into a bending area BA with a bent shape and a non-bending area NBA with a flat shape. The bending area (BA) may be adjacent to at least one side of the non-bending area (NBA). Meanwhile, this is an exemplary illustration, and in the display device according to an embodiment of the present invention, the bending area or the non-bending area may be omitted.

The non-bending area NBA is parallel to the plane defined by the first direction DR1 and the second direction DR2. The normal direction of the non-bending area (NBA) is indicated by the third direction (DR3). The third direction DR3 is a reference axis that divides the front and back surfaces of each member. The bending area (BA) bent from the non-bending area (NBA) displays the image (IM) in the fourth direction (DR4) intersecting the first direction (DR1), the second direction (DR2), and the third direction (DR3). can be displayed. However, the direction indicated by the first to fourth directions DR1 to DR4 is a relative concept and can be converted to another direction.

FIG. 1B is a cross-sectional view of the display device shown in FIG. 1A. FIG. 1B shows a cross section defined by the first direction DR1 and the third direction DR3.

As shown in FIG. 1B, the display device DD includes a protective film (PM), a display module (DM), an optical member (LM), a window (WM), a first adhesive member (AM1), and a second adhesive member ( AM2), and a third adhesive member (AM3). The display module (DM) is disposed between the protective film (PM) and the optical member (LM). The optical member LM is disposed between the display module DM and the window WM. The first adhesive member (AM1) combines the display module (DM) and the protective film (PM), the second adhesive member (AM2) combines the display module (DM) and the optical member (LM), and the third adhesive member (AM3) combines the optical member (LM) and the window (WM).

The protective film (PM) protects the display module (DM). The protective film PM provides a first outer surface OS-L exposed to the outside and an adhesive surface adhered to the first adhesive member AM1. The protective film (PM) prevents external moisture from penetrating into the display module (DM) and absorbs external shock.

The protective film (PM) may include a plastic film as a base layer. Protective films (PM) include polyethersulfone (PES), polyacrylate (PAR), polyetherimide (PEI), polyethyelenen naphthalate (PEN), and polyethylene terephthalate (PET). polyethyeleneterephthalate), polyphenylene sulfide (PPS), polyarylate, polyimide (PI, polyimide), polycarbonate (PC, polycarbonate), poly(arylene ethersulfone), and It may include a plastic film containing any one selected from the group consisting of combinations thereof.

Materials constituting the protective film (PM) are not limited to plastic resins and may include organic/inorganic composite materials. The protective film (PM) may include a porous organic layer and an inorganic material filled in the pores of the organic layer. The protective film (PM) may further include a functional layer formed on the plastic film. The functional layer may include a resin layer. The functional layer may be formed by a coating method. In one embodiment of the present invention, the protective film (PM) may be omitted.

The window WM may protect the display module DM from external shock and provide an input surface to the user. The window WM provides a second outer surface OS-U exposed to the outside and an adhesive surface adhered to the second adhesive member AM2. The display surface IS shown in FIGS. 1A and 1B may be the second outer surface OS-U.

The window WM may include a plastic film. A window (WM) may have a multi-layer structure. The window WM may have a multilayer structure selected from glass substrate, plastic film, and plastic substrate. The window (WM) may further include a bezel pattern. The multilayer structure can be formed through a continuous process or an adhesion process using an adhesive layer.

The optical member (LM) reduces external light reflectance. The optical member LM may include at least a polarizing film. The optical member LM may further include a retardation film. In one embodiment of the present invention, the optical member LM may be omitted.

The display module (DM) may include an organic light emitting display panel (DP) and a touch sensor layer (TS). The touch sensor layer (TS) is directly disposed on the organic light emitting display panel (DP). In this specification, “directly placed” means formed through a continuous process, excluding attachment using a separate adhesive layer.

The organic light emitting display panel (DP) generates an image (IM, see FIG. 1A) corresponding to input image data. The organic light emitting display panel DP provides a first display panel surface BS1-L and a second display panel surface BS1-U facing each other in the thickness direction DR3. Although the organic light emitting display panel (DP) has been described as an example in this embodiment, the display panel is not limited thereto.

The touch sensor layer (TS) acquires coordinate information of external input. The touch sensor layer (TS) can sense external input using a capacitance method.

Although not separately shown, the display module DM according to an embodiment of the present invention may further include an anti-reflection layer. The anti-reflection layer may include a color filter or a laminate structure of a conductive layer/insulating layer/conductive layer. The anti-reflection layer can reduce external light reflectance by absorbing, destructively interfering with, or polarizing light incident from the outside. The antireflection layer can replace the function of the optical member (LM).

Each of the first adhesive member (AM1), the second adhesive member (AM2), and the third adhesive member (AM3) is made of an optically clear adhesive film (OCA, Optically Clear Adhesive film) or an optically clear adhesive resin (OCR, Optically Clear Resin). Alternatively, it may be an organic adhesive layer such as a pressure sensitive adhesive film (PSA). The organic adhesive layer may include adhesive materials such as polyurethane-based, polyacrylic-based, polyester-based, polyepoxy-based, and polyvinyl acetate-based.

Although not separately shown, the display device DD may further include a frame structure supporting the functional layers to maintain the state shown in FIGS. 1A and 1B. The frame structure may include a joint structure or a hinge structure.

The bending area BA of the display device DD may have a shape bent with a constant radius of curvature. Alternatively, the bending area BA may have a bent shape such that the radius of curvature decreases as the distance from the non-bending area NBA increases. However, it is not limited to this, and the bending area BA may be bent with various curvature radii.

Meanwhile, in the display device according to an embodiment of the present invention, at least one of the protective film (PM), the adhesive layers (AM1, AM2, and AM3), the optical member (LM), and the window (WM) may be omitted. . A display device according to an embodiment of the present invention may include a combination of various members and is not limited to any one embodiment.

Figure 2A is a perspective view of a display device according to an embodiment of the present invention. Figure 2b is a cross-sectional view of a display device according to an embodiment of the present invention. Hereinafter, the display device DD-1 will be described with reference to FIGS. 2A and 2B. Meanwhile, the same components as those described in FIGS. 1A and 1B are given the same reference numerals and descriptions are omitted.

As shown in FIG. 2A, the display device DD-1 has one non-bending area (NBA) and a first bending area (BA1) and a second bending area (BA2) on both sides of the non-bending area (NBA). may include. FIG. 2B shows a cross section defined by the first direction DR1 and the third direction DR3.

The display device DD-1 may include a first bending area BA1 and a second bending area BA2. The bending areas BA1 and BA2 may be defined to be spaced apart from each other with the non-bending area NBA in between. The first bending area BA1 is adjacent to one side of the non-bending area NBA and has a shape bent to be convex in the fourth direction DR4. The second bending area BA2 is adjacent to the other side of the non-bending area NBA and has a shape bent to be convex in the fifth direction DR5.

The display device DD-1 may have a generally convex shape toward the third direction DR3. Meanwhile, this is shown as an example, and the display device DD-1 may have a shape that is concave upward according to the shapes of each of the first bending area BA1 and the second bending area BA2. The display device DD-1 according to an embodiment of the present invention may have various shapes and is not limited to any one embodiment.

1A to 2B show a bent display device as an example of the display devices DD and DD-1. However, the present invention may be a flexible foldable display device or a rolled rollable display device, and is not particularly limited. Additionally, although a flexible display device is shown in this embodiment, the present invention is not limited thereto. The display device DD according to this embodiment may be a flat rigid display device or a curved rigid display device. The display device (DD) according to the present invention can be used in large electronic devices such as televisions and monitors, as well as small and medium-sized electronic devices such as mobile phones, tablets, car navigation systems, game consoles, and smart watches.

3A and 3B are perspective views of a display device according to an embodiment of the present invention. FIG. 3A shows the display device DD-2 in an unfolded state, and FIG. 3B shows the display device DD-2 in a bent state.

The display device DD-2 may include one bending area (BA) and one non-bending area (NBA). The non-display area (DD-NDA) of the display device (DD-2) may be bent. However, in one embodiment of the present invention, the bending area of the display device DD-2 may be changed.

The display device DD-2 according to this embodiment can be fixed and operated in one form. The display device DD-2 may operate in a bent state as shown in FIG. 3B. The display device DD-2 may be fixed to a frame, etc. in a bent state, and the frame may be coupled to the housing of the electronic device.

The display device DD-2 according to this embodiment may have the same cross-sectional structure as shown in FIG. 1B. Meanwhile, this is shown as an example, and the non-bending area (NBA) and the bending area (BA) may have different stacked structures. For example, the non-bending area NBA may have the same cross-sectional structure as shown in FIG. 1B, and the bending area BA may have a cross-sectional structure different from that shown in FIG. 1B. The optical member LM and window WM may not be disposed in the bending area BA. That is, the optical member LM and window WM can be placed only in the non-bending area NBA. The second adhesive member (AM2) and the third adhesive member (AM3) may also be not disposed in the bending area (BA). As at least one of the configurations shown in FIG. 1B is provided to overlap only the non-bending area (NBA) and not to the bending area (BA), the bending area (BA) is larger than the non-bending area (NBA). It can have a relatively slim thickness. Accordingly, the bending area BA can be easily bent.

Figure 4a is a plan view of an organic light emitting display panel according to an embodiment of the present invention. Figure 4b is a cross-sectional view of a display module according to an embodiment of the present invention.

As shown in FIG. 4A, the organic light emitting display panel (DP) includes a display area (DA) and a non-display area (NDA) on a plane. The display area (DA) and non-display area (NDA) of the organic light emitting display panel (DP) are the display area (DD-DA, see Figure 1a) and the non-display area (DD-NDA) of the display device (DD, see Figure 1a). , see Figure 1a), respectively. The display area (DA) and non-display area (NDA) of the organic light emitting display panel (DP) are the display area (DD-DA, see Figure 1a) and the non-display area (DD-NDA) of the display device (DD, see Figure 1a). , see FIG. 1A), and may change depending on the structure/design of the organic light emitting display panel (DP).

The organic light emitting display panel (DP) includes a plurality of pixels (PX). An area where a plurality of pixels (PX) are arranged is defined as a display area (DA). In this embodiment, the non-display area (NDA) may be defined along the border of the display area (DA).

The organic light emitting display panel (DP) includes gate lines (GL), data lines (DL), light emission lines (EL), control signal lines (SL-D), initialization voltage lines (SL-Vint), and voltage lines ( SL-VDD), power supply line (E-VSS), and pad section (PD).

The gate lines GL are each connected to a corresponding pixel PX among the plurality of pixels PX, and the data lines DL are respectively connected to the corresponding pixel PX among the plurality of pixels PX. do. Each of the light emitting lines EL may be arranged in parallel with a corresponding gate line among the gate lines GL. The control signal line (SL-D) can provide control signals to the gate driving circuit (GDC). The initialization voltage line SL-Vint may provide an initialization voltage to the plurality of pixels PX. The voltage line SL-VDD is connected to a plurality of pixels PX and may provide a first voltage to the plurality of pixels PX. The voltage line SL-VDD may include a plurality of lines extending in the first direction DR1 and a plurality of lines extending in the second direction DR2. The power supply line (E-VSS) may be placed in the non-display area (NDA) surrounding three sides of the display area (DA). A common voltage (eg, a second voltage) may be provided to the plurality of pixels (PX) on the power supply line (E-VSS). The common voltage may be a voltage at a lower level than the first voltage.

A gate driving circuit (GDC) to which gate lines (GL) and emission lines (EL) are connected may be disposed on one side of the non-display area (NDA). Gate lines (GL), data lines (DL), light emission lines (EL), control signal line (SL-D), initialization voltage line (SL-Vint), voltage line (SL-VDD), and power supply line. Some of the (E-VSS) are placed on the same floor, and some are placed on different floors.

The pad portion PD may be connected to the ends of the data lines DL, the control signal line SL-D, the initialization voltage line SL-Vint, and the voltage line SL-VDD.

As shown in Figure 4b, the organic light emitting display panel (DP) includes a base layer (SUB), a circuit layer (DP-CL) disposed on the base layer (SUB), a display layer (DP-OLED), and a thin film encapsulation. layer (TFE).

The base layer (SUB) may include at least one plastic film. The base layer (SUB) is a flexible substrate and may include a plastic substrate, a glass substrate, a metal substrate, or an organic/inorganic composite substrate. The plastic substrate is at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin. may include.

The circuit layer DP-CL may include a plurality of insulating layers, a plurality of conductive layers, and a semiconductor layer. A plurality of conductive layers of the circuit layer (DP-CL) may form signal lines or a control circuit of a pixel.

The display layer (DP-OLED) includes organic light emitting diodes.

The thin film encapsulation layer (TFE) seals the display layer (DP-OLED). The thin film encapsulation layer (TFE) includes an inorganic layer and an organic layer. The thin film encapsulation layer (TFE) may include at least two inorganic layers and an organic layer disposed between them. The inorganic layers protect the display layer (DP-OLED) from moisture/oxygen, and the organic layer protects the display layer (DP-OLED) from foreign substances such as dust particles. The inorganic layer may include a silicon nitride layer, a silicon oxy nitride layer, and a silicon oxide layer. The organic layer may include, but is not limited to, an acrylic-based organic material.

The touch sensor layer (TS) is directly disposed on the thin film encapsulation layer (TFE). The touch sensor layer (TS) includes touch sensors and touch signal lines. Touch sensors and touch signal lines may have a single-layer or multi-layer structure.

Touch sensors and touch signal lines may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), PEDOT, metal nanowire, and graphene. The touch sensors and touch signal lines may include a metal layer, such as molybdenum, silver, titanium, copper, aluminum, or alloys thereof. The touch sensors and touch signal lines may have the same layer structure or may have different layer structures. Specific details about the touch sensor layer (TS) will be described later.

5A is an equivalent circuit diagram of a pixel according to an embodiment of the present invention.

FIG. 5A exemplarily shows the i-th pixel (PXi) connected to the k-th data line (DLk) among the plurality of data lines (DL, see FIG. 4A).

The ith pixel (PXi) includes an organic light emitting diode (OLED) and a pixel driving circuit that controls the organic light emitting diode. The driving circuit may include seven thin film transistors (T1 to T7) and one storage capacitor (Cst). The driving transistor controls the driving current supplied to the organic light-emitting diode (OLED). The output electrode of the second transistor (T2) is electrically connected to the organic light emitting diode (OLED). The output electrode of the second transistor T2 may be in direct contact with the anode of the organic light emitting diode (OLED), or may be connected via another transistor (the sixth transistor T6 in this embodiment).

The control electrode of the control transistor can receive a control signal. The control signal applied to the ith pixel (PXi) is the i-1th gate signal (Si-1), the ith gate signal (Si), the i+1th gate signal (Si+1), the data signal (Dk), and an i-th emission control signal (Ei). In an embodiment of the present invention, the control transistor may include a first transistor T1 and third to seventh transistors T3 to T7.

The first transistor T1 includes an input electrode connected to the k-th data line DLk, a control electrode connected to the ith gate line GLi, and an output electrode connected to the output electrode of the second transistor T2. do. The first transistor T1 is turned on by the gate signal (Si, hereinafter referred to as the i-th gate signal) applied to the ith gate line (GLi), and the data signal (Dk) applied to the k-th data line (DLk). is provided to the storage capacitor (Cst).

Figure 5b is a partial cross-sectional view of an organic light emitting display panel according to an embodiment of the present invention. Figure 5c is a partial cross-sectional view of an organic light emitting display panel according to an embodiment of the present invention. Specifically, FIG. 5B shows a cross section of a portion corresponding to the first transistor T1 of the equivalent circuit shown in FIG. 5A. FIG. 5C shows a cross section of a portion corresponding to the second transistor T2, the sixth transistor T6, and the organic light emitting diode (OLED) of the equivalent circuit shown in FIG. 5A.

Referring to FIGS. 5B and 5C, a buffer layer (BFL) may be disposed on the base layer (SUB). The buffer layer (BFL) improves the bonding strength between the base layer (SUB) and the conductive patterns or semiconductor patterns. The buffer layer (BFL) may include an inorganic layer. Although not separately shown, a barrier layer to prevent foreign substances from entering may be further disposed on the upper surface of the base layer (SUB). The buffer layer (BFL) and barrier layer can be selectively placed/omitted.

On the buffer layer (BFL), a semiconductor pattern (OSP1: hereinafter referred to as a first semiconductor pattern) of the first transistor (T1), a semiconductor pattern (OSP2: hereinafter referred to as a second semiconductor pattern) of the second transistor (T2), and a sixth transistor (T6) are formed on the buffer layer (BFL). A semiconductor pattern (OSP6: hereinafter referred to as the sixth semiconductor pattern) is disposed. The first semiconductor pattern (OSP1), the second semiconductor pattern (OSP2), and the sixth semiconductor pattern (OSP6) may be selected from amorphous silicon, polysilicon, and metal oxide semiconductors.

A first insulating layer 10 may be disposed on the first semiconductor pattern OSP1, the second semiconductor pattern OSP2, and the sixth semiconductor pattern OSP6. 5B and 5C exemplarily show that the first insulating layer 10 is provided in the form of a layer covering the first semiconductor pattern (OSP1), the second semiconductor pattern (OSP2), and the sixth semiconductor pattern (OSP6). However, the first insulating layer 10 may be provided in a pattern arranged to correspond to the first semiconductor pattern (OSP1), the second semiconductor pattern (OSP2), and the sixth semiconductor pattern (OSP6).

The first insulating layer 10 may include a plurality of inorganic thin films. The plurality of inorganic thin films may include a silicon nitride layer, a silicon oxy nitride layer, and a silicon oxide layer.

On the first insulating layer 10, the control electrode (GE1: hereinafter referred to as first control electrode) of the first transistor (T1), the control electrode (GE2 (hereinafter referred to as second control electrode)) of the second transistor (T2), and the sixth The control electrode GE6 (hereinafter referred to as the sixth control electrode) of the transistor T6 is disposed. The first control electrode GE1, the second control electrode GE2, and the sixth control electrode GE6 may be manufactured according to the same photolithography process as the gate lines GL (see FIG. 4A).

A second insulating layer 20 covering the first control electrode GE1, the second control electrode GE2, and the sixth control electrode GE6 may be disposed on the first insulating layer 10. The second insulating layer 20 may provide a flat top surface. The second insulating layer 20 may include organic materials and/or inorganic materials.

On the second insulating layer 20, the input electrode (SE1: hereinafter referred to as first input electrode) and the output electrode (DE1: first output electrode) of the first transistor (T1), and the input electrode ( SE2: hereinafter referred to as the second input electrode) and output electrode (DE2: second output electrode), input electrode (SE6: hereinafter referred to as the sixth input electrode) and output electrode (DE6: sixth output electrode) of the sixth transistor (T6) ) is placed.

The first input electrode (SE1) and the first output electrode (DE1) have a first through hole (CH1) and a second through hole (CH2) penetrating the first insulating layer 10 and the second insulating layer 20. Each is connected to the first semiconductor pattern OSP1 through. The second input electrode (SE2) and the second output electrode (DE2) have third through holes (CH3) and fourth through holes (CH4) penetrating the first and second insulating layers (10) and (20). Each is connected to the second semiconductor pattern (OSP2) through. The sixth input electrode (SE6) and the sixth output electrode (DE6) have a fifth through hole (CH5) and a sixth through hole (CH6) penetrating the first and second insulating layers (10) and (20). Each is connected to the sixth semiconductor pattern (OSP6) through. Meanwhile, in another embodiment of the present invention, the first transistor T1, the second transistor T2, and the sixth transistor T6 may be modified to have a bottom gate structure.

On the second insulating layer 20, a first input electrode (SE1), a second input electrode (SE2), a sixth input electrode (SE6), a first output electrode (DE1), a second output electrode (DE2), 6 A third insulating layer 30 covering the output electrode DE6 is disposed. The third insulating layer 30 includes an organic layer and/or an inorganic layer. In particular, the third insulating layer 30 may include an organic material to provide a flat surface.

Any one of the first insulating layer 10, the second insulating layer 20, and the third insulating layer 30 may be omitted depending on the circuit structure of the pixel. Each of the second insulating layer 20 and the third insulating layer 30 may be defined as an interlayer insulating layer (interlayer). The interlayer insulating layer is disposed between the conductive pattern disposed below and the conductive pattern disposed above with respect to the interlayer insulating layer to insulate the conductive patterns.

A pixel defining layer (PDL) and an organic light emitting diode (OLED) are disposed on the third insulating layer 30. The first electrode AE is disposed on the third insulating layer 30. The first electrode (AE) is connected to the sixth output electrode (DE6) through the seventh through hole (CH7) penetrating the third insulating layer (30). An opening (OP) is defined in the pixel definition layer (PDL). The opening OP of the pixel definition layer PDL exposes at least a portion of the first electrode AE.

The pixel PX may be arranged in a pixel area on a plane. The pixel area may include a light-emitting area (PXA) and a non-light-emitting area (NPXA) adjacent to the light-emitting area (PXA). The non-emissive area (NPXA) may surround the luminous area (PXA). In this embodiment, the light emitting area PXA is defined to correspond to a partial area of the first electrode AE exposed by the opening OP.

The hole control layer (HCL) may be commonly disposed in the emission area (PXA) and the non-emission area (NPXA). Although not separately shown, a common layer such as a hole control layer (HCL) may be formed in common across a plurality of pixels (PX, see FIG. 4A).

An organic light emitting layer (EML) is disposed on the hole control layer (HCL). The organic light emitting layer (EML) may be disposed in an area corresponding to the opening OP. That is, the organic light emitting layer (EML) may be formed separately in each of the plurality of pixels (PX). Although the patterned organic light emitting layer (EML) is shown as an example in this embodiment, the organic light emitting layer (EML) may be commonly disposed in a plurality of pixels (PX). At this time, the organic light emitting layer (EML) can generate white light. Additionally, the organic light emitting layer (EML) may have a multilayer structure.

An electronic control layer (ECL) is disposed on the organic light emitting layer (EML). Although not separately shown, the electronic control layer (ECL) may be commonly formed in a plurality of pixels (PX, see FIG. 5A).

A second electrode (CE) is disposed on the electronic control layer (ECL). The second electrode CE is commonly disposed in the plurality of pixels PX.

A thin film encapsulation layer (TFE) is disposed on the second electrode (CE). The thin film encapsulation layer (TFE) is commonly disposed in the plurality of pixels (PX). The thin film encapsulation layer (TFE) includes at least one inorganic layer and at least one organic layer. The thin film encapsulation layer (TFE) may include a plurality of inorganic layers and a plurality of organic layers alternately stacked.

In this embodiment, the thin film encapsulation layer (TFE) directly covers the second electrode (CE). In one embodiment of the present invention, a capping layer covering the second electrode (CE) may be further disposed between the thin film encapsulation layer (TFE) and the second electrode (CE). At this time, the thin film encapsulation layer (TFE) can directly cover the capping layer.

Figures 6a to 6c are cross-sectional views of thin film encapsulation layers according to an embodiment of the present invention. Hereinafter, thin film encapsulation layers (TFE1, TFE2, TFE3) according to embodiments of the present invention will be described with reference to FIGS. 6A to 6C.

As shown in FIG. 6A, the thin film encapsulation layer (TFE1) may include n inorganic thin films (IOL1 to IOLn), including the first inorganic thin film (IOL1) in contact with the second electrode (CE, see FIG. 6C). You can. The first inorganic thin film (IOL1) may be defined as a lower inorganic thin film, and inorganic thin films other than the first inorganic thin film (IOL1) among the n inorganic thin films (IOL1 to IOLn) may be defined as upper inorganic thin films.

The thin film encapsulation layer (TFE1) includes n-1 organic thin films (OL1 to OLn), and the n-1 organic thin films (OL1 to OLn) are arranged alternately with n inorganic thin films (IOL1 to IOLn). It can be. The n-1 organic thin films (OL1 to OLn) may have a greater thickness on average than the n inorganic thin films (IOL1 to IOLn).

Each of the n inorganic thin films (IOL1 to IOLn) may have a single layer containing one material, or may have multiple layers each containing a different material. Each of the n-1 organic thin films (OL1 to OLn) may be formed by providing organic monomers. For example, each of the n-1 organic thin films (OL1 to OLn) may be formed using an inkjet printing method. , can be formed by coating a composition containing an acrylic monomer. In one embodiment of the present invention, the thin film encapsulation layer (TFE1) may further include an nth organic thin film.

As shown in FIGS. 6B and 6C, the inorganic thin films included in each of the thin film encapsulation layers TFE2 and TFE3 may be made of the same or different inorganic materials and may have the same or different thickness. The organic thin films included in each of the thin film encapsulation layers TFE2 and TFE3 may have the same or different organic materials and may have the same or different thickness.

As shown in FIG. 6B, the thin film encapsulation layer (TFE2) includes a first inorganic thin film (IOL1), a first organic thin film (OL1), a second inorganic thin film (IOL2), and a second organic thin film (OL2) sequentially stacked. , and a third inorganic thin film (IOL3).

The first inorganic thin film (IOL1) may have a two-layer structure. The first sub-layer (S1) and the second sub-layer (S2) may include different inorganic materials.

As shown in FIG. 6C, the thin film encapsulation layer (TFE3) may include a first inorganic thin film (IOL10), a first organic thin film (OL1), and a second inorganic thin film (IOL20) sequentially stacked. The first inorganic thin film (IOL10) may have a two-layer structure. The first sub-layer (S10) and the second sub-layer (S20) may include different inorganic materials. The second inorganic thin film (IOL20) may have a two-layer structure. The second inorganic thin film (IOL20) may include a first sub-layer (S100) and a second sub-layer (S200) deposited in different deposition environments. The first sub-layer S100 may be deposited under low-power conditions and the second sub-layer S200 may be deposited under high-power conditions. The first sub-layer (S100) and the second sub-layer (S200) may include the same inorganic material.

Figure 7a is a cross-sectional view of a touch sensor layer according to an embodiment of the present invention.

As shown in FIG. 7A, the touch sensor layer (TS) includes a first conductive layer (TS-CL1), a first insulating layer (TS-IL1, hereinafter referred to as first touch insulating layer), and a second conductive layer (TS-CL2). ) and a second insulating layer (TS-IL2, hereinafter referred to as a second touch insulating layer). The first conductive layer (TS-CL1) is directly disposed on the thin film encapsulation layer (TFE). Without being limited thereto, another inorganic layer (eg, a buffer layer) may be further disposed between the first conductive layer (TS-CL1) and the thin film encapsulation layer (TFE).

Each of the first conductive layer TS-CL1 and the second conductive layer TS-CL2 may have a single-layer structure or a multi-layer structure stacked along the third direction DR3. The multi-layered conductive layer may include at least two of transparent conductive layers and metal layers. The multi-layered conductive layer may include metal layers containing different metals. The transparent conductive layer may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), PEDOT, metal nanowire, and graphene. The metal layer may include molybdenum, silver, titanium, copper, aluminum, and alloys thereof.

Each of the first conductive layer (TS-CL1) and the second conductive layer (TS-CL2) includes a plurality of patterns. Hereinafter, the first conductive layer (TS-CL1) will be described as including first conductive patterns, and the second conductive layer (TS-CL2) will be described as including second conductive patterns. Each of the first conductive patterns and second conductive patterns may include touch electrodes and touch signal lines.

The first touch insulating layer TS-IL1 may include an inorganic material or an organic material. The inorganic material may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide. The organic material is at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin. It can be included.

The second touch insulating layer TS-IL2 includes an organic material. The organic material is at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin. It can be included.

Each of the first touch insulating layer TS-IL1 and the second touch insulating layer TS-IL2 may have a single-layer or multi-layer structure. The first touch insulating layer TS-IL1 may have at least one of an inorganic layer and an organic layer. The second touch insulating layer TS-IL2 may have at least one organic layer. The inorganic layer and the organic layer may be formed by chemical vapor deposition.

The first touch insulating layer TS-IL1 is sufficient to insulate the first conductive layer TS-CL1 and the second conductive layer TS-CL2, and its shape is not limited. The shape of the first touch insulating layer TS-IL1 may change depending on the shapes of the first and second conductive patterns. The first touch insulating layer TS-IL1 may entirely cover the thin film encapsulation layer TFE or may include a plurality of insulating patterns. It is sufficient for the plurality of insulating patterns to overlap the first or second connection parts CP1 or CP2, which will be described later.

In this embodiment, a two-layer touch sensor layer is shown as an example, but is not limited thereto. The single-layer touch sensor layer includes a conductive layer and an insulating layer covering the conductive layer. The conductive layer includes touch sensors and touch signal lines connected to the touch sensors. The single-layer touch sensor layer can acquire coordinate information using the self-cap method.

7B to 7E are plan views of a touch sensor layer according to an embodiment of the present invention.

As shown in FIG. 7B, the touch sensor layer TS includes first touch electrodes TE1-1 to TE1-4 and first touch signal lines SL1-1 to SL1- connected to the first touch electrodes. 4), second touch electrodes (TE2-1 to TE2-5), and second touch signal lines (SL2-1 to SL2-5) connected to the second touch electrodes (TE2-1 to TE2-5) , may include a pad portion (PADa) connected to the first touch signal lines (SL1-1 to SL1-4) and the second touch signal lines (SL2-1 to SL2-5). FIG. 7B exemplarily shows a touch sensor layer (TS) including four first touch electrodes (TE1-1 to TE1-4) and five second touch electrodes (TE2-1 to TE2-5). However, it is not limited to this.

Each of the first touch electrodes TE1-1 to TE1-4 may have a mesh shape with a plurality of touch openings defined. Each of the first touch electrodes TE1-1 to TE1-4 includes a plurality of first touch sensor units SP1 and a plurality of first connection parts CP1. The first touch sensor units SP1 are arranged along the first direction DR1. Each of the first connection parts CP1 connects two adjacent first touch sensor parts SP1 among the first touch sensor parts SP1. Although not specifically shown, the first touch signal lines SL1-1 to SL1-4 may also have a mesh shape.

The second touch electrodes (TE2-1 to TE2-5) are insulated and intersect the first touch electrodes (TE1-1 to TE1-4). Each of the second touch electrodes TE2-1 to TE2-5 may have a mesh shape with a plurality of touch openings defined. Each of the second touch electrodes TE2-1 to TE2-5 includes a plurality of second touch sensor units SP2 and a plurality of second connection parts CP2. The second touch sensor units SP2 are arranged along the second direction DR2. Each of the second connection parts CP2 connects two adjacent second touch sensor parts SP2 among the second touch sensor parts SP2. The second touch signal lines SL2-1 to SL2-5 may also have a mesh shape.

The first touch electrodes (TE1-1 to TE1-4) and the second touch electrodes (TE2-1 to TE2-5) are electrostatically coupled. As touch detection signals are applied to the first touch electrodes TE1-1 to TE1-4, capacitors are formed between the first touch sensor units SP1 and the second touch sensor units SP2.

A plurality of first touch sensor units (SP1), a plurality of first connection parts (CP1), and first touch signal lines (SL1-1 to SL1-4), a plurality of second touch sensor units (SP2), a plurality of Some of the second connection portions CP2 and second touch signal lines SL2-1 to SL2-5 are formed by patterning the first conductive layer TS-CL1 shown in FIG. 7A, and other portions are formed by patterning the first conductive layer TS-CL1 shown in FIG. 7A. Can be formed by patterning the second conductive layer (TS-CL2) shown in FIG. 7A.

To electrically connect conductive patterns disposed on different layers, a contact hole penetrating the first touch insulating layer TS-IL1 shown in FIG. 7A may be formed. Hereinafter, the touch sensor layer TS according to an embodiment will be described with reference to FIGS. 7C to 7E.

As shown in FIG. 7C, first conductive patterns are disposed on the thin film encapsulation layer (TFE). The first conductive patterns may include bridge patterns CP2. Bridge patterns CP2 are directly disposed on the thin film encapsulation layer (TFE). The bridge patterns CP2 correspond to the second connection parts CP2 shown in FIG. 7B.

As shown in FIG. 7D, the first touch insulating layer TS-IL1 covering the bridge patterns CP2 is disposed on the thin film encapsulation layer TFE. Contact holes CH that partially expose the bridge patterns CP2 are defined in the first touch insulating layer TS-IL1. Contact holes (CH) may be formed through a photolithography process.

As shown in FIG. 7E, second conductive patterns are disposed on the first touch insulating layer TS-IL1. The second conductive patterns include a plurality of first touch sensor units SP1, a plurality of first connection parts CP1, first touch signal lines SL1-1 to SL1-4, and a plurality of second touch sensor units. (SP2) and second touch signal lines (SL2-1 to SL2-5). Although not separately shown, a second touch insulating layer (TS-IL2) covering the second conductive patterns is further disposed on the first touch insulating layer (TS-IL1). Details about the second touch insulating layer TS-IL2 will be described later.

In another embodiment of the present invention, the first conductive patterns may include first touch electrodes (TE1-1 to TE1-4) and first touch signal lines (SL1-1 to SL1-4). The second conductive patterns may include second touch electrodes (TE2-1 to TE2-5) and second touch signal lines (SL2-1 to SL2-5). At this time, contact holes CH are not defined in the first touch insulating layer TS-IL1.

Additionally, in one embodiment of the present invention, the first conductive patterns and the second conductive patterns may be interchanged. That is, the second conductive patterns may include bridge patterns CP2.

Figure 7f is a partially enlarged view of the BB area of Figure 7e.

As shown in FIG. 7F, the first touch sensor unit SP1 overlaps the non-emission area NPXA. The first touch sensor unit SP1 includes a plurality of first extension parts SP1-A extending in the sixth direction DR6 crossing the first direction DR1 and the second direction DR2 and the sixth direction ( It includes a plurality of second extension parts SP1-B extending in the seventh direction DR7 intersecting DR6). The plurality of first extension parts SP1-A and the plurality of second extension parts SP1-B may be defined as mesh lines. The line width of the mesh lines may be several microns.

The plurality of first extension parts SP1-A and the plurality of second extension parts SP1-B are connected to each other to form a plurality of touch openings TS-OP. In other words, the first touch sensor unit SP1 has a mesh shape with a plurality of touch openings TS-OP. Although the touch openings TS-OP are shown as having a one-to-one correspondence with the light emitting areas PXA, the present invention is not limited thereto. One touch opening (TS-OP) may correspond to two or more light emitting areas (PXA).

The size of the light emitting areas (PXA) may vary. For example, the sizes of the light emitting areas PXA that provide blue light and those that provide red light among the light emitting areas PXA may be different. Accordingly, the sizes of the touch openings TS-OP may also vary. In FIG. 7F , the size of the light emitting areas PXA is shown as an example, but the size is not limited thereto. The sizes of the light emitting areas PXA may be the same, and the sizes of the touch openings TS-OP may also be the same.

8A to 8D are cross-sectional views of a display device according to an embodiment of the present invention. In FIGS. 8A to 8D , the area AA of FIG. 4B is commonly shown for ease of explanation. Hereinafter, various embodiments of the present invention will be described with reference to FIGS. 8A to 8D. Meanwhile, the same reference numerals are given to the same components as those described in FIGS. 1A to 7F and duplicate descriptions are omitted.

8A to 8D, the display device includes a base member (BSM), a circuit layer (DP-CL), a display layer (DP-OLED), a thin film encapsulation layer (TFE), and a touch sensor layer (TS). .

The base member BSM is divided into a first area AR1 and a second area AR2. The first area AR1 may include a first sub-area AR1-1 and a second sub-area AR1-2. The first area AR1 may include a display area and a first non-display area. The first sub-area AR1-1 may correspond to the display area. The second sub-area AR1-2 may correspond to the first non-display area. The second area AR2 may correspond to the second non-display area. The second area AR2 may be an area corresponding to the outermost part of the display device.

The base member (BSM) may include a base layer (SUB) and a buffer layer (BFL).

The base layer (SUB) is a flexible substrate and may include a plastic substrate, a glass substrate, a metal substrate, or an organic/inorganic composite substrate. The plastic substrate is at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin. may include. The buffer layer (BFL) may include an inorganic material. The buffer layer (BFL) may include either silicon oxide or silicon nitride.

8A to 8D illustrate that a buffer layer (BFL) is disposed on one surface of the base layer (SUB) as an example of a functional layer, but the present invention is not limited thereto and the functional layer may include a barrier layer. Meanwhile, this is an exemplary illustration, and in the display device according to an embodiment of the present invention, the buffer layer (BFL) may be omitted.

Meanwhile, in FIGS. 8A to 8D, the second area AR2 is exemplarily shown to have a flat shape, but this is not limited to this, and the second area AR2 has a shape curved in the third direction DR3 with a certain curvature. It can be.

A circuit layer (DP-CL) is provided on the base member (BSM). The circuit layer DP-CL covers the first area AR1 and exposes the second area AR2. The circuit layer DP-CL may cover the first sub-area AR1-1 and the second sub-area AR1-2. The circuit layer DP-CL may expose the second area AR2.

The circuit layer (DP-CL) includes a thin film transistor (TR), conductive lines (ELVSS, CL), and at least one insulating layer.

The semiconductor pattern (OSP) of the thin film transistor (TR) is disposed on the base layer (SUB). The semiconductor pattern (OSP) can be selected from amorphous silicon, polysilicon, and metal oxide semiconductors. The insulating layer may include a first insulating layer 10 and a second insulating layer 20. The ends of the first insulating layer 10 and the ends of the second insulating layer 20 may be aligned side by side. Alternatively, one of the ends of the first insulating layer 10 and the end of the second insulating layer 20 may be disposed adjacent to the outside of the display device. The end of the circuit layer DP-CL may be defined by the end of the insulating layer disposed on the outermost plane among the ends of the first and second insulating layers 10 and 20 . The end of the insulating layer may define a boundary between the first area AR1 and the second area AR2. The ends of the insulating layer may define the ends of the second sub-regions AR1-2 and the second area AR2.

The first insulating layer 10 is disposed to cover the semiconductor pattern (OSP) on the base layer (SUB). The first insulating layer 10 may include an organic layer and/or an inorganic layer. The first insulating layer 10 may include a plurality of inorganic thin films. The plurality of inorganic thin films may include a silicon nitride layer and a silicon oxide layer.

The control electrode (GE) of the thin film transistor (TR) is disposed on the first insulating layer (10). The control electrode GE may be manufactured according to the same photolithography process as the gate lines (GL in FIG. 4A). The control electrode GE may be made of the same material as the gate lines, have the same stacked structure, and be disposed on the same layer.

A second insulating layer 20 covering the control electrode GE is disposed on the first insulating layer 10. The second insulating layer 20 includes an organic layer and/or an inorganic layer. The second insulating layer 20 may include a plurality of inorganic thin films. The plurality of inorganic thin films may include a silicon nitride layer and a silicon oxide layer. The second insulating layer 20 may include a different material from the first insulating layer 10 .

The input electrode (SE) and output electrode (DE) of the thin film transistor (TR) are disposed on the second insulating layer (20). A plurality of signal lines (CL) and a power supply line (E-VSS) may be disposed on the second insulating layer 20 .

A first dam part DM1 and a second dam part DM2 may be disposed in the second sub-area AR1-2. The first dam portion DM1 and the second dam portion DM2 may be arranged to surround the first sub-region AR1-1 in a plane view. When printing an organic monomer to form the organic thin film OL1 of the thin film encapsulation layer TFE, the first dam part DM1 and the second dam part DM2 can prevent the organic monomer from overflowing.

The first dam portion DM1 may be disposed on the power supply line E-VSS. The first dam DM1 may be formed as a single layer, and the first dam DM1 may be formed simultaneously with the pixel defining layer PDL.

The second dam unit DM2 may be disposed outside the first dam unit DM1. For example, the distance between the second dam part DM2 and the first sub area AR1-1 may be greater than the distance between the first dam part DM1 and the first sub area AR1-1.

The second dam portion DM2 may cover a portion of the power supply line (E-VSS). The second dam portion DM2 may be formed of a plurality of layers, and the second dam portion DM2 may include a first layer DM2-1 and a second layer DM2-2.

A third insulating layer 30 covering the input electrode SE and the output electrode DE is disposed on the second insulating layer 20. The third insulating layer 30 includes an organic layer and/or an inorganic layer. The third insulating layer 30 may include an organic material to provide a flat surface.

Any one of the first insulating layer 10, the second insulating layer 20, and the third insulating layer 30 may be omitted depending on the circuit structure of the pixel. Each of the second insulating layer 20 and the third insulating layer 30 may be defined as an interlayer insulating layer (interlayer). The interlayer insulating layer is disposed between the conductive pattern disposed below and the conductive pattern disposed above with respect to the interlayer insulating layer to insulate the conductive patterns.

A display layer (DP-OLED) is disposed on the third insulating layer 30. A pixel defining layer (PDL) and an organic light emitting diode (OLED) are disposed on the third insulating layer 30. An anode (AE) is disposed on the third insulating layer 30. The anode (AE) is connected to the output electrode (DE) through a through hole penetrating the third insulating layer (30). An emission area (OP) is defined in the pixel definition layer (PDL). The light emitting area (OP) of the pixel defining layer (PDL) exposes at least a portion of the anode (AE).

A light emitting unit (EU) is disposed on the anode (AE). A cathode (CE) is disposed on the light emitting unit (EU). Although not shown, as shown in FIG. 5C, the light emitting unit (EU) may include a hole control layer (HCL), an organic light emitting layer (EML), and an electronic control layer (ECL).

The connection electrode (E-CNT) may be formed on the same layer as the anode (AE). An anode (AE) and a connection electrode (E-CNT) may be formed on the third insulating layer 30. The anode (AE) and connecting electrode (E-CNT) can be formed through the same process. The connection electrode (E-CNT) may be electrically connected to the power supply line (E-VSS). The connection electrode (E-CNT) may receive a second voltage (ELVSS in FIG. 5A) from the power supply line (E-VSS). Although not shown, the connection electrode (E-CNT) may be disposed to partially overlap the first layer (DM2-L1) of the second dam portion (DM2).

In this embodiment, the thin film encapsulation layer (TFE) directly covers the cathode (CE). In one embodiment of the present invention, a capping layer covering the cathode (CE) may be further disposed. At this time, the thin film encapsulation layer (TFE) directly covers the capping layer. The thin film encapsulation layer (TFE) may include a first inorganic thin film (IOL10), a first organic thin film (OL1), and a second organic thin film (OL2) sequentially stacked. However, the present invention is not limited to this, and the thin film encapsulation layer (TFE) may include a plurality of inorganic thin films and organic thin films.

The end of the thin film encapsulation layer (TFE) may be disposed on the first area (AR1). The end of the thin film encapsulation layer (TFE) may be disposed on the second sub-region AR1-2. The end of the thin film encapsulation layer (TFE) may be disposed closer to the center of the display device than the ends of the first and second insulating layers 10 and 20 .

A touch sensor layer (TS) is disposed on the thin film encapsulation layer (TFE). The touch sensor layer (TS) includes a first touch insulating layer (TS-IL1), a plurality of conductive patterns disposed on the first touch insulating layer (TS-IL1), and a second touch insulating layer disposed on the conductive patterns. layer (TS-IL2). The plurality of conductive patterns may include touch sensor units SP disposed in the first sub-region AR1-1 and touch signal lines SL disposed in the second sub-region AR1-2.

The touch sensor units SP correspond to the first touch sensor units SP1 and the second touch sensor units SP2 shown in FIGS. 7A to 7F, and the touch signal lines SL are shown in FIGS. 7A to 7F. It may correspond to the illustrated first touch signal lines (SL1-1 to SL1-4) and second touch signal lines (SL2-1 to SL2-5). Although not shown, the conductive patterns may further include patterns disposed between the first touch insulating layer TS-IL1 and the thin film encapsulation layer TFE. Hereinafter, redundant descriptions of the touch sensor units SP and touch signal lines SL will be omitted.

An end of the first touch insulating layer TS-IL1 may be disposed on the first area. An end of the first touch insulating layer TS-IL1 may be disposed on the second sub-region AR1-2. The end of the first touch insulating layer TS-IL1 may be aligned parallel to the end of the thin film encapsulation layer TFE. The end of the first touch insulating layer TS-IL1 may be disposed closer to the center of the display device than the ends of the first and second insulating layers 10 and 20 .

The second touch insulating layer TS-IL2 includes an organic material. Hereinafter, for easy description, the second touch insulating layer TS-IL2 will be referred to as an organic layer. The organic layer TS-IL2 overlaps the first sub-region AR1-1 and the second sub-region AR1-2. The organic layer TS-IL2 overlaps at least a portion of the second area AR2. The organic layer (TS-IL2) covers the second area (AR2). The organic layer (TS-IL2) may be disposed in direct contact with the top of the touch sensor layer (TS). The organic layer TS-IL2 may directly contact and cover the first touch insulating layer TS-IL1 and a plurality of conductive patterns disposed on the first touch insulating layer TS-IL1. The organic layer TS-IL2 contacts a portion of the first insulating layer TS-IL1 and connects the touch sensor units SP and the touch signal lines SL disposed on the first insulating layer TS-IL1. It can be covered.

The organic layer (TS-IL2) can entirely overlap the insulating layer. The organic layer TS-IL2 may entirely overlap the first and second insulating layers 10 and 20 . As shown in FIG. 8A , the organic layer TS-IL2 may entirely overlap the second area AR2 on a plane and cover up to the ends of the display device. Alternatively, the organic layer TS-IL2 may overlap a portion of the second area AR2 on a plane, as shown in FIGS. 8B to 8D. The organic layer (TS-IL2) may be disposed to cover the ends of the thin film encapsulation layer (TFE) and the touch sensor layer (TS).

Meanwhile, although not shown, a plurality of pad parts (PD: see Figure 4) and control signal lines (SL-D: Figure 4) are located in an area different from the area shown in Figures 8A to 8D among the outermost part of the display panel (DP). Reference), etc. may be placed. The plurality of pad parts PD may be arranged to overlap the second area AR2. At this time, the organic layer TS-IL2 may be disposed so as not to overlap the plurality of pad portions PD. The organic layer (TS-IL2) may expose a plurality of pad portions (PD). A plurality of pad portions PD are exposed and can be easily connected to an electrical component provided from the outside.

Referring to FIG. 8B, it may further include an impact alleviating member (DM-C) disposed on the second region of the base layer (SUB). The impact alleviating member DM-C may be disposed on the second area AR2 of the base layer SUB. The impact alleviating member (DM-C) may include a plurality of insulating patterns (DM-CP). The impact alleviation member (DM-C) can prevent cracks from occurring in the insulating layer by alleviating impacts occurring on the outside of the display device.

The plurality of insulating patterns DM-CP may be arranged to be spaced apart from each other along the first direction DR1. In this embodiment, the bending axis of the second area AR2 may be defined along the second direction DR2. The plurality of insulating patterns DM-CP may be spaced apart from each other along the first direction DR1 and may extend along the second direction DR2. The plurality of insulating patterns (DM-CP) extend in a direction parallel to the bending axis and are arranged to be spaced apart from each other in a direction intersecting the bending axis, so that the plurality of insulating patterns (DM-CP) have an effect on bending of the display device. The impact can be mitigated.

The organic layer (TS-IL2) may cover the side and top surfaces of the impact alleviating member (DM-C). The organic layer (TS-IL2) may cover each of the plurality of insulating patterns (DM-CP) of the impact alleviating member (DM-C). A spaced apart space may be defined between each of the plurality of insulating patterns (DM-CP). The spacing between the plurality of insulating patterns (DM-CP) may be constant as shown. Alternatively, the spacing may be different and therefore not constant. The organic layer (TS-IL2) may be filled in each of the spaces spaced between each of the plurality of insulating patterns (DM-CP). The organic layer TS-IL2 may be disposed to have a thickness greater than or equal to the thickness of each of the plurality of insulating patterns DM-CP and may entirely cover each of the plurality of insulating patterns DM-CP.

Each of the plurality of insulating patterns DM-CP may include a first layer DM-C1 and a second layer DM-C2. The first layer (DM-C1) and the second layer (DM-C2) may have a sequentially stacked structure. The first layer (DM-C1) may have the same thickness as the first insulating layer 10. The second layer (DM-C2) may have the same thickness as the second insulating layer 20.

Each of the plurality of insulating patterns (DM-CP) may include the same material as the insulating layer. The first layer (DM-C1) may include the same material as the first insulating layer 10. The second layer (DM-C2) may include the same material as the second insulating layer 20. The first layer (DM-C1) may be formed in the same process as the first insulating layer 10, and the second layer (DM-C2) may be formed in the same process as the second insulating layer 20.

As shown in FIG. 8C, the impact alleviating member (DM-C) may further include a cover member (DM-CC) that covers the plurality of insulating patterns (DM-CP). The cover member (DM-CC) covers the front surface of the plurality of insulating patterns (DM-CP) and can prevent foreign substances such as mucosa from leaving the plurality of insulating patterns (DM-CP). The cover member (DM-CC) may overlap the second area. A portion of the cover member (DM-CC) may overlap the first area. A portion of the cover member (DM-CC) may overlap the second sub-area (AR1-2).

The organic layer (TS-IL2) may cover the side and top surfaces of the cover member (DM-CC). Since the organic layer (TS-IL2) covers the side and top surfaces of the cover member (DM-CC), the organic layer (TS-IL2) can completely cover the impact alleviating member (DM-C) without exposing it.

Referring to FIG. 8D , in the display device according to an embodiment of the present invention, the buffer layer (BFL) may include a first buffer unit (BFL-A) and a second buffer unit (BFL-B). The first buffer unit (BFL-A) and the second buffer unit (BFL-B) may be spaced apart from each other. At least one opening (BFL-OP) may be defined between the first buffer unit (BFL-A) and the second buffer unit (BFL-B).

The first buffer unit (BFL-A) may be disposed on the second area. The first buffer unit BFL-A may overlap the second area AR2. The opening BFL-OP may be defined in the second area AR2. The opening BFL-OP may have a predetermined gap along the first direction DR1 and extend along the second direction DR2.

The organic layer (TS-IL2) may fill the opening (BFL-OP). As the organic layer (TS-IL2) fills the opening (BFL-OP), the organic layer (TS-IL2) covers the exposed sides of the first buffer unit (BFL-A) and the second buffer unit (BFL-B). can do.

The organic layer (TS-IL2) according to an embodiment of the present invention covers components that generate steps on the base member (BSM). Accordingly, the organic layer (TS-IL2) covers the end of the circuit layer (DP-CL) that creates a step on the base member (BSM), as shown in FIG. 8A, and as shown in FIGS. 8B and 8C. As such, it covers the impact cushioning member (DM-C). In addition, as shown in FIG. 8D, the concave stepped area is covered by covering the opening (BFL-OP) defined in the base member (BSM).

In the present invention, the organic layer (TS-IL2) disposed on top of the touch sensor layer (TS) covers the second area (AR2), which is the outermost part of the display module (DM), thereby alleviating the problem of cracks occurring in the outer portion. can do. In particular, when the impact alleviating member (DM-C) is disposed in the second area (AR2) or the opening (BFL-OP) of the buffer layer (BFL) is defined, the organic layer (TS-IL2) is formed by the impact alleviating member (DM-C). ) or filling the opening (BFL-OP) to relieve the stress generated during bending, the problem of cracks occurring at the outer edge can be alleviated.

Hereinafter, a method of manufacturing a display device according to an embodiment of the present invention will be described.

FIGS. 9A to 9I are cross-sectional views sequentially showing a method of manufacturing the display device shown in FIG. 8C.

As shown in FIGS. 9A and 9B, a base layer (SUB) is prepared. Functional layers such as a buffer layer (BFL) may be further disposed on one side of the base layer (SUB). At least one semiconductor pattern (OSP) is formed on the base layer (SUB), and the first insulating layer 10 is formed on the base layer (SUB) to cover the at least one semiconductor pattern (OSP).

As shown in FIG. 9C, a control electrode GE is formed on the first insulating layer 10. The control electrode GE is formed to be disposed on the semiconductor pattern OSP. The control electrode GE may be formed according to a photolithography process. The second insulating layer 20 is formed to cover the control electrode GE formed on the first insulating layer 10. The ends of the first insulating layer 10 and the ends of the second insulating layer 20 may be formed to be aligned side by side. Alternatively, the first insulating layer 10 and the second insulating layer 20 may be formed to entirely overlap the base layer SUB.

As shown in FIG. 9D, the method of manufacturing a display device according to an embodiment of the present invention includes etching a portion of the first insulating layer 10 and the second insulating layer 20. In the etching step, the outer portions of the first and second insulating layers 10 and 20 may be partially etched to form a plurality of insulating patterns (DM-CP). The plurality of insulating patterns (DM-CP) may include a first layer (DM-C1) and a second layer (DM-C2). The first layer (DM-C1) may be formed by etching a portion of the first insulating layer 10, and the second layer (DM-C2) may be formed by etching a portion of the second insulating layer 20. In the etching step, a through hole TH1 penetrating the first insulating layer 10 and the second insulating layer 20 may be formed on the semiconductor pattern OSP. A plurality of insulating patterns (DM-CP) may be formed simultaneously with the first insulating layer 10 and the second insulating layer 20 constituting the circuit layer (DP-CL) using one mask. Accordingly, the process time can be shortened and the process cost can be reduced.

As shown in FIG. 9E, an output electrode (DE), an input electrode (SE), a plurality of signal lines (CL), and a power supply line (E-VSS) can be formed on the second insulating layer 20. . A third insulating layer 30 may be formed on the second insulating layer 20 to cover the thin film transistor TR and a plurality of signal lines CL. The third insulating layer 30 may be formed to entirely overlap the first insulating layer 10 and the second insulating layer 20, and then be partially etched and patterned. At this time, the first layer (DM2-L1) of the second dam portion (DM2 in FIG. 8C) and the cover member (DM-CC) of the impact alleviating member (DM-C) may be formed. The first layer (DM2-L1) of the second dam portion may be formed to partially overlap the power supply line (E-VSS). The third insulating layer 30, the first layer of the second dam portion (DM2-L1), and the cover member (DM-CC) may include the same material. In the etching step, a through hole TH2 penetrating the third insulating layer 30 may be formed on the input electrode SE.

As shown in FIG. 9F, an anode (AE) and a connection electrode (E-CNT) connected to one of the output electrodes (SE) may be formed. The anode (AE) and connection electrode (E-CNT) may be formed on the same layer. An anode (AE) and a connection electrode (E-CNT) may be formed on the third insulating layer 30. The anode (AE) may penetrate the third insulating layer 30 and be connected to the thin film transistor (TR).

The connection electrode (E-CNT) may be electrically connected to the power supply line (E-VSS). The connection electrode (E-CNT) may receive the second voltage (ELVSS in FIG. 5A) from the power supply line (E-VSS). Although not shown, the connection electrode (E-CNT) may be formed to be partially disposed on the first layer (DM2-L1) of the second dam portion (DM2).

A light emitting unit (EU), a pixel defining layer (PDL), and a cathode (CE) may be formed on the third insulating layer 30. The light emitting unit (EU) is formed to be disposed between the anode (AE) and the cathode (CE). In the step of forming the pixel definition layer (PDL), the first dam portion (DM1) overlapping the power supply line (E-VSS) and the second dam portion (DM1) overlapping the first layer (DM2-L1) of the second dam portion (DM2) A layer (DM2-L2) can be formed. The pixel definition layer (PDL), the first dam portion (DM1), and the second layer (DM2-L2) may be formed through the same process and may include the same material.

As shown in FIG. 9g, a thin film encapsulation layer (TFE) can be formed on the display layer (DP-OLED). The thin film encapsulation layer (TFE) may be formed by sequentially stacking the first inorganic thin film (IOL10), the first organic thin film (OL1), and the second inorganic thin film (IOL20). The first organic thin film OL1 may be formed by providing a liquid organic monomer on the first inorganic thin film IOL10. The organic monomer does not overflow to the outside of the first dam portion (DM1) and the second dam portion (DM2) due to the first dam portion (DM1) and the second dam portion (DM2), and thus can be stably formed with a predetermined thickness.

As shown in FIG. 9H, a first touch insulating layer (TS-IL1) and a plurality of conductive patterns may be formed on the thin film encapsulation layer (TFE). A first touch insulating layer (TS-IL1) is formed on the thin film encapsulation layer (TFE), and signal lines (SL) and touch sensor portions (SP) are formed on the first touch insulating layer (TS-IL1). You can. The touch sensor units SP may be formed on the first sub-area AR1-1, and the signal lines SL may be formed on the second sub-area AR1-2.

As shown in FIG. 9I, the organic layer TS-IL2 may be formed on the first touch insulating layer TS-IL1. The organic layer (TS-IL2) is formed on the first touch insulating layer (TS-IL1) and entirely covers the plurality of conductive patterns.

The organic layer TS-IL2 may be formed to entirely overlap the first and second insulating layers 10 and 20 . The organic layer TS-IL2 may be formed to overlap the first sub-region AR1-1, the second sub-region AR1-2, and the second region AR2.

The organic layer TS-IL2 may be formed to cover the impact alleviating member DM-C formed on the second area AR2. The organic layer (TS-IL2) completely covers the touch layer (DP-CL) and extends from the touch sensor layer (TS) to cover the side and top surfaces of the impact alleviating member (DM-C). The organic layer (TS-IL2) covers the impact relief member (DM-C), which is the outermost component that creates a step on the base member (BSM), thereby relieving the stress generated during bending and causing cracks to occur on the outer portion. problems can be alleviated.

Although the present invention has been described above with reference to preferred embodiments, those skilled in the art or have ordinary knowledge in the relevant technical field should not deviate from the spirit and technical scope of the present invention as set forth in the claims to be described later. It will be understood that the present invention can be modified and changed in various ways within the scope of the present invention. Therefore, the technical scope of the present invention should not be limited to what is described in the detailed description of the specification, but should be defined by the scope of the patent claims.

DD: display device DM: display module
DP: Organic light emitting display panel TS: Touch sensor layer
SUB: base layer 10: first insulating layer
20: second insulating layer 30: third insulating layer
TS-IL2: Organic layer DM-C: Absence of impact relaxation

Claims (20)

A display panel including a base member, a circuit layer disposed on the base member, an impact alleviating member disposed on the base member, a display layer disposed on the circuit layer, and a thin film encapsulation layer disposed on the display layer; and
Includes a touch sensor layer disposed on the display panel,
The touch sensor layer includes a first conductive layer disposed on the display panel, a first insulating layer disposed on the first conductive layer, a second conductive layer disposed on the first insulating layer, and a first conductive layer disposed on the second conductive layer. and a second insulating layer, wherein the second insulating layer covers the impact alleviating member,
An end of the circuit layer protrudes further than an end of the thin film encapsulation layer, and a portion of the circuit layer not covered by the thin film encapsulation layer is in contact with the second insulating layer. delete According to claim 1,
A display device wherein a portion of the top surface of the display panel has a curved shape and a portion of the bottom surface of the touch sensor layer has a curved shape. According to claim 1,
A display device wherein an end of the first insulating layer is aligned with an end of the thin film encapsulation layer. According to claim 1,
The thin film encapsulation layer is a display device including a first inorganic thin film, an organic thin film, and a second inorganic thin film sequentially stacked. According to claim 1,
A display device wherein a portion of the upper surface of the thin film encapsulation layer has a curved shape, and a portion of the bottom surface of the touch sensor layer has a curved shape. According to claim 1,
A first area that overlaps the circuit layer and a second area that does not overlap the circuit layer are defined in the base member,
An end of the second insulating layer protrudes more toward the second area than an end of the first insulating layer. According to claim 1,
The display device wherein the first insulating layer is an inorganic layer. According to claim 1,
The display device wherein the second insulating layer is an organic layer. According to claim 1,
The touch sensor layer further includes an inorganic insulating layer disposed between the first conductive layer and the display panel, and the inorganic insulating layer is in direct contact with the display panel. According to claim 1,
A display device wherein the impact alleviating member includes patterns spaced apart from each other. According to claim 11,
The second insulating layer covers all of the patterns. According to claim 11,
The display device further includes a cover member that covers all of the patterns, and the second insulating layer completely covers the cover member. It includes a base member, a circuit layer disposed on the base member, a display layer disposed on the circuit layer, a thin film encapsulation layer disposed on the display layer, and a buffer layer disposed between the base member and the circuit layer and having a defined opening. a display panel; and
Includes a touch sensor layer disposed on the display panel,
The touch sensor layer includes a first conductive layer disposed on the display panel, a first insulating layer disposed on the first conductive layer, a second conductive layer disposed on the first insulating layer, and a first conductive layer disposed on the second conductive layer. a second insulating layer, wherein a portion of the second insulating layer fills the opening,
An end of the circuit layer protrudes further than an end of the thin film encapsulation layer, and a portion of the circuit layer not covered by the thin film encapsulation layer is in contact with the second insulating layer. According to claim 14,
A display device wherein a portion of the top surface of the display panel has a curved shape and a portion of the bottom surface of the touch sensor layer has a curved shape. According to claim 14,
A display device wherein the opening of the buffer layer does not overlap the circuit layer when viewed from a plan view. According to claim 14,
The display device wherein the opening of the buffer layer does not overlap the thin film encapsulation layer when viewed from a plan view. According to claim 14,
A display device wherein an end of the first insulating layer is aligned with an end of the thin film encapsulation layer. According to claim 14,
The display device wherein the first insulating layer is an inorganic layer and the second insulating layer is an organic layer. According to claim 14,
The touch sensor layer further includes an inorganic insulating layer disposed between the first conductive layer and the display panel, and the inorganic insulating layer is in direct contact with the display panel.

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