KR102542552B1 - Apparatus and method of measuring photocurrent mapping and noise current of heterojunction phototransistors - Google Patents

Abstract

The present invention implements a multifunctional two-dimensional heterojunction phototransistor having a p-WSe ₂ /n-WS ₂ /n-MoS ₂ structure, and the location of photocurrent generation according to gate bias through photocurrent mapping for the implemented heterojunction phototransistor. and measuring noise current according to the charge balance between electrons and holes. According to an embodiment of the present invention, an apparatus for photocurrent mapping and noise current measurement of a heterojunction phototransistor has a gate layer on a substrate formed, a channel layer is formed of WS ₂ on the formed gate layer, a drain layer is formed of WSe ₂ on the channel layer, and a source layer is formed of MOS ₂ to form p-WSe ₂ /n-WS ₂ / A heterojunction phototransistor having a heterojunction structure of an n-MoS ₂ structure and controlling a Fermi level of the channel layer by applying a gate bias to the channel layer, by light applied to the heterojunction phototransistor As the distribution and direction of the generated photocurrent are mapped by scanning photocurrent using a laser, the light is transmitted to the heterojunction phototransistor and a photocurrent mapping measurement unit that measures positions of photocurrent generation in the drain layer, the channel layer, and the source layer. When not applied, a noise current measuring unit may be included to convert a dark current according to a direction of the gate bias into a noise current and measure the noise current.

Description

Apparatus and method for photocurrent mapping and noise current measurement of heterojunction phototransistors

The present invention relates to technical ideas for photocurrent mapping measurement and noise current measurement of a heterojunction phototransistor, and implements a multifunctional two-dimensional heterojunction phototransistor having a p-WSe ₂ /n-WS ₂ /n-MoS ₂ structure, A technique for measuring the location of photocurrent generation according to a gate bias through photocurrent mapping for an implemented heterojunction phototransistor and measuring noise current according to a charge balance between electrons and holes.

Recently, transition metal dichalcogenide (TMDC), a two-dimensional material, has been actively researched for application to various electronic devices and photoelectric devices due to its excellent physical and electrical properties.

Optimization of photocurrent generation and charge balance is required for high-efficiency transition metal dichalcogenide-based optoelectronic devices.

In addition, ideal charge depletion conditions are required to generate low dark current for high-efficiency transition metal dichalcogenide-based photovoltaic devices.

However, photocurrent generation of single transition metal dichalcogenides is limited because there is not enough energy to split an exciton due to the high exciton binding energy (~0.897 eV).

In order to solve this unique problem, a method of controlling the internal potential by creating a heterojunction structure of different n-type and p-type semiconductors in the active channel region of the device has been studied.

For example, the heterojunction structure may include a p-n-n junction structure, and the p-n-n junction structure includes a p-n junction structure and an n-n junction structure.

In photoelectric devices, it is important to systematically identify the causes of photocurrent and noise to maximize photodetector figures of merit such as reactivity (AW ^-1 ) and detectability (D*, cmHz ^1/2 W ^-1 ).

However, the effects of the internal potential on the photocurrent generation efficiency and the effects of flicker noise and shot noise on the figure of merit have not been accurately identified to date.

Noise is a kind of signal that does not contain information as an unwanted signal that interferes with the transmission and processing of a desired signal.

Representatively, it can be separated into flicker noise, shot noise, and Johnson noise.

Flicker noise is noise contained in all measuring instruments and electronic products, and the cause of it has not yet been clearly identified.

Shot noise is generated the moment electric charges move when DC voltage is applied to the device, and it is like a phenomenon in everyday life when it rains.

The moment when raindrops departing from clouds reach the ground is different, and if you think of rain as electrons, different times occur when electrons reach the electrodes arriving from the departing electrode, which is very sensitive to external DC voltage and the resistance of the material. can be seen as noise.

Johnson noise is a weak noise generated when a material is slightly changed by the surrounding environment, and can be observed regardless of electrical characteristics.

Photocurrent is a current formed in a phototransistor by an externally applied light source. If the noise level of the phototransistor is as high as the photocurrent formed by light, the user can determine whether the signal read by the phototransistor is a signal caused by light or noise. hard to tell apart

Therefore, as the dark current and noise are lower, the phototransistor can accurately detect light even with a smaller signal, which may be related to the detection capability of the phototransistor device.

In general, when the dark current of a phototransistor device increases, noise also tends to increase at the same time.

Therefore, when the dark current is lowered, the noise is also lowered, and this may be related to the detection ability of the phototransistor to detect a very small signal (light, laser, light source) applied from the outside to the phototransistor.

Korean Patent Publication No. 2019-0137721, "Superlattice structure including two-dimensional material and device having the same" Korean Patent Registration No. 10-2270928, "Optical sensor" US Patent Publication No. 2020/0335637, "TWO-DIMENSIONAL ELECTROSTRICTIVE FIELD EFFECT TRANSISTOR (2D-EFET)" Korean Patent Registration No. 10-2153945, "Electronic device using two-dimensional semiconductor material"

The present invention implements a multifunctional two-dimensional heterojunction phototransistor having a p-WSe ₂ /n-WS ₂ /n-MoS ₂ structure, and the location of photocurrent generation according to gate bias through photocurrent mapping for the implemented heterojunction phototransistor. is measured, and the purpose is to measure the noise current according to the charge balance between electrons and holes.

The present invention provides a method for generating a photocurrent by selectively applying a gate bias corresponding to electrostatic doping to an n-WS ₂ layer in a multifunctional two-dimensional heterojunction phototransistor having a p-WSe ₂ /n-WS ₂ /n-MoS ₂ structure. It aims to control the charge balance by changing the charge carrier balance between the heterojunction layers.

An object of the present invention is to measure the type of photocurrent and the location of photocurrent generation by performing photocurrent mapping along two different diode directions in a p-n junction and an n-n junction in a heterojunction phototransistor.

The present invention measures flicker noise and shot noise according to the charge balance of electrons and holes related to the formation of a depletion layer in a heterojunction phototransistor to obtain an optical device using a low-dimensional semiconductor ( Example: The purpose is to analyze the signal-to-noise ratio of solar devices, etc.).

According to an embodiment of the present invention, an apparatus for photocurrent mapping and noise current measurement of a heterojunction phototransistor includes a gate layer formed on a substrate, a channel layer formed of WS ₂ on the gate layer, and a channel layer formed on the channel layer. The drain layer is formed of WSe ₂ and the source layer is formed of MOS ₂ to have a p-WSe ₂ /n-WS ₂ /n-MoS ₂ heterojunction structure, and a gate bias is applied to the channel layer to form the channel A heterojunction phototransistor in which the Fermi level of the layer is controlled, and the distribution and direction of photocurrent generated by light applied to the heterojunction phototransistor are mapped by scanning photocurrent using a laser to map the drain layer and the channel. When the light is not applied to the heterojunction phototransistor and the photocurrent mapping measurement unit for measuring the location of the photocurrent generation in the layer and the source layer, the dark current according to the direction of the gate bias is converted into a noise current. It may include a noise current measuring unit to measure.

The gate layer may be formed of h-BN, and a gate electric field effect by the gate bias may be transferred to the channel layer through the h-BN.

In the heterojunction phototransistor, the drain layer and the channel layer form a p-n junction, the channel layer and the source layer form an n-n junction, and a gate bias is applied to the channel layer to form a Fermi level of the channel layer ( As the Fermi level) is controlled, charge balance can be controlled in the p-n junction and the n-n junction.

The photocurrent mapping measuring unit performs scanning photocurrent mapping using the laser in two different diode directions with the p-n junction and the n-n junction, and a first region corresponding to the p-n junction and a third region corresponding to the n-n junction It is possible to create a photocurrent map that measures and displays the location and size of the photocurrent generated by the photovoltaic effect (PVe) and the location and size of the photocurrent induced by the photoconductive effect (PCe) in the region. .

The heterojunction phototransistor has an open circuit voltage (V _OC ) and a photovoltaic effect in the first region corresponding to the pn junction when the gate bias is lower than the threshold level when the gate bias is applied to the channel layer. (photovoltaic effect, PVe) appears, and when the level of the gate bias is equal to the threshold level, the open circuit voltage (V _OC ) is reduced in the second region corresponding to between the pn junction and the nn junction, When the level of the gate bias is greater than the critical level, a direct tunneling effect may be generated as a potential barrier between conduction bands in the third region corresponding to the nn junction is narrowed.

In the heterojunction phototransistor, when the photovoltaic effect (PVe) is more generated than the photoconductive effect (PCe) in the first region and the electron concentration of the channel layer is increased in the third region, Due to the influence of a depletion layer at the interface of the source layer, the photoconductive effect (PCe) may be more generated than the photovoltaic effect (PVe).

The noise current measuring unit detects a dark current in any one of a first region in which the drain layer and the channel layer form a p-n junction and a third region in which the channel layer and the source layer form an n-n junction The dark current may be converted into a short noise current using the electron charge and the electron charge.

The noise current measuring unit may determine the flicker noise current by applying a magnification according to the magnitude of the dark current to the converted short noise current.

According to one embodiment of the present invention, a photocurrent mapping and noise current measuring method of a heterojunction phototransistor includes a gate layer formed on a substrate, a channel layer formed of WS ₂ on the formed gate layer, and a channel layer formed on the channel layer. In a heterojunction phototransistor having a heterojunction structure in which a drain layer is formed of WSe ₂ and a source layer is formed of MOS ₂ and has a p-WSe ₂ /n-WS ₂ /n-MoS ₂ structure, a gate bias is applied to the channel layer is applied to control a Fermi level of the channel layer; In the photocurrent mapping measuring unit, the distribution and direction of the photocurrent generated by the light applied to the heterojunction phototransistor is mapped using a laser to scan the photocurrent, and thus the location of the photocurrent generation in the drain layer, the channel layer, and the source layer. measuring; and converting and measuring a dark current according to a direction of the gate bias into a noise current when the light is not applied to the heterojunction phototransistor in a noise current measuring unit.

In the heterojunction phototransistor, the drain layer and the channel layer form a p-n junction, the channel layer and the source layer form an n-n junction, and a gate bias is applied to the channel layer to form a Fermi level of the channel layer ( As the Fermi level) is controlled, charge balance can be controlled in the p-n junction and the n-n junction.

The step of measuring the location of photocurrent generation in the drain layer, the channel layer, and the source layer by mapping the distribution and direction of the photocurrent generated by the light applied to the heterojunction phototransistor using a laser by scanning photocurrent,

Scanning photocurrent mapping is performed using the laser for two different diode directions with the p-n junction and the n-n junction, and a photovoltaic effect is performed in a first region corresponding to the p-n junction and a third region corresponding to the n-n junction. and generating a photocurrent map measuring and displaying the location and size of the photocurrent generated by the photovoltaic effect (PVe) and the location and size of the photocurrent induced by the photoconductive effect (PCe).

The heterojunction phototransistor has an open circuit voltage (V _OC ) and a photovoltaic effect in the first region corresponding to the pn junction when the gate bias is lower than the threshold level when the gate bias is applied to the channel layer. (photovoltaic effect, PVe) appears, and when the level of the gate bias is equal to the threshold level, the open circuit voltage (V _OC ) is reduced in the second region corresponding to between the pn junction and the nn junction, When the level of the gate bias is greater than the critical level, a direct tunneling effect may be generated as a potential barrier between conduction bands in the third region corresponding to the nn junction is narrowed.

In the heterojunction phototransistor, when the photovoltaic effect (PVe) is more generated than the photoconductive effect (PCe) in the first region and the electron concentration of the channel layer is increased in the third region, Due to the influence of a depletion layer at the interface of the source layer, the photoconductive effect (PCe) may be more generated than the photovoltaic effect (PVe).

When the light is not applied to the heterojunction phototransistor, the step of converting and measuring the dark current according to the direction of the gate bias into noise current,

Dark current and electron charge in any one of a first region in which the drain layer and the channel layer form a p-n junction and a third region in which the channel layer and the source layer form an n-n junction converting the dark current into a short noise current using charge and determining a flicker noise current by applying a magnification according to the magnitude of the dark current to the converted short noise current can do.

The present invention implements a multifunctional two-dimensional heterojunction phototransistor having a p-WSe ₂ /n-WS ₂ /n-MoS ₂ structure, and the location of photocurrent generation according to gate bias through photocurrent mapping for the implemented heterojunction phototransistor. , and the noise current according to the charge balance between electrons and holes can be measured.

The present invention provides a method for generating a photocurrent by selectively applying a gate bias corresponding to electrostatic doping to an n-WS ₂ layer in a multifunctional two-dimensional heterojunction phototransistor having a p-WSe ₂ /n-WS ₂ /n-MoS ₂ structure. By changing the charge carrier balance between the heterojunction layers, the charge balance can be controlled.

According to the present invention, photocurrent mapping is performed along two different diode directions in a p-n junction and an n-n junction in a heterojunction phototransistor to measure the photocurrent type and photocurrent generation location.

The present invention measures flicker noise and shot noise according to the charge balance of electrons and holes related to the formation of a depletion layer in a heterojunction phototransistor to obtain an optical device using a low-dimensional semiconductor ( For example, the signal-to-noise ratio of solar devices, etc.) can be analyzed.

1 is a diagram illustrating an apparatus for mapping photocurrent and measuring noise current of a heterojunction phototransistor according to an embodiment of the present invention.
2A and 2B are views illustrating a heterojunction phototransistor according to an embodiment of the present invention.
3A to 3C are views illustrating a coupling structure of a heterojunction phototransistor according to an embodiment of the present invention.
4A and 4B are diagrams illustrating optoelectronic characteristics of a heterojunction phototransistor according to an embodiment of the present invention.
5 is a diagram illustrating cascade band alignment of a heterojunction phototransistor according to an embodiment of the present invention.
6A to 6C are diagrams illustrating measurement of photocurrent mapping of a heterojunction phototransistor according to an embodiment of the present invention.
7A to 7D are diagrams illustrating an annealing process for a heterojunction phototransistor according to an embodiment of the present invention.
8 is a diagram illustrating a transient zone related to photocurrent mapping measurement of a heterojunction phototransistor according to an embodiment of the present invention.
9A to 9F are views illustrating noise current measurement of a heterojunction phototransistor according to an embodiment of the present invention.
10A and 10B are views illustrating time-resolved photocurrent responses in pn and nn junctions of a heterojunction phototransistor according to an embodiment of the present invention.

Specific structural or functional descriptions of the embodiments according to the concept of the present invention disclosed in this specification are only illustrated for the purpose of explaining the embodiments according to the concept of the present invention, and the embodiments according to the concept of the present invention These may be embodied in various forms and are not limited to the embodiments described herein.

Embodiments according to the concept of the present invention can apply various changes and can have various forms, so the embodiments are illustrated in the drawings and described in detail herein. However, this is not intended to limit the embodiments according to the concept of the present invention to specific disclosures, and includes modifications, equivalents, or substitutes included in the spirit and scope of the present invention.

Terms such as first or second may be used to describe various components, but the components should not be limited by the terms. The above terms are used only for the purpose of distinguishing one component from another component, for example, without departing from the scope of rights according to the concept of the present invention, a first component may be named a second component, Similarly, the second component may also be referred to as the first component.

It is understood that when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, but other elements may exist in the middle. It should be. On the other hand, when an element is referred to as “directly connected” or “directly connected” to another element, it should be understood that no other element exists in the middle. Expressions describing the relationship between components, such as "between" and "directly between" or "directly adjacent to" should be interpreted similarly.

Terms used in this specification are only used to describe specific embodiments, and are not intended to limit the present invention. Singular expressions include plural expressions unless the context clearly dictates otherwise. In this specification, terms such as "comprise" or "have" are intended to designate that an embodied feature, number, stage, operation, component, part, or combination thereof exists, but one or more other features or numbers, It should be understood that the presence or addition of stages, operations, components, parts, or combinations thereof is not precluded.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which the present invention belongs. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning in the context of the related art, and unless explicitly defined in this specification, it should not be interpreted in an ideal or excessively formal meaning. don't

Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. However, the scope of the patent application is not limited or limited by these examples. Like reference numerals in each figure indicate like elements.

1 is a diagram illustrating an apparatus for mapping photocurrent and measuring noise current of a heterojunction phototransistor according to an embodiment of the present invention.

Referring to FIG. 1 , an apparatus 100 for mapping photocurrent and measuring noise current of a heterojunction phototransistor according to an embodiment of the present invention includes a heterojunction phototransistor 110, a photocurrent mapping measuring unit 120, and a noise current measuring unit. (130).

An apparatus 100 for mapping photocurrent and measuring noise current of a heterojunction phototransistor according to an embodiment of the present invention selectively applies electrostatic doping to a specific layer to generate a photocurrent when light is incident on charge between heterojunction layers The carrier balance can be modulated.

In addition, the photocurrent mapping and noise current measuring apparatus 100 of the heterojunction phototransistor may identify a location where photocurrent is generated in an operation switching region of the heterojunction phototransistor by using the photocurrent mapping.

In addition, the photocurrent mapping and noise current measurement apparatus 100 of the heterojunction phototransistor measures noise current for analyzing the effect on the photosensitivity and detection rate of a unit active area in p-WSe ₂ /n-WS ₂ /n-MoS ₂ can do.

In the heterojunction phototransistor 110 according to an embodiment of the present invention, a gate layer is formed on a substrate, a channel layer is formed of WS ₂ on the formed gate layer, and a drain layer is formed of WSe ₂ on the channel layer. And, the source layer may be formed of MOS ₂ to have a heterojunction structure of p-WSe ₂ /n-WS ₂ /n-MoS ₂ structure.

Also, in the heterojunction phototransistor 110 , a gate bias may be applied to a channel layer so that a Fermi level of the channel layer may be controlled.

For example, the gate layer is formed of h-BN, and a gate electric field effect by a gate bias may be transferred to the channel layer through the h-BN.

According to an embodiment of the present invention, in the heterojunction phototransistor 110, the drain layer and the channel layer form a p-n junction, and the channel layer and the source layer form an n-n junction.

In addition, in the heterojunction phototransistor 110 , a gate bias is applied to the channel layer to control a Fermi level of the channel layer, so that charge balance can be controlled at the p-n junction and the n-n junction.

According to one embodiment of the present invention, the heterojunction phototransistor 110 may generate a photovoltaic effect (PVe) more than a photoconductive effect (PCe) in the first region.

In addition, in the heterojunction phototransistor 110, when the electron concentration of the channel layer increases in the third region, the photoconductive effect is greater than the photovoltaic effect (PVe) due to the influence of the depletion layer at the interface of the source layer. A photoconductive effect, PCe) may further occur.

Here, the first region may be a region where the drain layer and the channel layer form a p-n junction, and the third region may be a region where the channel layer and the source layer form an n-n junction.

For example, the photovoltaic effect (PVe) is an energy generating effect, and an internal potential existing at a junction generates a current (Short-Circuit Current, ISC) and a voltage (Open-Circuit Volt, VOC) without an external voltage.

For example, the photoconductive effect (PCe) refers to an external electric field generated by an external bias-generated photocurrent, and since an external bias is required to generate the photocurrent, effects such as VOC and ISC cannot be exhibited.

Therefore, in the heterojunction phototransistor 110 of the present invention, the photocurrent formation mechanism can be classified into a photovoltaic effect and a photoconductive effect through a photocurrent mapping result according to a gate voltage bias.

According to an embodiment of the present invention, the photocurrent mapping measurement unit 120 maps the distribution and direction of photocurrent generated by light applied to the heterojunction phototransistor by using a laser to scan the photocurrent to map the drain layer, the channel layer, and the source layer. The location of the photocurrent generation in the layer can be measured.

Specifically, the photocurrent mapping measuring unit 120 performs scanning photocurrent mapping using a laser for photocurrent mapping in two different diode directions with a p-n junction between the drain layer and the channel layer and an n-n junction between the channel layer and the source layer. can be done

In addition, the photocurrent mapping measuring unit 120 measures the position and size of the photocurrent generated by the photovoltaic effect (PVe) in the first region corresponding to the p-n junction and the third region corresponding to the n-n junction and the photoconductive effect ( A photocurrent map that measures and displays the position and magnitude of the photocurrent induced by the photoconductive effect can be created.

Therefore, a photovoltaic effect (PVe) is generated more than the photoconductive effect in the first region of the heterojunction phototransistor 110, and a channel channel in the third region of the heterojunction phototransistor 110. It can be confirmed that when the electron concentration of the layer is increased, a photoconductive effect is generated more than a photovoltaic effect (PVe) due to the influence of a depletion layer at the interface of the source layer.

According to an embodiment of the present invention, the noise current measurement unit 130 converts the dark current according to the direction of the gate bias into noise current when no light is applied to the heterojunction phototransistor 110 and measures the noise current. can Here, when no light is applied, it may indicate a dark state without light.

For example, the noise current measuring unit 130 measures the dark current (dark current) in any one of a first region in which the drain layer and the channel layer form a p-n junction and a third region in which the channel layer and the source layer form an n-n junction. A dark current can be converted into a short noise current using current and electron charge.

That is, the noise current measurement unit 130 may measure the shot noise current using Equation 1 below.

[Equation 1]

In Equation 1, i _SN may represent shot noise, q may represent electron charge, and I _dark may represent dark current.

According to an embodiment of the present invention, the noise current measurement unit 130 may determine the flicker noise current by applying a magnification according to the magnitude of the dark current to the converted short noise current.

That is, the noise current measurement unit 130 may determine the flicker noise current using the shot noise current according to the relational expression of the noise power density.

For example, the noise current measurer 130 may determine the flicker noise current using Equation 2 below.

[Equation 2]

In Equation 2, D* can represent the detectability, R can represent the reactivity, A can represent the active area of the detector, B can represent the bandwidth, i _FN can represent the flicker noise current and NEP may correspond to flicker noise current divided by reactivity.

Also, based on the apparatus for mapping photocurrent and measuring noise current of a heterojunction phototransistor described in FIG. 1 , a method for mapping photocurrent and measuring noise current of a heterojunction phototransistor may be implemented.

Therefore, the present invention implements a multifunctional two-dimensional heterojunction phototransistor having a p-WSe ₂ /n-WS ₂ /n-MoS ₂ structure, and generates a photocurrent according to a gate bias through photocurrent mapping for the implemented heterojunction phototransistor. By measuring the position of , the noise current according to the charge balance between electrons and holes can be measured.

2A and 2B are views illustrating a heterojunction phototransistor according to an embodiment of the present invention.

2A illustrates a structural diagram of a heterojunction phototransistor according to an embodiment of the present invention.

Referring to FIG. 2A , a heterojunction phototransistor 200 according to an embodiment of the present invention includes a gate layer 201 , a channel layer 202 , a drain layer 203 and a source layer 204 .

The gate layer 201 is formed of h-BN, the channel layer 202 is formed of WS ₂ , the drain layer 203 is formed of WSe ₂ , and the source layer 204 is formed of MoS ₂ As p -WSe ₂ /n-WS ₂ /n-MoS ₂ It is implemented as a multifunctional two-dimensional heterojunction phototransistor 200 having a structure.

According to an embodiment of the present invention, the heterojunction phototransistor 200 forms a pnn junction by stacking WS _e2 as a p-type semiconductor and MoS ₂ as an n-type semiconductor at both ends of a WS ₂ layer.

Referring to FIG. 2B , in the heterojunction phototransistor 210 according to an embodiment of the present invention, the gate electrode 211 is positioned under the gate layer, the drain electrode 212 is positioned on the drain layer, and the source layer is positioned on the drain layer. A source electrode 213 is positioned to receive a gate bias through the gate electrode 211 and a drain bias through the drain electrode 212 .

For example, the source and drain electrodes may be selectively deposited on MoS ₂ and WSe ₂ stacked on WS ₂ using PMMA mask electron beam lithography (EBL), respectively.

3A to 3C are views illustrating a coupling structure of a heterojunction phototransistor according to an embodiment of the present invention.

3A illustrates an optical image related to a coupling structure of a heterojunction phototransistor according to an embodiment of the present invention.

Referring to FIG. 3A , an optical image 300 of a heterojunction phototransistor is divided into a gate region 301 , a channel region 302 , a source region 303 and a drain region 304 .

For example, the optical image 300 shows a structure similar to a photocurrent mapping map that visualizes a photocurrent mapping result.

3B illustrates a Raman spectroscopy result for a heterojunction phototransistor according to an embodiment of the present invention.

Referring to FIG. 3B , a graph 310 is obtained by observing in-plane (E ¹ _2g ) and out-of-plane (A _1g ) vibration modes for each material, such that a drain layer formed of WSe ₂ , a channel layer formed of WS ₂ , and MoS ₂ It illustrates that the source layer and the h-BN dielectric layer formed of can be identified by Raman spectroscopy.

Figure 3c illustrates a schematic diagram of the interfacial exciton generation and separation mechanism in the van der Waals gap of the MoS ₂ -WS ₂ -WSe ₂ heterojunction.

Referring to FIG. 3C , a schematic diagram shows MoS ₂ (321), WS ₂ (322), and WSe ₂ (323) and illustrates electron and hole movement (324).

Even if each layer forming the heterojunction phototransistor forms a van der Waals heterojunction, there is no primary chemical bond structure in the z-axis and all laminated layers are isolated, so the vibration energy of each layer does not show a large change.

The van der Waals gap in the z-axis of a two-dimensional material plays an important role as an interlayer charge separation barrier.

Therefore, two-dimensional materials have the advantage of efficiently collecting free carriers based on excellent charge mobility in the x-y plane to maximize optoelectronic properties.

4A and 4B are diagrams illustrating optoelectronic characteristics of a heterojunction phototransistor according to an embodiment of the present invention.

4A illustrates current mapping according to changes in gate bias and drain bias applied to a heterojunction phototransistor according to an embodiment of the present invention.

FIG. 4B illustrates the photocurrent mapping results at an incident light power of 52 μW cm ⁻² under the same bias condition as in FIG. 4A and in a current range of 0.3 to 100 nA.

Referring to the graph 400 of FIG. 4A , a gate bias from 1.5V _G to 0.5V _G and a drain bias from -1V _D to 1V _D are applied to the heterojunction phototransistor.

The current mapping shows a typical diode transition of -0.5VG in the reverse cooling region 402 and forward heating region 401 as a function of the applied gate and drain voltages.

In particular, the threshold voltage (VTh) indicated by the black dotted line represents two different diode orientations proportional to the critical barrier of qVbi = p-n at the relative p-n junction.

where q is the electron charge and represents the work function. Shifting the Fermi level of WS ₂ as a function of the gate bias can change the threshold barrier of the WSe ₂ and MoS ₂ junctions.

1.3 eV이며, 페르미 레벨 정렬에 따른 접합의 Vbi는 다음 p-n 접합 공식인 하기 수학식 3을 사용하여 추정할 수 있다.The bulk band gap (Eg) of transition metal dichalcogenide (TMDC), a two-dimensional material, is about

1.3 eV, and the Vbi of the junction according to the Fermi level alignment can be estimated using Equation 3, which is the following pn junction formula.

[Equation 3]

In Equation 3, N _C may represent the effective concentration of electrons in the conduction band, N _V may represent the effective concentration of holes in the valence band, and N' _D and N' _A respectively represent the net donor and acceptor concentrations. can indicate

Since only the Fermi level of WS ₂ (N _C /N' _D ) can be tuned as a function of the gate bias, N _V /N' _A can be regarded as a constant.

Accordingly, the change in the threshold voltage (V _Th ) depends on the change in qVbi according to the gate bias applied to WS ₂ .

When white light (52 μW cm ⁻² ) illuminates the device, a photovoltaic effect can be observed as shown in the graph 410 of FIG. 4B.

In the graph 410, it may be divided into a first area 411, a second area 412, and a third area 413.

The first region 411 is a pn junction where V _OC is maintained, the second region 412 is a temporary region where V _OC is reduced, and the third region 413 may include an nn junction where V _OC disappears. .

In the diode cooling region 402 of the graph 400, it can be seen that the net current is increased from 10 ⁻¹² A to 10 ⁻⁹ A due to photocurrent generation.

A typical photovoltaic effect was observed in the specific gate range -1.5V _G to -0.5V _G and gradually disappeared above the -0.5V _G region.

The measured open circuit voltage (V _OC ) in the range of -0.9 V _G to -0.7 V _G is 0.42 V, which can be higher than the 0.33 V observed in the previously reported BP/WS ₂ heterojunction device.

5 is a diagram illustrating cascade band alignment of a heterojunction phototransistor according to an embodiment of the present invention.

5 illustrates an energy venn diagram showing a photoelectric effect in a heterojunction phototransistor according to an embodiment of the present invention.

Referring to FIG. 5 , an energy venn diagram 500 of a first region where the gate bias is less than the threshold value, an energy venn diagram 510 of the second region where the gate bias and the threshold value are the same, and a gate bias greater than the threshold value An energy venn diagram 520 of three regions is illustrated.

Referring to Energy Venn Diagram 500, Energy Venn Diagram 510, and Energy Venn Diagram 520, the applied gate bias affects only the _WS2 layer (capacitor symbol), so only the _WS2 layer in the heterojunction band diagram is Fermi Show level shift.

The Fermi level shift of WS ₂ related to the gate bias will be additionally described using FIGS. 7A to 7D .

The energy venn diagram 500 shows the photovoltaic effect with white light (52 μW cm ⁻² ) and V _OC .

The energy venn diagram (510) shows that the band offsets of WSe ₂ and WS ₂ are smaller than the energy venn diagram (500), so that V _OC almost disappears.

As the potential barrier between the conduction bands of WS ₂ and WSe ₂ in the energy venn diagram 520 becomes narrower, the transmission between WSe ₂ and WS ₂ includes direct tunneling similar to previous reports.

In the heterojunction phototransistor, when a gate bias is applied to the channel layer and the level of the gate bias is less than a threshold level, a photovoltaic effect (V OC ) and an open circuit voltage (V _OC ) are generated in the first region corresponding to the pn junction. PVe) may appear.

Also, in the heterojunction phototransistor, when the level of the gate bias is equal to the threshold level, the open circuit voltage V _OC may be reduced in the second region between the pn junction and the nn junction.

In addition, in the heterojunction phototransistor, when the gate bias level is greater than the critical level, a direct tunneling effect is generated as the potential barrier between the conduction bands is narrowed in the third region corresponding to the n-n junction. can

6A to 6C are diagrams illustrating measurement of photocurrent mapping of a heterojunction phototransistor according to an embodiment of the present invention.

6A illustrates a photocurrent mapping result measured at -0.3V _G , -0.5V _D , 0V _D , and 0.5V _D , respectively, of the transition state of the second region of the heterojunction phototransistor.

FIG. 6B illustrates photocurrent mapping results measured at -6V _G, -1V _G , and -0.9V _G at -1 V _D of the pn junction of the first region of the heterojunction phototransistor, respectively.

FIG. 6C illustrates photocurrent mapping results measured at -0.5V _G, -0.3V _G , and -0.2V _G at 1 V _D of the nn junction of the third region of the heterojunction phototransistor, respectively.

1 nA)가 중첩 접합 영역이 아닌 WS₂와 WSe₂의 접촉 라인에서만 관찰됨을 보여준다.Referring to the image 600 of FIG. 6A , the image 601 shows a strong photocurrent (

1 nA) is observed only in the contact line of WS ₂ and WSe ₂ , not in the overlapping junction area.

The photocurrent generation direction tends to extend from the contact line to the center of the WS ₂ layer.

Since the MoS ₂ layer is grounded and the drain bias is applied only to the WSe ₂ layer, a contact line having a low potential barrier in the reverse bias direction can show active photocurrent generation.

As shown in image 603, positive 0.5V _D can produce photocurrent only on the WS ₂ and MoS ₂ contact lines.

This result may mean that the external V _D changes the thickness and location of the depletion layer.

The thickness of the depletion layer can be confirmed by Equation 4 below, which is a function of external V _D .

[Equation 4]

In Equation 4, w represents the thickness of the depletion layer, V _bi represents energy for overcoming exciton coupling, and V _D represents a drain voltage bias.

Therefore, as shown in image 602, two different heterojunction contact lines at 0 V _D generated photocurrents in different directions and gradually disappeared at the center of the WS ₂ layer.

In the heterojunction structure, the thickness of the depletion layer and the ratio of the depletion layer may be determined using Equation 4 below.

[Equation 5]

In Equation 5, w _n may represent the thickness of the depletion layer, and N'D and N' _A may represent the net donor and acceptor concentrations, respectively.

As the value of N' _D increases, the thickness _wn of the depletion layer becomes insufficient due to the decrease in _wTotal , and thus the photocurrent generated by the drain bias of the WS ₂ layer may increase more than the photocurrent generated by the built-in barrier.

This phenomenon can match the photocurrent distribution formed in a single 2D material-based phototransistor.

Referring to the image 610 of FIG. 6B, the image 611 generates a photocurrent (1.9-1.5 nA) by a photovoltaic effect (PVe) due to a drain bias applied to the WS ₂ layer in each heterojunction region, and photoconductivity It shows that the photocurrent (under 1 nA) induced by the effect (PCe) is generated on the contact line at both ends.

On the other hand, the n-n junction of the image 621 of FIG. 6C exhibits a lower unit photocurrent than the p-n junction due to a weak depletion effect.

These results indicate that the low unit photocurrent is effective for electron extraction but not sufficient for hole extraction compared to the p–n junction.

109Ω)에 의해 증가한 것을 확인할 수 있다.In the conditions of -1 V _G and -0.9 V _G in images 612 and 613 of Fig. 6b, the photocurrent induced by PVe decreased due to the decrease in depletion width, whereas the photocurrent induced by PCe exhibited a tunneling rather than a rectifying behavior. effect(

10 9 Ω).

When the Fermi level of WS ₂ is close enough to the conduction band, the MoS ₂ contact area forms a second diode barrier.

Images 622 and 623 of FIG. 6C show that the fully degenerated Fermi level of WS ₂ in the conduction band induces photocurrent diffusion in the contact line.

Referring to FIGS. 6A to 6C , it can be confirmed that the photocurrent generated in the heterojunction phototransistor according to an embodiment of the present invention can be controlled according to the bias of the gate voltage.

Accordingly, the present invention generates a photocurrent by selectively applying a gate bias corresponding to electrostatic doping to the n-WS ₂ layer in a multifunctional two-dimensional heterojunction phototransistor having a p-WSe ₂ /n-WS ₂ /n-MoS ₂ structure. The charge balance can be controlled by changing the charge carrier balance between the heterojunction layers to do so.

In addition, the present invention can measure the type of photocurrent and the location of photocurrent generation by performing photocurrent mapping along two different diode directions in a p-n junction and an n-n junction in a heterojunction phototransistor.

7A to 7D are diagrams illustrating an annealing process for a heterojunction phototransistor according to an embodiment of the present invention.

7A and 7B illustrate transfer curves of 52 W cm ⁻¹ white incident light at a forward drain bias of ±1 V _D as a function of gate bias double sweep in a heterojunction phototransistor.

7c and 7d illustrate transfer curves for understanding the solar effect under the same measurement conditions at 0 V _D bias.

Graphs 700 and 720 in FIGS. 7A and 7C are controls, and graphs 710 and 730 in FIGS. 7B and 7D are the results after p-type doping and annealing showing an optimal charge balance trend. .

The results of the graphs 710 and 730 of FIGS. 7B and 7D are results of annealing to improve the hole characteristics of WSe ₂ .

Annealing at 200 °C in air can form a self-limiting oxide layer of WSe ₂ (WO _x ) on the surface to control surface receptors.

It can be seen that the annealing time of about 1 hour reaches the limit of the oxide film, and there is no change in properties any more.

In addition, stronger Hall characteristics can be obtained in ozone O ₃ and a temperature environment of 100° C., but the annealing conditions described above can be used to evaluate device characteristics in an air atmosphere.

It can be confirmed that the hole characteristics of WSe ₂ sufficiently enhanced after annealing improve the rectification characteristics related to the first magnitude current of 10 ⁻⁸ A to 10 ⁻⁹ A by forming a sufficient thickness of the depletion layer at the interface with WS ₂ .

In addition, the photovoltaic effect lowers the rectified current characteristics, and it can be seen that a more efficient pn junction is formed as the photocurrent increases and the rectified current level is lowered from 10 ⁻¹² A to 10 ⁻¹³ A.

On the other hand, the tendency for the primary current to decrease from 10 ^-11 A to 10 ^-10 A of the secondary diode rectification characteristic formed at the nn junction is also confirmed.

8 is a diagram illustrating a transient zone related to photocurrent mapping measurement of a heterojunction phototransistor according to an embodiment of the present invention.

Graph 800 of FIG. 8 is the transient output curve of the transition region as a function of -0.3 V _G , with -0.5V D corresponding to line 801 , 0V _D corresponding to line 802 and 0V _D corresponding to line 803 . 6a to 6c indexed at the corresponding 0.5 V _D .

9A to 9F are views illustrating noise current measurement of a heterojunction phototransistor according to an embodiment of the present invention.

Graph 900 of FIG. 9A shows noise power density as a function of Hertz from -1 V _D to -0.7 V _G to -0.2 V _G .

Graph 930 of FIG. 9D shows the noise power density as a Heritz function from 1V _D to 0.2V _G and from 0.3V _G to 0.7V _G .

Lines 901 and 931 in graphs 900 and 930 are guide lines below 100 Hz, respectively.

Photocurrent measurements were processed under 1Hz chopped conditions, and lines 901 and 931 can represent noise power density levels.

Graph 910 in FIG. 9B and graph 940 in FIG. 9E show transfer curves of ±1 V _D in the transient gate bias range of diode 1 and diode 2, respectively.

Graph 920 in FIG. 9C and graph 950 in FIG. 9F show flicker noise and shot noise at -1 V _D and 1 V _D reverse bias of the pn and nn junctions.

Graph 910 shows the transfer curves of the measured pn junction diode as a function of gate bias at forward (+1V _G ) and reverse (-1V _G ) biases in dark conditions.

Dark current as a function of gate bias can be converted to shot noise and flicker noise currents.

A current level of 10 ^-10 A at -0.7V _G in graph 900 indicates a noise floor operation around 10 ^-26 A ² Hz ^-1 .

A current level of 10 ^-9 A at -0.6V _G starts to show a flicker noise current at a sub-log linear fit (1/f)α.

Graph 920 compares flicker noise and shot noise current as a function of gate bias.

According to the graph 920, it is possible to extract the flicker noise current at 1 Hz, and it can be confirmed that the flicker noise size is 10 times higher than the shot noise in the low dark current range of 10 ^-10 A.

As the dark current increases, the flicker noise current can gradually increase up to 1000 times the shot noise.

On the other hand, it can be confirmed that the dark current (6 × 10 ^-11 A) of the nn junction diode is much higher than the dark current (2 × 10 ^-12 A) of the pn junction diode as shown in the graph 940 . This is because the rectification ratio of the nn junction diode is not good.

The behavior of the flicker noise current in an n-n junction device can be similar to that of a p-n junction diode.

As shown in graph 940, the flicker noise current measured at 0.2V _G appears to be inversely proportional to the dark current.

Vacancies and chemical traps on the channel surface can affect the magnitude of the flicker noise current, and the gated field-effect diode can be expected to be highly dependent on junction capacitance as a function of depletion layer thickness, as detailed in section .

Therefore, the present invention measures flicker noise and shot noise according to the charge balance of electrons and holes related to the formation of a depletion layer in a heterojunction phototransistor to obtain light using a low-dimensional semiconductor. The signal-to-noise ratio of devices (e.g., photovoltaic devices, etc.) can be analyzed.

10A and 10B are views illustrating time-resolved photocurrent responses in p-n and n-n junctions of a heterojunction phototransistor according to an embodiment of the present invention.

The graph 1000 of FIG. 10A shows that white incident light of 52 uW cm ^-1 is output at -3 V _G , and the violation region may be a Time-Resolved Photocurrent Response (TRPR) measurement region.

Graph 1010 can represent the overall light on-off behavior as a function of different light incident powers at -1 V _D .

Graph 1020 may represent an enlarged image for time resolved rise and fall analysis.

Graph 1030 can represent the overall light on-off operation as a function of different light incident powers at 0 V _D .

Graph 1040 may represent an enlarged image for time resolved rise and fall analysis.

Referring to the graph 1050 of FIG. 10B , white incident light of 52 uW cm ⁻¹ at 0 V _G may be output, and the violation region may be a TRPR measurement region.

Graph 1060 can represent the overall light on-off behavior as a function of different light incident powers at 1 V _D .

Graph 1070 may represent an enlarged image for time resolved rise and fall analysis.

10A and 10B show TRPR analysis at p-n junctions and n-n junctions.

A heterojunction phototransistor can be controlled by applying an external voltage and gate.

FIG. 10B adjusted by an external voltage shows the difference in the photocurrent increase tendency, which is a one-step photocurrent increase (-1 V _D ) and a two-step photocurrent increase (0 V _D ).

The thickness of the depletion layer at 0 V _D is thinner than the thickness of the depletion layer at the opposite of -1 V _D , showing the difference in the observed photocurrent rising trend.

In addition, the rising trend of the photocurrent in the nn junction at 1V _D shows a different phenomenon from the rise of the planar secondary photocurrent observed at 0V _D .

The consistency of the TRPR results can be confirmed by assuming that a very narrow depletion layer is formed as described in the main menu script using a Schottcky junction of n-n junctions.

The devices described above may be implemented as hardware components, software components, and/or a combination of hardware components and software components. For example, devices and components described in the embodiments may include, for example, a processor, a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable array (FPA), It may be implemented using one or more general purpose or special purpose computers, such as a programmable logic unit (PLU), microprocessor, or any other device capable of executing and responding to instructions. A processing device may run an operating system (OS) and one or more software applications running on the operating system.

A processing device may also access, store, manipulate, process, and generate data in response to execution of software. For convenience of understanding, there are cases in which one processing device is used, but those skilled in the art will understand that the processing device includes a plurality of processing elements and/or a plurality of types of processing elements. It can be seen that it can include. For example, a processing device may include a plurality of processors or a processor and a controller. Other processing configurations are also possible, such as parallel processors.

Software may include a computer program, code, instructions, or a combination of one or more of the foregoing, which configures a processing device to operate as desired or processes independently or collectively. You can command the device. Software and/or data may be any tangible machine, component, physical device, virtual equipment, computer storage medium or device, intended to be interpreted by or provide instructions or data to a processing device. , or may be permanently or temporarily embodied in a transmitted signal wave. The software may be distributed on networked computer systems and stored or executed in a distributed manner. Software and data may be stored on one or more computer readable media.

As described above, although the embodiments have been described with limited drawings, those skilled in the art can make various modifications and variations from the above description. For example, the described techniques may be performed in an order different from the method described, and/or components of the described system, structure, device, circuit, etc. may be combined or combined in a different form than the method described, or other components may be used. Or even if it is replaced or substituted by equivalents, appropriate results can be achieved.

Therefore, other implementations, other embodiments, and equivalents of the claims are within the scope of the following claims.

100: Photocurrent mapping and noise current measuring device of heterojunction phototransistor
110: heterojunction phototransistor 120: photocurrent mapping measuring unit
130: noise current measuring unit

Claims (14)

A gate layer is formed on the substrate, a channel layer is formed of WS ₂ on the formed gate layer, a drain layer is formed of WSe ₂ on the channel layer, and a source layer is formed of MOS ₂ to form p-WSe ₂ a heterojunction phototransistor having a heterojunction structure of /n-WS ₂ /n-MoS ₂ and controlling a Fermi level of the channel layer by applying a gate bias to the channel layer;
Photocurrent mapping measurement for measuring positions of photocurrent generation in the drain layer, the channel layer, and the source layer by mapping the distribution and direction of the photocurrent generated by the light applied to the heterojunction phototransistor using a laser through scanning photocurrent mapping. wealth; and
and a noise current measurement unit for converting and measuring a dark current according to the direction of the gate bias into a noise current when the light is not applied to the heterojunction phototransistor.
Apparatus for photocurrent mapping and noise current measurement of heterojunction phototransistors. According to claim 1,
The gate layer is formed of h-BN, and the gate electric field effect by the gate bias is transmitted to the channel layer through the h-BN.
Apparatus for photocurrent mapping and noise current measurement of heterojunction phototransistors. According to claim 1,
In the heterojunction phototransistor, the drain layer and the channel layer form a pn junction, the channel layer and the source layer form an nn junction, and a gate bias is applied to the channel layer so that the Fermi level of the channel layer ( Characterized in that the charge balance is controlled at the pn junction and the nn junction as the Fermi level) is controlled
Apparatus for photocurrent mapping and noise current measurement of heterojunction phototransistors. According to claim 3,
The photocurrent mapping measuring unit performs scanning photocurrent mapping using the laser in two different diode directions with the pn junction and the nn junction, and a first region corresponding to the pn junction and a third region corresponding to the nn junction It is characterized by generating a photocurrent map that measures and displays the location and size of the photocurrent generated by the photovoltaic effect (PVe) and the location and size of the photocurrent induced by the photoconductive effect (PCe) in the region. to be
Apparatus for photocurrent mapping and noise current measurement of heterojunction phototransistors. According to claim 3,
The heterojunction phototransistor has an open circuit voltage (V _OC ) and a photovoltaic effect in the first region corresponding to the pn junction when the gate bias is lower than the threshold level when the gate bias is applied to the channel layer. (photovoltaic effect, PVe) appears, and when the level of the gate bias is equal to the threshold level, the open circuit voltage (V _OC ) is reduced in the second region corresponding to between the pn junction and the nn junction, When the level of the gate bias is greater than the critical level, a direct tunneling effect is generated as a potential barrier between conduction bands in the third region corresponding to the nn junction is narrowed. Characterized in that
Apparatus for photocurrent mapping and noise current measurement of heterojunction phototransistors. According to claim 5,
In the heterojunction phototransistor, when the photovoltaic effect (PVe) is more generated than the photoconductive effect (PCe) in the first region and the electron concentration of the channel layer is increased in the third region, Characterized in that the photoconductive effect (PCe) is more generated than the photovoltaic effect (PVe) due to the influence of a depletion layer at the interface of the source layer
Apparatus for photocurrent mapping and noise current measurement of heterojunction phototransistors. According to claim 1,
The noise current measurement unit dark current in any one of a first region in which the drain layer and the channel layer form a pn junction and a third region in which the channel layer and the source layer form an nn junction Characterized in that the dark current is converted into a short noise current using electron charge and
Apparatus for photocurrent mapping and noise current measurement of heterojunction phototransistors. According to claim 7,
The noise current measurement unit determines the flicker noise current by applying a magnification according to the magnitude of the dark current to the converted short noise current.
Apparatus for photocurrent mapping and noise current measurement of heterojunction phototransistors. A gate layer is formed on the substrate, a channel layer is formed of WS ₂ on the formed gate layer, a drain layer is formed of WSe ₂ on the channel layer, and a source layer is formed of MOS ₂ to form p-WSe ₂ In a heterojunction phototransistor having a heterojunction structure of the /n-WS ₂ /n-MoS ₂ structure, controlling a Fermi level of the channel layer by applying a gate bias to the channel layer;
In the photocurrent mapping measuring unit, the distribution and direction of the photocurrent generated by the light applied to the heterojunction phototransistor is mapped using a laser to scan the photocurrent, and thus the location of the photocurrent generation in the drain layer, the channel layer, and the source layer. measuring; and
In a noise current measurement unit, when the light is not applied to the heterojunction phototransistor, converting a dark current according to the direction of the gate bias into a noise current and measuring it
Photocurrent mapping and noise current measurement method of heterojunction phototransistor. According to claim 9,
In the heterojunction phototransistor, the drain layer and the channel layer form a pn junction, the channel layer and the source layer form an nn junction, and a gate bias is applied to the channel layer so that the Fermi level of the channel layer ( Characterized in that the charge balance is controlled at the pn junction and the nn junction as the Fermi level) is controlled
Photocurrent mapping and noise current measurement method of heterojunction phototransistor. According to claim 10,
The step of measuring the location of photocurrent generation in the drain layer, the channel layer, and the source layer by mapping the distribution and direction of the photocurrent generated by the light applied to the heterojunction phototransistor using a laser by scanning photocurrent,
Scanning photocurrent mapping is performed using the laser for two different diode directions with the pn junction and the nn junction, and a photovoltaic effect in a first region corresponding to the pn junction and a third region corresponding to the nn junction generating a photocurrent map that measures and displays the location and size of photocurrent generated by (photovoltaic effect, PVe) and the location and size of photocurrent induced by photoconductive effect (PCe) doing
Photocurrent mapping and noise current measurement method of heterojunction phototransistor. According to claim 10,
The heterojunction phototransistor has an open circuit voltage (V _OC ) and a photovoltaic effect in the first region corresponding to the pn junction when the gate bias is lower than the threshold level when the gate bias is applied to the channel layer. (photovoltaic effect, PVe) appears, and when the level of the gate bias is equal to the threshold level, the open circuit voltage (V _OC ) is reduced in the second region corresponding to between the pn junction and the nn junction, When the level of the gate bias is greater than the critical level, a direct tunneling effect is generated as a potential barrier between conduction bands in the third region corresponding to the nn junction is narrowed. Characterized in that
Photocurrent mapping and noise current measurement method of heterojunction phototransistor. According to claim 12,
In the heterojunction phototransistor, when the photovoltaic effect (PVe) is more generated than the photoconductive effect (PCe) in the first region and the electron concentration of the channel layer is increased in the third region, Characterized in that the photoconductive effect (PCe) is more generated than the photovoltaic effect (PVe) due to the influence of a depletion layer at the interface of the source layer
Photocurrent mapping and noise current measurement method of heterojunction phototransistor. According to claim 9,
When the light is not applied to the heterojunction phototransistor, the step of converting and measuring the dark current according to the direction of the gate bias into noise current,
Dark current and electron charge in any one of a first region in which the drain layer and the channel layer form a pn junction and a third region in which the channel layer and the source layer form an nn junction converting the dark current into a short noise current using charge; and
And determining a flicker noise current by applying a magnification according to the magnitude of the dark current to the converted shot noise current.
Photocurrent mapping and noise current measurement method of heterojunction phototransistor.

Images