KR102490781B1 - Content-Addressable Memory and Method for Degree of Match Detection Using them - Google Patents

Abstract

The present invention relates to a content addressable memory device and a method for detecting data consistency using the same In a plurality of TCAM unit cells connected in parallel based on a match line, the TCAM unit cells are connected to the match line, and include a cantilever electrode, a first electrode, and A memory cell including a second electrode, a comparison transistor unit including a first transistor and a second transistor that perform a memory search according to the application of voltages to the search line and the search line bar, and have on-resistances greater than or equal to a predetermined value; An access transistor unit including a third transistor and a fourth transistor operating in such a way that the cantilever electrode is grounded to the first electrode and the second electrode according to the application of voltage to the line and the bit line bar, and one end of the match line A matchline amplifier circuit detects the discharge rate, and the matchline amplifier circuit senses data consistency with respect to search data by causing a voltage drop at an output terminal at a time difference according to the number of mismatch bits.

Description

Content addressable memory device and match detection method using the same {Content-Addressable Memory and Method for Degree of Match Detection Using them}

The present invention relates to a match detection method using a content addressable memory device, and more particularly, to a match line detection method using a content addressable memory device capable of detecting the match level of search data by classifying match line discharge time according to the number of mismatch bits. It's about how.

Recently, demand for large-capacity semiconductor memory devices is increasing in the field of artificial intelligence and big data. In the case of a memory device represented by an existing random access memory device, it is responsible for only a data storage function, and most of data operations are performed in a central processing unit (CPU). Therefore, the data operation operation repeats the process of loading data stored in the memory device to the central processing unit, performing the calculation, and then storing the result in the memory device again. This inevitably causes data bus congestion between the CPU and the memory device, limiting the implementation of low-power/high-performance semiconductor chips.

Meanwhile, unlike conventional random access storage devices, the content-addressable storage device can perform a data search function as well as a data storage function. In addition, since this search operation is performed by simultaneously comparing all stored data and search data in parallel, high-speed operation is possible. Therefore, as a memory device capable of low-power / high-performance search within a memory device without interaction between a CPU and a memory, it is in the spotlight in the fields of artificial intelligence and deep learning. However, conventional CMOS (SRAM)-based ternary content addressable memory devices consist of 16 transistors, so there are limitations in large-capacity integration and utilization. In order to overcome this, a content addressable memory device using next-generation non-volatile memory such as magnetoresistive memory or phase change memory has been proposed. there is.

Korean Patent Publication No. 10-2020-0132442 relates to a content addressable memory device and an operating method thereof. In the content addressable memory device, the content addressable memory device according to the first aspect includes a plurality of serially connected content addressable devices. a plurality of word lines each including memory cells; a search data register transferring a first search bit and an inverted first search bit to the content addressable memory cell, respectively, according to a search value to be searched; a match line pre-charge unit for applying a pre-charge voltage to match lines of the content-addressable memory cells in units of word lines; a pull-down path controller connected between an end of the ground line of the content-addressable memory cell and a ground for each word line and controlling whether to generate a pull-down path for the match line; and a sense amplifier configured to sense the voltage state of the match line of the content addressable memory cell in units of the word line and output a comparison result between the search value and information stored in content addressable memory cells included in the word line. It is characterized by doing.

Korean Patent Publication No. 10-2020-0140167 relates to a ternary content addressable memory and a method for operating the same, a cache memory for storing a look-up table for operation results of a plurality of functions ), an approximation unit for generating mask bits, and an approximate input value corresponding to an input key based on the mask bit, and an output value corresponding to the obtained approximate input value It may be characterized in that it includes a controller for searching in the look-up table.

Korean Patent Publication No. 10-2020-0132442 (2020.11.25.) Korean Patent Publication No. 10-2020-0140167 (2020.12.15.)

An embodiment of the present invention implements a content addressable memory device to which a memory element having a high ON/OFF resistance ratio is applied, and thus a content address capable of detecting the degree of coincidence with respect to search data by distinguishing the match line discharge time according to the number of mismatch bits. An image memory device and a matching method using the same are provided.

An embodiment of the present invention provides a content addressable memory device that can be used in the field of artificial intelligence and a method for detecting consistency using the same by detecting the degree of coincidence during data search by utilizing an electromechanical memory device having a higher resistance ratio than other next-generation memories. want to provide

Among the embodiments, the content addressable storage device of the present invention includes a plurality of TCAM unit cells connected in parallel with respect to a match line, wherein the TCAM unit cells are connected to the match line, and include a cantilever electrode, a first electrode, and a second electrode. A memory cell including two electrodes, a comparison transistor unit including a first transistor and a second transistor that perform a memory search according to the application of voltages to the search line and the search line bar, and have on-resistances greater than or equal to a predetermined value; and a bit line and an access transistor unit including a third transistor and a fourth transistor operating in such a way that the cantilever electrode is grounded to the first electrode and the second electrode according to the application of a voltage to the bit line bar, and a discharge at one end of the match line A matchline amplifier circuit for detecting speed is included, and the matchline amplifier circuit is characterized in that the matchline amplifier circuit detects data consistency with respect to search data by causing a voltage drop at an output terminal at a time difference according to the number of mismatch bits.

The comparison transistor unit further includes a first resistor and a second resistor respectively connected to the first transistor and the second transistor.

The comparison transistor unit may increase on-resistance by adjusting sizes of the first transistor and the second transistor.

The comparison transistor unit may increase on-resistance by adjusting a voltage applied to the search line connected to gates of the first transistor and the second transistor.

The first transistor and the second transistor of the comparison transistor unit are configured as tunneling field effect transistors (TFETs) to increase on-resistance.

Among the embodiments, in the content addressable memory device and method for detecting data consistency using the same, data retrieval from a plurality of TCAM unit cells connected in parallel with respect to a match line is operated through a comparison transistor unit of the unit cell. Applying search data to be searched to a search line connected to the gate of the first transistor and a search line bar connected to the gate of the second transistor of the comparison transistor unit; It is characterized in that it includes the step of detecting the data consistency through time difference discrimination of the voltage drop of the output terminal according to the number of bits.

The comparison transistor unit may further include a first resistor and a second resistor respectively connected to the first transistor and the second transistor.

The comparison transistor unit may increase on-resistance by adjusting sizes of the first transistor and the second transistor.

When searching for '0' during the data search, a low voltage (GND) is applied to the search line and a high voltage (VDD) is applied to the search line bar. When searching for '1' during the data search, a search A high voltage (VDD) is applied to the line, and a low voltage (GND) is applied to the search line bar.

When the stored data and the retrieved data match, the match line is maintained at a high voltage.

When the stored data and the retrieved data do not match, the match line is discharged, and the discharge rate of the match line increases as the number of mismatched bits increases.

The disclosed technology may have the following effects. However, it does not mean that a specific embodiment must include all of the following effects or only the following effects, so it should not be understood that the scope of rights of the disclosed technology is limited thereby.

According to an embodiment of the present invention, a content addressable memory device and a matching degree detection method using the same implement a content addressable memory device to which a memory element having a high ON/OFF resistance ratio is applied, and match line discharge according to the number of mismatched bits. By dividing the time, it is possible to efficiently detect the degree of matching with the search data.

A content addressable memory device and a matching degree detection method using the same according to an embodiment of the present invention utilizes an electromechanical memory device having a higher resistance ratio than other next-generation memories to detect matching during data search, and thus can be used in the field of artificial intelligence. The effect of providing a possible semiconductor memory device can be obtained.

1 is a diagram schematically showing the configuration of a content addressable storage device according to an embodiment of the present invention.
2 is a diagram for explaining match information according to a state of a content addressable storage device according to an embodiment of the present invention.
3 illustrates a method for detecting a degree of agreement using a content addressable storage device according to an embodiment of the present invention.
4 illustrates a content addressable storage device according to another embodiment of the present invention.

Since the description of the present invention is only an embodiment for structural or functional description, the scope of the present invention should not be construed as being limited by the embodiments described in the text. That is, since the embodiment can be changed in various ways and can have various forms, it should be understood that the scope of the present invention includes equivalents capable of realizing the technical idea. In addition, since the object or effect presented in the present invention does not mean that a specific embodiment should include all of them or only such effects, the scope of the present invention should not be construed as being limited thereto.

Meanwhile, the meaning of terms described in this application should be understood as follows.

Terms such as "first" and "second" are used to distinguish one component from another, and the scope of rights should not be limited by these terms. For example, a first element may be termed a second element, and similarly, a second element may be termed a first element.

It should be understood that when an element is referred to as being “connected” to another element, it may be directly connected to the other element, but other elements may exist in the middle. On the other hand, when an element is referred to as being "directly connected" to another element, it should be understood that no intervening elements exist. Meanwhile, other expressions describing the relationship between components, such as “between” and “immediately between” or “adjacent to” and “directly adjacent to” should be interpreted similarly.

Expressions in the singular number should be understood to include plural expressions unless the context clearly dictates otherwise, and terms such as “comprise” or “having” refer to an embodied feature, number, step, operation, component, part, or these. It should be understood that it is intended to indicate that a combination exists, and does not preclude the possibility of the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

In each step, the identification code (eg, a, b, c, etc.) is used for convenience of explanation, and the identification code does not describe the order of each step, and each step clearly follows a specific order in context. Unless otherwise specified, it may occur in a different order than specified. That is, each step may occur in the same order as specified, may be performed substantially simultaneously, or may be performed in the reverse order.

All terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present invention belongs, unless defined otherwise. Terms defined in commonly used dictionaries should be interpreted as consistent with meanings in the context of the related art, and cannot be interpreted as having ideal or excessively formal meanings unless explicitly defined in the present application.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention will be described in more detail. Hereinafter, the same reference numerals are used for the same components in the drawings, and redundant descriptions of the same components are omitted.

1 is a diagram schematically showing the configuration of a content addressable storage device according to an embodiment of the present invention.

Referring to FIG. 1, FIG. 1A shows a unit cell of a content addressable memory device, and FIG. 1B shows a match line (ML) constituting a unit word.

First, referring to FIG. 1A , the unit cell includes an electromechanical memory cell 100 responsible for storing data, an access transistor unit, and a comparison transistor unit 110 for a data search operation.

The comparison transistor unit 110 includes a first transistor M1 and a second transistor M2, and two resistance components R1 and R2 for adjusting the match line discharge current are connected. In addition, the access transistor unit includes a third transistor M3 and a fourth transistor M4 on both sides of the memory cell 100 .

A word line (WL) is connected to the gates of the third and fourth transistors M3 and M4, and a bit line (Bit Line) is connected to the drains of the third and fourth transistors M3 and M4, respectively. Line, BL) and the bit line bar (/Bit Line, /BL) are connected to switch the current path (stored data) of the electromechanical memory cell 100.

A search line (SL) and a search line bar (/Search Line, /SL) are connected to the gates of the first transistor M1 and the second transistor M2, respectively, and data to be searched is applied to the cell to perform a search operation. The voltage of the match line (ML) is maintained or discharged according to the matching/mismatching of the stored data and the search data. When one or more cells are mismatched, the matchline is discharged. As the number of mismatched bits increases, the discharge current of the matchline increases and the discharge rate increases. Through this, the data consistency of the content addressable storage device can be detected.

Referring to FIG. 1B, the unit word includes a plurality of TCAM unit cells connected in parallel with respect to the match line ML. During the data search operation, as the number of mismatched cells increases, the discharge time of the match line becomes shorter, which is detected by the match line sense amplifier (MLSA).

2 is a diagram for explaining match information according to a state of a content addressable storage device according to an embodiment of the present invention.

Referring to FIG. 2 and Table 1, data storage using the content-addressable storage device and operations during data storage will be described as follows. First, data storage operates in such a way that when voltage is applied to the electrodes L1 and L2 located on both sides of the memory cell through the access transistors M3 and M4, the cantilever electrode is grounded to the electrode L1 or L2 on both sides of the memory cell. . Also, data retrieval operates through the comparison transistors M1 and M2. Among the comparison transistors, the gate of the first transistor M1 is connected to the search line SL, and the second transistor M2 is connected to the search line bar (/SL).

Referring to Table 1 below, when searching for '0', a low voltage (GND) is applied to the search line and a high voltage (VDD) is applied to the search line bar. Conversely, if '1' is to be searched for, a high voltage (VDD) is applied to the search line.

< Table 1 >

When the search data and the stored data match (match), a discharge current path is not formed as shown in FIG. 2A so that a voltage drop does not occur and the match line is maintained at a high voltage. On the other hand, when the search data and the stored data are mismatched, a discharge current path connected to the ground is formed through the comparison transistor M1 connected to the search line and the cantilever electrode of the memory cell as shown in FIG. happens. In addition, in the case of 'X (Don't care)', which is always determined to match regardless of stored data, a discharge current path is not formed as shown in FIG. 2C, so a voltage drop does not occur and the match line is maintained at a high voltage.

3 illustrates a method for detecting a degree of agreement using a content addressable storage device according to an embodiment of the present invention.

Referring to FIG. 3A, the content addressable memory device includes a plurality of TCAM unit cells connected in parallel with a match line (ML) as a starting point.

During a data search operation, when data stored in unit cells in a word matches search data, the voltage charged in the match line is maintained at a high voltage without being discharged. On the other hand, when data stored in one or more unit cells of a plurality of unit cells is inconsistent with search data, a discharge current path is generated and the match line is discharged.

Looking at the data search operation through the time table of FIG. 3B, a search operation is performed after a precharge operation is performed. During a precharge operation, a voltage is applied to the match line ML, and during a search operation, when search data and stored data match (match), a high voltage is maintained. When the search data and the stored data are mismatched, the match line is discharged, and a voltage drop occurs at the output terminal (SA_out) of the match line amplifier circuit.

FIG. 3C is a graph showing the change in voltage of the match line. As the number of mismatched bits increases from 1 bit mismatch to 8 bit mismatch, it can be seen that the discharge speed of the match line increases. The discharge time of the match line is proportional to the RC delay existing in the match line and the discharge current path, which can be changed according to the number of memory cells in the word. At this time, the resistance components R1 and R2 in the unit cell shown in FIG. 1A serve to adjust the discharge time interval between the mismatched bit numbers by adjusting the discharge rate of the match line.

In general, the characteristics of the device are excellent when the resistance is close to 0, but in the present invention, since the number of mismatch bits can be more clearly distinguished when the resistance is sequentially changed using an RC delay, a device having a high ON/OFF resistance ratio is selected. It can be applied to improve the operating margin for detecting data matching.

3D is a graph showing the change in the output value sensed by the matchline amplifier circuit, and it can be seen that the voltage drop occurs with a time difference according to the number of mismatched bits. Accordingly, it is possible to distinguish the time difference of the voltage drop of the output terminal, and through this, the degree of data consistency can be distinguished.

4 illustrates a content addressable storage device according to another embodiment of the present invention. The discharge time of the match line is proportional to the RC delay existing in the match line and the discharge current path, which can be changed according to the number of memory cells in a word. At this time, a resistor (see FIG. 1A) in the unit cell serves to adjust the discharge time interval between the mismatched bit numbers by adjusting the discharge rate of the match line. These two resistors (R1, R2) can be implemented as an example as shown in FIG.

First, as shown in FIG. 4A , a method of adjusting the size of the transistors may be used to increase the on-resistance of the comparison transistors M1 and M2 of the memory cell. In FIG. 4A, in order to increase the resistance of the transistor, the width of the transistor is implemented to be small so that the current does not flow well and the gate voltage is reduced accordingly.

4B shows a method of increasing on-resistance by adjusting a voltage applied to a search line during a data search operation. Referring to the graph shown in FIG. 4B , it can be seen that the smaller the voltage applied to the search line, the clearer the difference in time difference between the voltage drop of the output terminal according to the number of mismatch bits is revealed.

4C shows a method using a tunneling transistor (TFET) having a higher on-resistance than that of a MOSFET. Since the tunneling transistor has a resistance that is 10 to 1000 times greater than that of conventional MOSFETs, the number of mismatched bits can be more effectively distinguished and detected using an RC delay.

In addition to the method shown in FIG. 4, if the comparison transistor is omitted and a resistor is provided, any component such as a resistor or ReRAM may be used.

As described above, by utilizing an electromechanical memory device having a high resistance ratio and implementing a content addressing device that detects data consistency by checking the discharge pattern of the match line according to the number of mismatch bits during a data search operation, artificial intelligence field It is possible to obtain an effect of providing a usable semiconductor memory device.

Although the above has been described with reference to preferred embodiments of the present invention, those skilled in the art will variously modify and change the present invention within the scope not departing from the spirit and scope of the present invention described in the claims below. You will understand that it can be done.

100: memory cell
110: comparison transistor unit

Claims (11)

In a plurality of TCAM unit cells constituting a result unit word connected in parallel based on a matchline,
The TCAM unit cell is
a memory cell connected to the match line and including a cantilever electrode, a first electrode, and a second electrode;
A comparison transistor including a first transistor and a second transistor that performs a memory search according to voltage application of the search line and the search line bar, and is implemented to have an on-resistance of a predetermined value or more to determine a discharge rate of a unit cell according to a bit mismatch. wealth; and
An access transistor unit including a third transistor and a fourth transistor operating in such a way that the cantilever electrode is grounded to the first electrode and the second electrode according to the application of voltage to the bit line and the bit line bar;
A match line amplifier circuit for sensing a discharge rate of the unit word is connected to one end of the match line;
The matchline amplifier circuit causes a voltage drop at an output terminal with a time difference according to the number of mismatched bits in the unit word based on the discharge rate of the unit cell to sense the degree of data matching with respect to search data bit by bit within the unit word. Characterized content addressable memory.
According to claim 1,
The content addressable memory device of claim 1 , wherein the comparison transistor unit further includes a first resistor and a second resistor respectively connected to the first transistor and the second transistor.
According to claim 1,
The content addressable memory device of claim 1 , wherein the comparison transistor unit increases on-resistance by adjusting sizes of the first transistor and the second transistor.
According to claim 1,
The content addressable memory device of claim 1 , wherein the comparison transistor unit increases an on-resistance by adjusting a voltage applied to the search line connected to gates of the first transistor and the second transistor.
According to claim 1,
The content addressable memory device according to claim 1 , wherein the first transistor and the second transistor of the comparison transistor unit are composed of tunneling field effect transistors (TFETs) to increase on-resistance.
Data retrieval from a plurality of TCAM unit cells constituting a resulting unit word connected in parallel based on a match line operates through a comparison transistor unit of each unit cell of the unit word, and the comparison transistor unit has an on-resistance of a certain value or more. a first transistor and a second transistor for determining a discharge rate of a unit cell according to a bit mismatch by
applying search data to be searched to a search line bar connected to the gate of the first transistor and a search line bar connected to the gate of the second transistor of the comparison transistor unit for each unit cell; and
Detects whether the stored data of each unit cell and the search data match or do not match, and based on the discharge rate of the unit cell, differentiates the time difference of the voltage drop of the output terminal according to the number of mismatch bits in the unit word within the unit word. Steps for detecting data consistency in bit units
A data consistency detection method using a content addressable storage device, characterized in that it comprises a.
According to claim 6,
The comparison transistor unit
and a first resistor and a second resistor respectively connected to the first transistor and the second transistor.
According to claim 6,
The comparison transistor unit increases on-resistance by adjusting sizes of the first transistor and the second transistor.
According to claim 6,
When searching for '0' during the data search, a low voltage (GND) is applied to the search line and a high voltage (VDD) is applied to the search line bar;
When searching for '1' during the data search, a high voltage (VDD) is applied to a search line and a low voltage (GND) is applied to a search line bar. .
According to claim 6,
and a match line is maintained at a high voltage when the stored data and the search data match.
According to claim 6,
When the stored data and the retrieved data do not match, the match line is discharged and the discharge rate of the match line increases as the number of mismatched bits increases.

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