KR102477230B1 - Display device - Google Patents

Abstract

A display device according to an exemplary embodiment includes a display panel including a pad part at one end, and a flexible printed circuit film bonded to the pad part. The pad part includes lighting pads positioned at at least one end thereof, and the flexible printed circuit layer includes dummy pads overlapping portions of the lighting pads at positions corresponding to the lighting pads. The number of dummy pads is smaller than the number of lighting pads.

Description

Display device {DISPLAY DEVICE}

The present invention relates to a display device.

A display device such as an organic light emitting display device or a liquid crystal display device is used. The display device includes a display panel including pixels displaying an image. In addition to the pixels, the display panel includes a driving device, pads for inputting signals used to control the pixels and the driving device, and signal lines connected to the pads to transmit signals.

A flexible printed circuit film is bonded to the region where the pads are formed (pad part) to transmit signals to the display panel. The display panel may include lighting pads used in a process of inspecting whether pixels of the display panel operate normally before bonding the flexible printed circuit film. For electrical connection and physical bonding between the flexible printed circuit film and the pad portion, an anisotropic conductive film (ACF) may be used. The anisotropic conductive film is a film in which conductive particles are arranged in an insulating layer such as resin. The resin of the anisotropic conductive film may be in a provisionally cured state or may be a thermosetting or photocurable resin that is completely cured in a bonding process.

In order to cope with the high resolution of the display device, the number of signals transmitted to the display panel must be increased, and the number of pads transmitting the signals must also be increased. In order to increase the number of pads, it may be necessary to reduce the pad pitch.

Embodiments provide a display device capable of preventing defects related to lighting pads.

A display device according to an exemplary embodiment includes a display panel including a pad part at one end, and a flexible printed circuit film bonded to the pad part. The pad part includes lighting pads positioned at at least one end thereof, and the flexible printed circuit layer includes dummy pads overlapping portions of the lighting pads at positions corresponding to the lighting pads. The number of dummy pads is smaller than the number of lighting pads.

A pitch of the dummy pads may be greater than a pitch of the lighting pads and may be twice or more than a pitch of the lighting pads.

In the lighting pads, lighting pads overlapping the dummy pads and lighting pads not overlapping the dummy pads may be alternately positioned one by one along the first direction corresponding to the longitudinal direction of the pad part.

The pad part may include alignment marks between the lighting pads and pads adjacent thereto.

The flexible printed circuit layer may include alignment marks between the dummy pads and pads adjacent thereto.

The lighting pads may have a rectangular shape, and a long side may be perpendicular to a first direction corresponding to a longitudinal direction of the pad part. A pad adjacent to the lighting pads may have a parallelogram shape, and a long side thereof may be inclined with respect to the first direction.

The dummy pads may have a rectangular shape, and a long side may be perpendicular to a longitudinal direction of the pad part. Pads adjacent to the dummy pads may have a parallelogram shape, and long sides may be inclined with respect to the longitudinal direction of the pad portion.

Widths of the lighting pads and widths of the dummy pads may be substantially the same. Lengths of the lighting pads and lengths of the dummy pads may be substantially the same.

The pad part and the flexible printed circuit film may be bonded by an anisotropic conductive film containing conductive particles.

A display device according to an exemplary embodiment includes a display panel including a pad portion, and a flexible printed circuit film bonded to the pad portion. The pad part includes lighting pads positioned at at least one end thereof, and the flexible printed circuit layer includes dummy pads corresponding to the lighting pads. The dummy pads are arranged in at least two rows.

The number of dummy pads may be the same as the number of lighting pads.

Each of the lighting pads may include a relatively wide first portion and a relatively narrow second portion, and the dummy pads may overlap the first portions of the lighting pads.

The first parts and the second parts of the lighting pads may be alternately positioned one by one along a first direction corresponding to a longitudinal direction of the pad part.

Lengths of the first parts may be shorter than lengths of the second parts.

Widths of the first portions may be substantially the same as widths of the dummy pads. Lengths of the first portions and lengths of the dummy pads may be substantially the same.

The dummy pads may include dummy pads positioned in a first column and dummy pads positioned in a second column, and a pitch of dummy pads positioned in the first column and a pitch of dummy pads positioned in the second column may be the same. A pitch of the dummy pads positioned in the first column may be twice the pitch of the lighting pads.

Some of the lighting pads may include a relatively wide first portion and a relatively narrow second portion, and others may include only the first portion and not include the second portion. The dummy pads may overlap the first portions of the lighting pads.

According to embodiments, when the flexible printed circuit film is compressed for bonding, a flow passage of the anisotropic conductive film may be expanded, and accordingly, lighting pads may be prevented from being shorted by conductive particles. Therefore, defects of the display device can be prevented.

1 is a plan view of a display device according to an exemplary embodiment.
FIG. 2 is an enlarged view of area A1 in FIG. 1 .
FIG. 3 is an enlarged view of an exemplary embodiment of the display panel shown in FIG. 2 .
FIG. 4 is an enlarged view of an embodiment of the flexible printed circuit film shown in FIG. 2 .
FIG. 5 is a cross-sectional view of one embodiment taken along line V-V′ in FIG. 2 .
6 and 7 are cross-sectional views of one embodiment taken along the line V-V' in FIG. 2, respectively.
8 and 9 are plan views of lighting pads of a display panel and dummy pads of a flexible printed circuit film, respectively, according to an exemplary embodiment.
FIG. 10 is a cross-sectional view taken along the line XX′ in FIG. 9 .
11 and 12 are a plan view of lighting pads of a display panel and a plan view of dummy pads of a flexible printed circuit film, respectively, according to an exemplary embodiment.
FIG. 13 is a cross-sectional view taken along line XIII-XIII' in FIG. 12 .
14 is an equivalent circuit diagram of one pixel of a display device according to an exemplary embodiment.
15 is a layout diagram of pixels of a display device according to an exemplary embodiment.
FIG. 16 is a cross-sectional view taken along line XVI-XVI′ in FIG. 16 .
FIG. 17 is a cross-sectional view taken along line XVII-XVII' in FIG. 3 .

Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. This invention may be embodied in many different forms and is not limited to the embodiments set forth herein.

In order to clearly describe the present invention, parts irrelevant to the description are omitted, and the same reference numerals are assigned to the same or similar components throughout the specification.

In addition, since the size and thickness of each component shown in the drawings are arbitrarily shown for convenience of explanation, the present invention is not necessarily limited to the shown bar. In the drawings, the thickness is shown enlarged to clearly express the various layers and regions. And in the drawings, for convenience of explanation, the thicknesses of some layers and regions are exaggerated.

In addition, when a part such as a layer, film, region, plate, etc. is said to be "on" or "on" another part, this includes not only the case where it is "directly on" the other part, but also the case where another part is in the middle. . Conversely, when a part is said to be "directly on" another part, it means that there is no other part in between.

In addition, throughout the specification, when a certain component is said to "include", it means that it may further include other components without excluding other components unless otherwise stated.

In addition, throughout the specification, when it is referred to as "planar image", it means when the target part is viewed from above, and when it is referred to as "cross-sectional image", it means when a cross section of the target part cut vertically is viewed from the side.

A display device according to an embodiment of the present invention will be described in detail with reference to the drawings. Although an organic light emitting display device will be described as an example of the display device, the present invention is not limited to the organic light emitting display device and can be applied to other display devices such as a liquid crystal display device.

FIG. 1 is a plan view of a display device according to an exemplary embodiment, and FIG. 2 is an enlarged view of an area A1 in FIG. 1 . FIG. 3 is an enlarged view of an embodiment of the display panel shown in FIG. 2, FIG. 4 is an enlarged view of an embodiment of the flexible printed circuit shown in FIG. 2, and FIG. A cross-sectional view of one embodiment taken.

Referring to FIG. 1 , the display device includes a driving device including a display panel 10 , a flexible printed circuit film 20 bonded to the display panel 10 , and an integrated circuit chip 30 .

The display panel 10 includes a display area DA corresponding to a screen on which an image is displayed, and circuits and/or signal lines for generating and/or transmitting various signals applied to the display area DA. A non-display area NA around the display area DA is included. In FIG. 1 , the inside and outside of the dotted line rectangle correspond to the display area DA and the non-display area NA, respectively.

In the display area DA of the display panel 10 , the pixels PX are arranged in a matrix, for example. Signal lines (not shown) such as scan lines (also referred to as gate lines), emission control lines, data lines, and driving voltage lines are also disposed in the display area DA. A scan line, light emission control line, data line, and driving voltage line are connected to each pixel PX, and each pixel PX receives a scan signal (also referred to as a gate signal), light emission control signal, data signal, and driving from these signal lines. The voltage ELVDD may be applied.

A pad portion PP having pads for receiving signals from the outside of the display panel 10 is formed in the non-display area NA of the display panel 10 . The pad part PP is elongated along one edge of the display panel 10 in the first direction (x). Accordingly, the longitudinal direction of the pad part PP may be the same as the first direction (x). The flexible printed circuit layer 20 is bonded to the pad portion PP, and pads or bumps of the flexible printed circuit layer 20 may be electrically connected to the pads of the pad portion PP. For bonding of the flexible printed circuit film 20 and electrical connection between the pads, an anisotropic conductive film containing conductive particles may be used.

A driving unit that generates and/or processes various signals for driving the display panel 10 is positioned in the non-display area NA of the display panel 10 . The driving device includes a data driver for applying data signals to data lines, a scan driver (SDa, SDb) for applying scan signals to scan lines, and a light emitting driver for applying light emitting control signals to light emitting control lines. It may include an emission driver (EDa, EDb), and a signal controller that controls the data driver, scan driver (SDa, SDb), and light emitting driver (EDa, EDb).

The scan driving units SDa and SDb and the light emitting driving units EDa and EDb are integrated into the display panel 10 . The scan drivers SDa and SDb may be positioned on the left and right sides of the display area DA. The light driving units EDA and EDb may also be positioned on the left and right sides of the display area DA. The scan driving units SDa and SDb and/or the light emitting driving units EDa and EDb may be positioned on only one of the left and right sides of the display area DA, or may be positioned above or below the display area DA.

The data driver and the signal controller may be provided as an integrated circuit chip (also referred to as a driver IC chip) 30 , and the integrated circuit chip 30 may be mounted in the non-display area NA of the display panel 10 . The integrated circuit chip 30 may be electrically connected to the display panel 10 in the form of a tape carrier package (TCP).

A crack detection circuit (MCD) may be located in the non-display area NA of the display panel 10 . The crack detection circuit MCD may include transistors and may be used to inspect cracks or the like occurring in the display panel 10 .

In the non-display area NA of the display panel 10 , a lighting circuit that can be used to test lighting of the pixels PX may be positioned. The lighting circuit may overlap the integrated circuit chip 30 , for example.

The display panel 10 may include a bending region BR. The bending area BR may be located, for example, in the non-display area NA between the display area DA and the pad part PP. The bending area BR may be positioned across the display panel 10 in the first direction (x). The display panel 10 is bent in the bending area BR, so that the pad part PP, which is farther from the display area DA than the bending area BR, may be positioned behind the display area DA.

Referring to FIGS. 2 to 5 , a left edge portion of the pad part PP is shown. A right edge of the pad part PP may be symmetrical with a left edge of the central axis of the display panel 10 in the vertical direction (corresponding to the second direction y). To clearly show the structure and arrangement of the pads, FIG. 3 shows only the display panel 10 and FIG. 4 shows only the flexible printed circuit film 20 .

The pad part PP of the display panel 10 includes a first pad area PA1 located in the center of the pad part PP and occupying most of the pad part PP, and a second pad area PA1 located at both ends of the pad part PP. It includes a pad area PA2 and a third pad area PA3 between the first pad area PA1 and the second pad area.

Driving pads to which signals including a power signal, a clock signal, and an image signal for driving the display panel 10 may be input are positioned in the first pad area PA1 . Drive pads shown as elongated parallelograms are arranged approximately parallel to each other and arranged in a first direction (x). Long sides of the driving pads are slightly inclined with respect to the first direction (x) and the second direction (y). However, the driving pads located in the center of the first pad area PA1 may have a long side parallel to the second direction y and may be rectangular or substantially rectangular, and gradually increase from the center to the periphery of the first pad area PA1. can be tilted The direction and degree of inclination of the driving pads may be symmetrical with respect to the central axis of the second direction (y) of the first pad area PA1 .

Lighting pads LP1 to LP7 are positioned in the second pad area PA2. The lighting pads LP1 to LP7 may be pads used in an inspection process of the display panel 10 before bonding the flexible printed circuit film 20 and mounting the integrated circuit chip 30 . Signals used to drive the display panel 10 when inspecting the pixels PX may be input to the lighting pads LP1 - LP7 . For example, the lighting pads LP1 to LP7 are a light emitting frame signal ACL_FLM, a second scan clock signal CLK2, a light emitting frame signal ACL_FLM, a first scan clock signal CLK1, and a second light emitting clock signal, respectively. (EM_CLK2), the first emission clock signal EM_CLK1, and the crack detection gate signal MCD_GATE.

The first and second scan clock signals CLK1 and CLK2 and the scan frame signal FLM are signals used to drive the scan driver SDa, and the first and second light emission clock signals EM_CLK1 and EM_CLK2 and The light emitting frame signal ACL_FLM is signals used to drive the light emitting driver EDA, and the crack detection gate signal MCD_GATE is a signal used to drive the crack detection circuit MCD.

More specifically, the first and second scan clock signals CLK1 and CLK2 are transmitted to the scan driver SDa and used to generate scan signals. The scan frame signal FLM is transmitted to the scan driver SDa to indicate the start of one frame for inputting the scan signal to the display area DA. The scan frame signal FLM may be referred to as a scan start pulse signal. The first and second light emitting clock signals EM_CLK1 and EM_CLK2 are transmitted to the light emitting driver EDA and used to generate a light emitting control signal. The light emitting frame signal ACL_FLM is transmitted to the light emitting driver EDA and indicates the start of one frame for inputting the light emitting control signal to the display area DA. The light emission frame signal ACL_FLM may be referred to as a light emission start pulse signal. The crack detection gate signal MCD_GATE may be used to turn on transistors of the crack detection circuit MCD.

These signals are signals that can be generated and output from the integrated circuit chip 30, but cannot be supplied from the integrated circuit chip 30 in an inspection process before the integrated circuit chip 30 is provided. Accordingly, these signals can be externally input through the lighting pads LP1 to LP7 in the inspection process.

The lighting pads LP1 to LP7 are arranged parallel to each other and arranged in the first direction (x). The lighting pads LP1 to LP7 are rectangular, and long sides are perpendicular to the first direction (x). The lighting pads LP1 to LP7 may be formed with the same width a1 and spacing a2, and the pitch a3 of the lighting pads LP1 to LP7 is the width of the lighting pads LP1 to LP7 ( It may correspond to the sum of a1) and the interval (a2). For example, the width a1 of the lighting pads LP1 to LP7 may be about 51 micrometers, the spacing a2 may be about 19 micrometers, and the pitch a3 may be about 70 micrometers. A pitch a3 of the lighting pads LP1 to LP7 may be smaller than a pitch of driving pads positioned in the first pad area PA1.

The scan driving unit SDb and the light emitting driving unit EDb located on the right side of the display area DA may receive the above-described signals through the lighting pads in the second pad area located at the right end of the pad unit PP. . Correspondence between the lighting pads LP1 to LP7 and input signals and types of signals may be variously changed. Although seven lighting pads LP1 to LP7 are shown, the pad part PP may include less than or more than seven lighting pads according to design.

The alignment mark M1 is positioned in the third pad area PA3. The alignment mark M1 may be used to accurately align the flexible printed circuit film 20 when the flexible printed circuit film 20 is bonded. The alignment mark M1 may be used to accurately align a probe of the inspection device with the pad portion PP of the display panel 10 during an automatic visual inspection (AVI). The alignment mark M1 may be recognized by a sensor (eg, a camera) such as an inspection device. The alignment mark M1 may be connected to an adjacent driving pad.

The flexible printed circuit layer 20 includes a pad part FP corresponding to the pad part PP of the display panel 10 . The pad part FP of the flexible printed circuit film 20 covers the pad part PP of the display panel 10 .

The pad part FP has a first pad area FA1 corresponding to the first pad area PA1 of the pad part PP and a second pad area corresponding to the second pad area PA2 of the pad part PP. FA2, and a third pad area FA3 corresponding to the third pad area PA3 of the pad part PP.

Pads corresponding to the driving pads of the pad part PP and electrically connected to the driving pads through the conductive particles CP are positioned in the first pad area FA1. The pads may have shapes and slopes corresponding to those of the driving pads. The pads may be formed longer than the driving pads.

Dummy pads DP1 - DP4 corresponding to the lighting pads LP1 - LP7 of the pad part PP are positioned in the second pad area FA2 . The lighting pads LP1 to LP7 are intended not to receive signals after the flexible printed circuit film 20 is bonded. That is, the lighting pads LP1 to LP7 are pads used to input signals for inspecting the display panel 10 before bonding the flexible printed circuit film 20, and the display device to which the printed circuit film 20 is bonded. These pads are not used in Accordingly, the flexible printed circuit layer 20 need not include pads corresponding to the lighting pads LP1 to LP7 in terms of signal transmission. However, in order to bond the flexible printed circuit film 20, for example, an anisotropic conductive film ACF is placed between the pad parts PP and FP, and a pressing tool of a bonding machine is used. Problems can arise with compression.

Specifically, when the flexible printed circuit film 20 does not have the dummy pads DP1 to DP4 corresponding to the lighting pads LP1 to LP7, when the flexible printed circuit film 20 is compressed, it is flexible with the display panel 10. Since the gap between the printed circuit films 20 is narrow, the flow path of the anisotropic conductive film (ACF) (that is, in the pre-cured state greater than the amount that can fill the gap between the display panel 10 and the flexible printed circuit film 20) A passage through which the resin and the conductive particles CP contained in the resin can escape may not be sufficiently secured. Due to this, the conductive particles CP cannot sufficiently pass between the lighting pads LP1 - LP7 and agglomerate at the ends of the lighting pads LP1 - LP7, causing a short circuit between the lighting pads LP1 - LP7. can This may cause defects such as horizontal lines to appear on the screen.

Referring to FIG. 5 , by forming dummy pads DP1 to DP4 corresponding to the lighting pads LP1 to LP7, the distance d between the display panel 10 and the flexible printed circuit layer 20 is approximately reduced. It may be increased by the thickness tb of the dummy pads DP1 to DP4. As a result, the flow space of the anisotropic conductive film ACF can be expanded to prevent aggregation of the conductive particles CP and short circuit between the lighting pads LP1 to LP7. The thickness ta of the lighting pads LP1 to LP7 may be about 5 to about 10 micrometers, and the thickness tb of the dummy pads DP1 to DP4 may be about 15 to about 30 micrometers. The conductive particles CP may have a diameter of about 2 micrometers to about 7 micrometers or about 4 micrometers to about 6 micrometers.

The dummy pads DP1 to DP4 may not correspond 1:1 to the lighting pads LP1 to LP7. In other words, the number of dummy pads DP1 to DP4 is smaller than the number of lighting pads LP1 to LP7. In the illustrated embodiment, the four lighting pads LP1, LP3, LP5, and LP7 are paired with and overlapping the dummy pads DP1-DP4, respectively, but the three lighting pads LP2, LP4, and LP6 has no corresponding dummy pads. In this way, when the dummy pads DP1 to DP4 are formed fewer than the lighting pads LP1 to LP7, the distance between the display panel 10 and the flexible printed circuit layer 20 is reduced compared to the case where the dummy pads DP1 to DP4 are equally formed. while maintaining a wider flow path of the anisotropic conductive film (ACF) (corresponding to the space between the display panel 10 and the flexible printed circuit film 20 filled with the anisotropic conductive film (ACF in FIG. 5) can be secured. . Accordingly, it may be more effective to prevent the agglomeration of the conductive particles CP.

It may be difficult to form the dummy pads DP1 - DP4 at a pitch corresponding to the pitch a3 of the lighting pads LP1 - LP7 . For example, due to process limitations of the manufacturer of the flexible printed circuit film 20, the pitch of the dummy pads DP1 to DP4 is set to about 100 micrometers or less, or the width of the dummy pads DP1 to DP4 is set to about 50 micrometers. It can be difficult to form less than a meter. Accordingly, if the number of dummy pads DP1 - DP4 is to be the same as the number of lighting pads LP1 - LP7 , the pitch of the lighting pads LP1 - LP7 must be increased. ) can be increased. Also, if the dummy pads DP1 - DP4 are formed in the same number as the lighting pads LP1 - LP7 , the lighting pads LP1 - LP7 are formed by the dummy pads DP1 - DP4 even if there is a slight misalignment. short circuit may occur. Accordingly, the dummy pads DP1 to DP4 having fewer numbers than the lighting pads LP1 to LP7 can secure a wider flow passage, while increasing the width of the pad part PP and increasing the width of the lighting pads LP1 to LP7. to prevent the occurrence of short circuits. In FIG. 5 , the pitch b3 of the dummy pads DP1 - DP4 is twice the pitch a3 of the lighting pads LP1 - LP7 . In this case, if the width a1 of the lighting pads LP1 to LP7 is about 51 micrometers and the pitch a3 is 70 micrometers, the width of the flow passage is about 19 micrometers (dummy pads DP1 to DP4). ) to about 89 micrometers.

The dummy pads DP1 - DP4 are arranged parallel to each other and in the first direction (x). The dummy pads DP1 - DP4 have a rectangular shape, and long sides are perpendicular to the first direction (x) and thus parallel to the second direction (y). The dummy pads DP1 - DP4 may have shapes and sizes corresponding to the lighting pads LP1 - LP7 . The dummy pads DP1 - DP4 may have substantially the same size as the lighting pads LP1 - LP7 . Substantially the same in this specification may include the same within a range of ±10%.

The dummy pads DP1 - DP4 may be formed with the same width b1 and spacing b2 , and the pitch b3 of the dummy pads DP1 - DP4 is the width of the dummy pads DP1 - DP4 ( b1) and the interval (b2). The width b1 of the dummy pads DP1 - DP4 may be substantially the same as the width of the lighting pads LP1 - LP7 , and the length of the dummy pads DP1 - DP4 may be substantially the same as that of the lighting pads LP1 - LP7 . ) may be substantially equal to the length of However, the width b1 of the dummy pads DP1 to DP4 may be smaller or larger than the width a1 of the lighting pads LP1 to LP7. However, if the width b1 of the dummy pads DP1 - DP4 should not be greater than the width a1 of the lighting pads LP1 - LP7 , the possibility of a short circuit is reduced even if an alignment error occurs. When the width b1 of the dummy pads DP1 to DP4 is greater than the width a1 of the lighting pads LP1 to LP7, the dummy pads DP1 to DP4 are directly connected to the adjacent lighting pads LP1 to LP7. Alternatively, this is because it can be connected through the conductive particles CP. Accordingly, it may be advantageous that the widths of the dummy pads DP1 - DP4 are less than or equal to the widths of the lighting pads LP1 - LP7 .

The alignment mark M2 is positioned in the third pad area FA3. The alignment mark M2 of the pad part FP and the alignment mark M1 of the pad part PP may be aligned to form a cross (+) in a plan view as shown in FIG. 2 . The alignment mark M2 may be connected to an adjacent pad (a pad in the first area FA1).

The pitch b3 of the dummy pads DP1 - DP4 may be an integer multiple of the pitch a3 of the lighting pads LP1 - LP7 . Also, even if the dummy pads DP1 to DP4 are formed with the same pitch b3, the corresponding lighting pads LP1 to LP7 may be different. In this regard, the differences will be mainly described with reference to FIGS. 6 and 7 . Hereinafter, even if there is no special mention, it will also be described with reference to the previously described drawings.

6 and 7 are cross-sectional views of one embodiment taken along the line V-V' in FIG. 2, respectively.

Referring to FIG. 6 , the lighting pads LP1 to LP7 are the same as in the embodiment of FIG. 5 , but there is a difference in the positions of the dummy pads DP1 to DP3. That is, in FIG. 5 , the dummy pad D1 corresponds to the lighting pad LP1 positioned at the outermost side of the pad part PP, but in FIG. 6 , the dummy pad D1 is the lighting pad adjacent to the lighting pad LP1. Corresponds to (LP2). The pitch b3 of the dummy pads DP1 to DP3 is twice the pitch a3 of the lighting pads LP1 to LP7. In this arrangement, when the number of lighting pads LP1 to LP7 is seven, the number of dummy pads DP1 to DP3 may be three.

Referring to FIG. 7 , the dummy pad D1 corresponds to the lighting pad LP1 located on the outermost side of the pad part PP, but the pitch b3 of the dummy pads DP1 to DP3 is different from the lighting pads ( It is three times the pitch of LP1-LP7). In this arrangement, when the number of lighting pads LP1 to LP7 is seven, the number of dummy pads DP1 to DP3 may be three.

In the embodiments of FIGS. 5, 6 and 7, the dummy pads are arranged at equal intervals a2. However, it is not limited thereto, and the dummy pads may be arranged at different intervals. For example, in FIG. 5 , the dummy pad DP3 may be positioned to correspond to the lighting pad LP6 and the dummy pad DP4 may be omitted. As such, the dummy pads positioned in the second area FA2 of the flexible printed circuit film 20 are variously arranged to expand the flow passage of the anisotropic conductive film ACF when the flexible printed circuit film 20 is compressed. It can be.

In the embodiments described so far, the lighting pads LP1 to LP7 of the pad part PP of the display panel 10 are arranged in a row with the same size, and the pad part FP of the flexible printed circuit film 20 The dummy pads DP1 to DP4 of the same size are also arranged in a row. However, the lighting pads LP1 - LP7 may be arranged in different sizes or arranged in a plurality of rows, and the dummy pads DP1 - DP4 may also be arranged in different sizes or arranged in a plurality of rows. In this regard, some embodiments will be described with reference to FIGS. 8 to 13 focusing on differences from the above-described embodiments.

8 and 9 are plan views of lighting pads of a display panel and dummy pads of a flexible printed circuit film, respectively, according to an exemplary embodiment, and FIG. 10 is a cross-sectional view taken along line XX′ in FIG. 9 .

In order to clearly show the structure and arrangement of the lighting pads LP1-LP7 and the dummy pads DP1-DP7, the lighting pads LP1-LP7 and the dummy pads DP1-DP7 are illustrated in FIGS. 8 and 8, respectively. shown in 9. 10 shows a cross section in a state where the flexible printed circuit film 20 is bonded to the pad part PP of the display panel 10 . The illustrated portions correspond to the second pad areas PA2 and FA2 in FIG. 2 . In FIGS. 8 and 9 , two-dot chain line arrows indicate approximate flow directions of the anisotropic conductive film (ACF).

Referring to FIG. 8 , the lighting pads LP1 to LP7 include a wide first portion W1 and a narrow second portion W2 . The first part W1 of the lighting pads LP1, LP3, LP5, and LP7 is located on the upper part, and the lighting pads LP2, LP4, and LP6 have the first part W1 located on the lower part (of the display panel 10). located closer to the edge). The lighting pads LP1 to LP7 are alternately positioned in the first direction (x), with the first part W1 and the second part W2 one by one. Therefore, the first part W1 of the lighting pad LP1 and the second part W2 of the lighting pad LP2 are adjacent to each other in the first direction (x), and the second part W2 of the lighting pad LP1 The first part W1 of the lighting pad LP2 is adjacent to each other in the first direction (x). As a result, the distance a2 between the adjacent lighting pads LP1 to LP7 can be widened, so that the flow passage of the anisotropic conductive film ACF can be expanded.

When the pitch a3 of the lighting pads LP1 to LP7 and the width a1 of the first part W1 are designed to be about 70 micrometers and about 51 micrometers, respectively, the width of the second part W2 ( a1') may be about 3 micrometers to about 20 micrometers, and the spacing a2 between the lighting pads LP1 to LP7 may be about 34 micrometers to about 43 micrometers.

The length la2 of the second part W2 is longer than the length la1 of the first part W1. In this way, when the length la2 of the second portion W2 is increased, a gap a4 is formed between the first portions W1 of the adjacent lighting pads LP1 to LP7. Since the anisotropic conductive film ACF can flow at the interval a4, the flow passage can be expanded. For sufficient flow passage expansion, the spacing a4 may be about 30 micrometers or more.

Referring to FIG. 9 , dummy pads DP1 to DP7 corresponding to the lighting pads LP1 to LP7 are shown. The dummy pads DP1 to DP7 are arranged in two rows. The dummy pads D1 , D3 , D5 , and D7 of the first row, which is an upper row, respectively correspond to the first portions W1 of the lighting pads LP1 , LP3 , LP5 , and LP7 , and The dummy pads DP2 , DP4 , and DP6 in the second column (lower row) respectively correspond to the first portions W1 of the lighting pads P2 , P4 , and P6 . Therefore, the dummy pads DP1 to DP7 correspond 1:1 to the first portions W1 of the lighting pads LP1 to LP7, and when there are seven lighting pads LP1 to LP7, the dummy pads ( DP1-DP7) may also be seven.

8, 9, and 10, the lighting pads LP1 to LP7 include a first part W1 and a second part W2 having different widths (a1, a1?), but dummy pads (DP1-DP7) have the same width b1. A width b1 of the dummy pads DP1 to DP7 may be substantially the same as a width a1 of the first portion W1 of the lighting pads LP1 to LP7. The length lb of the dummy pads DP1 to DP7 may be substantially equal to the length la1 of the first portion W1 of the lighting pads LP1 to LP7. The distance b4 between the dummy pads D1, D3, D5, and D7 in the upper row and the dummy pads D1, D3, D5, and D7 in the lower row is the first portion of the adjacent lighting pads LP1-LP7. It may be substantially the same as the distance a4 between the spaces W1. The pitch b3 of the dummy pads D1, D3, D5, and D7 in the upper row is the same as the pitch b3? of the dummy pads DP2, DP4, and DP6 in the lower row, and the lighting pads LP1-LP7 is twice the pitch (a3) of Accordingly, when aligned without error, the dummy pads DP1 to DP7 may completely overlap the first parts W1 of the lighting pads LP1 to LP7.

In this way, when the lighting pads LP1 to LP7 and the dummy pads DP1 to DP7 are formed and disposed, the gap between the display panel 10 and the flexible printed circuit film 20 ( d) may be increased by approximately the thickness tb of the dummy pads DP1 to DP7. In addition to this, the interval a2 between the lighting pads LP1 to LP7 may be widened. Accordingly, the flow passage of the anisotropic conductive film ACF can be further expanded.

11 and 12 are plan views of lighting pads of a display panel and dummy pads of a flexible printed circuit film, respectively, according to an exemplary embodiment, and FIG. 13 is a cross-sectional view taken along line XIII-XIII′ in FIG. 12 .

In order to clearly show the structure and arrangement of the lighting pads LP1-LP7 and the dummy pads DP1-DP7, the lighting pads LP1-LP7 and the dummy pads DP1-DP7 are illustrated in FIGS. 11 and 11, respectively. 12. 13 shows a cross section in a state where the flexible printed circuit film 20 is bonded to the pad part PP of the display panel 10 . In FIGS. 11 and 12 , two-dot chain line arrows indicate approximate flow directions of the anisotropic conductive film ACF.

11 to 13, the lighting pads LP1, LP3, LP5, and LP7 include only the wide first portion W1 and do not include the narrow second portion W2. There is a difference from the embodiment of FIGS. 8 to 10. When the lighting pads LP1 to LP7 are formed in this way, as shown in FIG. 13 , the flow passages of the anisotropic conductive film ACF are further formed in regions corresponding to the dummy pads DP2 , DP4 , and DP6 in the lower row. can be expanded The lighting pads LP1 , LP3 , LP5 , and LP7 not including the second portion W2 have a higher density than the lighting pads LP2 , LP4 , and LP6 including the second portion W2 than the first portions W1 . These may be the lighting pads LP1 , LP3 , LP5 , and LP7 located far from the edge of the display panel 10 .

Although not shown, as an additional embodiment, the lighting pads LP2 , LP4 , and LP6 may also include only the wide first portion W1 . In this case, the lighting pads LP1 - LP7 can be seen as being arranged in two rows like the dummy pads DP1 - DP7 , and completely interspersed with the dummy pads DP1 - DP7 and the lighting pads LP1 - LP7. It can correspond 1:1 overlapping.

Now, with reference to FIGS. 14 to 16 , the display device according to an exemplary embodiment will be described focusing on pixels of the display area DA. Reference is also made to FIG. 1 and the like to explain the relationship with other components of the display device.

14 is an equivalent circuit diagram of one pixel of a display device according to an exemplary embodiment, FIG. 15 is a layout diagram of pixels of the display device according to an exemplary embodiment, and FIG. 16 is a cross-sectional view taken along line XVI-XVI′ in FIG. 15 .

Referring to FIG. 14 , in the display device according to an exemplary embodiment, the pixels PX positioned in the display area DA include transistors connected to display signal lines 151, 152, 153, 158, 171, 172, and 192. (T1-T7), a storage capacitor (Cst), and an organic light emitting diode (OLED).

The transistors T1 to T7 include a driving transistor T1, a switching transistor T2, a compensation transistor T3, an initialization transistor T4, an operation control transistor T5, an emission control transistor T6, and a bypass transistor ( T7) may be included.

The display signal lines 151, 152, 153, 158, 171, 172, and 192 include a scan line 151, a previous scan line 152, an emission control line 153, a bypass control line 158, and a data line ( 171), a driving voltage line 172, and an initialization voltage line 192. The scan line 151 and the previous scan line 152 are connected to the scan signal generating circuit of the above-described scan driving units SDa and SDb to receive the scan signal Sn and the previous scan signal Sn-1, respectively. , The light emitting control line 153 may be connected to the light emitting control signal generating circuit of the light emitting driving units EDa and EDb to receive the light emitting control signal EM.

The previous scan line 152 transmits the previous scan signal Sn−1 to the initialization transistor T4, and the emission control line 153 transmits the emission control signal (Sn−1) to the operation control transistor T5 and the emission control transistor T6. EM), and the bypass control line 158 transfers the bypass signal BP to the bypass transistor T7.

The data line 171 may receive the data signal Dm output from the integrated circuit chip 30, and the driving voltage line 172 and the initialization voltage line 192 may respectively pass through the pads of the first pad area PA1. The input driving voltage ELVDD and the initialization voltage VINT may be applied. The initialization voltage VINT initializes the driving transistor T1.

The gate electrode G1 of the driving transistor T1 is connected to the first electrode Cst1 of the storage capacitor Cst. The source electrode S1 of the driving transistor T1 is connected to the driving voltage line 172 via the operation control transistor T5. The drain electrode D1 of the driving transistor T1 is connected to the anode of the organic light emitting diode OLED via the emission control transistor T6.

The gate electrode G2 of the switching transistor T2 is connected to the scan line 151 . The source electrode S2 of the switching transistor T2 is connected to the data line 171. The drain electrode D2 of the switching transistor T2 is connected to the source electrode S1 of the driving transistor T1 and connected to the driving voltage line 172 via the operation control transistor T5.

The gate electrode G3 of the compensation transistor T3 is connected to the scan line 151 . The source electrode S3 of the compensation transistor T3 is connected to the drain electrode D1 of the driving transistor T1 and connected to the anode of the organic light emitting diode OLED via the emission control transistor T6. The drain electrode D3 of the compensation transistor T3 is connected to the drain electrode D4 of the initialization transistor T4, the first electrode Cst1 of the storage capacitor Cst, and the gate electrode G1 of the driving transistor T1. It is connected.

The gate electrode G4 of the initialization transistor T4 is connected to the previous scan line 152 . The source electrode S4 of the initialization transistor T4 is connected to the initialization voltage line 192 . The drain electrode D4 of the initialization transistor T4 passes through the drain electrode D3 of the compensation transistor T3 to the first electrode Cst1 of the storage capacitor Cst and the gate electrode G1 of the driving transistor T1. are linked together

The gate electrode G5 of the operation control transistor T5 is connected to the emission control line 153. The source electrode S5 of the operation control transistor T5 is connected to the driving voltage line 172 . The drain electrode D5 of the operation control transistor T5 is connected to the source electrode S1 of the driving transistor T1 and the drain electrode D2 of the switching transistor T2.

The gate electrode G6 of the emission control transistor T6 is connected to the emission control line 153. The source electrode S6 of the emission control transistor T6 is connected to the drain electrode D1 of the driving transistor T1 and the source electrode S3 of the compensation transistor T3. The drain electrode D6 of the emission control transistor T6 is connected to the anode of the organic light emitting diode OLED.

The gate electrode G7 of the bypass transistor T7 is connected to the bypass control line 158. The source electrode S7 of the bypass transistor T7 is connected to the drain electrode D6 of the emission control transistor T6 and the anode of the organic light emitting diode OLED. The drain electrode D7 of the bypass transistor T7 is connected to the initialization voltage line 192 and the source electrode S4 of the initialization transistor T4.

The second electrode Cst2 of the storage capacitor Cst is connected to the driving voltage line 172 . A cathode of the organic light emitting diode (OLED) is connected to a common voltage line 741 transmitting a common voltage ELVSS. The common voltage line 741 or the cathode electrode receives the common voltage ELVSS that may be input through the pads of the first pad area PA1.

The circuit structure of the pixel PX is not limited to that shown in FIG. 14 , and the number of transistors and capacitors and connections between them can be variously modified.

Referring to FIG. 15 , a pixel area including, for example, a red pixel R, a green pixel G, and a blue pixel B is shown. In the display panel 10 , the pixels R, G, and B may be arranged in a matrix.

A scan line 151, a previous scan line 152, and a light emitting control line 153 respectively transmitting a scan signal (Sn), a previous scan signal (Sn-1), an emission control signal (EM), and a bypass signal (BP). ) and the bypass control line 158 extends substantially in the first direction (x). The bypass control line 158 may be the same as the previous scan line 152 . The data line 171 and the driving voltage line 172 respectively transmitting the data signal Dm and the driving voltage ELVDD extend substantially in the first direction y. The initialization voltage line 192 that transmits the initialization voltage VINT extends alternately between a portion 192a substantially parallel to the first direction (x) and a portion 192b inclined.

Driving transistor (T1), switching transistor (T2), compensation transistor (T3), initialization transistor (T4), operation control transistor (T5), emission control transistor (T6), bypass transistor (T7), storage capacitor (Cst) , and the organic light emitting diode (OLED) may be formed at the position indicated in FIG. 15 .

The organic light emitting diode (OLED) includes a pixel electrode 191 , an organic light emitting layer 370 and a common electrode 270 . The compensation transistor T3 and the initialization transistor T4 may have a dual gate structure to block leakage current.

Each channel of the driving transistor T1, the switching transistor T2, the compensation transistor T3, the initialization transistor T4, the operation control transistor T5, the emission control transistor T6 and the bypass transistor T7 ) is located on one semiconductor layer 130 . The semiconductor layer 130 may be formed by being bent in various shapes.

A cross-sectional structure of the display area DA will be described with reference to FIGS. 15 and 16 , focusing on some of the transistors T1 , T2 , and T6 and the storage capacitor Cst.

The display panel 10 includes a substrate 110 and layers formed thereon. The substrate 110 may be a flexible substrate made of a polymer such as polyimide, polyamide, polyethylene terephthalate, or polycarbonate. The substrate 110 may include a barrier layer to prevent diffusion of impurities deteriorating semiconductor properties and to prevent penetration of moisture. The substrate 110 may be a rigid substrate made of glass or the like.

A buffer layer 120 is positioned on the substrate 110 . The buffer layer 120 may serve to block impurities that may diffuse from the substrate 110 into the semiconductor layer 131 in the process of forming the semiconductor layer 131 and reduce stress applied to the substrate 110 . The buffer layer 120 may include an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx).

A semiconductor layer 130 including a driving channel 131a, a switching channel 131b, and an emission control channel 131f is positioned on the buffer layer 120 . The semiconductor layer 130 may include polycrystalline silicon, oxide semiconductor, or amorphous silicon.

In the semiconductor layer 130, both sides of the driving channel 131a have a driving source electrode 136a and a driving drain electrode 137a, and both sides of the switching channel 131b have a switching source electrode 136b and a switching drain electrode 137b. ) is there. In addition, an emission control source electrode 136f and an emission control drain electrode 137f are provided on both sides of the emission control channel 131f.

A first gate insulating layer 141 is positioned on the semiconductor layer 130 . On the first gate insulating layer 141, the scan line 151 including the switching gate electrode 155b, the previous scan line 152, the emission control line 153 including the emission control gate electrode 155f, and the bypass A first gate conductor including a control line 158 and a driving gate electrode (first storage electrode) 155a is positioned. The first gate conductor may be formed together by patterning one or more conductive layers.

A second gate insulating layer 142 is positioned on the first gate conductor and the first gate insulating layer 141 . A second gate conductor including a storage line 157 and a second storage electrode 156 extending from the storage line 157 is positioned on the second gate insulating layer 142 . The second storage electrode 156 forms a storage capacitor Cst together with the first storage electrode 155a. The first and second gate conductors include metal or metal alloys such as molybdenum (Mo), copper (Cu), aluminum (Al), silver (Ag), chromium (Cr), tantalum (Ta), and titanium (Ti). can include The first and second gate insulating layers 141 and 142 may include an inorganic insulating material such as silicon oxide or silicon nitride.

An interlayer insulating layer 160 is positioned on the second gate insulating layer 142 and the second gate conductor. The interlayer insulating layer 160 may include an inorganic insulating material and/or an organic insulating material.

Contact holes 61 to 67 are formed in the interlayer insulating layer 160 . On the interlayer insulating layer 160, a data line 171, a first voltage line 172a of the driving voltage line 172, a driving connection member 174, an initialization connection member 175, and a pixel connection member 179 are provided. 1 data conductor is located. The data line 171 is connected to the switching source electrode 136b through a contact hole 62 formed in the insulating layers 141 , 142 , and 160 . One end of the driving connecting member 174 is connected to the first storage electrode 155a through a contact hole 61 formed in the insulating layers 142 and 160, and the other end is connected to the insulating layers 141, 142 and 160. It is connected to a compensation drain electrode (not shown) and an initialization drain electrode (not shown) through a contact hole 63 formed therein. The initialization connection member 175 is connected to an initialization source electrode (not shown) through a contact hole 64 formed in the insulating layers 141 , 142 , and 160 . The pixel connection member 179 is connected to the emission control drain electrode 137f through a contact hole 66 formed in the insulating layers 141 , 142 , and 160 .

A passivation layer 161 is positioned on the first data conductor and the interlayer insulating layer 160 , and a first planarization layer 180a is positioned on the passivation layer 161 . A second data conductor including the second voltage line 172b of the driving voltage line 172 is positioned on the first planarization layer 180a. When the driving voltage line 172 is formed of two voltage lines 172a and 172b, the resistance of the driving voltage line 172 is reduced, thereby reducing the load effect, and thus preventing a luminance difference from occurring within the display area DA. can do. The first and second data conductors may include, for example, copper (Cu), aluminum (Al), silver (Ag), molybdenum (Mo), chromium (Cr), gold (Au), platinum (Pt), or palladium (Pd). , tantalum (Ta), tungsten (W), titanium (Ti), nickel (Ni), or other metal or metal alloy.

A second planarization layer 180b is positioned on the second conductor and the first planarization layer 180a. The first and second planarization layers 180a and 180b may include an organic material.

A pixel electrode 191 and an initialization voltage line 192 are positioned on the second planarization layer 180b. The pixel connection member 179 is connected to the pixel electrode 191 through the contact hole 81 formed in the insulating layers 180a and 180b, and the initialization connection member 175 is connected to the insulating layers 180a and 180b. It is connected to the initialization voltage line 192 through the formed contact hole 82 .

A pixel defining layer 350 having an opening 351 overlapping the pixel electrode 191 is positioned on the second planarization layer 180b. The pixel defining layer 350 may include an organic material such as polyacrylates resin or polyimides resin.

An organic light emitting layer 370 is positioned on the pixel electrode 191 , and a common electrode 270 is positioned on the organic light emitting layer 370 . The common electrode 270 may also be positioned on the pixel defining layer 350 and formed over a plurality of pixels. The pixel electrode 191, the organic light emitting layer 370, and the common electrode 270 form an organic light emitting diode (OLED).

An encapsulation layer (not shown) may be positioned on the common electrode 270 to protect the organic light emitting diode (OLED), and a polarization layer (not shown) may be positioned on the encapsulation layer to reduce reflection of external light.

Hereinafter, an exemplary cross-sectional structure of the lighting pads LP1 to LP7 of the pad part PP will be described with reference to FIG. 17 .

FIG. 17 is a cross-sectional view taken along line XVII-XVII' in FIG. 3 . FIG. 17 shows a cross-section of the display panel 10 where the lighting pads LP1 and LP2 shown in FIG. 3 are located.

The lighting pad LP1; LP2 may have a structure connected to the overlapping and connected conductive layers pa1, pb1; pa2, pb2. Although the first and second conductive layers pa1 and pb1 ; pa2 and pb2 are shown, fewer or more conductive layers may be included. The first conductive layers pa1 and pa2 may be formed of the same material as the first gate conductor in the same process. The second conductive layers pb1 and pb2 may be formed of the same material as the first data conductor in the same process. The lighting pads LP1 and LP2 may be formed of the same material as the second data conductor in the same process. Alternatively, the lighting pads LP1 and LP2 may be formed of the same material in the same process as the conductors positioned in the display area DA, such as the first data conductor and the pixel electrode.

Insulating layers that are also positioned in the display area DA may be formed in the pad portion PP. A buffer layer 120 and a first gate insulating layer are provided between the substrate 110 and the first conductive layers pa1 and pa2. (141) may be located. A second gate insulating layer 142 and an interlayer insulating layer 160 may be positioned between the first conductive layers pa1 and pa2 and the second conductive layers pb1 and pb2 . A passivation layer 161 and a first planarization layer 180a may be positioned between the second conductive layers pb1 and pb2 and the lighting pads LP1 and LP2 . The second conductive layers pb1 and pb2 may be connected to the first conductive layers pa1 and pa2 through contact holes formed in the second gate insulating layer 142 and the interlayer insulating layer 160, and the lighting pads (LP1 and LP2) may be connected to the second conductive layers pb1 and pb2 through contact holes formed in the passivation layer 161 and the first planarization layer 180a. The lighting pads LP1 and LP2 may be connected to the dummy pads of the flexible printed circuit layer 20 directly or through conductive particles. The lighting pads LP1 and LP2 emit light from the scan driver SDa through the first conductive layers pa1 and pa2 and/or the second conductive layers pb1 and pb2 and signal transmission lines connected thereto. It may be electrically connected to the drive unit EDA and/or the crack detection circuit MCD.

Although the embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements made by those skilled in the art using the basic concept of the present invention defined in the following claims are also included in the scope of the present invention. that fall within the scope of the right.

10: display panel
20: flexible printed circuit film
30: integrated circuit chip
ACF: anisotropic conductive film
CP: Challenging Particles
DP1-DP7: Dummy Pads
LP1-LP7: Lighting Pads
PP, FP: pad part

Claims (20)

A display panel including a pad portion, and
A flexible printed circuit film bonded to the pad portion
Including,
The pad part includes lighting pads located at least on one end,
the flexible printed circuit film includes dummy pads overlapping portions of the lighting pads at positions corresponding to the lighting pads;
The number of the dummy pads is less than the number of lighting pads;
All of the lighting pads are covered with the flexible printed circuit layer. A display panel including a pad portion, and
A flexible printed circuit film bonded to the pad portion
Including,
The pad part includes lighting pads located at least on one end,
the flexible printed circuit film includes dummy pads overlapping portions of the lighting pads at positions corresponding to the lighting pads;
The number of the dummy pads is less than the number of lighting pads;
A pitch of the dummy pads is greater than a pitch of the lighting pads. In paragraph 2,
The pitch of the dummy pads is twice or more than the pitch of the lighting pads. In paragraph 3,
In the lighting pads, lighting pads overlapping the dummy pads and lighting pads not overlapping the dummy pads are alternately positioned one by one along a first direction corresponding to a longitudinal direction of the pad part. A display panel including a pad portion, and
A flexible printed circuit film bonded to the pad portion
Including,
The pad part includes lighting pads located at least on one end,
the flexible printed circuit film includes dummy pads overlapping portions of the lighting pads at positions corresponding to the lighting pads;
The number of the dummy pads is less than the number of lighting pads;
The pad part includes an alignment mark between the lighting pads and pads adjacent thereto. In paragraph 5,
The flexible printed circuit layer includes alignment marks between the dummy pads and pads adjacent thereto. In paragraph 6,
The lighting pads are rectangular, and a long side is perpendicular to a first direction corresponding to the longitudinal direction of the pad part,
A pad adjacent to the lighting pads is a parallelogram, and a long side thereof is inclined with respect to the first direction. In paragraph 7,
The dummy pads have a rectangular shape, and a long side is perpendicular to the longitudinal direction of the pad part;
The display device of claim 1 , wherein pads adjacent to the dummy pads have a parallelogram shape, and a long side thereof is inclined with respect to a longitudinal direction of the pad part. In paragraph 1,
The display device of claim 1 , wherein widths of the lighting pads and widths of the dummy pads are substantially the same. In paragraph 1,
The display device of claim 1 , wherein lengths of the lighting pads and lengths of the dummy pads are substantially the same. In paragraph 1,
The display device of claim 1 , wherein the pad portion and the flexible printed circuit layer are bonded by an anisotropic conductive layer containing conductive particles. A display panel including a pad portion, and
A flexible printed circuit film bonded to the pad portion
Including,
The pad part includes lighting pads located at least on one end,
The flexible printed circuit film includes dummy pads corresponding to the lighting pads,
The dummy pads are arranged in at least two rows,
A pitch of the dummy pads is greater than a pitch of the lighting pads. In paragraph 12,
The number of dummy pads is the same as the number of lighting pads. In paragraph 12,
Each of the lighting pads includes a relatively wide first portion and a relatively narrow second portion,
The dummy pads overlap the first portions of the lighting pads. In paragraph 14,
The display device wherein the first parts and the second parts of the lighting pads are alternately positioned one by one along a first direction corresponding to a longitudinal direction of the pad part. In paragraph 14,
The display device of claim 1 , wherein lengths of the first parts are shorter than lengths of the second parts. In paragraph 14,
The display device of claim 1 , wherein widths of the first portions are substantially equal to widths of the dummy pads. In paragraph 14,
The display device of claim 1 , wherein lengths of the first portions are substantially equal to lengths of the dummy pads. A display panel including a pad portion, and
A flexible printed circuit film bonded to the pad portion
Including,
The pad part includes lighting pads located at least on one end,
The flexible printed circuit film includes dummy pads corresponding to the lighting pads,
The dummy pads are arranged in at least two rows,
The dummy pads include dummy pads positioned in a first column and dummy pads positioned in a second column;
a pitch of dummy pads in the first column and a pitch of dummy pads in the second column are the same;
The pitch of the dummy pads positioned in the first column is twice the pitch of the lighting pads. A display panel including a pad portion, and
A flexible printed circuit film bonded to the pad portion
Including,
The pad part includes lighting pads located at least on one end,
The flexible printed circuit film includes dummy pads corresponding to the lighting pads,
The dummy pads are arranged in at least two rows,
Some of the lighting pads include a relatively wide first portion and a relatively narrow second portion, and others include only the first portion and do not include the second portion;
The dummy pads overlap the first portions of the lighting pads.

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