KR102426394B1 - Organic light emitting display device - Google Patents

Abstract

The present specification discloses an organic light emitting display device. The organic light emitting display device includes: pixels arranged in a plurality of rows and including a driving transistor and an organic light emitting diode connected to the driving transistor; a high level voltage input line extending in a first direction and transmitting a high level voltage (VDD) to the pixel; gate lines corresponding to the plurality of rows, extending in a second direction different from the first direction, and transmitting a scan signal to the pixels; a scan controller configured to sequentially supply the scan signal to the gate lines in a direction opposite to a direction in which the high level voltage is transmitted to the pixels through the high level voltage input line; A global shutter device that operates so that the pixels emit light in the same time period may be included.

Description

Organic light emitting display device {ORGANIC LIGHT EMITTING DISPLAY DEVICE}

This specification relates to an organic light emitting display device. More specifically, it relates to an organic light emitting display device applied to a virtual reality realization device.

Virtual reality (VR) is an artificial technology that stimulates the human body's five senses (sight, hearing, smell, taste, and touch) to virtually experience experiences/environments that are difficult or impossible to obtain in reality. It is an environment that allows Virtual reality can be implemented through various hardware and software modules such as input devices, output devices, device driving software, and contents. In general, a virtual reality implementation device may be composed of an input unit, a processing unit, and an output unit. Among them, the output unit may be configured as a display device with increased immersion.

A display device that expresses information is very important in a virtual reality realization device. In particular, for a sense of immersion into virtual reality, image expression performance such as resolution, as well as its form, are important. Accordingly, as a form of display device for realizing virtual reality, a head mounted display (HMD) device is widely used. It is advantageous to use a light and thin display device as the HMD.

Recently, an organic light emitting display device (OLED) for application to the output unit (display device) of virtual reality realization devices including HMDs is being studied. This is because the organic light emitting display device is a display device using a self-luminous device using a thin light emitting layer between electrodes, and has the advantage of being lightweight and thin. Accordingly, research on improving/changing the structure, operation, function, etc. of the organic light emitting display device for a virtual reality realization device to suit the usage characteristics of the virtual reality realization device is being conducted in depth.

An object of the present specification is to propose a pixel driving circuit and a driving method of an organic light emitting display device used in a virtual reality realization device. The tasks of the present specification are not limited to the tasks mentioned above, and other tasks not mentioned will be clearly understood by those skilled in the art from the following description.

According to an embodiment of the present specification, an organic light emitting display device is provided. The organic light emitting display device includes: pixels arranged in a plurality of rows and including a driving transistor and an organic light emitting diode connected to the driving transistor; a high level voltage input line extending in a first direction and transmitting a high level voltage (VDD) to the pixel; gate lines corresponding to the plurality of rows, extending in a second direction different from the first direction, and transmitting a scan signal to the pixels; a scan controller configured to sequentially supply the scan signal to the gate lines in a direction opposite to a direction in which the high level voltage is transmitted to the pixels through the high level voltage input line; A global shutter device that operates so that the pixels emit light in the same time period may be included.

The details of other embodiments are included in the detailed description and drawings.

Embodiments of the present specification may provide a pixel driving method with improved luminance non-uniformity. In addition, embodiments of the present specification may provide an organic light emitting display device in which the bezel area is further narrowed. Effects according to the embodiments of the present specification are not limited by the contents exemplified above, and more various effects are included in the present specification.

1 illustrates an exemplary organic light emitting diode display that may be included in an electronic device.
2A and 2B are exemplary diagrams illustrating pixel circuits and driving of an organic light emitting display device used in a virtual reality realization device.
3 is an exemplary diagram illustrating pixel driving of an organic light emitting display device for realizing virtual reality.
4 is a diagram for explaining pixel driving of an organic light emitting diode display according to an exemplary embodiment of the present specification.

Advantages and features of the present specification and methods of achieving them will become apparent with reference to the embodiments described below in detail in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various different forms, and only these embodiments allow the disclosure of the present invention to be complete, and common knowledge in the technical field to which the present invention belongs It is provided to fully inform the possessor of the scope of the invention, and the present invention is only defined by the scope of the claims.

The shapes, sizes, proportions, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present specification are exemplary, and thus the present specification is not limited to the illustrated matters. Like reference numerals refer to like elements throughout. In addition, in describing the present invention, if it is determined that a detailed description of a related known technology may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted. When 'including', 'having', 'consisting', etc. mentioned in this specification are used, other parts may be added unless 'only' is used. When a component is expressed in the singular, the case in which the plural is included is included unless specifically stated otherwise. In interpreting the components, it is interpreted as including an error range even if there is no separate explicit description.

In the case of a description of the positional relationship, for example, when the positional relationship of two parts is described as 'on', 'on', 'on', 'beside', etc., 'right' Alternatively, one or more other parts may be positioned between two parts unless 'directly' is used. Reference to a device or layer “on” another device or layer includes any intervening layer or other device directly on or in the middle of another device. When it is described that a component is “connected”, “coupled” or “connected” to another component, the component may be directly connected or connected to the other component, but other components may be interposed between each component. It should be understood that each component may be “interposed” or “connected,” “coupled,” or “connected” through another component.

Although first, second, etc. are used to describe various elements, these elements are not limited by these terms. These terms are only used to distinguish one component from another. Accordingly, the first component mentioned below may be the second component within the spirit of the present invention.

The size and thickness of each component shown in the drawings are illustrated for convenience of description, and the present invention is not necessarily limited to the size and thickness of the illustrated component. Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 illustrates an exemplary organic light emitting diode display that may be included in an electronic device.

The organic light emitting display device 100 includes at least one active area, and an array of pixels is formed in the display area. One or more inactive areas may be disposed around the display area. That is, the non-display area may be adjacent to one or more side surfaces of the display area. The shape/arrangement of the display area and the non-display area is not limited. The display area and the non-display area may have a shape suitable for designing an electronic device on which the organic light emitting display device 100 is mounted. The electronic device may be a virtual reality (VR) display device, and exemplary shapes of the display area are pentagonal, hexagonal, circular, oval, and the like.

Each pixel in the display area may be associated with a pixel circuit. The pixel circuit may include one or more switching transistors and one or more driving transistors on a backplane. Each pixel circuit may be electrically connected to a gate line and a data line to communicate with one or more driving circuits such as a gate driver and a data driver. The driving circuit may be implemented as a thin film transistor (TFT) in the non-display area, mounted on a separate printed circuit board, and may include a flexible printed circuit board (FPCB), a chip-on-film (COF), and a tape (tape) (TCP). -carrier-package) may be coupled to a connection interface (pad/bump, pin, etc.) disposed in the non-display area through a circuit film. The arrangement of such a pixel circuit and a driving circuit is illustrated in FIG. 1 .

1 , a plurality of data lines DL1 , DL2 , DL3 , ..., DLm are disposed on the display panel 110 in a first direction, and a plurality of gate lines GL1 , GL1 , in a second direction intersecting the first direction GL2, ..., GLn) are disposed, and a plurality of pixels P may be disposed in a matrix type.

When a specific gate line GL is opened, the data driver 120 converts the image data Data' received from the controller 140 into an analog data voltage Vdata to the data lines DL1, DL2, and DL3. ,…,DLm).

The gate driver 130 sequentially supplies a gate signal of an on voltage or an off voltage to the gate lines GL1 , GL2 , ..., GLn under the control of the controller 140 . The gate driver 130 may be positioned on both sides of the display panel 110 or, in some cases, only on one side, depending on a driving method. Also, the gate driver 130 may include a plurality of gate driver integrated circuits, which are displayed in a tape automated bonding (TAB) method or a chip-on-glass (COG) method. It may be connected to a bonding pad of the panel 110 , or may be implemented as a GIP (Gate In Panel) type and disposed directly on the display panel 110 . Meanwhile, each of the gate driver integrated circuits may include a shift register, a level shifter, and the like.

The controller 140 controls the data driver 120 and the gate driver 130 , and supplies control signals to the data driver 120 and the gate driver 130 . The controller 140 starts scanning according to the timing implemented in each frame, and converts the image data (Data) input from the host system to match the data signal format used by the data driver 120 to convert the converted image data ( Data') and control the data operation at an appropriate time according to the scan. In addition, the controller 140 controls the data driver 120 and the gate driver 130 by timing the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, the input data enable signal, the clock signal, and the like. By receiving a signal, various control signals may be generated and output to the data driver 120 and the gate driver 130 . For example, in order to control the gate driver 130 , the controller 140 may include a gate start pulse (GSP), a gate shift clock (GSC), and a gate output enable signal (GOE). Gate Control Signals (GCSs) including Gate Output Enable) may be output. The controller 140 controls the data driver 120 , a source start pulse (SSP), a source sampling clock (SSC), and a source output enable signal (SOE). Data control signals (DCSs) including the like may be output.

The organic light emitting display device 100 further includes a power controller 150 for supplying various voltages or currents to the display panel 110 , the data driver 120 , and the gate driver 130 , or controlling various voltages or currents to be supplied. may include The power controller 150 is also called a power management integrated circuit (PMIC).

The organic light emitting diode display 100 has a plurality of reference voltage lines VR1 , VR2 , VR3 , ..., VRm for supplying a reference voltage Vref to pixels and a plurality of reference voltage lines 170 in common. It may include a connected reference voltage link line 170 . In addition, the organic light emitting diode display 100 may also include a high level/low level voltage line for supplying a high level voltage (VDD) and a low level voltage (VSS) related to driving of the pixel circuit.

The organic light emitting diode display 100 may further include various additional elements for generating various signals or driving pixels in the display area. Additional elements for driving the pixel may include an inverter circuit, a multiplexer, an electrostatic discharge circuit, and the like. The organic light emitting diode display 100 may also include additional elements related to functions other than pixel driving. For example, the organic light emitting display device 100 may include additional elements that provide a touch sensing function, a user authentication function (eg, fingerprint recognition), a multi-level pressure sensing function, a tactile feedback function, and the like. have. The above-mentioned additional elements may be located in the non-display area and/or in an external circuit connected to the connection interface.

2A and 2B are exemplary diagrams illustrating a pixel circuit and driving of an organic light emitting diode display used in a virtual reality realizing device.

FIG. 2A is an exemplary diagram illustrating a unit pixel circuit of the organic light emitting diode display, and FIG. 2B is a diagram illustrating a driving timing of the circuit illustrated in FIG. 2A. In an organic light emitting display device used in a virtual reality realization device, a process of transmitting an image signal (display information) to each pixel is similar to a typical organic light emitting display device.

Referring to FIGS. 2A and 2B , each unit pixel circuit (hereinafter, referred to as a pixel circuit) of the organic light emitting diode display 100 includes an organic light emitting diode (OLED) and an organic light emitting diode (OLED). It includes a driving transistor (D-Tr) for driving an organic light emitting diode (OLED) by supplying it.

An organic light emitting diode (OLED) includes a first electrode (eg, an anode) and a second electrode (eg, a cathode). An organic light emitting layer may be disposed between the first electrode and the second electrode. The first electrode of the organic light emitting diode OLED is connected to the driving transistor D-Tr, and the second electrode is connected to the low level voltage VSS. The voltage of the low level voltage (or the base voltage) may be changed into a low voltage and a high voltage under the control of the power controller 150 .

A first node of the driving transistor D-Tr is a gate node (node G) to which a first voltage is applied. A second node of the driving transistor D-Tr is a source node (S node) to which a second voltage is applied. Here, the first voltage may be a data voltage Vdata corresponding to a corresponding pixel, and the second voltage may be a reference voltage (Vref). A third node of the driving transistor D-Tr is a drain node (node D) to which a high level voltage VDD is applied. In summary, the driving transistor D-Tr includes a first node (G node) to which the data voltage Vdata is applied, a second node (S node) connected to the first electrode of the organic light emitting diode (OLED), and a high level and a third node (node D) connected to the voltage VDD.

The pixel circuit may include a capacitor, for example, a storage capacitor, connected between the first node (G node) and the second node (S node) of the driving transistor D-Tr. The capacitor Cst maintains a constant voltage for one frame.

Meanwhile, each pixel circuit may further include one or more transistors in addition to the driving transistor D-Tr, and in some cases, may further include one or more capacitors. In the circuit configuration shown in FIG. 2A , the pixel circuit includes a first transistor Tr1. A second transistor Tr2 may be further included.

The first transistor Tr1 is turned on/off or switched through the first gate signal SCAN1 applied through the first gate line. When the first transistor Tr1 is turned on by the first gate signal SCAN1 , the data voltage Vdata is applied to the first node (node G) of the driving transistor D-Tr. The second transistor Tr2 is turned on/off or switched through the second gate signal SCAN2 applied through the second gate line. When the second transistor Tr2 is turned on by the second gate signal SCAN2, the reference voltage Vref is applied to the second node (S node) of the driving transistor D-Tr.

The capacitor Cst has a data voltage (Vdata=VG) applied to the first node (G-node) of the driving transistor D-Tr and a reference voltage (Vref=VS) applied to the second node (S-node) for one frame. ), which is the difference in data information (Vgs).

Referring to FIG. 2B , one frame period may be divided into a first time period T1 and a second time period T2 . The first period is a data write and hold period in which output data (image signal) is written in each pixel and maintained for a predetermined time, and the second period is an emission period in which light is emitted according to the written data ( emission period). The data write and hold period may be further subdivided into a data write period in which data is written to each pixel and a data hold period in which the written data is maintained for a predetermined time, a sampling period, and initialization An additional operation section such as a section may be further included.

Since the gate signals are sequentially applied in the order of the gate lines GL1, GL2, ..., GLn, as shown in FIG. 2B , the data writing period of each of the pixels includes the gate lines GL1, GL2, ..., GLn. may be located sequentially in the order of As a result, the remaining data writing and maintaining sections after the corresponding data writing section with respect to each pixel correspond to the data holding section. Accordingly, the length of the data retention period may be different for each pixel.

The first transistor Tr1 is turned on during the period in which the data voltage Vdata is applied to the corresponding driving transistor D-Tr during the first time period T1. In other words, the gate signal SCAN1 applied to a specific pixel maintains a high state during the corresponding data writing period and maintains a low state during the rest. Accordingly, the first transistor Tr1 is turned on by the gate signal SCAN1 during the corresponding data writing period to apply the data voltage Vdata to the first node (node G) of the driving transistor D-Tr.

The second transistor Tr2 is turned on during the period in which the reference voltage Vref is applied to the corresponding driving transistor D-Tr during the first time period T1 to convert the reference voltage Vref to the driving transistor D-Tr. is applied to the second node (S node) of

The organic light emitting diode OLED does not emit light during the first time period T1, that is, while data is written to all pixels. Referring to FIG. 2B , since the switch SW0 connected to the cathodes of the organic light emitting diodes (OLEDs) included in all pixel circuits during the first time period T1 is connected to the high voltage terminal VDD, the organic No current flows through the light emitting diodes (OLEDs), and thus the organic light emitting diodes (OLEDs) do not emit light. However, when the second time period T2 is reached after data writing in all the pixels is completed, the switch SW0 is connected to the low voltage terminal Vss so that the organic light emitting diodes (OLEDs) of all the pixels emit light.

The reason that all pixels of the organic light emitting display device emit light at the same time point (time section) is due to the unique usage environment of the virtual reality (VR) display device. Since virtual reality (VR) display devices often express images close to the user's eyes to enhance immersion, when data entry and light emission of each pixel are sequentially performed like other organic light emitting display devices (the so-called rolling shutter (so-called rolling shutter) rolling shutter) operation), sequential light emission of horizontal lines may be perceived by the user, or a rapidly changing image may be perceived as being distorted. Therefore, in order to improve the visual perception deterioration, the organic light emitting display device for a virtual reality realization device drives the organic light emitting diodes (OLEDs) of all pixels to emit light at the same time as described above, which is also referred to as a global shutter. do.

Although the visibility of the organic light emitting display device for virtual reality display is improved through the global shutter operation, the inventors of the present specification have also discovered that there is a problem due to the global shutter operation. That is, the charging time required for the anode of the organic light emitting diode (OLED) is different for each gate line, and thus a difference in luminance may occur for each pixel (or for each gate line). This problem will be described in more detail in FIG. 3 .

3 is an exemplary diagram illustrating pixel driving of an organic light emitting display device for realizing virtual reality.

As described above, the organic light emitting display device 300 for realizing virtual reality performs a global shutter operation. Accordingly, the plurality of gate lines 1st GL, ... Nth GL, ... last GL are sequentially scanned and the anode voltage is charged/maintained until the light emission time point (Global Shutter). In general, the scan order is from the upper gate line 1st GL to the lower gate line last GL of the display area. In other words, the scan direction is a direction from the top to the bottom of the display area A/A as shown by the arrow in the drawing. The driving timing diagram of FIG. 3 depicts that the required voltage (or target voltage) is charged and maintained at the anode of the organic light emitting diode (OLED) after the gate open signal (pulse) according to the scan order (direction) as above. As shown in the figure, the voltage required for the 1st gate line (1st GL) is charged and maintained at the anode over T_1st time after the gate open signal, and the Nth gate line (Nth GL) is connected to the anode over T_Nth time after the gate open signal. The required voltage is charged and maintained, and the last gate line (last GL) is charged and maintained with the required voltage at the anode over the T_last time after the gate open signal.

Since it is not an ideal device, it takes a certain amount of time for a specific voltage to be charged to the anode electrode of the organic light emitting diode (OLED). Obviously, T_last is shorter than T_1st. Accordingly, the time T_last for which the required (target) voltage is charged and/or maintained at the anodes of the pixels belonging to the last gate line last GL may be insufficient.

On the other hand, the high level voltage (VDD) supplying the necessary (target) voltage to the anode is introduced through the input terminal (PAD) and transmitted to each pixel, and due to various resistance components such as wiring resistance, pixels far from the input terminal (PAD) (e.g. : As it is transmitted to the lower gate line (pixels on the last GL), the value decreases. Even in a display device in which the structure of the VDD wiring (vdd) is changed to compensate for the drop (reduction) of the high level voltage (VDD), the anode voltage charging and/or holding time may be insufficient. For example, as shown in FIG. 3 , in the case of a surrounding structure in which the VDD wiring (vdd) surrounds the periphery of the display area to reduce the drop of the high level voltage, the potential of VDD supplied to the lower pixel is sufficiently large. , it is unavoidable that the anode voltage charging time is insufficient as shown in the figure. (∵ T_last<T_1st)

Due to the above-described problem, the luminance of a pixel far from the VDD input terminal PAD may be lower than the target value. That is, even when a signal expressing the same gray level is transmitted, a pixel farther from the input terminal PAD may emit light with a lower luminance than a nearby pixel. Such a luminance difference appears more conspicuously at a low gray level. Accordingly, the present inventors have devised a pixel driving method capable of reducing the above-mentioned luminance non-uniformity caused by the global shutter operation of the organic light emitting diode (OLED).

4 is a diagram for explaining pixel driving of an organic light emitting diode display according to an exemplary embodiment of the present specification.

The organic light emitting display device 400 is a display device that can be applied to a virtual reality (VR) realization device, and is a display device in which the luminance non-uniformity problem of the display area A/A described in FIG. 3 is improved. The organic light emitting diode display 400 includes pixels arranged in a plurality of rows; a high level voltage input line (vdd) for transferring the high level voltage (VDD) to the pixel; gate lines GL for transferring a scan signal to the pixels; a scan controller sequentially supplying the scan signal to the gate lines GL; A global shutter device that operates so that the pixels emit light in the same time period may be included.

The pixels are arranged in the display area A/A to express an image. Each of the pixels includes a driving transistor and an organic light emitting diode, the driving transistor having a gate, a source connected to the OLED, and a high level power input It has a drain connected to a line vdd. The organic light emitting diode OLED has an anode connected to the source of the driving transistor and a cathode connected to a low level voltage (VSS) input line. In , the pixel is also used in the same sense as a pixel circuit.

The global shutter device performs the global shutter operation described with reference to FIGS. 2A and 2B . That is, the global shutter device is connected to all of the pixels so that the organic light emitting diode included in each of the pixels is turned off together in a first time period T1, and in a second time period T2. They work together to be turned on. In this case, the first time period T1 is a time period in which an image signal is transmitted to each of the pixels, and the second time period T2 is an image transmitted by the organic light emitting diode included in each of the pixels. It is a time interval in which light is emitted based on a signal. In other words, the first time period T1 is a time period in which the organic light emitting diodes are turned off, and the second time period T2 is a time period in which the organic light emitting diodes are turned on.

The global shutter device may be a switch SW0 between the low level voltage (VSS) input line and the cathode of the organic light emitting diode, as shown in FIG. 2A . The switch SW0 may be included in a power management integrated circuit PMIC. In this case, the power management integrated circuit may be mounted on an integrated circuit chip, a printed circuit board (PCB), or the like and connected to the substrate, or may be directly implemented in a non-display area within the substrate.

The high level voltage input line vdd extends in the first direction D1 and is connected to each pixel. The first direction D1 may be a vertical (or vertical) direction of the organic light emitting diode display 400 .

The gate lines GL correspond to the plurality of pixel rows, extend in a second direction D2 different from the first direction D1 , and are connected to each pixel. The second direction D2 may be a left-right (or horizontal) direction of the organic light emitting diode display 400 .

The scan controller may compensate for luminance non-uniformity occurring between pixels arranged in a row to which the scan signal is first input and pixels arranged in a row to which the scan signal is input later. That is, it is possible to improve the luminance non-uniformity problem caused by the reason described with reference to FIG. 3 .

The principle of improving the luminance non-uniformity according to the embodiment of the present specification is that i) does not use a wiring structure for preventing VDD drop such as the enveloping wiring of FIG. 3, ii) rather using the VDD drop in reverse, iii) there is a lot of VDD drop Send a scan signal first to the pixel that is expected to have a small VDD drop (pixels farther from the VDD input) to ensure sufficient anode charging time, Even if the anode charging time is not enough, it is not a problem.

As shown in FIG. 4 , the gate line 1st GL to which the scan signal is first sent is far from the VDD input terminal PAD, so the VDD drop is large, but the anode charging time T_1st is long enough. Accordingly, the anode is charged with a VDD value indicated by a dotted line, which is smaller than the ideal (no propagation loss) VDD value indicated by a solid line. Conversely, the gate line last GL to which the scan signal is sent last has a short anode charging time T_last, but is close to the VDD input terminal PAD, so the VDD drop is small. Accordingly, the anode is charged to an almost ideal VDD value. Accordingly, the total amount of anode charge of pixels belonging to 1st GL and pixels belonging to last GL may be equalized.

In this way, not only the luminance non-uniformity problem is improved, but also, when the wiring structure shown in FIG. 3 is adopted, the space on the left and right of the display area A/A occupied by the VDD wiring vdd can be saved. Accordingly, the embodiment of the present disclosure is more advantageous for realizing a narrow bezel display device.

For the above-described operation, the scan controller applies a scan signal to the gate lines in a direction opposite to the direction in which the high level voltage is transmitted to the pixels through the high level voltage input line (top to bottom direction in FIG. 4 ). supply Accordingly, scan signals may be input in the order of 1st GL, Nth GL, and last GL. That is, the scan controller corresponds to the gate line 1st GL corresponding to a row including pixels with a large drop (loss) of the high level voltage due to the transfer distance, and corresponds to a row including pixels with a small drop of the high level voltage. A scan signal is supplied before the gate line (last GL).

The organic light emitting diode display 400 may further include a high level voltage input terminal PAD provided on an outer side of the display area A/A. In this case, as shown in FIG. 4 , the high level voltage input line vdd extends in the first direction D1 from the high level voltage input terminal PAD to be connected to pixels close to the input terminal PAD first. can In this case, the scan controller may supply the scan signal from the gate line 1st GL furthest from the high level voltage input terminal PAD. Meanwhile, in a modified embodiment, unlike FIG. 4 , the high-level voltage input line vdd starts from the high-level voltage input terminal PAD and extends around the periphery of the display area to pixels far from the input terminal PAD. (pixels connected to 1st GL) may be connected first. In this case, the scan controller may supply the scan signal from the gate line last GL closest to the high level voltage input terminal PAD. This modified embodiment can be applied when there is sufficient space in the bezel. The scan controller may be included in the gate driver in the form of a function or a module. Alternatively, the scan controller may be implemented as a separate circuit chip and connected to the gate driver.

Although the embodiments of the present specification have been described in detail with reference to the accompanying drawings, the present specification is not necessarily limited to these embodiments, and various modifications may be made within the scope without departing from the technical spirit thereof. Accordingly, the embodiments disclosed in the present specification are for explanation rather than limiting the technical spirit of the present invention, and the scope of the technical spirit of the present invention is not limited by these embodiments. Each feature of the various embodiments of the present invention may be partially or wholly combined or combined with each other, and may be technically variously interlocked and operated by those skilled in the art, and each of the embodiments may be practiced independently of each other or together in a related relationship. may be carried out. The protection scope of the present invention should be construed by the following claims, and all technical ideas within the equivalent range should be construed as being included in the scope of the present invention.

Claims (13)

pixels arranged in a plurality of rows and including a driving transistor and an organic light emitting diode connected to the driving transistor;
a high level voltage input line extending in a first direction and transmitting a high level voltage (VDD) to the pixel;
gate lines corresponding to the plurality of rows, extending in a second direction different from the first direction, and transmitting a scan signal to the pixels;
a scan controller sequentially supplying the scan signal to the gate lines in a direction opposite to a direction in which the high level voltage is transmitted to the pixels through the high level voltage input line; and
a global shutter device that operates so that the pixels emit light in the same time period;
The scan controller is
An organic light emitting diode display for compensating for luminance non-uniformity occurring between pixels arranged in a row to which the scan signal is first input and pixels arranged in a row to which the scan signal is input later. delete The method of claim 1,
The scan controller is
In the gate line corresponding to the row including the pixels in which the drop of the high level voltage due to the transmission distance is large,
An organic light emitting diode display that supplies a scan signal before a gate line corresponding to a row including pixels having a small drop in the high voltage. The method of claim 1,
The organic light emitting diode display further comprising a high level voltage input terminal provided on an outer side of the display area in which the pixels are arranged. 5. The method of claim 4,
The high level voltage input line extends in the first direction from the high level voltage input terminal and is first connected to pixels adjacent to the input terminal. 6. The method of claim 5,
The scan controller is configured to supply the scan signal from a gate line furthest from the high level voltage input terminal. 5. The method of claim 4,
The high level voltage input line starts from the high level voltage input terminal and extends around the periphery of the display area, and is first connected to pixels far from the input terminal. 8. The method of claim 7,
The scan controller is configured to supply the scan signal from a gate line closest to the high level voltage input terminal. The method of claim 1,
The scan controller is an organic light emitting diode display included in a gate driver. The method of claim 1,
The global shutter element,
The organic light emitting diode connected to all the pixels and included in each of the pixels is turned off together in a first time period and operates to be turned on together in a second time period,
The first time period is a time period in which an image signal is transmitted to each of the pixels,
The second time period is a time period in which the organic light emitting diode included in each of the pixels emits light based on the transmitted image signal. 8. The method of claim 7,
The driving transistor has a gate, a source, and a drain connected to the high-level voltage input line,
The organic light emitting diode has an anode connected to the source of the driving transistor and a cathode connected to a low level (VSS) voltage input line. 12. The method of claim 11,
and the global shutter element is a switch between the low-level voltage input line and the cathode of the organic light emitting diode. The method of claim 1,
The organic light emitting display device,
An organic light emitting display device that is applied to a virtual reality realization device.

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