KR102360879B1 - Methods and apparatuses for cacheline conscious extendible hashing - Google Patents

Abstract

The present invention relates to a method and apparatus for hashing a cacheline concierge extendable, and the method and apparatus for hashing a cacheline concise extendable according to an embodiment of the present invention include a method for hashing a cacheline concise extendible hashing system in an apparatus In the extendable hashing method performed by Checking a bucket to be accessed within the identified segment, and storing data corresponding to the hash key in the checked bucket.

Description

METHODS AND APPARATUSES FOR CACHELINE CONSCIOUS EXTENDIBLE HASHING

[0001] The present invention relates to a method and apparatus for cashline concierge extendable hashing.

Many conventional data structures are designed to fit a disk that reads and writes 4KB or 8KB pages, but as in-memory-based database systems such as SAP HANA databases are recently utilized, unlike block-based data structures, 8 ), interest in data structures that read and write data of size is growing. Unlike the B-tree data structure, the hash table data structure has the advantage of being able to read and write data quickly in constant time.

A hash table determines a specific location where data can be stored through a hash function, and a space in which data having a specific hash key value can be stored is called a bucket. Hash tables can be divided into two types. One is a static hash table and the other is a dynamic hash table. A static hash table data structure requires one large contiguous memory space. That is, buckets in which data can be stored are sequentially stored in one memory space in succession to each other. If the hash key value of some data is K, it is stored in the K-th bucket, and the location of the K-th bucket is determined by (K×bucket size) in a contiguous memory space. That is, if the bucket is 4KB and the hash key value is 3, data must be stored in the bucket located at 12KB in the contiguous memory space allocated for the hash table. If a bucket is found in which data is to be stored, and a lot of data is already stored in that bucket, and no more new data can be stored, the static hash table allocates a contiguous memory space larger than the current memory space and are copied to the buckets located in the new memory space. This operation is called rehashing, and rehashing is a very overhead operation.

1 is a diagram for explaining a conventional extendable hashing data structure.

In order to reduce this rehashing overhead, a dynamic hash table that dynamically allocates buckets was developed. The most representative method is the extendable hash. The structure of the extendable hash table consists of two layers as shown in FIG. 1 . The upper layer is an array of pointers called a directory, and the lower layer is buckets for storing data. The last or first few bits of the hash key of the data to be stored are used to determine which directory entry to read. This number of bits is determined by the size of the directory. As in the example of FIG. 1 , if the directory is 4 ( 2 ² ), only 2 bits are used, and if the size of the directory is 8 ( 2 ³ ), 3 bits are used. In the example of FIG. 1, 2 bits are used. Since the least significant 2 bits (LSB), that is, the 2 bits are 10 ₍₂₎ , among the four directory entries, the binary number 10 ₍₂₎ , that is, the third pointer whose index is 2 in the array is used to find the bucket.

In the example of Figure 1, the bucket (Bucket) B3 is used. The number of bits used to find a directory is called the global depth (G) of the directory. Each bucket has its own Local Depth because a single bucket can be pointed to by multiple directory entries. As in the example of FIG. 1 , two directory entries point to bucket B2 having a global depth of 2 and a local depth of 1. If the global depth is 3 and the local depth is 1, the bucket is pointed to by 2 ^(3-1) directory entries.

In FIG. 1 , if new data is to be stored in bucket B2, but space is insufficient, two new buckets should be created and data should be divided and stored. In Figure 1, Bucket B2 is stored in Bucket B2 using only one bit marked in dark black because the local depth is 1, but if the bucket is divided, the local depth is increased by one and the two local depths are 2 Dog buckets B4 and B5 are made as shown in FIG. 2 .

2 is a diagram for explaining an example of a conventional splitting of an extendable hash.

The data stored in the bucket with insufficient space is copied to the first new bucket, bucket B4, or the second new bucket, bucket B5, according to the increased local depth, that is, a 2-bit value. The data whose last 2 bits are 01 ₍₂₎ is copied to the first newly created bucket B4, and the data with 11 is copied to the second newly created bucket B5. After completing this partitioning process, the directory entries pointing to Bucket B2 are updated. That is, the directory entry 01 _{( 2)} points to the new bucket B4 containing the data corresponding to 01 (2), and the directory entry 11 ₍₂₎ points to the new bucket B5 containing the data corresponding to 11 ₍₂₎ . should go

3 is a diagram for explaining an example of directory extension of an extendable hash.

If the local depth is K and the global depth is K, then the bucket points to only one directory entry. Assume that in the example of Figure 2, the bucket (Bucket) B3 is divided. The local depth of Bucket B3 is 2 (Local depth=2), and the global depth of the directory is also 2 (G=2). In this case, when bucket B3 is partitioned and new buckets B6 and B7 having a local depth of 3 are created, data is copied to B6 or B7 using bits as many as the local depth. That is, 1101...10001010 ₍₂₎ in bucket B3 is copied to bucket B6 corresponding to 010 ₍₂₎ , which is the least significant 3 bits, and 010...01101110 ₍₂₎ corresponds to 110 ₍₂₎ . is copied to bucket B7. However, it is not possible to store pointers to these new buckets B6 and B7 in the directory. Therefore, if the bucket is divided when the local depth and the global depth are the same, the directory needs to be made twice as large as in FIG. 3 . This operation is called Directory Doubling. That is, a directory with a global depth of 3 (2 ³ ) that can store 8 directory entries is created. At this time, pointers to other unpartitioned buckets are copied and new directory entries are double pointed. That is, Bucket B1 pointed to by 00 is pointed to not only by 000 ₍₂₎ but also by 100 ₍₂₎ directory entries.

The extendable hashing described above is used in various file systems such as Oracle's ZFS. However, since the size of the bucket is set to 4KB or 8KB, performance is optimized only for disk-based systems. That is, it is not a data structure suitable for an in-memory system. If this extendable hashing is applied to the in-memory system as it is, the bucket must be searched through the directory and all data in the bucket must be read one by one. In addition, non-volatile memory that can be accessed in units of bytes, such as Intel 3D Xpoint, STT-MRAM (Spin Transfer Torque-Magnetic Random Access Memory), and PCRAM (Phase-change memory), which are being developed recently. In order to utilize the data structure, even if the data structure is updated with 8-byte operations, the data structure must always maintain consistency. .

SUMMARY Embodiments of the present invention provide a method and apparatus for concise extendable hashing of a cache line, which can minimize access to a memory cache line by using a segment including at least one bucket referenced through a directory.

Embodiments of the present invention provide failure-atomicity that conventional extendable hashing could not provide for non-volatile memory, and reduce non-volatile memory by accessing fewer cache lines. It is an object of the present invention to provide a method and apparatus for cashline concise extendable hashing that can be used more efficiently.

According to an embodiment of the present invention, in an extendable hashing method performed by a Cacheline Conscious Extendible Hashing device, a directory using a first index of a hash key ) to check the referenced segment (Segment) through; identifying a bucket to be accessed within the identified segment using a second index of the hash key; and storing data corresponding to the hash key in the checked bucket, a cash line concierge extendable hashing method may be provided.

The method may further include checking a global depth bit value of the hash key.

The first index of the hash key may include a Most Significant Bit (MSB) of the hash key.

The second index of the hash key may include a least significant bit (LSB) of the hash key.

The checking of the segment may include searching a directory entry corresponding to the first index of the hash key, and checking a segment referenced through the searched directory entry.

The method may further include dividing the segment when a collision occurs when the segment is accessed using the second index of the hash key.

In the segmenting of the segment, a new segment having an increased local depth is generated, data of the identified segment is scanned, and data having a preset bit value corresponding to the increased local depth is generated. can be copied to a new segment.

In the segmenting of the segment, a local depth of the segmented segment may be increased and data having another predetermined bit value corresponding to the increased local depth may be designated as an invalid key.

The dividing of the segment may include increasing a local depth of the identified segment, updating a pointer of a directory entry, and increasing a local depth of the segmented segment.

The method may further include tying directory entries into pairs called buddys when updating the directory when the segment is segmented.

The method may further include identifying a segment in which a system problem occurs using the global depth and the local depth of the segment, and performing recovery of the segment in which the system problem occurs using the buddy.

On the other hand, according to another embodiment of the present invention, a memory for storing at least one program and for storing a segment including at least one bucket referenced through a directory; and a processor connected to the memory through a cache, wherein the processor, by executing the at least one program, uses a first index of a hash key to refer to a segment referenced through a directory ), check a bucket to be accessed within the identified segment using the second index of the hash key, and write or read data corresponding to the hash key to the checked bucket A Sears extendable hashing device may be provided.

The processor may further include checking a global depth bit value of the hash key.

The first index of the hash key may include a Most Significant Bit (MSB) of the hash key.

The second index of the hash key may include a least significant bit (LSB) of the hash key.

The processor may search for a directory entry corresponding to the first index of the hash key, and identify a segment referenced through the searched directory entry.

The processor may divide the segment when a collision occurs when the segment is accessed using the second index of the hash key.

The processor generates a new segment having an increased local depth, scans data of the identified segment, and adds data having a preset bit value corresponding to the increased local depth to the generated new segment. can be copied.

The processor may increase a local depth of the divided segment and designate data having a different bit value corresponding to the increased local depth as an invalid key.

The processor may increase a local depth of the identified segment, update a pointer of a directory entry, and increase a local depth of the divided segment.

When the identified segment is segmented, the processor may pair directory entries with a buddy when updating the directory.

The processor may identify a segment in which a system problem has occurred using the global depth and the local depth of the segment, and may perform recovery of the segment in which the system problem has occurred using the buddy.

Meanwhile, according to another embodiment of the present invention, there is provided a non-transitory computer-readable storage medium including at least one program executable by a processor, wherein the at least one program, when executed by the processor, causes the processor to: A segment referenced through a directory is identified using a first index of a hash key, and a bucket to be accessed within the identified segment using a second index of the hash key ), and a non-transitory computer-readable storage medium including instructions for inserting a key value corresponding to the hash key into the checked bucket may be provided.

Embodiments of the present invention may minimize memory cache line access by using a segment including at least one bucket referenced through a directory.

Embodiments of the present invention provide failure-atomicity that conventional extendable hashing could not provide for non-volatile memory, and reduce non-volatile memory by accessing fewer cache lines. can be used more efficiently.

1 is a diagram for explaining a conventional extendable hashing data structure.
2 is a diagram for explaining an example of a conventional splitting of an extendable hash.
3 is a diagram for explaining an example of directory extension of an extendable hash.
4 is a configuration diagram for explaining the configuration of a cache line concise extendable hashing apparatus according to an embodiment of the present invention.
5 to 7 are diagrams for explaining the operation of the cash line concierge extendable hashing apparatus according to an embodiment of the present invention.
8 is a flowchart for explaining a cache line concise extendable hashing operation according to an embodiment of the present invention.
9 is a diagram for explaining a new segment creation operation in the cache line-conciliation extendable hashing operation according to an embodiment of the present invention.
FIG. 10 is a diagram for explaining a separation and a slow delete operation in a cache line-conscious extendable hashing operation according to an embodiment of the present invention.
11 to 13 are diagrams for explaining a tree-type segment separation operation in the cache line concierge extendable hashing operation according to an embodiment of the present invention.
14 is a diagram for explaining a pseudo code of a recovery algorithm according to an embodiment of the present invention.
15 is a flowchart for explaining an insert operation in the method of cache line concise extendable hashing according to an embodiment of the present invention.
16 is a flowchart for explaining a division operation in the method of cache line concise extendable hashing according to an embodiment of the present invention.
17 is a flowchart for explaining a recovery operation in the method of cache line concise extendable hashing according to an embodiment of the present invention.
18A to 18C are diagrams illustrating experimental results of throughput with various segment/bucket sizes for an embodiment of the present invention and the prior art.
19A to 19D are diagrams illustrating the time taken for insertion while changing the R/W latency of a non-volatile memory according to an embodiment of the present invention and the prior art.
20A to 20C are diagrams illustrating concurrent execution performance for latency CDF and insert/retrieve throughput for an embodiment of the present invention and the prior art.

Since the present invention can have various changes and can have various embodiments, specific embodiments are illustrated in the drawings and described in detail.

However, this is not intended to limit the present invention to specific embodiments, and it should be understood to include all modifications, equivalents, and substitutes included in the spirit and scope of the present invention.

Terms such as first, second, etc. may be used to describe various elements, but the elements should not be limited by the terms. The above terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, a first component may be referred to as a second component, and similarly, a second component may also be referred to as a first component. and/or includes a combination of a plurality of related listed items or any of a plurality of related listed items.

When an element is referred to as being “connected” or “connected” to another element, it is understood that it may be directly connected or connected to the other element, but other elements may exist in between. it should be On the other hand, when it is said that a certain element is "directly connected" or "directly connected" to another element, it should be understood that the other element does not exist in the middle.

The terms used in the present application are only used to describe specific embodiments, and are not intended to limit the present invention. The singular expression includes the plural expression unless the context clearly dictates otherwise. In the present application, terms such as “comprise” or “have” are intended to designate that a feature, number, step, operation, component, part, or combination thereof described in the specification exists, but one or more other features It should be understood that this does not preclude the existence or addition of numbers, steps, operations, components, parts, or combinations thereof.

Unless defined otherwise, all terms used herein, including technical and scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in a commonly used dictionary should be interpreted as having a meaning consistent with the meaning in the context of the related art, and should not be interpreted in an ideal or excessively formal meaning unless explicitly defined in the present application. does not

Hereinafter, preferred embodiments of the present invention will be described in more detail with reference to the accompanying drawings. In describing the present invention, in order to facilitate the overall understanding, the same reference numerals are used for the same components in the drawings, and duplicate descriptions of the same components are omitted.

4 is a configuration diagram for explaining the configuration of a cache line concise extendable hashing apparatus according to an embodiment of the present invention.

As shown in FIG. 4 , the cache line concierge extendable hashing apparatus 100 according to an embodiment of the present invention includes a processor 110 , a cache 120 , and a memory 130 . However, not all illustrated components are essential components. The cashline concierge extendable hashing apparatus 100 may be implemented by more components than the illustrated components, and the cashline conciuous extendable hashing apparatus 100 may be implemented by fewer components.

Hereinafter, a detailed configuration and operation of each component of the cache line concierge extendable hashing apparatus 100 of FIG. 4 will be described.

The memory 130 stores at least one program. The memory 130 may include a file system or a database. The memory 130 stores a segment including at least one bucket referenced through a directory. Here, the memory 130 may be a non-volatile memory (NVM, NVRAM) or a volatile memory.

The processor 110 is connected through the memory 130 and the cache 120 . The processor 110 may store data in or read data stored in the bucket in the file system of the memory through the cache line of the cache 120 .

The processor 110, by executing at least one program, by using the first index of the hash key (Hash key) to identify the segment referenced through the directory (Directory), the second index of the hash key Checks the bucket to be accessed within the identified segment using the method, and stores the data corresponding to the hash key in the checked bucket. Here, the processor 110 may directly access one of the plurality of buckets in the segment by using the second index of the hash key.

In various embodiments, the processor 110 may check a global depth bit value of the hash key.

In various embodiments, the first index of the hash key may include a Most Significant Bit (MSB) of the hash key.

In various embodiments, the second index of the hash key may include a least significant bit (LSB) of the hash key.

In various embodiments, the processor 110 may search for a directory entry corresponding to the first index of the hash key, and identify a segment referenced through the searched directory entry.

In various embodiments, the processor 110 may divide the segment when a collision occurs when the segment is accessed using the second index of the hash key.

In various embodiments, the processor 110 generates a new segment with an increased local depth, scans data of the identified segment, and generates data having a preset bit value corresponding to the increased local depth. It can be copied to a new segment that has been created. For example, the processor 110 may copy data in which the bit value of the second index corresponding to the increased local depth is 1 to a new segment and update the pointer of the corresponding directory entry.

In various embodiments, the processor 110 may increase the local depth of the segment to be divided, and may designate data having another predetermined bit value corresponding to the increased local depth as an invalid key. For example, the processor 110 does not erase data having a bit value of 0 corresponding to the increased local depth of the second index from the segment to be divided, and increases only the local depth by an 8-byte operation, so that the unerased data can make it an invalid key. That is, data that is not erased is regarded as an invalid key and may be overwritten by other data.

In various embodiments, the processor 110 may increase the local depth of the identified segment, update a pointer of a directory entry, and increase the local depth of the segmented segment. For example, the processor 110 may update updated pointers among pointers of a directory entry in the order of a pointer having a larger second index value to a pointer having a smaller second index value. As another example, the processor 110 may update updated pointers among pointers of a directory entry in the order of a pointer having a small second index value to a pointer having a large second index value. Thereafter, the processor 110 may recover by performing a recovery operation in the opposite direction to the updating order.

In various embodiments, the processor 110 may pair the directory entries with a buddy when updating the directory when the identified segments are segmented.

In various embodiments, the processor 110 may identify a segment in which a system problem has occurred using the global depth and the local depth of the segment, and may perform recovery of the segment in which the system problem has occurred using the buddy.

5 to 7 are diagrams for explaining the operation of the cash line concierge extendable hashing apparatus according to an embodiment of the present invention.

The unit of data transfer between memory and CPU that can be accessed in bytes is a 64-byte cacheline in modern CPUs. If a conventional 8KB bucket is used, a bucket consisting of 128 cache lines must be read to find one data, so a total of 128 memory is accessed. Unlike disk-based extendable hashing, an in-memory hash table does not have to match the size of the bucket to the size of the disk block. If the bucket size is set to 64 bytes, a total of one memory access is required because one cache line is read to read one bucket.

However, if the size of the bucket is one cacheline, there is a disadvantage in that the size of the directory becomes very large due to the characteristic of extendable hashing, which requires one directory entry for every 64-byte cacheline. .

An embodiment of the present invention is to provide a Cacheline-Conscious Extendible Hashing (CCEH) method suitable for a memory that can be accessed in units of bytes by modifying the extendable hashing method. . Cacheline-Conscious Extendible Hashing (CCEH) according to an embodiment of the present invention is a modification of extendable hashing, and conventional extendable hashing is a non-volatile memory It is an extendable hashing method that provides failure-atomicity that could not be provided for , and can use non-volatile memory more efficiently with fewer cacheline accesses. The CCEH can efficiently manage the cacheline by placing a layer called a segment in the conventional two-tier structure consisting of a directory and a bucket.

FIG. 5 shows an example in which the cache line concierge extendable hashing device according to an embodiment of the present invention operates including a non-volatile memory (Persistent Memory, PM)-based file system or database.

As shown in FIG. 5 , the cache line concise extendable hashing device according to an embodiment of the present invention includes a CPU 210 , a CPU cache 220 , and a non-volatile memory (Persistent Memory, PM). (230). Here, the non-volatile memory 230 may include a PM-based file system 231 or a PM-based database. A dynamic random-access memory (DRAM) may be used instead of the non-volatile memory 230 .

The CPU 210 checks the directory entry referenced by the index of the hash key through the cache line of the CPU cache 220, and attempts to access the bucket in the segment indicated by the directory entry.

As shown in FIG. 6 , the CPU 210 may identify a segment referenced through a directory by using a first index of a hash key. That is, the CPU 210 may determine which directory entry to refer to by using the segment index. Here, the segment index may be referred to as a first index. In the example of FIG. 6 , it can be confirmed that the directory entry 010 ₍₂₎ is referred to by using the segment index 10 ₍₂₎ corresponding to the most significant 2 bits.

As shown in FIG. 7 , the CPU 210 may identify a bucket to be accessed within the identified segment using the second index of the hash key. The CPU 210 may use a bucket index of a hash key to determine which bucket to read in the referenced segment. Here, the bucket index may be referred to as a second index. As a result, the CPU 210 may check the segment through the directory entry referenced by the segment index, and check the bucket indicated by the bucket index within the checked segment. Directory [segment index] + bucket index can be the address of the bucket you want to access. And the CPU 210 may store a key value or data corresponding to the hash key in the checked bucket. Alternatively, the CPU may read or write a key value or data corresponding to the hash key in the checked bucket.

8 is a flowchart for explaining a cache line concise extendable hashing operation according to an embodiment of the present invention.

In the hash table structure according to an embodiment of the present invention, an intermediate layer called a segment is placed between a bucket and a directory. That is, a segment is a continuous memory space in which at least one bucket is bundled, and is used to reduce the size of the directory. In other words, the directory does not point directly to the bucket, but to the beginning of the segment, and which bucket in the segment, ie, which cache line to read, is determined using different bits of the hash key. In one embodiment of the present invention, a segment is specified using the most significant bits (MSB) or least significant bits (LSB) of the hash key, and a bucket in the segment is identified using other bits of the hash key. specify

8 as an example, since the global depth is 2 (G=2), the directory has 4 (2 ² ) entries, that is, 00 (L=2), 01 (L=2), 10 (L=1) and 11 (L=1). If the given hash key value is 10101010… If 11111110 ₍₂₎ , a segment is found in the directory using two bits 10 ₍₂₎ as much as the global depth, that is, the segment index. In this example, it is assumed that 2 most significant bits are used. 10 ₍₂₎ points to Segment 3. In order to specify the bucket inside the segment, other bits of the hash key, that is, the bucket index, are used, and the number of these bits is determined by the size of the segment. That is, if a segment has 2 ^S buckets (cachelines), S bits must be used. Since it is assumed that the segment is specified using the most significant bit, the least significant bits (LSB), that is, the bucket index, are used to specify the bucket. For example, suppose a segment consists of 256 (2 ⁸ ) cacheline-sized buckets. In this case, 8 bits are used to specify the bucket. The last 8 bits of the given hash key value are 11111110 ₍₂₎ , so the 254th cache line becomes a bucket to store or find data. That is, hash key 10101010… Given 11111110 ₍₂₎ , (&Segment(10 ₍₂₎ ) + 64 * 11111110 ₍₂₎ ) operation can be used to obtain the memory address of the cache line to store or read data at once. Here, the segment index and bucket index of the hash key are not limited to a specific location.

As described above, the cache line concise extendable hashing apparatus 100 according to an embodiment of the present invention can store or read data through only two cache line accesses. The cache line-conciliation extendable hashing apparatus according to an embodiment of the present invention can minimize the number of memory accesses through a segment.

9 is a diagram for explaining a new segment creation operation in a cache line-conciliation extendable hashing operation according to an embodiment of the present invention.

In next-generation non-volatile memory, data remains in the memory even when the system dies or the power is turned off. When data is stored in such non-volatile memory, data can be accessed without any problem even after rebooting the system only after updating the data atomically.

In the conventional disk-based extendable hashing technique, when a bucket is partitioned or a directory is updated, a logging operation that creates a backup in a separate storage space is performed to duplicate a large amount of data.

The cache line-conscious extendable hashing apparatus according to an embodiment of the present invention may provide [Failure-Atomic Segment Split] for a non-volatile memory.

When a segment is divided, the cache line-conciliation extendable hashing apparatus according to an embodiment of the present invention allocates a new segment and scans all data stored in the segment. The local depth of the newly created segment is one greater than the local depth of the segment being split. Therefore, while scanning the data of the segment to be divided, one bit of the hash key is checked. If this bit is 1, it is copied to the new segment, and if it is 0, it is left in the existing segment. Note that even if data is copied to a new segment, it will not be deleted from the previous segment. This is to use the previous segment as it is during recovery.

FIG. 9 shows a state in which segment 3 having a local depth of 1 in FIG. 8 is divided to form a new segment 4 having a local depth of 2. Referring to FIG. Even if the data copied from the previous segment to the new segment 4 is not deleted, the data becomes invalid as soon as the local depth of the segment increases, so there is no problem even if you do not delete it. For example, 1101...11111110 ₍₂₎ in FIG. 9 is copied to segment 4, but remains in segment 3 as it is. However, such data is regarded as an invalid key when the local depth of the segment is increased as shown in FIG. 10, and this space can be used to store other data.

10 is a diagram for explaining a separation and a slow delete operation in a cache line-conciliation extendable hashing operation according to an embodiment of the present invention.

As shown in FIG. 10 , in FIG. 9 , 1110...00000000 ₍₂₎ , 1110...00000001 ₍₂₎ , 1101...111110 ₍₂₎ were copied to Segment 4, but Segment ) is not deleted in 3 and remains. This operation is referred to as a lazy deletion operation. As shown in Fig. 10, data copied to segment 4 but not deleted from segment 3 is regarded as an invalid key as soon as the local depth of segment 3 is increased to 2, and this space can be used to store other data. .

The local depth of the segment being split from the previous segment should be increased after all new segments have been written. If this order is not observed, consistency problems may occur when the system dies. After increasing the local depth of the previous segment, the pointers of the directory entry are updated and the local depth of the segmented segment is increased. This order must also be followed for recovery. 10 shows a state in which the local depth of a segmented segment is increased and a directory points to a new segment.

11 to 13 are diagrams for explaining a tree-type segment separation operation in the cache line concierge extendable hashing operation according to an embodiment of the present invention.

When a segment is split, the directory must be updated with several directory entries. In an embodiment of the present invention, when updating a directory, a history in which segment split occurs can be managed in a tree form by grouping directory entries into a pair called a buddy. have. In one embodiment of the present invention, when a problem occurs in the system, the problem can be found by searching this tree. In this case, in an embodiment of the present invention, it is possible to determine which part has a problem using the global depth and the local depth, and to use a buddy as a backup to perform recovery.

11 shows a directory with a global depth of 4 with 16 directory entries. The tree structure shows the segmented history. It can be seen that S1 is divided into S1 and S3, and S2 is divided into S2 and S4 in the cache line concise extendable hashing (CCEH) structure in which there are only two segments S1 and S2 at first. Also, it can be seen that at Level 3, S1 is again divided into S1 and S5, and S3 is divided into S3 and S6. The current tree structure has a global depth of 4. Consider a situation in which segment S2 is divided in this state.

If S2 is divided into S2 and S11, the ninth through twelfth entries in the directory must be updated. In a situation where several directory entries are updated, the cashline concierge extendable hashing apparatus 100 according to an embodiment of the present invention first updates the rightmost entry and updates the left entries one by one. As another example, in a situation where several directory entries are updated, the cashline concierge extendable hashing apparatus 100 may first update the leftmost entry and then update the right entries one by one. As shown in FIG. 12 , the cashline concierge extendable hashing apparatus 100 according to an embodiment of the present invention updates the twelfth S2 (L=2) to S11 (L=3). As shown in FIG. 13 , the cashline concierge extendable hashing apparatus 100 updates the next 11th entry S2 (L=2) to S11 (L=3) as well. Thereafter, the cache line concierge extendable hashing apparatus 100 increases the local depths of the tenth and ninth entries by one and changes them to S2 (L=3). This sequence must be followed for recovery.

If the system dies during the update while keeping this order, the directory can be updated to the previously consistent state through the recovery algorithm shown in FIG. 14 .

14 is a diagram for explaining a pseudo code of a recovery algorithm according to an embodiment of the present invention.

The recovery algorithm according to an embodiment of the present invention takes advantage of the fact that, when segment split occurs, the local depth of the buddy segment must always be the same as the characteristic that occurs because the operations are performed in order as described above. did it If the local depth of the current segment is smaller than the local depth of the right buddy segment, it means that the system died while the segment was being split. Therefore, the right segment is reconfigured using the current node as a backup. If the two local depths are the same, it means that the split buddy segment is completely written.

15 is a flowchart for explaining an insert operation in the method of cache line concierge extendable hashing according to an embodiment of the present invention.

In step S101, the cash line concierge extendable hashing apparatus 100 according to an embodiment of the present invention receives an index of a hash key.

In step S102, the cache line concierge extendable hashing device 100 checks the global depth bit value of the input hash key.

In step S103, the cashline concierge extendable hashing device 100 accesses the corresponding segment in the directory by using the index of the hash key.

In step S104, the cash line concierge extendable hashing device 100 accesses the bucket corresponding to the LSB, which is the bucket index of the hash key.

In step S105, the cashline concierge extendable hashing device 100 checks whether a collision occurs.

In step S106, the cashline concierge extendable hashing device 100 creates a key value corresponding to the hash key if no collision occurs.

In step S107, when a collision occurs, the cashline concierge extendable hashing apparatus 100 divides the segment in which the collision occurs.

16 is a flowchart illustrating a division operation in the method of cache line concise extendable hashing according to an embodiment of the present invention.

In step S201 , the cache line concise extendable hashing apparatus 100 according to an embodiment of the present invention creates a new segment with an increased local depth after segment division starts.

In step S202 , the cashline concise extendable hashing device 100 checks the bit of the hash key, and then copies the value to a new segment.

In step S203 , the cacheline concise extendable hashing device 100 updates the pointer of the directory entry.

In step S204 , the cacheline concise extendable hashing device 100 increases the local depth of the previous segment.

17 is a flowchart for explaining a recovery operation in the method of cache line concise extendable hashing according to an embodiment of the present invention.

In step S301 , the cache line concise extendable hashing apparatus 100 according to an embodiment of the present invention starts a recovery operation from the first directory entry.

In step S302, the cache line concierge extendable hashing device 100 checks whether the current location is larger than the directory size.

In step S303, if the current location is equal to or smaller than the directory size, the cacheline concierge extendable hashing apparatus 100 checks the local depth of the current location. In step S302, if the current location is greater than the directory size, the cache line concierge extendable hashing device 100 ends the recovery operation.

In step S304 , the cash line concise extendable hashing device 100 checks a stride value. That is, the cache line concierge extendable hashing apparatus 100 obtains the stride value as Stride = 2 ^{(global depth - current depth)} .

In step S305, the cash line concierge extendable hashing device 100 checks the buddy value. That is, the cash line concierge extendable hashing apparatus 100 checks a buddy value such as buddy = current location + Stride.

In step S306, the cash line concierge extendable hashing device 100 checks whether the buddy has reached the current location.

In step S307, when the buddy reaches the current position, the cashline concierge extendable hashing apparatus 100 adds a stride to the current position.

In step S308 , if the buddy does not reach the current location, the cashline concise extendable hashing apparatus 100 checks whether the local depth of the buddy is equal to the current depth.

In step S309 , if the local depth of the buddy is not the same as the current depth, the cashline concise extendable hashing apparatus 100 stores the current depth in the local depth of the buddy. On the other hand, if the local depth of the buddy is the same as the current depth, the cache line concise extendable hashing apparatus performs step S307.

In step S310 , the cacheline concise extendable hashing apparatus 100 stores the current depth in the local depth of the buddy, and then decreases the buddy value. And the cash line concierge extendable hashing device 100 performs step S308.

On the other hand, the experimental settings for the embodiments of the present invention will be looked at.

For the experiments on the embodiments of the present invention, two Intel Xeon Haswell-EX E7-4809 v3 processors are used. The processor used in the experiment had 8 cores, 2.0 GHz, 8 × 32 KB instruction cache, 8 × 32 KB data cache, 8 × 256 KB L2 cache, and 20 MB L3 cache. And 64GB of DDR3 DRAM and a DRAM-based PM latency emulator, Quartz, were used. To emulate write latency, a stall cycle is inserted after each clflush instruction.

18A to 18C are diagrams showing experimental results of throughput with various segment/bucket sizes for an embodiment of the present invention and the prior art.

The prior art EXTH (LSB) splits the bucket less frequently as the bucket size increases, as shown in FIG. 18B . However, as shown in FIGS. 18A and 18C , when an empty slot or record is found, a larger number of cache lines are read.

Insertion throughput of CCEH (MSB) and CCEH (LSB) according to an embodiment of the present invention increases as the segment size increases up to 16 KB because segment division is less frequent, whereas as shown in FIGS. 18A and 18C , Likewise, the number of cache lines to read, i.e., Last Level Cache (LLC) misses, is not affected by the large segment size.

19A to 19D are diagrams showing time taken for insertion while changing R/W latency of a nonvolatile memory in an embodiment of the present invention and in the prior art.

19A to 19D , a write operation indicates a bucket search and write time. The rehash operation indicates the rehash time. Cuckoo Displacement represents the time it takes to move an existing record to another bucket for cuckoo hashing. 19A to 19D , the CCEH according to the embodiment of the present invention shows the fastest average insertion time in the whole.

20A to 20C are diagrams illustrating concurrent execution performance with respect to latency CDF and insert/retrieval throughput for an embodiment of the present invention and the prior art.

As shown in Figs. 20A to 20C, implementations other than CCEH according to an embodiment of the present invention suffer from full table rehashing overhead. CCEH(C) outperforms CCEH in search throughput, such as copy-on-write (CoW) lock free search. As shown in Fig. 20C, the read transaction of CCEH(C) is non-blocking.

The cache line concierge extendable hashing method according to the above-described embodiments of the present invention may be implemented as a computer readable code on a computer readable recording medium. The cache line concierge extendable hashing method according to the embodiments of the present invention may be implemented in the form of a program command that can be executed through various computer means and recorded in a computer-readable recording medium.

A non-transitory computer-readable storage medium comprising at least one program executable by a processor, wherein the at least one program, when executed by the processor, causes the processor to: store a first index of a hash key; to identify a segment referenced through a directory using the A non-transitory computer-readable storage medium containing instructions for inserting a key value corresponding to a hash key may be provided.

The above-described method according to the present invention may be implemented as computer-readable codes on a computer-readable recording medium. The computer-readable recording medium includes any type of recording medium in which data that can be read by a computer system is stored. For example, there may be read only memory (ROM), random access memory (RAM), magnetic tape, magnetic disk, flash memory, optical data storage, and the like. In addition, the computer-readable recording medium may be distributed in computer systems connected through a computer communication network, and stored and executed as readable codes in a distributed manner.

Although described above with reference to the drawings and examples, it does not mean that the protection scope of the present invention is limited by the drawings or examples, and those skilled in the art will It will be understood that various modifications and variations of the present invention can be made without departing from the spirit and scope thereof.

Specifically, the described features may be implemented in digital electronic circuitry, or computer hardware, firmware, or combinations thereof. Aspects may be executed in a computer program product embodied in storage in a machine readable storage device, for example, for execution by a programmable processor. and features may be performed by a programmable processor executing a program of instructions for performing functions of the described embodiments by operating on input data and generating output. The described features are coupled to at least one programmable processor, at least one input device, and at least one output, for receiving data and instructions from, and for transmitting data and instructions to, a data storage system. may be executed within one or more computer programs that may be executed on a programmable system comprising the device. A computer program includes a set of directives that can be used directly or indirectly in a computer to perform a particular action on a given result. A computer program is written in any form of programming language, including compiled or interpreted languages, and included as a module, element, subroutine, or other unit suitable for use in another computer environment, or as a standalone operable program. It can be used in any form.

Suitable processors for execution of a program of instructions include, for example, both general and special purpose microprocessors, and either a single processor or multiple processors of a different kind of computer. Storage devices suitable for implementing computer program instructions and data embodying the described features also include, for example, semiconductor memory devices such as EPROM, EEPROM, and flash memory devices, magnetic devices such as internal hard disks and removable disks. devices, magneto-optical disks and all forms of non-volatile memory including CD-ROM and DVD-ROM disks. The processor and memory may be integrated in or added by ASICs (application-specific integrated circuits).

Although the present invention described above has been described based on a series of functional blocks, it is not limited by the above-described embodiments and the accompanying drawings, and various substitutions, modifications and changes within the scope without departing from the technical spirit of the present invention It will be apparent to those of ordinary skill in the art to which the present invention pertains.

The combination of the above-described embodiments is not limited to the above-described embodiment, and various types of combinations may be provided in addition to the above-described embodiments according to implementation and/or necessity.

In the foregoing embodiments, the methods are described on the basis of a flowchart as a series of steps or blocks, but the present invention is not limited to the order of the steps, and some steps may occur in a different order or at the same time as other steps as described above. can In addition, those of ordinary skill in the art will recognize that the steps shown in the flowchart are not exclusive, other steps may be included, or that one or more steps in the flowchart may be deleted without affecting the scope of the present invention. you will understand

The foregoing embodiments include examples of various aspects. It is not possible to describe every possible combination for representing the various aspects, but one of ordinary skill in the art will recognize that other combinations are possible. Accordingly, it is intended that the present invention cover all other substitutions, modifications and variations falling within the scope of the following claims.

100: cashline concierge extendable hashing device
110: processor
120: cache
130: memory

Claims (23)

In the extendable hashing method performed by the Cacheline Conscious Extendible Hashing device,
searching for a directory entry corresponding to a first index of a hash key;
identifying a segment referenced through the searched directory entry from among a plurality of segments each connected to the at least one directory entry;
identifying one bucket to be accessed from among a plurality of buckets stored in a continuous storage space in the identified segment by using the second index of the hash key; and
and storing data corresponding to the hash key in the checked bucket. According to claim 1,
The method of claim 1, further comprising: checking a global depth bit value of the hash key. According to claim 1,
The first index of the hash key is,
Including a Most Significant Bit (MSB) of the hash key. According to claim 1,
The second index of the hash key is,
A method of hashing concierge extendable hashing, including a least significant bit (LSB) of the hash key. delete According to claim 1,
The method of claim 1, further comprising: dividing a segment when a collision occurs when a segment is accessed using the second index of the hash key. 7. The method of claim 6,
The step of dividing the segment comprises:
A cache that creates a new segment with an increased local depth, scans data of the identified segment, and copies data having a preset bit value corresponding to the increased local depth to the new segment Line concierge extendable hashing method. 7. The method of claim 6,
The step of dividing the segment comprises:
A method of increasing a local depth of the divided segment and designating data having another predetermined bit value corresponding to the increased local depth as an invalid key. 7. The method of claim 6,
The step of dividing the segment comprises:
The method of claim 1, for increasing a local depth of the identified segment, updating a pointer of a directory entry, and increasing a local depth of the segmented segment. 7. The method of claim 6,
and bundling directory entries into pairs called a buddy when updating the directory when the segment is segmented. 11. The method of claim 10,
The method of claim 1, further comprising: identifying a segment in which a system problem has occurred using the global depth and a local depth of the segment, and performing recovery of a segment in which a system problem has occurred using the buddy. . a memory storing at least one program and storing a plurality of segments referenced through directory entries; and
A processor connected through the memory and the cache;
Each of the plurality of segments is connected to at least one of the directory entries, and a plurality of buckets are stored in a continuous storage space in the segment;
The processor, by executing the at least one program,
Searching for a directory entry corresponding to a first index of a hash key, and identifying a segment referenced through the searched directory entry,
Checking one bucket to be accessed within the identified segment using the second index of the hash key,
A cash line concierge extendable hashing device that writes or reads data corresponding to the hash key to the checked bucket. 13. The method of claim 12,
The processor is
Further comprising the step of verifying a global depth bit value of the hash key, the cache line concierge extendable hashing device. 13. The method of claim 12,
The first index of the hash key is,
Including a Most Significant Bit (MSB) of the hash key, a cash line concise extendable hashing device. 13. The method of claim 12,
The second index of the hash key is,
Including a least significant bit (LSB) of the hash key, a cash line concierge extendable hashing device. 13. The method of claim 12,
The processor is
A cache line concierge extendable hashing device that searches for a directory entry corresponding to the first index of the hash key and identifies a segment referenced through the searched directory entry. 13. The method of claim 12,
The processor is
When a collision occurs when a segment is accessed using the second index of the hash key, the segment is divided, a cache line concierge extendable hashing device. 18. The method of claim 17,
The processor is
A cache that creates a new segment with an increased local depth, scans data of the identified segment, and copies data having a preset bit value corresponding to the increased local depth to the new segment Line concierge extendable hashing device. 18. The method of claim 17,
The processor is
A cache line concierge extendable hashing apparatus for increasing a local depth of the divided segment and designating data having another predetermined bit value corresponding to the increased local depth as an invalid key. 18. The method of claim 17,
The processor is
A cacheline concierge extendable hashing apparatus for increasing a local depth of the identified segment, updating a pointer of a directory entry, and increasing a local depth of the divided segment. 18. The method of claim 17,
The processor is
When the identified segment is divided, when updating the directory, the directory entries are bundled into a pair called a buddy. 22. The method of claim 21,
The processor is
A cashline concierge extendable hashing device, which identifies a segment in which a system problem occurs using a global depth and a local depth of the segment, and performs recovery of a segment in which a system problem occurs by using the buddy. A non-transitory computer-readable storage medium comprising at least one program executable by a processor, wherein the at least one program, when executed by the processor, causes the processor to:
A directory entry corresponding to a first index of a hash key is searched for, and a segment referenced through the searched directory entry from among a plurality of segments each connected to at least one directory entry check the
Checking one bucket to be accessed from among a plurality of buckets stored in a continuous storage space in the identified segment using the second index of the hash key,
and instructions for inserting a key value corresponding to the hash key into the checked bucket.

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