KR102348019B1 - Capacitor isolated balanced converter - Google Patents

Abstract

The present invention relates to a symmetrical converter capable of reducing a common mode current in a capacitor insulation method that implements insulation using a capacitor without using a transformer. One aspect of the present invention provides a switching circuit that receives an input DC voltage through a first node and a second node and outputs an intermediate AC voltage through a third node and a fourth node; and a rectifier circuit that rectifies the intermediate AC voltage output by the switching circuit and outputs an output DC voltage through a fifth node and a sixth node, wherein the switching circuit uses a capacitor without including a transformer to implement insulation, and an impedance between the first node and the third node and an impedance between the second node and the fourth node are substantially the same as each other.

Description

Capacitor Insulation Symmetric Converter {CAPACITOR ISOLATED BALANCED CONVERTER}

The present invention relates to a capacitor-isolated symmetric converter. Specifically, the present invention relates to a symmetrical converter capable of reducing a common mode current in a capacitor insulation method that implements insulation using a capacitor without using a transformer.

In an AC-DC converter that converts commercial AC power to DC and supplies it to a load, or a DC-DC converter that converts DC power to another level of DC and supplies it to the load, electrical insulation is often required between the power supply and the load. . Normally, the power supply side is grounded and the load side operates in an ungrounded state. However, if the load side is connected to the ground through an impedance (eg, human body) due to various factors in use, the current flows from the load side to the ground through the impedance of the human body. As it flows, safety issues may arise.

For this reason, even when the load side is connected to the ground, it is necessary to prevent the current from flowing to the ground or to limit the current to a predetermined level or less. In general, a transformer is used for such electrical insulation, but the transformer is bulky, heavy, and expensive.

As a method of reducing the size of the transformer, there is a method of increasing the switching frequency of the converter, but there is a problem in that the higher the switching frequency, the greater the iron loss of the transformer, the lower the efficiency.

As an alternative to transformers, attempts are increasingly being made to perform the isolation function by using low-cost, small-volume capacitors. If isolation is implemented using capacitors rather than transformers, the converter can be designed to have high power density at high switching frequencies.

However, when insulation is implemented using a capacitor, the current flowing to the ground (common mode current) may increase when the load side is connected to the ground through the impedance depending on the circuit of the converter, so countermeasures are required.

The present invention, according to an embodiment, is to propose a symmetrical converter capable of reducing the common mode current in the capacitor insulation type converter.

The present invention intends to present a class E-type symmetrical converter capable of reducing a common mode current in a capacitor-isolated converter according to an embodiment.

The present invention, according to an embodiment, is to propose a half-bridge type symmetrical converter capable of reducing a common mode current in a capacitor insulation type converter.

The present invention intends to present an AC-DC converter capable of reducing a common-mode current in a capacitor-isolated converter according to an embodiment.

The present invention, according to an embodiment, is to provide a driving circuit capable of effectively driving a switch having a floating source terminal in a capacitor-isolated symmetric converter.

One aspect of the present invention for achieving the above solution is a switching circuit that receives an input DC voltage through a first node and a second node and outputs an intermediate AC voltage through a third node and a fourth node; and a rectifier circuit that rectifies the intermediate AC voltage output by the switching circuit and outputs an output DC voltage through a fifth node and a sixth node, wherein the switching circuit uses a capacitor without including a transformer to implement insulation, and an impedance between the first node and the third node and an impedance between the second node and the fourth node are substantially the same as each other.

In the capacitor-isolated symmetric converter, an impedance between the first node and the fourth node and an impedance between the second node and the third node may also be substantially the same.

In the capacitor-insulated symmetric converter, the second node is connected to a reference potential, and the sixth node is connected to the reference potential through a ground impedance, and a current flowing into the switching circuit through the first node and a current flowing into the switching circuit through the second node may have a phase difference of substantially 180 degrees from each other.

In the capacitor-insulated symmetrical converter, the second node is connected to a reference potential, and the sixth node is output from the switching circuit through the third node in a state in which the sixth node is connected to the reference potential through a ground impedance A current and a current output from the switching circuit through the fourth node may have a phase difference of substantially 180 degrees from each other.

In the capacitor-isolated symmetric converter, the switching circuit includes: a first inductor connected between the first node and a seventh node; a second inductor connected between the second node and the eighth node; a first switch connected between the seventh node and the eighth node; a third inductor and a first capacitor connected between the seventh node and the third node; and a fourth inductor and a second capacitor connected between the eighth node and the fourth node.

In the capacitor-isolated symmetric converter, the first switch may be turned on in a state in which a voltage of the first switch becomes substantially zero.

In the capacitor-insulated symmetric converter, further comprising a first switch driving circuit generating a driving signal of the first switch, the first switch driving circuit comprising: a first diode having an anode connected to the first node; a fourth capacitor having a first terminal connected to the cathode of the first diode and a second terminal connected to the eighth node; and a driving signal generator receiving power from the fourth capacitor and generating a driving signal of the first switch.

In the capacitor-isolated symmetric converter, the switching circuit includes: a first switch connected between the first node and a seventh node; a second switch connected between the seventh node and the eighth node; a third switch connected between the eighth node and the second node; a first inductor and a first capacitor connected between the seventh node and the third node; and a second inductor and a second capacitor connected between the eighth node and the fourth node.

In the capacitor-isolated symmetrical converter, the first switch and the third switch are turned on/off substantially simultaneously with each other, and the second switch is turned on/off substantially opposite to the first switch and the third switch. can be

In the capacitor-isolated symmetric converter, the switching circuit further includes a voltage division circuit, the voltage division circuit comprising: a third capacitor connected between the first node and the ninth node; a fourth capacitor connected between the ninth node and the second node; a first diode connected between the ninth node and the seventh node; a second diode connected between the ninth node and the eighth node; may include.

In the capacitor-isolated symmetric converter, further comprising: a first driving circuit generating driving signals of the second switch and the third switch; and a second driving circuit generating a driving signal of the first switch; The first driving circuit may include: a third diode and a fifth capacitor connected in series between a control power supply and the eighth node; and a first driving signal generator configured to generate a driving signal of the second switch by using the voltage supplied from the fifth capacitor, wherein the second driving circuit comprises: a fourth diode and a sixth capacitor connected in series between a connection node and the seventh node; and a second driving signal generator configured to generate a driving signal of the first switch using the voltage supplied from the sixth capacitor.

Another aspect of the present invention is a rectifier for rectifying an AC voltage; and a symmetrical converter of the capacitor insulation type that receives the DC voltage output from the rectifier through the first node and the second node.

In the AC-DC converter, at least one of a resonance filter and a common mode filter may be disposed between the rectifier and the capacitor-isolated symmetric converter.

An embodiment of the present invention includes a symmetrical converter, a class E-type symmetrical converter, a half-bridge-type symmetrical converter, and an AC-DC converter, and according to these converters, a common-mode current is reduced and insulation performance is improved in a capacitor-isolated converter. can do.

In addition, the driving circuit according to an embodiment of the present invention can effectively drive a switch having a floating source terminal in a capacitor-isolated symmetric converter.

1 is a diagram conceptually illustrating a capacitor-isolated symmetric converter according to an embodiment of the present invention.
FIG. 2 is a view for explaining a situation in which a load side of the converter of FIG. 1 is connected to ground through an impedance and a common mode current flows.
3 is a diagram illustrating a class E-type symmetric converter of a capacitor isolation method according to an embodiment of the present invention.
FIG. 4 is a diagram illustrating an operation waveform of the converter of FIG. 3 .
FIG. 5 is a diagram illustrating an equivalent circuit of the converter of FIG. 3 .
FIG. 6 is a diagram illustrating a Thevenin equivalent circuit of the converter of FIG. 3 .
7 is a diagram illustrating a class E-type symmetric converter of a capacitor isolation method according to another embodiment of the present invention.
8 is a diagram illustrating a capacitor-isolated half-bridge type symmetric converter according to an embodiment of the present invention.
9 is a diagram illustrating an operation waveform of the converter of FIG. 8 .
FIG. 10 is a diagram illustrating an equivalent circuit of the converter of FIG. 8 .
11 is a diagram illustrating a capacitor-isolated half-bridge type symmetric converter according to another embodiment of the present invention.
12 is a diagram illustrating a driving circuit that can be used in a capacitor-isolated half-bridge type symmetric converter.
13 is a diagram illustrating an AC-DC converter including a capacitor-isolated symmetrical converter according to an embodiment of the present invention.
14 and 15 are diagrams illustrating an embodiment in which a common mode filter or a resonance filter is used to reduce a common mode current in the AC-DC converter of FIG. 13 .
16 is a diagram illustrating a class E-type symmetric converter of a capacitor isolation method according to another embodiment of the present invention.
17 is a diagram illustrating an operation waveform of the converter of FIG. 16 .
18 is a diagram illustrating a class E-type symmetric bidirectional converter of a capacitor isolation method according to another embodiment of the present invention.
19 is a diagram illustrating a class E type symmetrical converter using a transformer as an embodiment.
20 is a diagram illustrating a half-bridge type symmetrical converter using a transformer as another embodiment.

Hereinafter, some embodiments of the present invention will be described in detail with reference to exemplary drawings. In adding reference numerals to the components of each drawing, it should be noted that the same components are given the same reference numerals as much as possible even though they are indicated on different drawings. In addition, in describing the present invention, if it is determined that a detailed description of a related known configuration or function may obscure the gist of the present invention, the detailed description thereof will be omitted.

In addition, in describing the components of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used. These terms are only for distinguishing the elements from other elements, and the essence, order, or order of the elements are not limited by the terms. When it is described that a component is “connected”, “coupled” or “connected” to another component, the component may be directly connected or connected to the other component, but another component is formed between each component. It should be understood that elements may also be “connected,” “coupled,” or “connected.”

1 is a diagram conceptually illustrating a capacitor-isolated symmetric converter according to an embodiment of the present invention.

Referring to FIG. 1 , a capacitor-isolated symmetric converter 100 (hereinafter, simply referred to as a 'converter') may include a switching circuit 110 and a rectifying circuit 120 .

The converter 100 may receive an input DC voltage (V _dc ) from a DC source, convert it into an output DC voltage (V _o ) having different properties, and supply it as a DC load. According to an embodiment, the converter 100 converts an input DC voltage (V _dc ) provided from a DC source into an output DC voltage (V _o ) of different properties to an intermediate AC voltage ( V _ac ) can be created.

The switching circuit 110 receives the input DC voltage V _dc through the first node N1 and the second node N2 and receives an intermediate AC voltage (V dc ) through the third node N3 and the fourth node N4. V _ac ) can be output. To this end, the switching circuit 110 may selectively include a switch, an inductor, and a capacitor. In this case, the switching circuit 110 may be understood as an inverter that converts direct current into alternating current.

A switch included in the switching circuit 110 may be a semiconductor switching device capable of operating at high speed. For example, a semiconductor switching device such as a MOSFET, an IGBT, an MCT, or a BJT may be used as the switch, but is not limited thereto.

The switching circuit 110 may be a capacitor insulation type that implements insulation using a capacitor without including a transformer. In this case, the switching circuit 110 may have a structure in which current cannot flow _{from the input terminal (V dc} side) to the output terminal (V _ac side) of the switching circuit 110 without passing through the insulating capacitor.

The switching circuit 110 may have a symmetrical structure to reduce a common mode current. That is, in the switching circuit 110 , the impedance between the first node N1 and the third node N3 and the impedance between the second node N2 and the fourth node N4 may be substantially the same. In addition, the impedance between the first node N1 and the fourth node N4 and the impedance between the second node N2 and the third node N3 may be substantially the same. In this case, there is an advantage that the common-mode current can be further reduced by becoming a more reliable symmetrical circuit.

The rectifier circuit 120 rectifies the intermediate AC voltage V _{ac output from the switching circuit 110 to output the output DC voltage V o} through the fifth node N5 and the sixth node N6 . have. A conventional diode rectifier circuit capable of converting alternating current to direct current may be used for the rectifier circuit 120 , but in order to reduce the common mode current, it is preferable to use a symmetrical rectifier circuit. According to an embodiment, when a full-bridge rectifier circuit is used, the common-mode current can be reduced because it operates symmetrically.

2 is a view for explaining a situation in which the load side of the converter 100 of FIG. 1 is connected to the ground (GND) through the _{ground impedance (Z g ) and the common mode current (I cm ) flows.}

As illustrated in FIG. 2 , a ground (GND) is generally connected to the input side of the converter 100 . However, the position of the ground GND may be different from that illustrated in FIG. 2 . If some of the user's body during the operation of the converter 100 is to be in contact with the load (10, Load) side of the converter 100, the body of the user (represented as ground impedance Z _g) to the converter through the ground (GND) ( _{A common mode current (I cm} ) in which the current circulates may flow to the input side of 100), which may cause a safety problem.

In a circuit that implements insulation through a capacitor without using a transformer, _{measures to reduce this common mode current (I cm} ) are more necessary. _{In this embodiment, the common mode current (I cm} ) is reduced in the capacitor isolation method by designing the converter 100 in a symmetrical shape.

When the converter 100 is designed to be symmetrical, the second node N2 is connected to the reference potential, and the sixth node N6 is connected to the reference potential GND through the _{ground impedance Z g . The current I 1} entering the switching circuit 110 through the first node N1 _{and the current I 2} entering the switching circuit 110 through the second node N2 may have a phase difference of substantially 180 degrees from each other. have. In this case, the common mode current I _cm may be reduced.

In addition, when the converter 100 is designed to be symmetrical, the second node N2 is connected to the reference potential GND, and the sixth node N6 is connected to the reference potential GND through the _{ground impedance Z g . In the connected state, the current I 3} output from the switching circuit 110 through the third node N3 _{and the current I 4} output from the switching circuit 110 through the fourth node N4 are substantially may have a phase difference of 180 degrees. In this case, the common mode current I _cm may be reduced.

On the other hand, FIG. 2 shows the smoothing capacitor C _dc of the input terminal and the smoothing capacitor C _o of the output terminal, and these capacitors C _dc , C _o are commonly used at the input and output terminals of the converter, In this embodiment, these capacitors (C _dc , C _o ) are not necessarily used.

3 is a diagram illustrating a class E-type symmetric converter of a capacitor isolation method according to an embodiment of the present invention.

Referring to FIG. 3 , a class E-type symmetric converter 300 (hereinafter also simply referred to as a 'converter 300') of the capacitor insulation method may include a switching circuit 310 and a rectifying circuit 320 . The converter 300 may be understood as an exemplary embodiment of the converter 100 described with reference to FIG. 1 , and the contents described with reference to FIG. 1 may also be applied to FIG. 3 unless they are arranged with the contents described below.

The switching circuit 310 includes a first inductor L1 connected between the first node N1 and the seventh node N7, and a second inductor L1 connected between the second node N2 and the eighth node N8 ( L2), the first switch S1 connected between the seventh node N7 and the eighth node N8, the third inductor L3 and the third connected between the seventh node N7 and the third node N3 A first capacitor C1 and a fourth inductor L4 and a second capacitor C2 connected between the eighth node N8 and the fourth node N4 may be included. According to an embodiment, the switching circuit 310 may include a smoothing capacitor C _dc at the input terminal. Also, according to an embodiment, the switching circuit 310 may further include a third capacitor C3 between the seventh node N7 and the eighth node N8 .

The first inductor L1 and the second inductor L2 may operate as inductors for direct current. That is, it can be understood that a ripple current is generated as the current increases or decreases according to the on/off of the first switch S1, but a current of a generally constant size flows in the first inductor L1 and the second inductor L2. . Accordingly, the first inductor L1 and the second inductor L2 may have relatively greater inductance than the third inductor L3 and the fourth inductor L4 . In this embodiment, in order to implement a symmetric type, the first inductor L1 and the second inductor L2 may be designed to have the same inductance.

The first switch S1 repeats on/off within a switching period and adjusts the voltage formed at the seventh node N7 and the eighth node N8 from the input DC voltage V _dc to the output DC voltage V _o ) to control the power delivered. According to the embodiment, the output DC voltage V _{o from the input DC voltage (V dc} ) in a manner of adjusting the ratio (duty) of the on period to the switching period of the first switch (S1) and/or adjusting the switching frequency ) to control the power delivered to it.

The third inductor L3 and the first capacitor C1 may constitute a first resonant impedance Z ₁ . The third inductor L3 and the first capacitor C1 may have a resonant frequency similar to the switching frequency, and in this case, an AC voltage may be generated at the third node N3 .

The fourth inductor L4 and the second capacitor C2 may constitute a second resonant impedance Z ₂ . The fourth inductor L4 and the second capacitor C2 may have a resonant frequency similar to the switching frequency, and in this case, an AC voltage may be generated at the fourth node N4 .

Although the resonant frequency of the first resonant impedance Z ₁ and the resonant frequency of the second resonant impedance Z ₂ are similar to the switching frequency, respectively, they may be designed to have slightly different resonant frequencies. However, in this embodiment, in order to reduce the common mode current by implementing a symmetrical type, the first resonant impedance Z ₁ and the second resonant impedance Z ₂ have the same resonant frequency and resonant characteristics (eg, characteristic impedance) impedance)). For example, the third inductor L3 and the first capacitor C1 may be designed to have the same inductance and the same capacitance as the fourth inductor L4 and the second capacitor C2, respectively.

The third capacitor C3 may be connected in parallel to the first switch S1 . The third capacitor C3 may _{perform a resonance operation together with the first resonant impedance Z 1} and the second resonant impedance Z ₂ so that a sine wave voltage is applied to the first switch S1 . In this case, soft switching (eg, zero voltage switching) may be implemented for the first switch S1 . The third capacitor C3 may be separately added in parallel to the first switch S1, but in some cases, when the parasitic capacitance inherent in the first switch S1 is utilized, the third capacitor C3 is not added separately. It may not be.

The smoothing capacitor C _dc of the input terminal is used at the input terminal of the converter 300 _{to perform a function of stabilizing the DC voltage V dc} input to the converter 300, but may not be used in some cases. .

The rectifier circuit 320 rectifies the intermediate AC voltage V _{ac output from the switching circuit 310 to output the output DC voltage V o} through the fifth node N5 and the sixth node N6 . have. A conventional diode rectifier circuit capable of converting alternating current to direct current may be used for the rectifier circuit 320 , but in order to reduce the common mode current, it is preferable to use a symmetrical rectifier circuit. According to an embodiment, when a full-bridge rectifier circuit is used, the common-mode current can be reduced because it operates symmetrically.

FIG. 4 is a diagram illustrating an operation waveform of the converter 300 of FIG. 3 .

Referring to FIG. 4 , the first switch S1 may repeat on/off to alternately have an on _{period T on} and an off period T _off within the _{switching period T s .} Defined as the ratio (= T _on / T _s) of the turn-on duration (T _on) for the above-described switching frequency may be defined as the reciprocal of the switching period (T _s), the duty (duty) is the switching period (T _s) can be

_{Resonance of the first resonant impedance Z 1} , the second resonant impedance Z ₂ , and the third capacitor C3 may occur by the on/off operation of the first switch S1 . The resonance current I _r of FIG. 4 illustrates the current flowing through the first resonant impedance Z ₁ , and the first switch voltage V _S1 illustrates the drain-source voltage of the first switch S1 . The first switch voltage (V _{S1 ) maintains a substantially zero value in the on period} (T on ) of the first switch, and in the off period (T _off ), a sine wave voltage may be applied by resonance. have.

In this embodiment, as illustrated in FIG. 4 , the first switch S1 is turned on (starting the on period) in a state in which the _{voltage V S1 of the first switch is substantially zero.} By implementing zero voltage switching (ZVS), high efficiency can be achieved while operating at a high switching frequency. In addition, when the first switch S1 is turned off, the first switch voltage V _S1 gradually increases in a sinusoidal shape, thereby reducing switching loss at turn-off.

The converter 300 may adjust the power delivered to the load side by adjusting the magnitude and/or phase of _{the resonance current I r} by adjusting the switching frequency and/or duty of the first switch S1 .

As illustrated in FIG. 4 , _{the first voltage V 1} applied to the seventh node N7 _{and the second voltage V 2} applied to the eighth node N8 are In the on period (T _on ), a constant voltage (eg, V _dc /2) is obtained, and in the off period (T _off ) of the first switch ( S1 ), it may be in the form of a sine wave due to resonance. Here, the first voltage V _{1 applied to the seventh node N7 and the second voltage V 2} applied to the eighth node N8 are the low potential ( _{V dc} ) of the converter 300 input voltage (V dc ). That is, it may be understood as a voltage based on the second node N2). Hereinafter, when the voltage of one node rather than the relative voltage of the two nodes is mentioned in other parts of the present specification, it may be understood as the same reference.

In the present embodiment, in the _{off period} T off of the first switch S1 , the first voltage V ₁ and the second voltage V ₂ can be made to have a phase inverted by 180 degrees from each other, in this case This has the advantage of reducing the common-mode current. This part will be described in detail below.

FIG. 5 is a diagram illustrating an equivalent circuit 500 of the converter 300 of FIG. 3 .

Referring to FIG. 5 , in the converter 300 of FIG. 3 , the first voltage V _{1 applied to the seventh node N7 and the second voltage V 2} applied to the eighth node N8 are voltage sources. is shown, and the voltage at the third node N3 and the voltage at the fourth node N4, which are the input terminals of the rectifier circuit 320, are respectively shown as a first rectifying terminal voltage V _rec1 and a second rectifying terminal voltage V _rec2 . has been Here, the first rectifying terminal voltage V _rec1 and the second rectifying terminal voltage V _rec2 may be understood as voltages based on the sixth node N6 , respectively.

FIG. 6 is a diagram illustrating the Thevenin equivalent circuit 600 of the converter 300 of FIG. 3 .

The Thevenin equivalent circuit 600 of FIG. 6 includes voltage sources (a first voltage V ₁ , a second voltage V ₂ , a first rectifier terminal voltage V _rec1 ) and a second voltage source in the equivalent circuit 500 of FIG. 5 . It can be understood that the rectifier terminal voltage (V _rec2 )) is integrated into one voltage source, the common-mode open-circuit voltage (V _{cm,ov ).}

Using Thevenin's theorem, the common-mode open-circuit voltage (V _cm,ov ) can be obtained as in Equation 1 below.

[Equation 1]

Here, when the first resonant impedance (Z ₁ ) and the second resonant impedance (Z ₂ ) are the same and a full bridge diode rectifier circuit is used for the rectifier circuit 320 , Equation 1 is the following Equation 2 It can be arranged as simply as

[Equation 2]

In Equation 2, if the sum of the first voltage (V ₁ ) and the second voltage (V ₂ ) (ie, V ₁ + V ₂ ) has only a DC component (ie, no AC component), the common-mode open-circuit voltage It can be seen that (V _cm,ov ) also does not have an AC component (because the output DC voltage (V _o ) has only a DC component if the minute ripple voltage is ignored). As shown in FIG. 3 , a first capacitor C1 and a second capacitor C2 are disposed in series _{between the first resonant impedance Z 1} and the second resonant impedance Z _{2 , so that the DC component has an infinite number of values.} Since it has an impedance, when the common-mode open-circuit voltage (V _cm,ov ) has only a DC component, the common-mode current (I _cm ) may not flow or may be reduced.

Based on this principle, in the present embodiment the first voltage (V ₁₎ and a second voltage (V ₂₎ the sum (V ₁ + V ₂₎ by so as to have only the direct current component does not have an AC component common mode currents ( I _cm ) is reduced.

Specifically, when the sum of the first voltage (V ₁ ) and the second voltage (V ₂ ) is calculated, it can be arranged as shown in Equations 3 and 4 below.

[Equation 3]

[Equation 4]

When L ₁ = L ₂ , in Equations 3 and 4, V ₁ + V ₂ = V _dc is the same. That is, the sum (V ₁ + V ₂ ) of the first voltage (V ₁ ) and the second voltage (V ₂ ) is kept constant as _{V dc} in both the _{on period} (T on ) and the off period (T _{off ) of S1} Therefore, the sum of the first voltage (V ₁ ) and the second voltage (V ₂ ) may theoretically have no AC component. Accordingly, the common-mode open-circuit voltage (V _cm,ov ) does not have an AC component and the common-mode current can be reduced.

When explaining this phenomenon through the waveform of Figure 4, each of the first voltage (V ₁ ) and the second voltage (V ₂ ) is a sinusoidal AC component in _{the off section (T off} ) of the first switch (S1) However, the first voltage (V ₁ ) and the second voltage (V ₂ ) are 180 degrees inverted to each other, so that the _{sum of the first voltage (V 1} ) and the second voltage (V ₂ ) is without an AC component It may be understood that it may have only a direct current component.

In summary, in this embodiment, the first resonant impedance (Z ₁ ) and the second resonant impedance (Z ₂ ) are made the same (relating to Equations 1 and 2), and the first inductor L1 and the second inductor By making (L2) the same (related to Equations 3 and 4), it is possible to make the AC component not occur in the _{common-mode open-circuit voltage (V cm,ov ) (or to reduce the AC component), thereby} Common mode current can be reduced.

Looking at this principle of the present embodiment from another perspective, it can also be understood that the _{converter 300 is designed to be symmetrical, thereby reducing the common mode current (I cm ).}

7 is a diagram illustrating a class E-type symmetrical converter 700 of a capacitor insulation method according to another embodiment of the present invention.

Referring to FIG. 7 , the converter 700 is different from the converter 300 illustrated in FIG. 3 in that it further includes a first switch driving circuit that generates a driving signal of the first switch S1 . Unless it is different from the content to be described below, the content described with reference to FIG. 3 may also be applied to FIG. 7 .

The first switch driving circuit may include a first diode D1 , a fourth capacitor C4 , and a driving signal generator 730 . According to an embodiment, the first switch driving circuit may further selectively include a first resistor R1 and a first Zener diode ZD1.

Specifically, the first switch driving circuit includes a first diode D1 having an anode connected to a first node N1, a first terminal connected to a cathode of the first diode D1, and a second electrode connected to an eighth node N8. It may include a fourth capacitor C4 to which the terminal is connected, and a driving signal generator 730 that receives power from the fourth capacitor C4 and generates a driving signal of the first switch S1 .

Here, the first diode D1 performs a function of supplying power in one direction from the first node N1 to the fourth capacitor C4, and the fourth capacitor C4 receives the power supplied from the first node N1. A function of storing power and supplying power to the driving signal generator 730 may be performed.

The first resistor R1 may be selectively used as needed to limit the current supplied from the first node N1 to the fourth capacitor C4 . The first Zener diode ZD1 may be selectively used as necessary to prevent an overvoltage from being applied to the driving signal generator 730 by limiting the voltage of the fourth capacitor C4 .

The driving signal generator 730 operates using the power supplied from the fourth capacitor C4, and may generate a driving signal for driving the first switch S1 according to internal logic. A description of the internal logic of the driving signal generator 730 will be omitted because it may obscure the gist of the present invention. The driving signal generator 730 is implemented in hardware such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or the like, or implemented in software and stored in a computer-readable storage medium (memory, etc.). The function can be performed by an arithmetic device such as

According to the first switch driving circuit illustrated in FIG. 7 , there is no need to receive a separate control power from the outside for driving the first switch S1 , and the control power is simply supplied using the _{input DC voltage (V dc ).} can be created, reducing the complexity of the circuit and reducing the cost.

8 is a diagram illustrating a capacitor-isolated half-bridge type symmetric converter according to an embodiment of the present invention.

Referring to FIG. 8 , a capacitor-isolated half-bridge type symmetric converter 800 (hereinafter, also simply referred to as a 'converter 800') may include a switching circuit 810 and a rectifying circuit 820 . According to an embodiment, the converter 800 may _{further selectively include an output terminal smoothing capacitor (C o} ) or an input terminal smoothing capacitor (not shown). The converter 800 may be understood as an embodiment of the converter 100 described with reference to FIG. 1 , and the contents described with reference to FIG. 1 may also be applied to FIG. 8 unless they are arranged with the contents described below.

The switching circuit 810 includes a first switch S81 connected between the first node N1 and the seventh node N7, and a second switch S81 connected between the seventh node N7 and the eighth node N8. S82), the third switch S83 connected between the eighth node N8 and the second node N2, the first inductor L81 and the third switch S83 connected between the seventh node N7 and the third node N3 It may include a first capacitor C81 and a second inductor L82 and a second capacitor C82 connected between the eighth node N8 and the fourth node N4 .

The voltage formed at the seventh node N7 and the eighth node N8 is adjusted by the on/off operation of the first switch S81, the second switch S82, and the third switch S83, so that the input direct current Power transferred from the voltage (V _dc ) to the output DC voltage (V _o ) may be adjusted. According to the embodiment, the method of adjusting the ratio (duty) of the on period to the switching period of the first switch (S81), the second switch (S82) and the third switch (S83) and/or adjusting the switching frequency The power delivered to the output DC voltage (V _o ) can be regulated by using it.

The first inductor L81 and the first capacitor C81 may constitute a first resonant impedance Z ₈₁ . The first inductor L81 and the first capacitor C81 may have a resonant frequency similar to the switching frequency, and in this case, an AC voltage may be generated at the third node N3 .

The second inductor L82 and the second capacitor C82 may constitute a second resonant impedance Z ₈₂ . The second inductor L82 and the second capacitor C82 may have a resonant frequency similar to the switching frequency, and in this case, an AC voltage may be generated at the fourth node N4 .

Although the resonant frequency of the first resonant impedance Z ₈₁ and the resonant frequency of the second resonant impedance Z ₈₂ are similar to the switching frequency, respectively, they may be designed to have slightly different resonant frequencies. However, in this embodiment, in order to reduce the common mode current by implementing a symmetrical type, the first resonant impedance Z ₈₁ and the second resonant impedance Z82 have the same resonant frequency and resonant characteristics (eg, characteristic impedance) )) can be designed to have For example, the first inductor L81 and the first capacitor C81 may be designed to have the same inductance and the same capacitance as the second inductor L82 and the second capacitor C82, respectively.

The input terminal smoothing capacitor (not shown) and the output terminal smoothing capacitor (C _o ) are used for the input terminal and the output terminal of the converter 800, respectively, and the input DC voltage (V _dc ) and the output DC voltage (V) of the converter 800 _o ) may perform a stabilizing function, but may not be used in some cases.

The rectifier circuit 820 rectifies the intermediate AC voltage V _{ac output from the switching circuit 810 to output the output DC voltage V o} through the fifth node N5 and the sixth node N6 . have. A conventional diode rectifier circuit capable of converting alternating current to direct current may be used for the rectifier circuit 820 , but in order to reduce the common mode current, it is preferable to use a symmetrical rectifier circuit. According to an embodiment, when a full-bridge rectifier circuit is used, the common-mode current can be reduced because it operates symmetrically.

9 is a diagram illustrating an operation waveform of the converter 800 of FIG. 8 .

Referring to FIG. 9 , the first switch S81 , the second switch S82 and the third switch S83 alternate the _on period T on and the off period T _off within the _{switching period T s .} On/off can be repeated to have . According to an embodiment, the first switch S81 and the third switch S83 are turned on/off substantially simultaneously with each other, and the second switch S82 is substantially the same with the first switch S81 and the third switch S83. can be turned on/off in reverse. The switching frequency may be defined as the reciprocal of the switching period (T _s), the duty (duty) is the switching period (T _s) a first switch (S81) or the third on-period of the switch (S83) to (T _on) It can be defined as the ratio of (=T _on /T _{s ).}

_{In the period T on} in which the first switch S81 and the third switch S83 are turned on and the second switch S82 is turned off _{, the voltage V s} between the seventh node N7 and the eighth node N8 is and an input direct voltage (V _dc), a first switch (S81) and the third switch (S83) is turned off and the second switch (S82) is turned on interval (T _off) a seventh node (N7) in the eighth node ( The voltage (V _s ) between N8) may be zero.

_{The voltage V s} between the seventh node N7 and the eighth node N8 formed by on/off of the first switch S81 , the second switch S82 and the third switch S83 is the first Resonance may be caused in the resonant _{impedance Z 81} and the second resonant impedance Z _{82 .} The resonance current I _r of FIG. 9 illustrates a current flowing through the first resonance impedance Z _{81 .}

The converter 800 adjusts the magnitude and/or phase of _{the resonance current I r} by adjusting the switching frequency and/or duty of the first switch S81, the second switch S82, and the third switch S83. The power delivered to the load side can be adjusted.

As illustrated in FIG. 9 , the first voltage V ₁ applied to the seventh node N7 becomes V _{dc in the on period} T on of the first switch S81 and In the off section T _off , it may be a predetermined DC voltage (in FIG. 9 , a preferred value according to the present embodiment _{is indicated as V dc} /2 ). _{The second voltage V 2} applied to the eighth node N8 _{becomes zero during the on period} T on of the first switch S81 and the off period T _off of the first switch S81 . may be a predetermined DC voltage (in FIG. 9, it _{is indicated as V dc} /2 as a preferred value according to the present embodiment).

In this embodiment, in the _{on period} (T on ) and the off period (T _off ) of the first switch ( S81 ), the sum of the first voltage ( V ₁ ) and the second voltage ( V ₂ ) is made to maintain a constant value. In this case, there is an advantage of reducing the common mode current. This part will be described in detail below.

FIG. 10 is a diagram illustrating an equivalent circuit 1000 of the converter 800 of FIG. 8 .

Referring to FIG. 10 , in the converter 800 of FIG. 8 , the first voltage V _{1 applied to the seventh node N7 and the second voltage V 2} applied to the eighth node N8 are voltage sources. is shown, and the voltage of the third node N3 and the voltage of the fourth node N4, which are the input terminals of the rectifier circuit 820 , are respectively shown as a first rectifying terminal voltage V _rec1 and a second rectifying terminal voltage V _rec2 . has been Here, the first rectifying terminal voltage V _rec1 and the second rectifying terminal voltage V _rec2 may be understood as voltages based on the sixth node N6 , respectively.

As can be seen by comparing the equivalent circuit 1000 of FIG. 10 with the equivalent circuit 500 of FIG. 5 , the converter 800 of FIG. 8 is an equivalent circuit substantially identical to the converter 300 of FIG. 3 . can be expressed Accordingly, if the equivalent circuit 1000 of FIG. 10 is converted into the Thevenin equivalent circuit, it will have the same shape as that illustrated in FIG. 6 .

Similarly to Equation 1, the common-mode open-circuit voltage (V _cm,ov ) for the equivalent circuit 1000 of FIG. 10 is obtained as shown in Equation 5 below.

[Equation 5]

Here, when the first resonant impedance Z ₈₁ and the second resonant impedance Z ₈₂ are the same, and a full bridge diode rectifier circuit is used for the rectifier circuit 820 , Equation 5 is the following Equation 6 It can be arranged as simply as

[Equation 6]

That is, the common-mode open-circuit voltage (V _cm,ov ) of the converter 800 may have the same shape as the common-mode open-circuit voltage of the converter 300 . However, since the size or shape of the first voltage (V ₁ ) and the second voltage (V ₂ ) are different between the two converters ( 800 , 300 ), it is necessary to remove the AC component from the _{common-mode open-circuit voltage (V cm,ov ).} The requirements for this require a separate analysis.

Similar to the above, in Equation 6, if the sum (ie, V ₁ + V _{2 ) of the first voltage (V 1} ) and the second voltage (V ₂ ) has only a DC component (ie, if there is no AC component) ), the common-mode open-circuit voltage (V _cm,ov ) also has no AC component. As shown in FIG. 8 , since the first capacitor C81 and the second capacitor C82 are disposed in series _{between the first resonant impedance Z 81} and the second resonant impedance Z _{82 , the common mode open-circuit voltage} When (V _cm,ov ) has only a DC component, the common mode current (I _cm ) may not flow or may be reduced.

Based on this principle, in this embodiment, the sum (V ₁ + V _{2 ) of the first voltage (V 1} ) and the second voltage (V ₂ ) has only a DC component without an AC component (or an AC component) by reducing the common mode current (I _cm ) is used.

More specifically, since _{V 1} = V _dc , V ₂ = 0 in the _{on period} (T on ) of the first switch, the common-mode open-circuit voltage (V _cm,ov ) is as shown in Equation 7 below.

[Equation 7]

In the off section (T _off ) of the first switch, V ₁ = V _dc - V _S81 , V ₂ = V _{S83 ,} so the common-mode open-circuit voltage (V _cm,ov ) is as shown in Equation 8 below.

[Equation 8]

Here, V _S81 is the drain-source voltage of the first switch S81 , and V _S83 is the drain-source voltage of the third switch S83 .

In Equation 8, the first switch (S81) a drain of the source voltage (V _S81) and the third drain of the switch (S83) - create the same source voltage (V _S83), the common-mode open-circuit voltage (V _{cm, ov)} may be as in Equation 9 below.

[Equation 9]

_{That is, when the drain-source voltage V S81} of the first switch S81 and the drain-source voltage V S83 of the third switch _S83 are made substantially equal, the common-mode open-circuit voltage V _{cm,ov ) maintains a constant DC voltage in the on section (T on} ) and the off section (T _off ) as shown in Equations 7 and 9, so that the common-mode open-circuit voltage (V _cm,ov ) does not contain an AC component or decreases can be Therefore, as described above, the common mode current may not flow theoretically (in practice, it may flow minutely due to deviation of device values, etc.).

The drain-source voltage V _S81 of the first switch S81 and the drain-source voltage V _S83 of the third switch S83 are turned off when the first switch S81 and the third switch S83 are turned off. The input DC voltage (V _dc ) may be determined in the process of being distributed between the first switch ( S81 ) and the third switch ( S83 ). Therefore, when a device having the same characteristics is used for the first switch _S81 and the third switch S83 , the drain-source voltage V S81 of the first switch S81 and the drain-source voltage V S81 of the third switch S83 are- The source voltage V _S83 may be the same or similar, whereby the common mode current I _cm may be reduced.

Looking through the waveform of Figure 9, each of the first voltage (V ₁ ) and the second voltage (V ₂ ) has a voltage change in the _{on period} (T on ) and the off period (T _off ) of the first switch ( S1 ) However, when the first voltage (V ₁ ) and the second voltage (V ₂ ) have the same value (ie, V _{dc /2) in the off period} (T off ), the first voltage (V ₁ ) It may be understood that the sum of the and second voltage V _{2 is kept constant as V dc so} that only a DC component without an AC component may be obtained.

In summary, in this embodiment, the first resonant impedance (Z ₈₁ ) and the second resonant impedance (Z ₈₂ ) are substantially equal (relating to Equations 5 and 6), and the first switch S81 and the second 3 By making the characteristics of the switch S83 substantially the same (related to Equations 7 to 9), it is possible to make the AC component not generated or reduced in the _{common-mode open-circuit voltage V cm,ov , and thereby} Mode current can be reduced.

Looking at this principle of the present embodiment from another point of view, it can also be understood that the _{converter 800 is designed to be symmetrical, thereby reducing the common mode current (I cm ).}

As an example of a case in which the first switch S81 and the third switch S83 have substantially the same characteristics, the first switch S81 and the third switch S83 have the same part number of the same manufacturer (that is, , identically designed devices) can be used. As another example, devices having similar switching characteristics may be used even though manufacturers or part numbers are different. For example, the similarity of the switching characteristics may be determined based on at least one of a die size of the switch, a turn-off speed of the switch, and a parasitic capacitance inherent in the switch.

However, according to the above-described principle, the _{reduction effect of the common mode current I cm} does not occur only when the first switch S81 and the third switch S83 have the same characteristics, but the first switch S81 Since the common mode reduction effect increases as the characteristics of the third switch S83 and the third switch S83 are similar, it should be understood that the present embodiment is not an essential requirement that the characteristics of the first switch S81 and the third switch S83 are the same. something to do.

On the other hand, the first switch (S81) of the drain-source voltage looks at the case (V _S83) are not identical to each other - the drain source voltage (V _S81) and the third switch (S83). For example, in the off period (T _off ) of the first switch ( S81 ), the drain-source voltage (V _S81 ) of the first switch ( S81 ) is 2*V _dc /3 and the drain- of the third switch ( S83 )- Assuming that the source voltage (V _S83 ) is V _dc /3, V ₁ = V _dc - V _S81 = V _dc /3, and V ₂ = V _S83 = V _dc /3. In this case, the common-mode open-circuit voltage (V _{cm,ov ) in the off period (T off ) has a different value from the T on period} (refer to Equation 7) as shown in Equation 10 below, so that the common mode open-circuit voltage (V) _cm,ov ) includes an AC component corresponding to the switching frequency and its harmonics, so that the common-mode current may increase.

[Equation 10]

Through the above description, the effect of reducing the common mode according to the embodiment of the present invention will be clearly understood.

Meanwhile, even when devices having the same or similar characteristics are used for the first switch S81 and the third switch S83, differences may occur in turn-off speed or parasitic capacitance due to variations in actual manufacturing. In this case, the first switch (S81) of the drain-to-drain source voltage (V _S81) and the third switch (S83)-source voltage (V _S83), there may occur a difference. _{For example, when the parasitic capacitance C p} of the first switch S81 and the third switch S83 _{is the same, but there is a difference t d} in the turn-off times of the two switches S81 and S83, the common mode Calculating the amount of change (ΔV _{cm ) in the on period} (T on ) and the off period (T _off ) of the open circuit voltage (V _cm,ov ) is as shown in Equation 11 below.

[Equation 11]

Here, I _r ( 0 ) is the magnitude of _{the resonance current I r} at the time when the first switch S81 and the third switch S83 are turned off.

That is, the amount of change (ΔV _{cm ) in the on period} (T on ) and the off period (T _off ) of the common mode open voltage (V _cm,ov ) is the magnitude of the resonance current (I _r ) at the time of turning off and the two switches proportional to the difference between the turn-off time (t _d) of (S81, S83), and may be inversely proportional to the parasitic capacitance (C _p) of the two switches (S81, S83).

As such, as the difference between characteristics (eg, parasitic capacitance or turn-off speed) between the first switch S81 and the third switch S83 increases, the common mode current may increase.

In the embodiment of FIG. 11 , even when there is a difference in the characteristics of the first switch S81 and the third switch S83 , the drain-source voltage V _S81 of the first switch S81 and the third switch S83 ), a circuit capable of reducing the common mode current by reducing the difference between the drain-source voltage (V _{S83 ) is exemplified.}

Referring to FIG. 11 , the switching circuit 1110 of the converter 1100 is different from the converter 800 illustrated in FIG. 8 in that it further includes a voltage division circuit 1130 . Unless it is different from the content to be described below, the content described with reference to FIG. 8 may also be applied to FIG. 11 .

The voltage divider circuit 1130 includes a third capacitor C83 connected between the first node N1 and the ninth node N9 and a fourth capacitor connected between the ninth node N9 and the second node N2 . (C84), the first diode D81 connected between the ninth node N9 and the seventh node N7, and the second diode D82 connected between the ninth node N9 and the eighth node N8 may include Specifically, the first diode D81 may have an anode connected to the ninth node N9 and a cathode connected to the seventh node N7 . The second diode D82 may have an anode connected to the eighth node N8 and a cathode connected to the ninth node N9.

The third capacitor C83 and the fourth capacitor C84 may divide the input DC voltage V _dc . _{That is, a voltage of V dc} /2 may be maintained at each of the third capacitor C83 and the fourth capacitor C84 (which may include a slight ripple voltage). According to the embodiment, the third capacitor (C83) and the fourth capacitor (C84) together _{perform a voltage smoothing function by replacing the smoothing capacitor (C dc} ) of the input terminal illustrated in FIG. 3 and at the same time contributing to voltage distribution. can be understood

For example, when the first switch S81 is turned off faster than the third switch S83 so that the drain-source voltage V _S81 of the first switch S81 first _{reaches V dc} /2, the second One diode D81 is turned on to prevent the drain-source voltage V _S81 of the first switch S81 from becoming _{higher than V dc} /2. Conversely, when the third switch S83 is turned off faster than the first switch S81 so that the drain-source voltage V _S83 of the third switch S83 first _{reaches V dc} /2, the second diode D82 is turned on so that the drain-source voltage V _S83 of the third switch S83 does not become higher than V _{dc /2.}

As such, according to the voltage dividing circuit 1130 , even when there is a difference in characteristics between the first switch S81 and the third switch S83 , the drain-source voltage V _S81 of the first switch S81 and the third The common mode current may be reduced by maintaining the drain-source voltage V _{S83 of the switch S83 to be the same or similar.}

FIG. 12 is a diagram illustrating a switch driving circuit 1240 that may be used in the half-bridge type symmetric converter 1100 of the capacitor isolation method illustrated in FIG. 11 .

Referring to FIG. 12 , the switch driving circuit 1240 receives the driving signals of the first driving circuit 1241 and the first switch S81 that generate driving signals of the second switch S82 and the third switch S83 . A second driving circuit 1242 for generating may be included.

The first driving circuit 1241 includes a third diode D83 and a fifth capacitor C85 connected in series between the control power source Vcc and the eighth node N8, and a second switch S82 and a third A first driving signal generator 1243 that generates a driving signal of the switch S83 may be included. Specifically, the third diode may have an anode connected to the control power supply Vcc and a cathode connected to one end of the fifth capacitor C85. According to an embodiment, the first driving circuit 1241 may further selectively include a current limiting first resistor R81 connected in series to the third diode D83.

The second driving circuit 1242 includes a fourth diode D84 and a sixth capacitor C86 connected in series between the connection node of the third diode D83 and the fifth capacitor C85 and the seventh node, and A second driving signal generator 1244 that generates a driving signal of the first switch S81 by using the voltage supplied from the 6 capacitor C86 may be included. Specifically, the fourth diode D84 may have an anode connected to a connection node between the third diode D83 and the fifth capacitor C85 and a cathode connected to one end of the sixth capacitor C86. According to an embodiment, the second driving circuit 1242 may further selectively include a second resistor R82 for limiting current connected in series to the fourth diode D84.

Here, the control power Vcc is a power based on the second node N2 and may be supplied from the outside or may be generated by itself using a known circuit. A detailed description of the generation of the control power supply Vcc will be omitted because it may obscure the gist of the present invention.

The third switch S83 may be driven using the control power Vcc because the source terminal is connected to the second node. However, since the source terminal of the second switch S82 is connected to the eighth node N8, it is difficult to drive the second switch S82 with the control power Vcc using the second node N2 as the reference potential. do.

To solve this problem, the first driving circuit 1241 may generate power for driving the second switch S82 by itself. That is, when the third switch S83 is turned on and the second node N2 and the eighth node N8 are short-circuited, the control power supply Vcc connects the fifth capacitor C85 through the third diode D83. can be recharged Since the potential charged in the fifth capacitor C85 is based on the eighth node N8, it may be used to drive the second switch S82.

Since the source terminal of the first switch S81 is connected to the seventh node N7, the control power source Vcc having the second node N2 as the reference potential or the eighth node N8 as the reference potential 5 It is difficult to drive the first switch S81 using the capacitor C85.

To solve this problem, the second driving circuit 1242 may generate power for driving the first switch S81 by itself. That is, when the second switch S82 is turned on and the seventh node N7 and the eighth node N8 are short-circuited, the voltage of the fifth capacitor C85 is transferred through the fourth diode D84 to the sixth capacitor ( C86) can be charged. Since the potential charged in the sixth capacitor C86 is based on the seventh node N7, it may be used to drive the first switch S81.

As described above, the switch driving circuit 1240 of this embodiment uses a simple circuit even when two switches (S81 and S82) with a source terminal floating from the control power source Vcc are connected in series to supply the switch driving power. can create

The first driving signal generating unit 1243 and the second driving signal generating unit 1244 may generate driving signals for driving the switches S81 , S82 , and S83 according to internal logic. A description of the internal logic of the first driving signal generating unit 1243 and the second driving signal generating unit 1244 will be omitted as it may obscure the gist of the present invention. The first driving signal generating unit 1241 and the second driving signal generating unit 1242 may be implemented as hardware such as an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), or the like, or implemented as software and read by a computer. The function can be performed by an arithmetic device such as a CPU in the state stored in a possible storage medium (memory, etc.).

13 is a diagram illustrating an AC-DC converter including a capacitor-isolated symmetrical converter according to an embodiment of the present invention.

Referring to FIG. 13 , the AC-DC converter 1300 may include a rectifier 1330 and a symmetrical converter 100 . Although the AC power supply 30 and the load 10 are shown together in FIG. 13 , it may be understood that the AC power 30 and the load 10 are not included in the configuration of the AC-DC converter 1300 .

The rectifier 1330 may rectify the AC voltage provided by the AC power source 30 . A known rectifier circuit may be used for the rectifier 1330 . Illustratively, a full-bridge diode rectifier circuit or a half-bridge diode rectifier circuit may be used for the rectifier 1330, but is not limited thereto.

The symmetrical converter 100 receives the DC voltage V _dc output from the rectifier 1330 through the first node N1 and the second node N2 , and the fifth node N5 and the sixth node N6 . ) through the output DC voltage (V _o ) can be provided to the load (10). As the symmetrical converter 100 , the capacitor-isolated symmetrical converter described with reference to FIGS. 1 to 12 may be used. According to an embodiment, a converter such as a power factor correction circuit may be further used between the rectifier 1330 and the symmetric converter 100 .

The AC-DC converter 1300 configured as described above may include the advantages of the capacitor-isolated symmetric converter described with reference to FIGS. 1 to 12 . That is, the AC-DC converter 1300 reduces the common-mode current and improves the insulation function to prevent a safety problem from occurring even when the human body contacts the load side.

14 and 15 are diagrams illustrating an embodiment in which a common mode filter or a resonance filter is used to further reduce a common mode current in the AC-DC converter of FIG. 13 .

The AC-DC converter 1400 illustrated in FIG. 14 is different from the AC-DC converter 1300 illustrated in FIG. 13 in that it further includes a common mode filter 1410 . Unless it is different from the content to be described below, the content described with reference to FIG. 13 may also be applied to FIG. 14 .

The common mode filter 1410 may be used to reduce the common mode current. For example, the common mode filter 1410 may be disposed between the rectifier 1330 and the capacitor-isolated symmetric converter 100 . The common mode filter 1410 may be disposed between the AC power supply 30 and the rectifier 1330 or inside the capacitor insulation symmetric converter 100, but as shown in FIG. 14 , the rectifier 1330 and the capacitor insulation symmetrical type filter 1410 When disposed between the converters 100, the maximum value of the current flowing through the filter is reduced, thereby reducing the filter size.

The common mode filter 1410 may include a first filter inductor L _f1 and a second filter inductor L _f2 . The first filter inductor L _f1 and the second filter inductor L _f2 are magnetically coupled (indicated by dotted lines in the figure), and circulate through _{the first filter inductor L f1} and the second filter inductor L _{f2 .} The inductance is minimized for the current flowing through the first filter inductor (L _f1 ) and the second filter inductor (L _f2 ) in the same direction (on the drawing), acting as a large inductance to reduce the common mode current. have.

To increase the filter effect, a first filter capacitor (C _p1 ) and/or a second filter capacitor (C) before or after the magnetically coupled first filter inductor (L _f1 ) and the second filter inductor (L _{f2 ) p2} ) may be optionally added.

The AC-DC converter 1500 illustrated in FIG. 15 is different from the AC-DC converter 1300 illustrated in FIG. 13 in that it further includes a resonance filter 1510 . Unless it is different from the content to be described below, the content described with reference to FIG. 13 may also be applied to FIG. 15 .

The resonant filter 1510 may be used to reduce the common mode current. For example, the resonance filter 1510 may be disposed between the rectifier 1330 and the capacitor-insulated symmetric converter 100 . The resonance filter 1510 may be disposed between the AC power supply 30 and the rectifier 1330 or inside the capacitor-insulated symmetric converter 100, but as shown in FIG. 15, the rectifier 1330 and the capacitor-insulated symmetrical converter (100), the maximum value of the current flowing through the filter decreases, thereby reducing the filter size.

The resonance filter 1510 may include unit resonance filters RF1, RF2, ... in which an inductor and a capacitor are connected in parallel to each other. Each of the unit resonance filters (RF1, RF2, ...) shows high impedance near the resonance frequency determined by the internal inductor and capacitor, but has low impedance for other frequencies, so that the current of a specific frequency component is passing can be reduced. Accordingly, the common mode current can be effectively reduced by using the unit resonance filters RF1, RF2, ... having a resonance frequency that matches the frequency component of the expected common mode current. If the frequency components of the common mode current are varied, a plurality of unit resonance filters (RF1, RF2, ...) matching each of the various frequency components may be used.

Also, a plurality of unit resonance filters RF1 , RF2 , ... may be symmetrically disposed in the resonance filter 1510 . That is, a unit resonance filter (eg, RF1 and RF2 having the same characteristic) having the same resonance frequency may be disposed on a line corresponding to the first node N1 and a line corresponding to the second node N2 .

_{Also, capacitors C r1} , ..., C _m may be selectively added to the resonance filter 1510 in parallel to each of the unit resonance filters RF1 , RF2 , ... . The capacitors C _r1 , ..., C _m connected in parallel can effectively increase the common mode current reduction function of the resonance filter 1510 .

As described with reference to FIGS. 1 to 12 , the capacitor-isolated symmetric converter of the present embodiments has an advantage of reducing the common mode current by using a symmetric circuit, but the lower the common mode current may be preferable. In consideration of this situation, the common mode current may be further reduced by auxiliary use of the common mode filter 1410 or the resonance filter 1510 as illustrated in FIGS. 14 and 15 , if necessary. The common mode filter illustrated in FIG. 14 and the resonance filter illustrated in FIG. 15 may be used together if necessary.

16 is a diagram illustrating a class E-type symmetric converter of a capacitor isolation method according to another embodiment of the present invention.

Referring to FIG. 16 , the rectifier circuit 1620 is specifically exemplified in the class E type symmetric converter 1600 (hereinafter also referred to as 'converter 1600' for short) of the capacitor insulation method compared to the converter 300 illustrated in FIG. 3 . There is a difference in that The converter 1600 may be understood as an exemplary embodiment of the converter 300 described with reference to FIG. 3 , and the content described with reference to FIG. 3 may also be applied to FIG. 16 unless it is arranged with the content to be described below.

The rectifier circuit 1620 may include a fifth capacitor C5 , a second diode D2 , a fifth inductor L5 , a sixth inductor L6 , and an output terminal smoothing capacitor C _o . The output terminal smoothing capacitor (C _o ) may be viewed as a part of the rectifier circuit 1620 , but may be understood as an external configuration of the rectifier circuit 1620 in some cases.

As an embodiment, the fifth capacitor C5 may be connected between the third node N3 and the fourth node N4 . The cathode of the second diode D2 may be connected to the third node N3 , and the anode may be connected to the fourth node N4 . The fifth inductor L5 may be connected between the third node N3 and the fifth node N5 . The sixth inductor L6 may be connected between the fourth node N4 and the sixth node N6 . The output terminal smoothing capacitor C _o may be connected between the fifth node N5 and the sixth node N6.

17 is a diagram illustrating an operation waveform of the converter 1600 of FIG. 16 . In FIG. 17 , the intermediate alternating voltage (V _ac ) is further illustrated as compared to FIG. 4 .

By the operation of the rectifier circuit 1620 , a positive voltage generated by resonance may be formed _{in the intermediate AC voltage V ac in some sections within the switching period.} By the operation of the fifth inductor L5, the sixth inductor L6, and the output terminal smoothing capacitor C _o , a voltage corresponding to the average value of the intermediate AC voltage V _ac is formed in the output DC voltage V _{o .} can

The rectifier circuit 1620 may reduce a common mode current together with the symmetric switching circuit 310 by operating as a symmetrical resonant rectifier.

18 is a diagram illustrating a class E-type symmetric bidirectional converter of a capacitor isolation method according to another embodiment of the present invention.

Referring to FIG. 18, the class E type symmetrical bidirectional converter (1800, hereinafter simply referred to as 'converter 1800') of the capacitor insulation method has a diode ( There is a difference in that the second switch S2 is used instead of D2 of FIG. 16 . Unless it is inconsistent with the content to be described below, the content described with reference to FIG. 16 may also be applied to FIG. 18 .

The second switch S2 of the rectifying circuit 1820 may flow or block a current from the third node N3 to the fourth node N4 through an on/off operation. The second switch S2, similar to the first switch S1, repeats on/off within a switching period and adjusts the voltage formed at the third node N3 and the fourth node N4, thereby inputting direct current. Power transferred from the voltage (V _dc ) to the output DC voltage (V _o ) may be adjusted. According to the embodiment, the output DC voltage (V _{o ) from the input DC voltage (V dc} ) by adjusting the ratio (duty) of the on period to the switching period of the second switch (S2) and/or adjusting the switching frequency ) to control the power delivered to it.

In addition, the converter 1800 may transmit power in both directions by using the second switch S2 in the rectifying circuit 1820 . That is, power may be transmitted from the input DC voltage V _dc to the output DC voltage V _o , and power may be transmitted from the output DC voltage V _o to the input DC voltage V _dc . In the latter case, it may be understood that the second switch S2 operates as a main switch, and the first switch S1 operates as a part of the rectifying circuit. The direction in which the converter 1800 transmits power and the amount of power may be adjusted according to the control of the first switch S1 and the second switch S2 .

Next, it will be described that the above-described symmetric converter according to embodiments of the present invention can be used to reduce the common mode current even when a transformer is used.

So far, with reference to FIGS. 1 to 18 , it has been described that the common mode current is reduced while performing insulation using a capacitor-isolated symmetric converter for the case where a transformer is not used, see FIGS. 1 to 18 The symmetric converter described above can be utilized to reduce the common mode current even when a transformer is used. Even when a transformer is used, the common mode current may flow through parasitic capacitance inside the transformer, and it is necessary to reduce the common mode current depending on the situation.

19 is a diagram illustrating a class E type symmetrical converter using a transformer as an embodiment.

Referring to FIG. 19 , the class E type symmetric converter (1900, hereinafter simply referred to as 'converter 1900') using a transformer further includes a first transformer TX1 compared to the converter 300 illustrated in FIG. 3 . There is a difference in that Unless it is inconsistent with the content to be described below, the content described with reference to FIG. 3 may also be applied to FIG. 19 .

According to an embodiment, the first transformer TX1 may be disposed between the third node N3 and the rectifier circuit 320 and between the fourth node N4 and the rectifier circuit 320 . That is, the first winding W1 of the first transformer TX1 is connected between the third node N3 and the fourth node N4 , and the second winding W2 of the first transformer TX1 is a rectifying circuit It may be connected between the input nodes N10 and N11 of 320 .

It is preferable that the first winding W1 and the second winding W2 of the first transformer TX1 are completely electrically insulated from each other, but due to restrictions such as size, the first winding W1 and the second winding W2 Since the distance between them is not sufficient, a parasitic capacitance may exist between the two windings W1 and W2, and a common mode current may flow through this parasitic capacitance. By using the symmetrical switching circuit 310 in the converter 1900 illustrated in FIG. 19 , even when a parasitic capacitance exists in the first transformer TX1 , the common mode current can be reduced by the above-described action.

20 is a diagram illustrating a half-bridge type symmetrical converter using a transformer as another embodiment.

Referring to FIG. 20 , the half-bridge type symmetrical converter 2000 using a transformer (hereinafter also referred to as 'converter 2000' for short) further includes a second transformer TX2 compared to the converter 800 illustrated in FIG. 8 . There is a difference in that Unless it is different from the content to be described below, the content described with reference to FIG. 8 may also be applied to FIG. 20 .

According to an embodiment, the second transformer TX2 may be disposed between the third node N3 and the rectifying circuit 820 and between the fourth node N4 and the rectifying circuit 820 . That is, the first winding W1 of the second transformer TX2 is connected between the third node N3 and the fourth node N4 , and the second winding W2 of the second transformer TX2 is a rectifying circuit It may be connected between the input nodes N10 and N11 of the 820 .

As described above, a common mode current may flow through the parasitic capacitance of the second transformer TX2. The converter 2000 illustrated in FIG. 20 uses the half-bridge type symmetrical switching circuit 810 to reduce the common mode current even when a parasitic capacitance exists in the second transformer TX2.

As described above, the embodiment of the present invention includes a symmetrical converter, a class E-type symmetrical converter, a half-bridge-type symmetrical converter, a symmetrical AC-DC converter, a class E-type symmetrical bidirectional converter, and a symmetrical converter using a transformer. and according to these converters, it is possible to reduce the common-mode current and improve the insulation performance. In addition, the driving circuit according to an embodiment of the present invention can effectively drive a switch having a floating source terminal in a symmetrical converter.

Terms such as "include", "comprise" or "have" described above mean that the corresponding component may be embedded unless otherwise stated, so it does not exclude other components. It should be construed as being able to further include other components. All terms, including technical and scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which the present invention belongs, unless otherwise defined. Terms commonly used, such as those defined in the dictionary, should be interpreted as being consistent with the meaning of the context of the related art, and are not interpreted in an ideal or excessively formal meaning unless explicitly defined in the present invention.

The above description is merely illustrative of the technical spirit of the present invention, and various modifications and variations will be possible without departing from the essential characteristics of the present invention by those skilled in the art to which the present invention pertains. Accordingly, the embodiments disclosed in the present invention are not intended to limit the technical spirit of the present invention, but to explain, and the scope of the technical spirit of the present invention is not limited by these embodiments. The protection scope of the present invention should be construed by the following claims, and all technical ideas within the scope equivalent thereto should be construed as being included in the scope of the present invention.

Claims (13)

a switching circuit that receives an input DC voltage through a first node and a second node and outputs an intermediate AC voltage through a third node and a fourth node; and
A rectifier circuit for rectifying the intermediate AC voltage output by the switching circuit and outputting an output DC voltage through a fifth node and a sixth node; including,
The switching circuit is
Isolation is implemented using capacitors without including transformers,
an impedance between the first node and the third node and an impedance between the second node and the fourth node are substantially equal to each other;
An impedance between the first node and the fourth node and an impedance between the second node and the third node are also substantially equal to each other. delete The method according to claim 1,
In a state in which the second node is connected to a reference potential and the sixth node is connected to the reference potential through a ground impedance, a current entering the switching circuit through the first node and the switching circuit through the second node A capacitor-isolated symmetrical converter, characterized in that the currents entering the circuit have a phase difference of 180 degrees from each other. The method according to claim 1,
In a state in which the second node is connected to a reference potential, and the sixth node is connected to the reference potential through a ground impedance, a current output from the switching circuit through the third node and the switching through the fourth node Current output from the circuit is a capacitor-isolated symmetrical converter, characterized in that it has a phase difference of substantially 180 degrees from each other. a switching circuit that receives an input DC voltage through a first node and a second node and outputs an intermediate AC voltage through a third node and a fourth node; and
A rectifier circuit for rectifying the intermediate AC voltage output by the switching circuit and outputting an output DC voltage through a fifth node and a sixth node; including,
The switching circuit is
a first inductor connected between the first node and the seventh node;
a second inductor connected between the second node and the eighth node;
a first switch connected between the seventh node and the eighth node;
a third inductor and a first capacitor connected between the seventh node and the third node; and
and a fourth inductor and a second capacitor connected between the eighth node and the fourth node. 6. The method of claim 5,
The capacitor insulation type symmetrical converter, characterized in that the first switch is turned on in a state in which the voltage of the first switch becomes substantially zero. 6. The method of claim 5,
Further comprising a first switch driving circuit for generating a driving signal of the first switch,
The first switch driving circuit,
a first diode having an anode connected to the first node;
a fourth capacitor having a first terminal connected to the cathode of the first diode and a second terminal connected to the eighth node; and
and a driving signal generator receiving power from the fourth capacitor and generating a driving signal of the first switch. a switching circuit that receives an input DC voltage through a first node and a second node and outputs an intermediate AC voltage through a third node and a fourth node; and
A rectifier circuit for rectifying the intermediate AC voltage output by the switching circuit and outputting an output DC voltage through a fifth node and a sixth node; including,
The switching circuit is
a first switch connected between the first node and the seventh node;
a second switch connected between the seventh node and the eighth node;
a third switch connected between the eighth node and the second node;
a first inductor and a first capacitor connected between the seventh node and the third node; and
and a second inductor and a second capacitor connected between the eighth node and the fourth node. 9. The method of claim 8,
The first switch and the third switch are turned on/off at substantially the same time as each other,
and the second switch is turned on/off substantially opposite to the first switch and the third switch. 9. The method of claim 8,
The switching circuit further comprises a voltage divider circuit,
The voltage divider circuit,
a third capacitor connected between the first node and the ninth node;
a fourth capacitor connected between the ninth node and the second node;
a first diode connected between the ninth node and the seventh node;
a second diode connected between the ninth node and the eighth node;
A symmetrical converter of the capacitor insulation method comprising a. 9. The method of claim 8,
A first driving circuit generating a driving signal of the second switch and the third switch, and a second driving circuit generating a driving signal of the first switch,
The first driving circuit,
a third diode and a fifth capacitor connected in series between a control power supply and the eighth node; and
a first driving signal generator configured to generate a driving signal of the second switch using the voltage supplied from the fifth capacitor;
The second driving circuit,
a fourth diode and a sixth capacitor connected in series between the connection node of the third diode and the fifth capacitor and the seventh node; and
and a second driving signal generator configured to generate a driving signal of the first switch by using the voltage supplied from the sixth capacitor.
rectifier for rectifying alternating voltage; and
An AC-DC converter comprising a; the capacitor-insulated symmetrical converter according to any one of claims 1, 3 to 11, wherein the DC voltage output from the rectifier is provided through the first node and the second node. 13. The method of claim 12,
An AC-DC converter, characterized in that at least one of a resonance filter and a common mode filter is disposed between the rectifier and the capacitor-isolated symmetric converter.

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