KR102327178B1 - Pixel and organic light emitting display device using the same - Google Patents

Abstract

The present invention relates to a pixel and an organic light emitting diode display using the same. According to an embodiment of the present invention, a pixel is activated according to a scan signal transmitted from a corresponding scan line, and data according to the data signal transmitted from the corresponding data line. A pixel driver including a driving transistor generating a driving current corresponding to a voltage, an organic light emitting diode through which a first current of the driving current flows, and a bypass transistor through which a second current other than the first current flows among the driving currents; and an emission period in which the first current flows through the organic light emitting diode includes an off period in which the bypass transistor is in an off state.

Description

Pixel and organic light emitting display using same {PIXEL AND ORGANIC LIGHT EMITTING DISPLAY DEVICE USING THE SAME}

The present invention relates to a pixel and an organic light emitting display device using the same, and more particularly, to a pixel structure for improving a contrast ratio in a high resolution organic light emitting display device, and to an organic light emitting display device including the same.

In recent years, various flat panel display devices capable of reducing weight and volume, which are disadvantages of a cathode ray tube, have been developed. Examples of the flat panel device include a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP), and an organic light emitting diode display (Organic Light Emitting Diode Display). There is this.

Among the flat panel display devices, the organic light emitting diode display displays an image using an organic light emitting diode such as an organic light emitting diode (OLED) that generates light by recombination of electrons and holes, and has a fast response speed. At the same time, it is being driven with low power consumption and is attracting attention because of its excellent luminous efficiency, luminance and viewing angle.

In general, a driving method of an organic light emitting diode display is divided into an active matrix type and an active matrix type.

In the passive type, anodes and cathodes are cross-arranged in a matrix manner in the screen display area, and pixels are formed at the intersections of the anodes and cathodes.

In contrast, in the active type, a thin film transistor is disposed in each pixel, and each pixel is controlled using the thin film transistor.

The active type has advantages of less parasitic capacitance and less power consumption compared to the passive type, but has a disadvantage of luminance non-uniformity.

In particular, there is a problem in that a black current for displaying a black image is relatively increased due to an increase in current density for a high-resolution structure and an increase in material efficiency due to material development of an organic light emitting device. That is, when the black current, which is the minimum current for displaying the black image, is transmitted, the pixel including the organic light emitting device having improved efficiency is displayed as an image brighter than the black luminance corresponding to the black current. As a result, there is a problem in that the contrast ratio in the entire display image of the panel including the pixels is lowered. Therefore, it is necessary to study a pixel structure or a display device to maintain a high contrast ratio on a display screen by controlling the flow of the minimum driving current transmitted to the organic light emitting diode.

In order to solve the above problems, it is an object of the present invention to provide a pixel circuit that improves the contrast ratio of a display image by controlling a current flowing to an organic light emitting diode under black luminance condition and maintains the improved contrast ratio, and a display device using the same. .

In particular, it is intended to propose a pixel circuit structure for changing and controlling the flow of a driving current in order to lower the luminance of an organic light emitting diode that emits light with a minimum black current, and a structure of an organic light emitting diode display using the same.

In addition, the present invention provides a pixel structure capable of extending the lifespan of an organic light emitting device by preventing deterioration of the organic light emitting device that may be caused by an excessively high driving current being applied to an organic light emitting device emitting light with black luminance, and using the same An object of the present invention is to provide an organic light emitting diode display.

The technical problems to be achieved by the present invention are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those of ordinary skill in the art from the description of the present invention. .

In order to achieve the above object, a pixel according to an embodiment of the present invention is activated according to a scan signal transmitted from a corresponding scan line to generate a driving current corresponding to a data voltage according to a data signal transmitted from the corresponding data line. The display device includes a pixel driver including a transistor, an organic light emitting diode through which a first current of the driving current flows, and a bypass transistor through which a second current other than the first current flows among the driving currents.

In this case, the light emission period in which the first current flows through the organic light emitting diode includes an off period in which the bypass transistor is in an off state.

The off period may be the same as the light emission period.

Meanwhile, the off period may be a period excluding a period in which at least the scan signal is transmitted at a gate-on voltage level in the light emission period.

In an embodiment, the gate electrode of the bypass transistor may be connected to a DC voltage supply having a voltage value of a gate-off level of the bypass transistor.

In another embodiment, the gate electrode and the source electrode of the bypass transistor may be commonly connected between the driving transistor and the organic light emitting diode.

In another embodiment, the gate electrode of the bypass transistor may be connected to a gate line connected to the corresponding scan line, and the gate signal transmitted from the gate line may be transmitted as a gate-off level voltage of the bypass transistor. have.

In an embodiment, the gate electrode of the bypass transistor is connected to the corresponding scan line, and the off period excludes a period in which at least a scan signal transmitted from the corresponding scan line is transmitted at a gate-on voltage level in the light emission period. can be a period.

In another embodiment, the gate electrode of the bypass transistor is connected to a previous scan line of the corresponding scan line, and in the off period, a scan signal transmitted from at least the previous scan line is transmitted to a gate-on voltage level in the emission period. It may be a period excluding a period.

Further, in the present invention, the drain electrode of the bypass transistor may be connected to a variable voltage supply source that supplies a variable voltage with a set voltage value by applying the DC voltage level to an optimal DC voltage according to panel characteristics.

Meanwhile, the pixel driver may further include at least one light emission control transistor configured to flow the first current to the organic light emitting diode according to a light emission control signal transmitted from a light emission control line connected to the corresponding scan line. .

In this case, the light emission period is a period in which the light emission control transistor is maintained in an on state, and the light emission period is separated from a first period in which a first scan signal transmitted from the corresponding scan line is activated.

A gate electrode of the bypass transistor may be connected to the corresponding scan line.

The pixel driver may further include an initialization transistor configured to initialize a gate electrode voltage of the driving transistor by transmitting a first voltage to the gate electrode of the driving transistor according to a second scan signal transmitted from a previous scan line of the corresponding scan line. can

In this case, the light emission period is a period separated from the first period and a second period in which the second scan signal is activated as a period prior to the first period.

In addition, a gate electrode of the bypass transistor may be connected to the previous scan line.

In the present invention, the amount of current of the second current is not limited, but a voltage at a common junction of the driving transistor to which the source electrode of the bypass transistor is connected and the organic light emitting diode, and a variable voltage source to which the drain electrode of the bypass transistor is connected. may be adjusted in response to a voltage difference between the variable voltages.

An organic light emitting diode display device according to an embodiment of the present invention for achieving the above object includes a scan driver transmitting a plurality of scan signals to a plurality of scan lines, a data driver transmitting a plurality of data signals to a plurality of data lines, and the plurality of data lines. a display unit including a plurality of pixels respectively connected to a corresponding one of the scan lines and a corresponding one of the plurality of data lines, and each of the plurality of pixels emits light according to a corresponding data signal to display an image; A power supply for supplying a first power voltage, a second power voltage, and a variable voltage to each pixel, and controls the scan driver, the data driver, and the power supply, and generates the plurality of data signals and supplies them to the data driver It includes a control unit that

Each of the plurality of pixels is a driving transistor that is activated according to a scan signal transmitted from the corresponding scan line and generates a driving current corresponding to a data voltage according to a data signal transmitted from the corresponding data line, a first one of the driving currents. It may include an organic light emitting diode through which a current flows, and a bypass transistor through which a second current other than the first current flows among the driving currents. In this case, the emission period in which the first current flows through the organic light emitting diode may include an off period in which the bypass transistor is in an off state.

The power supply unit may supply a variable voltage obtained by applying the DC voltage level to the voltage level of the variable voltage by finding an optimal DC voltage according to panel characteristics.

In an embodiment, the gate electrode of the bypass transistor may be connected to a DC voltage supply having a voltage value of a gate-off level of the bypass transistor.

In another embodiment, the gate electrode and the source electrode of the bypass transistor may be commonly connected between the driving transistor and the organic light emitting diode.

The organic light emitting diode display of the present invention may further include a gate driver that transmits a plurality of gate signals to a plurality of gate lines. The control unit generates and transmits a control signal for controlling the gate driver, a gate electrode of the bypass transistor is connected to a corresponding gate line among the plurality of gate lines, and the gate signal transmitted from the gate line is It is transferred to the gate-off level voltage of the bypass transistor.

In another embodiment, the gate electrode of the bypass transistor is connected to the corresponding scan line, and the off period excludes at least a period in which a scan signal transmitted from the corresponding scan line is transmitted at a gate-on voltage level in the light emission period. can be a period.

In another exemplary embodiment, the gate electrode of the bypass transistor is connected to a previous scan line of the corresponding scan line, and the off period is a period during which at least a scan signal transmitted from the previous scan line is transmitted to a gate-on voltage level in the emission period. period may be excluded.

The organic light emitting diode display of the present invention may further include a light emission control driver that transmits a plurality of light emission control signals to a plurality of light emission control lines. In this case, the control unit generates and transmits a control signal for controlling the light emission control driver, and each of the plurality of pixels receives the driving current according to the light emission control signal transmitted from a corresponding light emission control line among the plurality of light emission control lines. It may further include at least one or more light emission control transistors to flow to the organic light emitting diode.

The light emission period is a period in which the light emission control transistor is maintained in an on state, and the light emission period is a period separated from a first period in which a first scan signal transmitted from the corresponding scan line is activated.

In addition, each of the plurality of pixels further includes an initialization transistor configured to initialize the gate electrode voltage of the driving transistor by transmitting a first voltage to the gate electrode of the driving transistor according to a second scan signal transmitted from a previous scan line of the corresponding scan line. may include In this case, the light emission period is a period separated from the first period and a second period in which the second scan signal is activated as a period prior to the first period.

According to the present invention, a pixel structure for controlling the flow of current transmitted to an organic light emitting diode under the condition of expressing black luminance when displaying an image of an organic light emitting display device is provided, and the contrast ratio of the displayed image is improved and maintained, thereby providing high quality quality. An organic light emitting diode display may be provided.

In addition, it is possible to prevent deterioration of the organic light emitting device by controlling so that an excessively high driving current is not applied to the organic light emitting device to which the driving current corresponding to the black luminance is transmitted, thereby prolonging the life of the organic light emitting device. It is possible to provide a pixel and an organic light emitting display device using the same.

1 is a schematic diagram illustrating a pixel of an organic light emitting diode display according to an exemplary embodiment;
2 is a block diagram of an organic light emitting diode display according to an exemplary embodiment.
FIG. 3 is a circuit diagram of the pixel shown in FIG. 2 according to the first embodiment;
FIG. 4 is a circuit diagram of the pixel shown in FIG. 2 according to a second embodiment;
FIG. 5 is a circuit diagram of the pixel shown in FIG. 2 according to a third embodiment;
6 is a block diagram of an organic light emitting diode display according to another exemplary embodiment;
FIG. 7 is a circuit diagram of the pixel shown in FIG. 6 according to the first embodiment;
8 is a block diagram of an organic light emitting diode display according to another exemplary embodiment;
9 is a circuit diagram of the pixel shown in FIG. 8 according to the first embodiment;
10 is a circuit diagram of the pixel shown in FIG. 8 according to a second exemplary embodiment;
11 is a circuit diagram of the pixel shown in FIG. 8 according to a third embodiment;
11 is a circuit diagram of the pixel shown in FIG. 8 according to a fourth embodiment;
12 is a signal timing diagram for driving the pixels of FIGS. 9 to 11;

Hereinafter, with reference to the accompanying drawings, embodiments of the present invention will be described in detail so that those of ordinary skill in the art can easily carry out the present invention. The present invention may be embodied in several different forms and is not limited to the embodiments described herein.

In addition, in various embodiments, components having the same configuration will be typically described in the first embodiment using the same reference numerals, and only configurations different from those of the first embodiment will be described in other embodiments.

In order to clearly explain the present invention, parts irrelevant to the description are omitted, and the same reference numerals are given to the same or similar elements throughout the specification.

Throughout the specification, when a part is "connected" with another part, this includes not only the case of being "directly connected" but also the case of being "electrically connected" with another element interposed therebetween. . In addition, when a part "includes" a certain component, this means that other components may be further included, rather than excluding other components, unless otherwise stated.

1 is a schematic diagram illustrating a pixel 1 of an organic light emitting diode display according to an embodiment of the present invention.

Referring to FIG. 1 , a pixel 1 according to an exemplary embodiment is located in a region where a corresponding scan line 4 and a corresponding data line 5 intersect.

In addition, the pixel 1 includes a pixel driver 2 connected to the supply line 6 of the first power supply voltage ELVDD, and a supply line 8 of the second power supply voltage ELVSS having a lower voltage than the first power supply voltage ELVDD. and an organic light emitting diode (OLED) having a cathode connected thereto, and a bypass unit 3 connected between an anode electrode of the organic light emitting diode (OLED) and the pixel driver 2 . Specifically, one end of the bypass unit 3 is connected to the junction node of the anode electrode of the organic light emitting diode (OLED) and the pixel driver 2 , and the other end is connected to the supply line 7 of the variable voltage Vvar.

The pixel driver 2 may include a plurality of transistors and capacitors.

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* When the pixel driver 2 is activated in response to the scan signal scan supplied from the corresponding scan line 4 , the pixel driver 2 receives the data signal DATA from the corresponding data line 5 . The data signal DATA applied to the pixel driver 2 may be stored in the form of a voltage in a capacitor provided in the pixel driver 2 . The data voltage according to the stored data signal DATA is generated as a corresponding predetermined driving current Idr and transmitted to the organic light emitting diode OLED, and in response to the light emitting current Ioled transmitted to the organic light emitting diode OLED. Displays an image by emitting light.

At this time, the pixel driver 2 is connected to the supply line 6 supplying a predetermined first power voltage ELVDD, and the pixel driver 2 is connected to the driving current through the supply line 6 of the first power voltage ELVDD It receives the power required for generation.

The basic structure of the pixel driver 2 may include two transistors and one capacitor (2TR1CAP structure), and circuit structures of various pixel drivers 2 will be described with reference to the drawings below.

When material properties of an organic light emitting diode (OLED) are developed and material efficiency is improved, the pixel 1 according to an embodiment of the present invention is an organic light emitting diode (OLED) ( A bypass unit 3 for bypassing some of the black currents flowing to the OLED) is included. Here, the black current is defined as a driving current applied to the transistor of the pixel 1 and required to emit light with the minimum luminance (black luminance) of the organic light emitting diode of the pixel.

In addition, bypassing a portion of the black current may prevent an unnecessarily high current from being transmitted to the organic light emitting diode (OLED), thereby preventing deterioration of material properties of the organic light emitting diode (OLED).

As can be seen in detail with reference to FIG. 1 , in the pixel 1 according to an embodiment of the present invention, all the driving currents Idr generated by the pixel driving unit 2 are applied to the emission currents Ioled of the organic light emitting diode (OLED). ), and has a structure including a bypass unit 3 that branches to a predetermined bypass current Ibcb to flow in a detour.

The bypass unit 3 is connected to a power supply line 7 that supplies a variable voltage Vvar controlled so that the voltage level varies according to a partial section of one frame in order to bypass the bypass current Ibcb.

According to an embodiment of the present invention, there may be a problem in that the actual display luminance of the black current increases as material efficiency is increased due to material development of an organic light emitting diode (OLED) or current density for a high-resolution structure is increased. can Therefore, there is a problem that the contrast ratio is reduced. To prevent this, it is impossible to lower the black current further below the threshold of the transistor off level. Accordingly, as in the pixel structure of FIG. 1 , a bypass unit 3 that bypasses and flows some current with respect to the black current is constituted.

Accordingly, some currents bypassing the bypass unit 3, that is, the bypass current Ibcb, have a current value at the level of the transistor off level, and thus have a large effect on the implementation of the image signal displaying the black luminance, and the It has little effect on the implementation of the image signal (especially the white luminance image signal) displaying high luminance. Therefore, the supply of the variable voltage Vvar connected to the bypass unit 3 is a variable voltage whose voltage level is adjusted so that the bypass current Ibcb bypasses and flows during one frame period of the display image, particularly during the black luminance condition. (Vvar) can be supplied.

Specific configurations and structures of the circuit elements of the pixel driver 2 and the bypass unit 3 will be described below in various embodiments corresponding to the structure of the organic light emitting diode display according to an embodiment of the present invention.

2 is a block diagram of an organic light emitting diode display according to an exemplary embodiment.

Referring to FIG. 2 , an organic light emitting diode display according to an embodiment of the present invention includes a display unit 10 including a plurality of pixels PX1 to PXn, a scan driver 20 , a data driver 30 , and a power supply unit ( 40), and a control unit 50 .

Each of the plurality of pixels PX1 to PXn is connected to a corresponding one of the plurality of scan lines S1 to Sn connected to the display unit 10 and a corresponding one of the plurality of data lines D1 to Dm. each is connected In addition, although not shown directly on the display unit 10 of FIG. 2 , each of the plurality of pixels PX1 to PXn is connected to a power supply line connected to the display unit 10 to obtain a first power supply voltage ELVDD and a second power supply voltage ELVSS. ), and a variable voltage (Vvar) is supplied.

The first power voltage ELVDD and the second power voltage ELVSS have a fixed voltage value for a plurality of frames in which an image is displayed, whereas the variable voltage Vvar varies according to a predetermined period of one frame as described above. It may have a variable voltage value with different voltage levels.

For example, the first power voltage ELVDD may be a predetermined high level voltage, the second power voltage ELVSS may be a voltage lower than the first power voltage ELVDD or a ground voltage, and may be a variable voltage Vvar. ) may be set to be equal to or lower than the second power voltage ELVSS according to a predetermined period.

The display unit 10 includes a plurality of pixels PX1 to PXn arranged in a substantially matrix form. Although not particularly limited, the plurality of scan lines S1 to Sn extend substantially opposite to each other in the row direction and substantially parallel to each other in the arrangement of the pixels, and the plurality of data lines D1 to Dm extend approximately in the column direction, almost parallel to each other

Each of the plurality of pixels PX1 to PXn emits light having a predetermined luminance by a driving current supplied to the organic light emitting diode according to a corresponding data signal transmitted through the plurality of data lines D1 to Dm.

The scan driver 20 generates and transmits a scan signal corresponding to each pixel through a plurality of scan lines S1 to Sn. That is, the scan driver 20 transmits a scan signal to each of a plurality of pixels included in each pixel line through a corresponding scan line.

The scan driver 20 receives the scan driving control signal SCS from the controller 50 to generate the plurality of scan signals, and sequentially supplies the scan signals to the plurality of scan lines S1 to Sn connected to each pixel line. do. Then, the pixel driver of each of the plurality of pixels included in each pixel line is activated.

The data driver 30 transmits a data signal to each pixel through the plurality of data lines D1 to Dm.

The data driver 30 receives the data driving control signal DCS from the controller 50 and supplies data signals corresponding to the plurality of data lines D1 to Dm connected to each of the plurality of pixels included in each pixel line. .

The controller 50 converts a plurality of image signals transmitted from the outside into a plurality of image data signals DATA and transmits the converted image signals to the data driver 30 . The control unit 50 receives the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, and the clock signal MCLK (not shown) to control the driving of the scan driver 20 and the data driver 30 . It generates a control signal for each and transmits it to each. That is, the controller 50 generates and transmits a scan driving control signal SCS for controlling the scan driver 20 and a data driving control signal DCS for controlling the data driver 30 , respectively. Also, the control unit 50 generates a power control signal PCS for controlling the driving of the power supply unit 40 and transmits it to the power supply unit 40 .

The power supply unit 40 supplies the first power voltage ELVDD, the second power voltage ELVSS, and the variable voltage Vvar to each pixel of the display unit 10 . The voltage values of the first power voltage ELVDD, the second power voltage ELVSS, and the variable voltage Vvar are not particularly limited, but according to the control of the power control signal PCS transmitted from the control unit 50 , the Voltage values can be set or controlled.

In particular, according to an embodiment of the present invention, the power supply unit 40 transfers a portion of the black current in a predetermined pixel to a path other than the organic light emitting diode (OLED) side under the control of the power control signal PCS. It may be supplied by adjusting the voltage level of the variable voltage Vvar to bypass and flow. In this case, the power supply unit 40 finds an optimal DC voltage according to panel characteristics, and applies the DC voltage level to the variable voltage Vvar supplied to each panel.

3 to 5 are circuit diagrams of a pixel according to an embodiment of the present invention. In particular, FIGS. 3 to 5 show the pixel PXn 100 provided in an area defined by the n-th pixel row and the m-th pixel column among the plurality of pixels PX1 to PXn of the display unit 10 shown in FIG. 2 . circuit structures according to different embodiments of the

First, the pixel 100-1 of FIG. 3 includes a pixel driver 102-1 including two transistors M1 and M2 and one capacitor Cst, and a bypass unit 103 including one transistor M3. -1) is composed. The pixel 100 - 1 of FIG. 3 is provided in an area defined by the n-th pixel row and the m-th pixel column among the plurality of pixels of the display unit, and thus the n-th scan line Sn, the m-th data line Dm, and the It is connected to a power supply line supplying the first power voltage ELVDD, the second power voltage ELVSS, and the variable voltage Vvar.

In the circuit diagram of the pixel to be described in the following drawings including FIG. 3 , a transistor, which is a circuit element, is exemplified as a PMOS transistor for convenience, and the operation will be described accordingly. However, it goes without saying that the structure and configuration of the pixel are not necessarily limited.

Specifically, the pixel driver 102-1 includes a driving transistor M1, a switching transistor M2, and a storage capacitor Cst.

The driving transistor M1 includes a gate electrode connected to the first node N1 , a source electrode connected to a supply line of the first power voltage ELVDD, and a drain electrode connected to the second node N2 .

The switching transistor M2 includes a gate electrode connected to the n-th scan line Sn, a source electrode connected to the m-th data line Dm, and a drain electrode connected to the first node N1 .

The storage capacitor Cst includes one electrode connected to the first node N1 , and a second electrode connected to a contact node connected to a supply line of the first power voltage ELVDD and a source electrode of the driving transistor M1 .

The switching transistor M2 is turned on or off in response to the scan signal S[n] through the corresponding n-th scan line Sn. When the switching transistor M2 receives the scan signal scan[n] of the gate-on voltage level, the data signal D corresponding to the first node N1 through the m-th data line Dm connected to the source electrode [m]) to transmit the data voltage.

The storage capacitor Cst having one electrode connected to the first node N1 stores a voltage according to a voltage difference between both electrodes of the storage capacitor for a predetermined period. Accordingly, a voltage corresponding to a voltage difference between the data voltage transferred to the first node N1 and the first power voltage ELVDD is stored.

Referring to FIG. 3 , since both electrodes of the storage capacitor Cst are respectively connected to the gate electrode and the source electrode of the driving transistor M1 , a voltage corresponding to a voltage difference between both ends of the storage capacitor Cst stored in the storage capacitor Cst. corresponds to the gate-source voltage Vgs of the driving transistor M1.

When a data voltage according to a data signal is applied to the driving transistor M1 through the switching transistor M2 activated by the scan signal S[n], the gate-source voltage Vgs stored in response to the data voltage Vgs ) to generate a driving current Idr and transmit it to the organic light emitting diode (OLED).

At this time, under a black luminance condition in which the applied data signal is a black image signal, when a black current is transmitted as the driving current Idr, the organic light emitting diode (OLED) emits light with a luminance higher than the expected luminance of the black luminance to increase the contrast ratio within the screen. and may cause deterioration of image quality. Therefore, in order to improve this, it is necessary to surely lower the emission current Ioled applied to the organic light emitting diode OLED under the black luminance condition. However, since it is impossible to lower the black current below the limit of the off-level voltage of the transistor, the pixel according to an embodiment of the present invention further includes a bypass unit 103-1 as shown in FIG. turn around That is, the bypass unit 103 - 1 of FIG. 3 passes a portion of the black current to the bypass current ( detour to Ibcb). Then, the light emitting current Ioled applied to the organic light emitting diode OLED has a current value lower than the black current applied as the driving current, so that light can be reliably emitted with black luminance. Thereby, the contrast ratio can be improved.

Referring to FIG. 3 , the bypass unit 103 - 1 has a gate electrode and a source electrode connected together to a second node N2 where the drain electrode of the driving transistor M1 and the anode electrode of the organic light emitting diode OLED are connected. , and a bypass transistor M3 including a drain electrode connected to a power supply line of the variable voltage Vvar.

At this time, the variable voltage Vvar is connected to the drain electrode of the bypass transistor M3 to adjust the voltage difference Vds between the source electrode voltage and the drain electrode voltage of the bypass transistor M3. Therefore, it is possible to control the bypass current (Ibcb) to be bypassed.

Since the gate electrode and the source electrode of the bypass transistor M3 are commonly connected to one second node N2, the voltage difference between the gate and source is 0V, and the bypass transistor M3 is always in the off state. do. And, since the variable voltage Vvar supply line is connected to the drain electrode of the bypass transistor M3, a predetermined bypass is generated from the black current through the bypass transistor M3 by the set voltage value of the variable voltage Vvar in the OFF state. A pass current Ibcb flows. In this case, the set voltage value of the variable voltage Vvar is not particularly limited, and for example, may be equal to or smaller than the second power voltage ELVSS, which is the cathode electrode voltage value of the organic light emitting diode (OLED). In a state in which the bypass transistor M3 is always turned off, the set voltage value of the variable voltage Vvar becomes a variable controlling the amount of current of the bypass current Ibcb.

The bypass unit 103 - 1 of the pixel according to the embodiment of FIG. 3 can always maintain an off state due to the structure of the bypass transistor M3 , and thus includes a maximum driving current representing white luminance as well as a black current. Even when an image driving current according to an image data signal having a normal luminance is transmitted to the organic light emitting diode, the bypass current may be bypassed. In the pixel structure of FIG. 3 , it is considered that the bypass current has a large effect on the path bypass when the black current is transmitted, but there is little effect of the bypass current path bypass when the driving current that implements other luminance images is transmitted. can This is because the magnitude of the corresponding bypass current is very small. Therefore, the pixel and the display device including the pixel according to the embodiment of FIG. 3 can accurately express the target luminance value when expressing the image in the low luminance stage without affecting the image display quality in the normal luminance stage, thereby reducing the contrast ratio. can be improved

FIG. 4 is a circuit diagram illustrating a circuit structure of the pixel PXn 100 shown in FIG. 2 according to an embodiment different from that of FIG. 3 .

Since the pixel driver 102-2 included in the pixel 100-2 according to the embodiment of FIG. 4 is the same as that of FIG. 3, the structure and operation description thereof will be omitted, and the structure of the bypass unit 103-2 will be focused on to be explained as

The bypass unit 103 - 2 of the pixel 100 - 2 of FIG. 4 includes a bypass transistor M30. The bypass transistor M30 is a node to which a gate electrode connected to the n-th scan line Sn to which the gate electrode of the switching transistor M20 is connected, a drain electrode of the driving transistor M10 and an anode electrode of the organic light emitting diode OLED are connected It includes a source electrode connected to (N20), and a drain electrode connected to a power supply line of the variable voltage (Vvar).

The bypass transistor M30 of FIG. 4 is not always turned off unlike in FIG. 3 , but is turned on or off in response to a scan signal S[n] transmitted to the gate electrode through the n-th scan line Sn. can be Accordingly, the bypass transistor M30 is also turned on during the scan period in which the scan signal S[n] is transferred to the gate-on voltage level in order to activate the pixel driver 102 - 2 in the image driving frame. Then, the bypass current Ibcb may bypass and flow toward the bypass transistor M30 according to the voltage level of the variable voltage Vvar. In this case, the amount of the bypass current Ibcb may increase, and the amount of the actual light emitting current Ioled of the organic light emitting diode OLED that emits light with a luminance image corresponding to the image data signal may be remarkably reduced. Since this has a great adverse effect on image quality, in the embodiment having the pixel structure of FIG. 4 , the variable voltage Vvar is the second voltage of the cathode of the organic light emitting diode OLED to prevent the bypass current Ibcb from flowing. It may be set higher than the power supply voltage ELVSS.

Meanwhile, in the embodiment of FIG. 4 , the scan signal S[n] is transferred to a high level voltage that is the gate-off voltage level of the transistor so that the bypass transistor M30 is turned off while the bypass transistor M30 is turned off. The bypass current Ibcb may be bypassed and flowed according to a set voltage value of the variable voltage Vvar connected to the drain electrode. That is, in order to prevent light leakage due to transmission of a minute leakage current even during a period in which the light emitting current Ioed is not transmitted to the organic light emitting diode OLED because the driving transistor M10 does not operate, and to prevent deterioration of the organic light emitting diode The bypass current Ibcb, which is a minute current, may be bypassed through the bypass transistor M30 in the turned-off state. In this case, the set voltage of the variable voltage Vvar may be a predetermined low voltage and is not particularly limited, but may be, for example, equal to or lower than the second power voltage ELVSS.

FIG. 5 is a circuit diagram illustrating a circuit structure of the pixel PXn 100 shown in FIG. 2 according to an exemplary embodiment different from those of FIGS. 3 and 4 .

Since the pixel driver 102-3 included in the pixel 100-3 according to the embodiment of FIG. 5 is the same as that of FIGS. 3 and 4 , a description of the structure and operation thereof is omitted, and the bypass unit 103-3 is The structure will be mainly described.

The bypass unit 103-3 of FIG. 5 includes a bypass transistor M300, which includes a source electrode connected to the second node ND200, a drain electrode connected to a variable voltage supply source, and a gate electrode coupled to a DC voltage source.

The DC voltage source supplies a DC voltage of a predetermined level to the gate electrode of the bypass transistor M300 so that the bypass transistor M300 is always turned off. Since the bypass transistor M300 of FIG. 5 is a PMOS transistor, in this case, the DC voltage may be a predetermined high-level voltage capable of always turning off the bypass transistor M300. For example, the voltage applied to the gate electrode of the bypass transistor M300 may be a DC voltage having the same level as or higher than the first power voltage ELVDD.

6 is a block diagram of an organic light emitting diode display according to another exemplary embodiment.

Since the organic light emitting diode display according to the exemplary embodiment of FIG. 6 is not different from that of FIG. 2 , the added components will be mainly described.

Unlike the organic light emitting diode display of FIG. 2 , the organic light emitting display of FIG. 6 includes a display unit 10 including a plurality of pixels PX1 to PXn , a scan driver 20 , a data driver 30 , and a power supply unit 40 . , and a gate driver 60 in addition to the controller 50 .

In this case, in the display unit 10 including the plurality of pixels PX1 to PXn arranged in a substantially matrix form, a plurality of pixels connected to the gate driver 60 to face the pixels in a row direction and extend substantially parallel to each other. The gate lines G1 to Gn are connected.

The gate driver 60 generates and transmits a gate signal corresponding to each pixel through the plurality of gate lines G1 to Gn. The gate driver 60 transmits a gate signal to each of a plurality of pixels included in each pixel line through a corresponding gate line. At this time, since the plurality of gate signals transmitted to each pixel through the plurality of gate lines G1 to Gn are applied to maintain the bypass transistor included in each pixel in the turned off state, the gate turns off the transistor during one frame. It can be delivered at the same time as the off voltage level.

Then, the operation state of the bypass transistor of each pixel is reliably maintained in the off state due to the control of the plurality of gate signals, and the bypass current can be bypassed through the bypass transistor. In this case, the variable voltage Vvar source connected to the drain electrode of the bypass transistors may set the variable voltage Vvar to a low voltage so that the bypass current is bypassed.

In the embodiment of FIG. 6 , the variable voltage (Vvar) supply source will be the power supply unit 40. The power supply unit 40 supplies the first power supply voltage ELVDD, the second power supply voltage ELVSS, and the variable voltage Vvar. It is supplied to each pixel of the display unit 10 . In particular, the power supply unit 40 may set the voltage value of the variable voltage Vvar to be a low voltage according to the control of the power control signal PCS transmitted from the control unit 50 . For example, the voltage value of the variable voltage Vvar may be equal to or lower than the second power voltage ELVSS.

In addition, the gate driver 60 receives the gate driving control signal GCS from the controller 50 , generates the plurality of gate signals, and supplies the gate signals to the plurality of gate lines G1 to Gn connected to each pixel line. do. Therefore, the bypass transistor of each of the plurality of pixels included in each pixel line is controlled to maintain a turned-off state.

7 is a circuit diagram of the pixel 200 illustrated in FIG. 6 according to the first embodiment.

The pixel 200 illustrated in FIG. 7 also has a structure including three transistors and one capacitor, like the pixels according to the embodiments of FIGS. 3 to 5 .

Since the pixel driver 202 including the driving transistor A1 , the switching transistor A2 , and the storage capacitor Cst is the same as that of FIGS. 3 to 5 , the structure and operation description thereof will be omitted, and the bypass unit 203 will be omitted. The structure of the will be mainly described.

The bypass unit 203 of the pixel 200 of FIG. 7 includes a bypass transistor A3. The bypass transistor A3 has a gate electrode connected to the n-th gate line Gn, a source electrode connected to a node Q2 connected to a drain electrode of the driving transistor A1 and an anode electrode of the organic light emitting diode OLED, and and a drain electrode connected to a power supply line of a variable voltage Vvar.

As described in FIG. 4 , the gate signal G[n] applied to the gate electrode of the bypass transistor A3 through the n-th gate line Gn is high, which is the off voltage level of the transistor during one frame period. It may be transmitted as a level voltage. Therefore, the bypass transistor A3 may be turned off during one frame period. Then, the variable voltage Vvar applied to the drain electrode of the bypass transistor A3 may be set to a voltage lower than the second power voltage ELVSS to which the cathode electrode of the organic light emitting diode OLED is connected, thus bypassing the bypass transistor A3. The bypass current Ibcb from the node Q2 may bypass the variable voltage supply source through the transistor A3.

8 is a block diagram of an organic light emitting diode display according to another exemplary embodiment.

Since the organic light emitting diode display of FIG. 8 is not significantly different from the organic light emitting diode display according to the exemplary embodiment of FIG. 2 , the added components will be mainly described.

In particular, unlike the organic light emitting diode display of FIG. 2 , the organic light emitting diode display according to the embodiment of FIG. 8 includes a display unit 10 including a plurality of pixels PX1 to PXn, a scan driver 20 , a data driver 30 , In addition to the power supply unit 40 and the control unit 50 , it further includes a light emission control driving unit 70 .

The emission control driver 70 is connected to the plurality of emission control lines EM1 to EMn connected to the display unit 10 including the plurality of pixels PX1 to PXn arranged in a matrix. That is, a plurality of light emission control lines EM1 to EMn extending substantially parallel to each other while facing each of the plurality of pixels in a substantially row direction connect each of the plurality of pixels and the light emission control driver 70 .

The light emission control driver 70 generates and transmits a light emission control signal corresponding to each pixel through the plurality of light emission control lines EM1 to EMn. Each pixel receiving the emission control signal is controlled to emit an image according to the image data signal in response to the control of the emission control signal. That is, the operation of the emission control transistor included in each pixel is controlled in response to the emission control signal transmitted through the corresponding emission control line, and accordingly, the organic light emitting diode connected to the emission control transistor receives a driving current corresponding to the data signal. It may or may not emit light with a corresponding luminance.

The control unit 50 of FIG. 8 transmits the emission driving control signal ECS for controlling the operation of the emission control driving unit to the emission control driving unit 70 . The emission control driver 70 receives the emission driving control signal ECS from the controller 50 and generates the plurality of emission control signals.

Meanwhile, referring to FIG. 8 , each of the plurality of pixels PX1 to PXn of the display unit 10 is connected to two corresponding scan lines. That is, the scan line corresponding to the pixel row including the corresponding pixel is connected before the scan corresponding to the previous pixel row of the pixel row. Each of the plurality of pixels included in the first pixel row may be connected to the first scan line S1 and the dummy scan line S0. In addition, each of the plurality of pixels included in the n-th pixel row includes an n-th scan line Sn corresponding to the n-th pixel row, which is the corresponding pixel row, and an n-1st scan line Sn corresponding to the n-1st pixel row, which is the previous pixel row. -1) is connected.

The organic light emitting diode display according to the embodiment of FIG. 8 receives a scan signal corresponding to a corresponding pixel row and a scan signal corresponding to a previous pixel row through two scan lines connected to each pixel, and emits organic light from each pixel. Adjust to bypass some of the light emitting current delivered to the diode.

9 to 12 are examples of circuit diagrams of the plurality of pixels PX1 to PXn included in the organic light emitting diode display of FIG. 8 , and illustrate pixel structures included in the organic light emitting display of FIG. 8 . Also, FIG. 13 is a signal timing diagram for driving the pixel of FIGS. 9 to 12 , and by looking at the same, the operation process of the pixel circuit diagram according to the embodiment of FIGS. 9 to 12 can be described.

9 to 12 illustrate the pixel PXn 300 provided in an area defined by the n-th pixel row and the m-th pixel column among the plurality of pixels PX1 to PXn of the display unit 10 shown in FIG. 8 . Circuit structures according to different embodiments are shown. In addition, each of the pixels of FIGS. 9 to 12 includes a pixel driver including six transistors and two transistors, and a bypass unit including one transistor. In these embodiments, each transistor is assumed to be a PMOS transistor for convenience of description.

First, the pixel 300-1 illustrated in FIG. 9 includes a pixel driving unit 302-1, an organic light emitting diode (OLED), and a bypass unit 303-1 connected therebetween.

The pixel driver 302-1 includes a driving transistor T1, a switching transistor T2, a threshold voltage compensation transistor T3, light emission control transistors T4 and T5, an initialization transistor T6, and a storage capacitor Cst. and a first capacitor C1. In addition, the bypass unit 303 - 1 is constituted by a bypass transistor T7 .

The driving transistor T1 has a gate electrode connected to the first node ND1 , a source electrode connected to a third node ND3 connected to the drain electrode of the first emission control transistor T4 , and a second node ND2 . a drain electrode connected thereto. The driving transistor T1 is configured according to the corresponding data signal D[m] applied to the third node ND3 to which the source electrode of the driving transistor is connected through the m-th data line Dm and the switching transistor T2. A driving current Idr of the data voltage is generated and transferred to the organic light emitting diode OLED through the drain electrode. The driving current Idr is a current corresponding to a voltage difference between the source electrode and the gate electrode of the driving transistor T1 , and the driving current Idr varies in response to a data voltage according to a data signal applied to the source electrode. .

The switching transistor T2 has a gate electrode connected to the n-th scan line Sn, a source electrode connected to the m-th data line Dm, and a source electrode of the driving transistor T1 and a drain electrode of the first emission control transistor T4. and a drain electrode connected to the commonly connected third node ND3. The switching transistor T2 activates driving of the pixel in response to the corresponding scan signal S[n] transmitted through the n-th scan line Sn. That is, the switching transistor T2 applies a data voltage according to the data signal D[m] transmitted through the m-th data line Dm to the third node ND3 in response to the scan signal S[n]. transmit

The threshold voltage transistor T3 includes a gate electrode connected to the n-th scan line Sn, and both ends of the gate electrode connected to the gate electrode and the drain electrode of the driving transistor T1 , respectively. The threshold voltage transistor T3 operates in response to the corresponding scan signal S[n] transmitted through the n-th scan line Sn. By connecting the gate electrode and the drain electrode of the driving transistor T1, the driving transistor ( T1) is diode-connected to compensate the threshold voltage of the driving transistor.

That is, when the driving transistor T1 is diode-connected, the voltage Vdata-Vth that is lowered by the threshold voltage of the driving transistor T1 from the data voltage applied to the source electrode of the driving transistor T1 is the voltage of the driving transistor T1. applied to the gate electrode. Since the gate electrode of the driving transistor T1 is connected to one electrode of the storage capacitor Cst, the voltage Vdata-Vth is maintained by the storage capacitor Cst. Since the voltage Vdata-Vth reflecting the threshold voltage Vth of the driving transistor T1 is applied to the gate electrode and maintained, the driving current Idr flowing through the driving transistor T1 is equal to the threshold voltage of the driving transistor T1. not affected by

The first emission control transistor T4 includes a gate electrode connected to the n-th emission control line EMn, a source electrode connected to a supply line of the first power voltage ELVDD, and a drain electrode connected to the third node ND3 . .

The second emission control transistor T5 has a gate electrode connected to the n-th emission control line EMn, a source electrode connected to the second node ND2, and a fourth node ND4 connected to the anode electrode of the organic light emitting diode OLED. ) and a drain electrode connected to

The first emission control transistor T4 and the second emission control transistor T5 operate in response to the n-th emission control signal EM[n] transmitted through the n-th emission control line EMn. That is, when the first light emission control transistor T4 and the second light emission control transistor T5 are turned on in response to the n-th light emission control signal EM[n], the organic light emitting diode from the first power voltage ELVDD A current path is formed so that the driving current Idr can flow in the direction of the OLED, so that the organic light emitting diode emits light according to the emission current Ioled corresponding to the driving current Idr to display the image of the data signal make it possible

The initialization transistor T6 includes a gate electrode connected to the n-1 th scan line Sn-1, a source electrode connected to the variable voltage Vvar supply line, and a gate electrode of the driving transistor T1 and a threshold voltage compensating transistor T3. A drain electrode connected to the first node ND1 to which one electrode is commonly connected is included. The initialization transistor T6 has a variable voltage Vvar applied through the variable voltage Vvar supply line in response to the n−1th scan signal S[n−1] transmitted through the n−1th scan line Sn−1. Vvar) to the first node ND1. The initialization transistor T6 has an n-1 th scan signal S[n-1] transmitted in advance to an n-1 th scan line corresponding to the previous pixel row of the n-th pixel row including the corresponding pixel 300-1. In response to , the variable voltage Vvar may be transferred to the first node ND1 as an initialization voltage before the pixel driver 302-1 is activated. At this time, although the voltage value of the variable voltage Vvar is not limited, it may be set to have a low level voltage value to sufficiently lower the gate electrode voltage of the driving transistor T1 for initialization. That is, during a period in which the n-1 th scan signal S[n-1] is transferred to the gate electrode of the initialization transistor T6 at the gate-on voltage level, the gate electrode of the driving transistor T1 is initialized to the initialization voltage.

The storage capacitor Cst includes one electrode connected to the first node ND1 and the other electrode connected to the supply line of the first power voltage ELVDD. Since the storage capacitor Cst is connected between the gate electrode of the driving transistor T1 and the supply line of the first power voltage ELVDD as described above, the voltage applied to the gate electrode of the driving transistor T1 may be maintained. .

The first capacitor C1 includes one electrode connected to the first node ND1 and the other electrode connected to the gate electrode of the switching transistor T2 . The first capacitor C1 stores and maintains a voltage corresponding to a difference between the variable voltage Vvar applied as an initialization voltage to one electrode and the gate electrode voltage of the switching transistor T2 to which the other electrode is connected.

In addition, the bypass transistor T7 has a gate electrode and a source electrode connected together to the fourth node ND4 connected to the drain electrode of the second emission control transistor T5 and the anode electrode of the organic light emitting diode OLED, and a variable voltage. A drain electrode connected to the power supply line of (Vvar) is included. Referring to FIG. 8 , since the gate electrode and the source electrode of the bypass transistor T7 are commonly connected to the fourth node ND4 , the gate-source voltage difference is 0V, and the bypass transistor T7 is It is always off. And since the variable voltage Vvar supply line is connected to the drain electrode of the bypass transistor T7, the bypass transistor T7 is turned off through the bypass transistor T7 by the set voltage value of the variable voltage Vvar. A bypass current Ibcb flows. In this case, the set voltage value of the variable voltage Vvar is not particularly limited, and for example, may be equal to or smaller than the second power voltage ELVSS, which is the cathode electrode voltage value of the organic light emitting diode (OLED). If the organic light emitting diode (OLED) emits light even when the minimum current of the transistor displaying the black image flows as the driving current, the black image is not properly displayed, so the minimum current of the transistor is also the bypass current Ibcb. It can be distributed in a current path other than the current path on the diode side. Here, the minimum current of the transistor means a current under a condition that the transistor is turned off because the gate-source voltage (Vgs) of the transistor is less than the threshold voltage (Vth). In this way, the minimum driving current (for example, a current of 10 pA or less) under the condition of turning off the transistor is transmitted to the organic light emitting diode and expressed as an image of black luminance.

When the minimum driving current displaying a black image flows, the bypass transfer of the bypass current Ibcb has a large effect, whereas when a large driving current displaying an image such as a normal image or a white image flows, the bypass current Ibcb ) has little effect. Therefore, when the driving current displaying the black image flows, the emission current Ioled of the organic light emitting diode reduced by the amount of the bypass current Ibcb escaping from the driving current Idr through the path of the bypass unit is the black image. It has the minimum amount of current at a level that can reliably express

If the driving operation according to the timing diagram of FIG. 13 is described based on the circuit diagram of the pixel 300 - 1 of FIG. 9 , the driving process in which the pixel emits light in time series to display an image will be understood.

At a time point t1, the scan signal S[n-1] transmitted through the n−1th scan line changes to a low level, and maintains the low level during the period from time point t1 to time point t2. At this time, the scan signal S[n] transmitted through the n-th scan line is maintained at a high level. Also, at this time, the emission control signal EM[n] transmitted through the n-th emission control line is maintained at a high level voltage.

Accordingly, the initialization transistor T6 receiving the scan signal S[n-1] in the pixel 300-1 of FIG. 9 is turned on. In addition, the switching transistor T2 and the threshold voltage compensation transistor T3 to which the scan signal S[n] is transmitted are turned off, and the first emission control transistor T4 to which the emission control signal EM[n] is transmitted. ) and the second light emission control transistor T5 are also turned off. The bypass transistor T7 always maintains an off state because the gate and the source are connected to the same contact point and there is no voltage difference between the gate and the source.

Then, the variable voltage Vvar is applied as an initialization voltage through the initialization transistor T6 to the first node ND1 to which the gate electrode of the driving transistor T1 is connected during the period from time t1 to time t2. In this case, the variable voltage Vvar may be set to a voltage sufficient to initialize the gate electrode voltage of the driving transistor T1 .

During the period from time t1 to time t2, one electrode of the storage capacitor Cst is connected to the first node ND1, so that a variable voltage Vvar as an initialization voltage is applied to the one electrode, and Since the first power supply voltage ELVDD of a high level is applied to the other electrode, a voltage value corresponding to ELVDD-Vvar is stored during the period from time t1 to time t2.

After that, at time t2, the scan signal S[n-1] transitions to a high level, and at time t3, the scan signal S[n] transmitted through the n-th scan line changes to a low level, from time t3 to time point t3. A low level is maintained during period t4. Even at this time, the light emission control signal EM[n] is still maintained at a high level voltage.

During the period from time t3 to time t4, the initialization transistor T6 is turned off, and the switching transistor T2 receiving the scan signal S[n] and the threshold voltage compensating transistor T3 are turned on. Then, the data voltage Vdata according to the data signal D[m] is transmitted to the source electrode of the driving transistor T1 through the switching transistor T2, and the driving transistor T1 is applied to the threshold voltage compensating transistor T3. connected by a diode. The voltage maintained at the first node ND1 connected to one electrode of the storage capacitor Cst is a voltage Vgs corresponding to a voltage difference between the gate-source electrode of the driving transistor T1 and is driven from the data voltage Vdata. It is a voltage value (Vdata-Vth) that is lowered by the threshold voltage (Vth) of the transistor T1. The storage capacitor Cst stores and maintains a voltage corresponding to a difference in voltage applied to both electrodes.

And when the scan signal S[n] transitions to a high level at time t4, the switching transistor T2 and the threshold voltage compensating transistor T3 are turned off, and the voltage of the first node ND1 floats again. do.

At time t5, the emission control signal EM[n] transmitted through the n-th emission control line changes to a low level.

Then, the first emission control transistor T4 and the second emission control transistor T5 of the pixel 300-1 to which the emission control signal EM[n] is transmitted are turned on, and the scan from time t3 to time t4 is performed. and the driving current Idr of the data voltage according to the data signal stored in the storage capacitor Cst during the data writing period is transmitted to the organic light emitting diode OLED to emit light.

Specifically, the corresponding voltage for calculating the driving current Idr becomes ELVDD-Vdata from which the influence of the threshold voltage Vth of the driving transistor T1 is excluded.

If the driving current Idr is transmitted as a minimum current for displaying a black luminance image, a small amount of bypass current Ibcb is passed through the bypass transistor T7, which is always in an off state, in order to accurately display a black luminance image. ) can flow in a detour. Accordingly, the remaining current Idr-Ibcb obtained by subtracting the bypass current Ibcb from the driving current Idr may be emitted as the light emitting current Ioled from the organic light emitting diode OLED as black luminance. The process of bypassing the path of some current through the bypass transistor T7 is the same for not only the black luminance image but also the image signal displayed with various luminance, but the driving current Idr for displaying images of various luminance including white luminance. ), since the amount of current is large, the effect of the bypass current Ibcb is not as large as in the black luminance image.

Meanwhile, the structure of the pixel 300 - 2 that may be included in the organic light emitting diode display of FIG. 8 shown in FIG. 10 is also not significantly different from the embodiment of FIG. 9 .

The pixel 300 - 2 of FIG. 10 includes a pixel driver 302 - 2 and an organic light emitting diode (OLED) having the same circuit elements and circuit structure as those of the pixel driver of FIG. 9 , and a bypass unit 303 - 2 . ), only the connection of the bypass transistor T17 is different from the bypass unit of FIG. 9 .

That is, the gate electrode of the bypass transistor T17 is connected to the n-1 th scan line Sn-1 together with the gate electrode of the initialization transistor T16.

The source electrode of the bypass transistor T17 is connected to the fourth node ND14 where the drain electrode of the second emission control transistor T15 and the anode electrode of the organic light emitting diode OLED are commonly connected. And the drain electrode of the bypass transistor T17 is connected to the power supply line of the variable voltage Vvar.

Referring to FIG. 13 for an operation process of the pixel having the structure as shown in FIG. 10, the n-1 th scan signal (Sn-1) transmitted through the n-1 th scan line Sn-1 during the initialization period from time t1 to time t2 S[n-1]), the bypass transistor T17 is turned on together with the initialization transistor T16 due to the low level voltage. Therefore, the variable voltage Vvar adjusted to a level capable of initializing the gate electrode voltage of the driving transistor T11 is transferred to the first node ND11 through the initialization transistor T16.

Meanwhile, since the n-1 th scan signal S[n-1] is changed to a high level voltage and maintained during the remaining period except for the period from time t1 to time t2, the bypass transistor T17 is turned off. And while the corresponding pixel 300-2 is activated and receives a voltage according to the data signal to emit light, the bypass current Ibcb having a minute amount of current is bypassed and flows through the turned-off bypass transistor T17, When a pixel displays a black image, it is possible to implement a clear black luminance.

The pixel 300-3 according to the embodiment of FIG. 11 has the same structure as the pixel 300-2 of FIG. 10 except that the gate electrode of the bypass transistor T27 is connected to the n-th scan line Sn. there is

Accordingly, when the driving process of the pixel 300 - 3 of FIG. 11 is described with reference to FIG. 13 , there is no significant difference from the driving process of the pixel of FIG. 10 , but the scan signal S[n] transmitted through the nth scan line Sn ), the bypass transistor T27 is opened and closed. Therefore, after the initialization process of the driving transistor T21 is finished, when the scan signal S[n] is transmitted as a low-level voltage during the period from time t3 to time t4, the bypass transistor T27 is activated together with the switching transistor T22. turn on

According to the embodiment of FIG. 11 , a data voltage according to the data signal is transferred to the source electrode of the driving transistor T21 through the switching transistor T22 during this period, and the driving transistor T21 generates a corresponding driving current Idr. is generated and transferred to the organic light emitting diode. At this time, when the bypass current Ibcb flows to the bypass path through the turned-on bypass transistor T27, the loss of the light emitting current Ioled increases and the image quality is greatly deteriorated. Therefore, during the period from time t3 to time t4, the variable voltage Vvar connected to the drain electrode of the bypass transistor T27 must be set to be higher than a predetermined voltage level to prevent the bypass current Ibcb from flowing. For example, at least the cathode electrode of the organic light emitting diode (OLED) should be set higher than the connected second power voltage ELVSS to prevent the bypass current Ibcb from moving toward the variable voltage Vvar source.

In addition, in a period other than the period from time t3 to time t4, the scan signal S[n] transmitted to the gate electrode of the bypass transistor T27 is transmitted as a high-level voltage, so that the bypass transistor T27 is turned off. . In a period after time t5 of the period in which the bypass transistor T27 is turned off, the emission control signal EM[n] is transferred to a low level, and a driving current ( Idr) pathways are formed. Then, in response to the voltage difference Vds between the variable voltage Vvar connected to the drain electrode of the bypass transistor T27 and the source electrode voltage, some bypass current Ibcb in the driving current Idr is converted into a variable voltage Vvar source. You can turn to the right to flow.

When the driving current Idr corresponds to a current value for displaying a black luminance image, a minute amount of the bypass current Ibcb among them bypasses and escapes, so the luminance of light directly emitted from the organic light emitting diode (OLED). corresponds to the light emission current Ioled having a current value of Idr-Ibcb. Therefore, it is possible to clearly implement a black luminance image according to the light emitting current Ioled even though the organic light emitting diode has a high efficiency organic light emitting material.

Meanwhile, the pixel 300 - 4 according to the embodiment of FIG. 12 has the same structure as the pixel 300 - 3 of FIG. 11 , except that the gate electrode of the bypass transistor T37 is connected to the DC voltage source. have.

That is, the bypass unit 303 - 4 of FIG. 12 includes a bypass transistor T37 , which has a source electrode connected to the fourth node ND34 and a drain electrode connected to a variable voltage supply source. and a gate electrode coupled to a DC voltage source. Accordingly, a predetermined DC voltage is always received from the DC voltage source regardless of the operation of the constituent elements of the pixel according to the driving timing diagram of FIG. 13 . In this case, the DC voltage is a predetermined level voltage capable of always turning off the bypass transistor T37. In the embodiment of FIG. 12 , the DC voltage may be a predetermined high level voltage because the pixel is formed of a PMOS transistor.

Therefore, the bypass transistor T37 is always turned off by receiving the DC voltage of the transistor off level to the gate electrode, and in the off state, the bypass current Ibcb escapes from the driving current Idr to the bypass path. .

The organic light emitting diode display including the pixels 300-1, 300-2, 300-3, and 300-4 according to the embodiment shown in FIGS. 9 to 12 is a bypass unit that controls to implement an accurate black luminance image. As a result, it has excellent picture quality characteristics with improved contrast ratio.

The present invention has been described above in relation to specific embodiments of the present invention, but this is merely an example and the present invention is not limited thereto. Those skilled in the art can make changes or modifications to the described embodiments without departing from the scope of the present invention, and such changes or modifications also fall within the scope of the present invention. In addition, the material of each component described in the specification can be easily selected and replaced by a person skilled in the art from various known materials. In addition, those skilled in the art may omit some of the components described herein without degrading performance or add components to improve performance. In addition, those skilled in the art may change the order of the method steps described herein according to the process environment or equipment. Accordingly, the scope of the present invention should be determined by the claims and their equivalents rather than the described embodiments.

10: display unit 20: scan driving unit
30: data driver 40: power supply
50: control unit 60: gate driving unit
70: light emission control driving unit
100,200,300: pixel

Claims (12)

organic light emitting diodes (OLEDs),
a first transistor including a gate connected to a first node and connected between a first voltage line and an anode of the organic light emitting diode;
a second transistor including a gate connected to a scan line and connected between a data line and the first node; and
A third transistor including a gate connected to the gate line and connected between the anode and the second voltage line
including,
In a black luminance condition in which light of minimum luminance is emitted from the organic light emitting diode, current is transmitted through the first transistor and controlled to flow to the third transistor during a light emitting period in which the organic light emitting diode emits light,
pixel. According to claim 1,
The cathode of the organic light emitting diode is connected to a third voltage line,
The voltage applied to the second voltage line is less than or equal to the voltage applied to the third voltage line,
pixel. According to claim 1,
A first period during which the gate signal for turning off the third transistor is applied to the gate line while the organic light emitting diode emits light is at a voltage level at which the data voltage transmitted from the data line is transmitted, and the scan signal from the scan line excluding the period in which it is delivered;
pixel. 4. The method of claim 3,
during the first period, a current is passed through the first transistor to flow into the organic light emitting diode and the third transistor;
pixel. 5. The method of claim 4,
During the first period, the voltage applied to the second voltage line is controlled so that a portion of the current flows to the third transistor,
pixel. The method of claim 1 , wherein a variable voltage is applied to the second voltage line.
pixel. a scan driver that transmits a plurality of scan signals to a plurality of scan lines;
a gate driver transmitting a plurality of gate signals to a plurality of gate lines;
a data driver that transmits a plurality of data signals to a plurality of data lines;
a display unit including a plurality of pixels connected to a corresponding scan line, a corresponding gate line, and a corresponding data line, the display unit displaying an image by emitting light according to the plurality of data signals;
a power supply for respectively supplying a first voltage, a second voltage, and a third voltage to the pixels; and
A control unit for controlling the scan driver, the gate driver, the data driver, and the power supply unit
including,
Each of the plurality of pixels,
organic light emitting diodes (OLEDs),
a first transistor including a gate connected to a first node and connected between a first voltage line and an anode of the organic light emitting diode;
a second transistor including a gate connected to a scan line and connected between a data line and the first node; and
A third transistor including a gate connected to the gate line, and a third transistor connected between the anode and a second voltage line,
In a black luminance condition in which light of minimum luminance is emitted from the organic light emitting diode, current is transmitted through the first transistor and controlled to flow to the third transistor during a light emitting period in which the organic light emitting diode emits light,
organic light emitting display device. 8. The method of claim 7,
The cathode of the organic light emitting diode is connected to a third voltage line,
The voltage applied to the second voltage line is less than or equal to the voltage applied to the third voltage line,
organic light emitting display device. 8. The method of claim 7,
A first period during which the gate signal for turning off the third transistor is applied to the gate line while the organic light emitting diode emits light is at a voltage level at which the data voltage transmitted from the data line is transmitted, and the scan signal from the scan line excluding the period in which it is delivered;
organic light emitting display device. 10. The method of claim 9,
during the first period, a current is passed through the first transistor to flow into the organic light emitting diode and the third transistor;
organic light emitting display device. 11. The method of claim 10,
During the first period, the voltage applied to the second voltage line is controlled so that a portion of the current flows to the third transistor,
organic light emitting display device. 8. The method of claim 7,
A variable voltage is applied to the second voltage line,
organic light emitting display device.

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