KR102302886B1 - Horizontal electric field type liquid crystal display device - Google Patents

Abstract

The present invention relates to a horizontal electric field type liquid crystal display device capable of reducing light leakage while using a single color filter layer, which is disposed in a common line, gate lines, data lines, thin film transistors, pixel regions, and each pixel region. It includes a pixel electrode, a common electrode disposed to form a horizontal electric field with the pixel electrode in each pixel region, and a shielding electrode. The common line is disposed parallel to the gate lines on the substrate. The data lines are arranged to intersect the common line and the gate lines. The thin film transistor is disposed adjacent to each of the intersection regions of the gate lines and the data lines. The pixel area is formed by intersections of gate lines and data lines. The shielding electrode covers a space formed by the common line and the gate line adjacent to the common line, and is disposed so as not to overlap the source electrode of the thin film transistor.

Description

Horizontal electric field type liquid crystal display device {HORIZONTAL ELECTRIC FIELD TYPE LIQUID CRYSTAL DISPLAY DEVICE}

The present invention relates to a horizontal electric field type liquid crystal display, and more particularly, to a horizontal electric field type liquid crystal display capable of preventing light leakage in a structure in which a black matrix is omitted.

The liquid crystal display displays an image by adjusting the light transmittance of the liquid crystal using an electric field. The liquid crystal display is roughly classified into a vertical electric field type and a horizontal electric field type according to the direction of the electric field driving the liquid crystal.

In a vertical electric field type liquid crystal display device, a common electrode formed on an upper substrate and a pixel electrode formed on a lower substrate are disposed to face each other, and a TN (Twisted Nemastic) mode liquid crystal is driven by a vertical electric field formed therebetween. Such a vertical electric field type liquid crystal display has an advantage of a large aperture ratio, but has a disadvantage of a narrow viewing angle of about 90 degrees.

In the horizontal electric field type liquid crystal display device, the liquid crystal is driven by a horizontal electric field between a pixel electrode and a common electrode arranged in parallel on a lower substrate. Such a horizontal electric field type liquid crystal display has an advantage that a viewing angle is wider than 170 degrees and a fast response speed because it is switched in a horizontal state.

In general, a horizontal electric field type liquid crystal display device includes a lower substrate on which gate lines, data lines, thin film transistors, pixel electrodes, and a common electrode are formed, an upper substrate on which color filters and a black matrix are formed, and between the upper substrate and the lower substrate. It consists of a liquid crystal layer disposed on the

However, recently, a color filter is formed on the lower substrate to prevent a decrease in the aperture ratio as the area of the black matrix is widened by the bonding margin between the upper substrate and the lower substrate, and a color filter on thin (COT) that omits the black matrix. film transistor) structure has been proposed.

A conventional COT structure horizontal electric field type liquid crystal display will be described with reference to FIGS. 1 and 2 . FIG. 1 is a plan view showing one pixel area of a conventional COT structure horizontal electric field type liquid crystal display device, and FIG. 2 is a cross-sectional view taken along line I-I' of the conventional COT structure horizontal electric field type liquid crystal display device shown in FIG. .

1 and 2 , the conventional COT structure liquid crystal display device in which the black matrix is omitted is disposed adjacent to the intersection of the plurality of gate lines GL and the data lines DL on the first substrate SUB1 . a plurality of pixel electrodes P connected to the drain electrode D of each of the thin film transistors used in the thin film transistors, and the pixel electrodes P and the pixel electrodes P are alternately disposed and spaced apart from each other by a predetermined distance and are connected to the common line C A capacitor formed by overlapping the common electrodes COM connected to each other and the common wiring CL and the drain electrode D disposed parallel to the gate line GL is provided.

The thin film transistor includes a gate electrode G connected to the gate line GL, a source electrode S connected to the data line DL, a drain electrode D connected to the pixel electrode P through a contact hole, and a gate electrode A semiconductor active layer (A) for forming a conduction channel between the source electrode (S) and the drain electrode (D) by the gate voltage supplied to (G) is provided. The semiconductor active layer (A) may be formed by sequentially stacking an active layer and an ohmic contact layer. In addition, the thin film transistor further includes a gate insulating layer GI for insulating the gate electrode G and the source and drain electrodes S and D. The thin film transistor supplies the data signal from the data line DL to the pixel electrode P in response to the gate signal from the gate line GL.

The pixel electrode P is formed on the color filter layers CF1 and CF2 and the planarization film PLN stacked in at least two layers on the interlayer insulating film ILD formed on the entire surface of the first substrate SUB1. It is electrically connected to the drain electrode D through a contact hole penetrating the insulating layer ILD, the color filter layers CF1 and CF2, and the planarization layer PLN.

Meanwhile, in the cell region formed by the intersection of the data lines DL and the gate lines GL, a plurality of common electrodes COM are alternately disposed in parallel with a plurality of pixel electrodes P and spaced apart from each other by a predetermined distance. this is placed The common electrodes COM are formed in the same process step as the pixel electrodes P, and a column spacer CS is formed on the common electrode COM at a position overlapping the thin film transistor. A liquid crystal layer LC is disposed in a space between the first substrate SUB1 and the second substrate SUB2 .

The capacitor is formed in a region where the common line CL and the drain electrode D overlap with the gate insulating layer GI as a medium.

In the conventional COT structure liquid crystal display device, since the black matrix is omitted, light leakage may occur in the region between the common line CL and the gate line GL as shown in FIG. 3 . 3 is a view simulating a light leakage phenomenon in a conventional COT structure liquid crystal display device. Accordingly, in order to prevent light leakage, it is necessary to form two or more color filter layers in the light leakage area LLA shown in FIG. 1 . In FIG. 1, reference numeral DCFL denotes a region in which a double color filter layer is formed. The reason that the light leakage area LLA is larger in the area DCFA where the double color filter layer is formed in FIG. 1 is that, in addition to the thickness stability area corresponding to the light leakage area LLA, a margin for the formation of the planarization layer PLN, etc. margin), the margin of the upper color filter layer flowing down, etc. should be taken into consideration. Currently, in a liquid crystal display of a COT structure in which a black matrix is omitted using a double color filter layer, the width of the thickness stabilization region (ie, light leakage region) of the dual color filter layer is about 31 μm, and the width of the planarization layer formation margin is about 14.14 μm. , the width of the flow-down margin of the upper color filter layer is approximately 16.86 μm, and the width of the region DCFL in which the entire double color filter layer is formed increases to approximately 60 μm.

As described above, in the liquid crystal display of the COT structure in which the conventional black matrix is omitted, the width of the double color filter layer forming area (DCFA) to prevent light leakage must be maintained at about 60 μm, so there is no limit to the expansion of the opening area of the pixel area. there was a problem with

An object of the present invention is to provide a horizontal electric field type liquid crystal display capable of reducing light leakage while using a single color filter layer in order to solve the above problems.

SUMMARY OF THE INVENTION The present invention is to solve the above technical problem, and the horizontal electric field type liquid crystal display device according to the present invention provides a common line, gate lines, data lines, thin film transistors, pixel regions, and a pixel electrode disposed in each pixel region. , a common electrode disposed to form a horizontal electric field with the pixel electrode in each pixel region, and a shielding electrode. The common line is disposed parallel to the gate lines on the substrate. The data lines are arranged to intersect the common line and the gate lines. The thin film transistor is disposed adjacent to each of the intersection regions of the gate lines and the data lines. The pixel area is formed by intersections of gate lines and data lines. The shielding electrode covers a space formed by the common line and the gate line adjacent to the common line, and is disposed so as not to overlap the source electrode of the thin film transistor.

In the above configuration, the pixel electrode includes a pixel electrode horizontal portion and a plurality of pixel electrode extension portions extending therefrom. The pixel electrode horizontal portion is disposed on one side of the pixel region, and the plurality of pixel electrode extension portions extend from the pixel electrode horizontal portion in parallel with the data line and are arranged in parallel with a predetermined interval. In addition, the pixel electrode horizontal portion is connected to the thin film transistor exposed through a first contact hole penetrating the interlayer insulating film, the color filter layer, and the planarization film sequentially stacked to cover the thin film transistor.

In addition, the common line includes a common line horizontal portion disposed parallel to the gate line on the substrate, and first and second common line extension portions respectively extending from opposite ends of the common electrode horizontal portion in parallel with the data line. The common electrode includes a common electrode horizontal portion disposed on the other side of the pixel region, a common electrode horizontal portion extending in parallel with the data line, arranged in parallel with each other at a predetermined interval, and alternately disposed with the plurality of pixel electrode extension portions and a plurality of common electrode extensions. In addition, the common electrode horizontal portion is exposed through a second contact hole penetrating the planarization layer, the color filter layer, the interlayer insulating layer, and a gate insulating layer covering the gate line and the common line. connected to at least one of the extensions.

Further, the shielding electrode is connected to the horizontal portion of the common line exposed through the third contact hole penetrating the planarization film, the color filter layer, the interlayer insulating film, and the gate insulating film.

According to the horizontal electric field type liquid crystal display device according to the present invention, since the shielding electrode can cover the gap between the common line and the gate line, even if the color filter layer is formed as a single layer, the shielding electrode can block light leakage. .

In addition, since the shielding electrode is disposed so as not to substantially overlap the thin film transistor, it is possible to obtain an effect of preventing current loss when a gate signal is supplied to the gate line.

In addition, since the shielding electrode is electrically connected to the horizontal portion of the common line, a common voltage supplied to the common electrode COM is supplied. Accordingly, even when the shielding electrode is formed of a transparent conductive material, an effect of blocking light leakage occurring in the space between the gate line and the common line by driving the liquid crystal can be obtained.

In addition, in the horizontal electric field type liquid crystal display according to the embodiment of the present invention, since the color filter layer is formed as a single layer, there is no need to consider the flow of the upper color filter layer, which should be considered in the structure for preventing light leakage with two or more curler filter layers. Accordingly, since the area corresponding to the reduced width compared to the related art can be used as the aperture area, an effect of improving the aperture ratio can be obtained.

1 is a plan view showing a one-pixel area of a conventional COT structure horizontal electric field type liquid crystal display device;
2 is a cross-sectional view taken along line I-I' of the conventional COT structure horizontal electric field type liquid crystal display shown in FIG. 1;
3 is a view simulating a light leakage phenomenon appearing in a conventional COT structure liquid crystal display device;
4 is a plan view illustrating a one-pixel area of a horizontal electric field type liquid crystal display according to an embodiment of the present invention;
FIG. 5 is a cross-sectional view taken along line II-II' of the horizontal electric field type liquid crystal display shown in FIG. 4;

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A horizontal electric field type liquid crystal display according to an embodiment of the present invention will be described with reference to FIGS. 4 and 5 . 4 is a plan view illustrating one pixel region of the horizontal electric field type liquid crystal display according to an embodiment of the present invention, and FIG. 5 is a cross-sectional view taken along line II-II' of the horizontal electric field type liquid crystal display shown in FIG. 4 .

4 and 5 , the horizontal electric field type liquid crystal display device according to the embodiment of the present invention is disposed opposite to the first substrate array SA with the first substrate array SA and the liquid crystal layer LC interposed therebetween. and a second substrate SUB2. A column spacer CS for maintaining a cell gap may be disposed between the first substrate array SA and the second substrate SUB2 at a position overlapping the thin film transistor to be described later.

The first substrate array SA includes a plurality of gate lines GL and data lines DL arranged to cross each other on the first substrate SUB1 and a common line arranged in parallel with the gate line GL. CL), the thin film transistors T disposed adjacent to intersections of the plurality of gate lines GL and the data lines DL, the color filter layer CF, and the drain electrode D of each thin film transistor formed by overlapping the pixel electrode P, the pixel electrode P and the common electrode COM connected to the common line C and the common wiring CL and the drain electrode D spaced apart from each other by a predetermined distance including capacitors.

The gate line GL and the common line CL are disposed on the first substrate SUB1 and are parallel to each other. The common line CL extends in a direction crossing the common line horizontal portion CLH from both ends of the common line horizontal portion HCL and the common electrode horizontal portion CLH disposed in parallel with the gate line GL. It includes first and second common line extensions CLE1 and CLE2. The gate line GL and the common line CL are formed of aluminum (Al), copper (Cu), molybdenum (Mo), chromium (Cr), titanium (Ti), gold (Au), silver (Ag), and tungsten (W). ) or may be selected from the group consisting of alloys thereof.

The thin film transistor T includes a gate electrode G connected to the gate line GL, a gate insulating layer GI covering the common line CL, the gate line GL, and the gate electrode, and a gate insulating layer GI on the gate insulating layer GI. The semiconductor active layer (A) disposed to overlap the gate electrode (G), the source electrode (S) disposed on the upper surface of one side of the semiconductor active layer (A) and the gate insulating film (GI) exposed therethrough, and the semiconductor active layer (A) .

In the embodiment of the present invention, the thin film transistor T is exemplified by a gate bottom type thin film transistor T in which the gate electrode G is disposed under the source electrode S and the drain electrode D, but the present invention The present invention is not limited thereto. For example, in the case of a top gate type thin film transistor in which a semiconductor active layer is formed on a substrate and a gate electrode and a source electrode and a drain electrode are disposed on top of the gate electrode so as to overlap the semiconductor active layer with a gate insulating film interposed therebetween The present invention can also be applied. Since the top gate type thin film transistor is a known technology, a detailed description thereof will be omitted.

The data line DL is disposed on the gate insulating layer GI to cross the gate line GL and the common line CL. The data line DL is connected to the source electrode S of the thin film transistor T. A pixel area is determined by the intersection of the data line DL and the gate line GL. The data line DL and the source electrode S and the drain electrode D of the thin film transistor T are formed of aluminum (Al), copper (Cu), molybdenum (Mo), chromium (Cr), titanium (Ti), and gold. It may be selected from the group consisting of (Au), silver (Ag), tungsten (W), or an alloy thereof.

An interlayer insulating film ( ILD) is located. The interlayer insulating layer ILD may be formed of an inorganic insulating layer such as silicon nitride (SiNx) or silicon oxide (SiOx).

A single color filter layer CF is disposed on the interlayer insulating layer ILD, and a planarization layer PLN is disposed on the color filter layer CF. The planarization layer PLN may be formed of an organic insulating layer such as polyacryl or polyimide.

A pixel electrode P, a common electrode COM, and a shielding electrode SC are disposed on the planarization layer PLN. The pixel electrode P, the common electrode COM, and the shielding electrode SC may be selected from transparent conductive materials such as indium tin oxide (ITO), indium zinc oxide (IZO), and gallium-dopded zinc oxide (GZO). .

The pixel electrode P includes a pixel electrode horizontal portion PH disposed on one side of the pixel region, and a plurality of pixel electrode extension portions PE extending from the pixel electrode horizontal portion PH. The pixel electrode horizontal portion PH is the drain electrode D of the thin film transistor T exposed through the first contact hole CH1 penetrating the planarization layer PLN, the color filter layer CF, and the interlayer insulating layer ILD. ) is connected to The plurality of pixel electrode extension portions PE extend in a direction parallel to the data line DL and are arranged in parallel with each other at a predetermined interval.

The common electrode COM includes a common electrode horizontal portion COMH disposed on the other side of the pixel area and a plurality of common electrode extension portions COMH extending from the common electrode horizontal portion COMH. The common electrode horizontal portion PH includes first and second contact holes exposed through the second contact hole CH2 penetrating the planarization layer PLN, the color filter layer CF, the interlayer insulating layer ILD, and the gate insulating layer GI. It may be connected to at least one of the two common line extensions CLE1 and CLE2 (connected to the first common line extension in the example of FIG. 3 ). The plurality of common electrode extension parts COME extend in a direction parallel to the data line DL and are arranged in parallel with each other at a predetermined interval. The plurality of common electrode extensions COME is also alternately disposed with the plurality of pixel electrode extensions PE.

The shielding electrode SC is disposed to cover a gap between the common line horizontal portion CLH and the gate line GL adjacent to each other and arranged in parallel. The shielding electrode SC includes the common line horizontal portion CLH exposed through the third contact hole CH3 penetrating the planarization layer PLN, the color filter layer CF, the interlayer insulating layer ILD, and the gate insulating layer GI. ) is connected to The shielding electrode SC is disposed not to substantially overlap the thin film transistor T so as not to electrically affect the thin film transistor T. As shown in the example shown in FIG. 4 , the shielding electrode SC does not overlap the source electrode S of the thin film transistor T at all, and the drain electrode D is connected to the gate line GL and the common line. Only a region crossing the space between the horizontal portions CLH overlaps, and only a portion in consideration of a process error overlaps the gate electrode G and the common line horizontal portion CLH.

As described above, since the shielding electrode SC of the horizontal electric field type liquid crystal display according to the embodiment of the present invention can cover the gap between the common line horizontal portion CLH and the gate line GL, the color filter layer CF Even if this single layer is formed, the effect of blocking light leakage by the shielding electrode SC can be obtained.

In addition, since the shielding electrode SC is disposed so as not to substantially overlap the thin film transistor T, it is possible to obtain an effect of preventing current loss when a gate signal is supplied to the gate line.

In addition, since the shielding electrode SC is electrically connected to the common line horizontal portion CLH, a common voltage supplied to the common electrode COM is supplied. Therefore, even when the shielding electrode is formed of a transparent conductive material such as ITO, IZO, or GZO, it is possible to effectively block light leakage occurring in the space between the gate line and the common line by driving the liquid crystal.

In addition, in the horizontal electric field type liquid crystal display according to the embodiment of the present invention, since the color filter layer is formed as a single layer, it is not necessary to consider the flow of the upper color filter layer, which should be considered in the structure for preventing light leakage with two or more curler filter layers. Therefore, in the conventional liquid crystal display device, the width of the double color filter layer formation region for preventing light leakage has to be maintained at about 60 μm. Even 43.14 μm is sufficient. Accordingly, since the area corresponding to the reduced width compared to the related art can be used as the aperture area, an effect of improving the aperture ratio can be obtained.

Those skilled in the art from the above description will be able to see that various changes and modifications can be made without departing from the technical spirit of the present invention. Accordingly, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

SUB1, SUB2: Substrate T: Thin Film Transistor
DL: data line GL: gate line
CL: common line CLH: common line horizontal part
CLE1, CLE2: Common line extension COM: Common electrode
COMH: Horizontal part of common electrode COME: Extended part of common electrode
P: pixel electrode PH: pixel electrode horizontal part
PE: pixel electrode extension

Claims (5)

a plurality of gate lines arranged parallel to the common line on the substrate;
a plurality of data lines arranged to cross the common line and the gate lines;
a plurality of thin film transistors disposed adjacent to each of intersection regions of the plurality of gate lines and the plurality of data lines;
a plurality of pixel regions formed by intersections of the plurality of gate lines and the plurality of data lines;
a pixel electrode disposed in each of the plurality of pixel regions;
a common electrode disposed to form a horizontal electric field with the pixel electrode in the pixel region; and
and a shielding electrode that covers a space formed by the common line and a gate line adjacent to the common line and is disposed not to overlap the source electrode of the thin film transistor,
The shielding electrode is disposed on the same layer as the pixel electrode and the common electrode, is connected to the common line, and is made of a transparent conductive material.
The method of claim 1,
The pixel electrode is
a pixel electrode horizontal portion disposed on one side of the pixel region; and
a plurality of pixel electrode extension portions extending from the horizontal portion of the pixel electrode in parallel with the data line and arranged in parallel with a predetermined interval;
and the horizontal portion of the pixel electrode is connected to the thin film transistor exposed through a first contact hole penetrating an interlayer insulating film, a color filter layer, and a planarization film sequentially stacked to cover the thin film transistor.
3. The method of claim 2,
The common line is
a common line horizontal portion disposed parallel to the gate line on the substrate; and
first and second common line extensions respectively extending in parallel with the data line from both ends of the common line horizontal portion;
The common electrode is
a common electrode horizontal portion disposed on the other side of the pixel region; and
a plurality of common electrode extension portions extending from the horizontal portion of the common electrode in parallel with the data line, arranged in parallel with each other at a predetermined interval, and alternately disposed with the plurality of pixel electrode extension portions;
The horizontal portion of the common electrode extends the first and second common lines exposed through a second contact hole penetrating the planarization layer, the color filter layer, the interlayer insulating layer, and the gate line and the gate insulating layer covering the common line. A horizontal electric field type liquid crystal display device, characterized in that connected to at least one of the units.
4. The method of claim 3,
and the shielding electrode is connected to the horizontal portion of the common line exposed through a third contact hole penetrating the planarization layer, the color filter layer, the interlayer insulating layer, and the gate insulating layer.


The method of claim 1,
and the shielding electrode crosses the data line.

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