KR102247080B1 - Duty cycle recovery device and low power receiver using the same - Google Patents

Abstract

The present invention relates to a duty cycle recovery device and a low power receiving device using the same. The low power receiving device comprises: an amplifying unit for receiving and amplifying an input signal; a duty cycle restoration unit for, after buffering the input signal with two different threshold values, checking and notifying occurrence of a duty period if two buffering results are the same for a preset time or more and checking and notifying occurrence of a duty-out period, otherwise; and a signal processing unit configured to activate an operation only when the occurrence of the duty-out period is checked so as to receive and process the input signal.

Description

Duty cycle recovery device and low power receiver using the same

The present invention relates to a low-power reception device, and in particular, to a duty cycle recovery device that does not require a separate wake-up signal, and a low-power reception device using the same.

Recently, as shown in FIG. 1, research on a Wireless Body Area Network (WBAN) that performs communication using a human body as a medium is actively being conducted.

Since WBAN only needs to use limited power, low power operation is important.

To reduce power consumption, a typical method used in the transmitter is duty-cycling. In the duty cycling, as shown in FIG. 2, the transmission unit is not always turned on, but only a part of a specific period (Duty) is turned on and the rest is turned off, thereby saving power during a period in which the transmission unit is turned off.

Accordingly, if the receiver can be operated only during the duty of the duty cycled signal and the receiver can be turned off during the non-duty period, meaningless power consumption in the receiver can also be reduced.

Therefore, researches are being actively conducted to reduce the average power consumption of the receiver by operating the receiver only during the time the transmitter is on.

If the receiver that receives the duty cycled signal is always turned on, only meaningless noise is received in the period where the signal does not come in, and power is consumed meaninglessly.

In order to compensate for this, as shown in FIG. 3, a receiving unit for determining whether to drive or not according to a wake-up signal has been proposed.

In addition to the main circuit 11, the receiver 10 of FIG. 3 further includes a wake-up receiver 14 comprising an ultra-low power analog receiver 12 and a wake-up logic 13.

The analog receiver 12 captures a wake-up signal, and the wake-up logic 13 wakes up the main circuit 21 in response thereto. Accordingly, the main circuit 11 is activated only when a wake-up signal is received, and performs a preset function.

However, the wake-up receiver 14 configured as described above generally requires blocks that occupy a large area, such as a filter, an LNA, and a comparator, and it is difficult to design each of them. In addition, since a block for generating a wake-up signal is additionally required in the receiving unit, there is a disadvantage in that an additional area and power consumption are additionally generated in the transmitting unit.

Accordingly, as to solve the above problems, the present invention is to provide a duty cycle recovery device that does not require a separate wake-up signal and a low power receiving device using the same by allowing the duty cycle of a received signal to be restored directly. do.

The object of the present invention is not limited to the above-mentioned object, and other objects not mentioned will be clearly understood by those of ordinary skill in the art from the following description.

As a means for solving the above problem, according to an embodiment of the present invention, an amplification unit for receiving and amplifying an input signal; After buffering the input signal with two different threshold values, a duty cycle recovery unit that checks and notifies the occurrence of a duty section if the two buffering results are the same for more than a preset time, and otherwise checks and reports the occurrence of a duty-out section. ; And a signal processor configured to receive and process the input signal by being activated only when the occurrence of the duty-out period is confirmed.

The duty cycle recovery unit comprises: a first buffer for buffering and outputting the input signal according to a first threshold value; A second buffer for buffering and outputting the input signal according to a second threshold value greater than the first threshold value; A mixer that outputs a first value if the outputs of the first and second buffers are the same, and outputs a second value otherwise; And a duty generator that, when the mixer continuously outputs the first value for more than a preset time, notifies the occurrence of the duty period during the pre-stored duty period maintenance time, and otherwise notifies the occurrence of the duty out period.

The duty generator may further include a function of pre-activating the amplification unit based on a previously stored signal reception period.

In this case, the duty generation unit SBC (Small Bit Counter) generating and outputting an overflow signal when the second value is continuously input n (n is a natural number) times from the mixer; And pre-activating the amplification unit based on a pre-stored signal reception period, and when the clock signal is counted m (m is a natural number) times, the occurrence of an on-duty is notified during the pre-stored duty period maintenance time, and the overflow It characterized in that it includes a long bit counter (LBC) for simultaneously resetting the counting result and the SBC whenever a signal is input.

The mixer is characterized in that it is implemented through any one of an XOR gate, an AND gate, and a Gilbert cell.

As a means for solving the above problem, according to another embodiment of the present invention, a first buffer for buffering and outputting an input signal according to a first threshold value; A second buffer for buffering and outputting the input signal according to a second threshold value greater than the first threshold value; A mixer that outputs a first value if the outputs of the first and second buffers are the same, and outputs a second value otherwise; And when the mixer continuously outputs the first value for more than a preset time, notifying the occurrence of a duty period during a pre-stored duty period maintenance time, and otherwise notifying the occurrence of a duty out period. .

The duty generator may further include a function of pre-activating an amplifying unit for receiving and amplifying the input signal based on a previously stored signal reception period.

The duty cycle recovery apparatus of the present invention and the low-power reception apparatus using the same can directly restore the duty cycle of a signal transmitted from a transmitting side with a minimum circuit configuration. As a result, since a separate wake-up signal is not required, data transmission/reception can be performed with only minimal parts and power consumption.

1 is a diagram for explaining the concept of WBAN.
2 is a diagram illustrating a method of reducing power consumption using duty cycling.
3 is a diagram illustrating a method of reducing power consumption of a wake-up signal.
4 is a diagram illustrating a principle of restoring a duty signal according to an embodiment of the present invention.
5 is a diagram illustrating a low power receiving apparatus including a duty cycle recovery apparatus according to an embodiment of the present invention.
6 is a diagram showing a detailed configuration of a duty cycle recovery apparatus according to an embodiment of the present invention.
7 is a view for explaining the principle of operation of the duty cycle recovery apparatus according to an embodiment of the present invention.
8 is a diagram showing a detailed configuration of a duty generator according to an embodiment of the present invention.
9 is a signal timing diagram for explaining a duty cycle recovery method of a low power receiving apparatus for supporting a duty cycle according to an embodiment of the present invention.

The following content merely exemplifies the principles of the present invention. Therefore, those skilled in the art can implement the principles of the present invention and invent various devices included in the concept and scope of the present invention, although not clearly described or illustrated herein. In addition, it is understood that all conditional terms and examples listed in this specification are, in principle, expressly intended only for the purpose of making the concept of the present invention understood, and are not limited to the embodiments and states specifically listed as such. It should be.

In addition, it is to be understood that all detailed descriptions listing specific embodiments as well as principles, aspects and embodiments of the present invention are intended to include structural and functional equivalents of these matters. It should also be understood that these equivalents include not only currently known equivalents, but also equivalents to be developed in the future, that is, all devices invented to perform the same function regardless of the structure.

Thus, for example, the block diagrams herein are to be understood as representing a conceptual perspective of exemplary circuits embodying the principles of the invention. Similarly, all flowcharts, state transition diagrams, pseudocodes, etc. are understood to represent the various processes performed by a computer or processor, whether or not the computer or processor is clearly depicted and that can be represented substantially in a computer-readable medium. It should be.

The functions of the various elements shown in the drawings, including a processor or functional block represented by a similar concept, may be provided by the use of dedicated hardware as well as hardware having the ability to execute software in association with appropriate software. When provided by a processor, the function may be provided by a single dedicated processor, a single shared processor, or a plurality of individual processors, some of which may be shared.

In addition, the explicit use of terms presented as processor, control, or similar concepts should not be interpreted exclusively by quoting hardware capable of executing software, and without limitation, digital signal processor (DSP) hardware, ROM for storing software. It should be understood to implicitly include (ROMix), RAMix, and non-volatile memory. Other commonly used hardware may also be included.

In the claims of the present specification, components expressed as means for performing the functions described in the detailed description include all types of software including, for example, combinations of circuit elements or firmware/microcodes that perform the above functions. It is intended to include all methods of performing a function to perform the function, and is combined with suitable circuitry for executing the software to perform the function. Since the invention defined by these claims is combined with the functions provided by the various enumerated means and combined with the manner required by the claims, any means capable of providing the above functions are equivalent to those conceived from this specification. It should be understood as.

The above-described objects, features, and advantages will become more apparent through the following detailed description in connection with the accompanying drawings, whereby those of ordinary skill in the technical field to which the present invention pertains can easily implement the technical idea of the present invention. There will be. In addition, in describing the present invention, when it is determined that a detailed description of a known technology related to the present invention may unnecessarily obscure the subject matter of the present invention, a detailed description thereof will be omitted.

4 is a diagram illustrating a principle of restoring a duty signal according to an embodiment of the present invention.

If the transmitter generates and outputs the duty cycled signal as shown in FIG. 4(a), the output of the analog front end is on-duty in which the signal of interest enters the receiver as shown in FIG. 4(b). A random signal that does not swing rail-to-rail due to amplification of noise in the circuit (i.e., noise) in the rail-to-rail swing and out of duty in which the signal of interest does not come in. Signal) is only output.

Accordingly, in the present invention, the duty cycle signal is restored by dividing the duty period (on-duty) and the duty-out period (out of duty) by using the signal generation pattern, and based on the signal generation pattern, the reception to automatically change the operation mode. I would like to propose a device.

5 is a diagram illustrating a low-power receiving apparatus including a duty cycle recovery apparatus according to an embodiment of the present invention.

As shown in FIG. 5, the low-power receiving apparatus of the present invention further includes a duty cycle recovery apparatus 200 in addition to the conventional amplifying unit 110 and the signal processing unit 120.

The amplification unit 110 receives and amplifies the signal received from the transmission unit.

The duty cycle recovery apparatus 200 buffers the output signal of the amplifying unit 110 with two different threshold values, and then compares and analyzes the two buffering results to identify and restore the duty period and the duty out period.

Then, the signal processing unit 120 is activated only during the duty period under the control of the duty cycle recovery apparatus 200, and processes and outputs the received signal according to a preset rule.

6 is a diagram showing a detailed configuration of a duty cycle recovery apparatus according to an embodiment of the present invention.

Referring to FIG. 6, it can be seen that the duty cycle recovery apparatus 200 includes the first and second buffers 211 and 212, the mixer 220, and the duty generator 230 again.

The first buffer 211 has a first threshold value Vth1, outputs "1" when the output of the amplification unit 110 is greater than or equal to the first threshold value, and outputs "0" otherwise.

The second buffer 212 has a second threshold value Vth2 = Vref + Vth1 having a value greater than the first threshold value Vth1, and is "1" when the output of the amplifying unit 110 is greater than or equal to the first threshold value. Is output, otherwise, "0" is output.

As described above, in an on-duty period, a rail-to-rail swinging signal of interest is received, and in an out of duty period, a noise signal is received.

Then, as shown in FIG. 7, the two buffers 211 and 212 having different threshold values output signals having the same signal value in the on-duty period, and different from each other in the out of duty period. Signals with signal values are frequently output.

Accordingly, in the present invention, by comparing and analyzing the correlation between the outputs of the two buffers 211 and 212, it is possible to clearly distinguish the signal section of the received signal.

Accordingly, the mixer 220 compares and analyzes the correlation between the outputs of the two buffers 211 and 212, and generates and outputs "0" when the correlation between the outputs of the two buffers 211 and 212 is high, and otherwise, " 1" is generated and output.

In other words, when the two buffers 211 and 212 output the same signal value, "0" is generated and output, otherwise, "1" is generated and output, so that the correlation between the two signals (B1, B2) is very high. The interval and the interval with low correlation are distinguished.

The mixer 220 may be implemented in a digital method and an analog method, and more specifically, in the case of a digital method, it may be implemented as an XOR gate, an AND gate, etc., and in the case of an analog method that does not, it may be implemented through a Gilbert cell. .

When the mixer 220 continuously outputs “0” for more than a preset time, the duty generator 230 transmits an enable signal (EN=1) notifying the occurrence of a duty period (EN=1) to a preset duty period maintenance time. During creation and output. On the other hand, otherwise, it generates and outputs an enable signal (EN = 0) notifying the occurrence of an out of duty period.

In addition, the duty generator 230 determines a pre-activation time of the amplification unit based on the signal reception period, and accordingly, the pre-activation amplification unit 110 activates the amplification unit 110 immediately before a new signal period. It also allows reception and amplification without signal loss (DUTY).

8 is a diagram showing a detailed configuration of a duty generator according to an embodiment of the present invention.

Referring to FIG. 8, the duty generator 230 of the present invention generates and outputs a duty signal (DUTY) according to the SBC (Small Bit Counter, 231) detecting and notifying a noise input, and preset duty section information. At the same time, it can be seen that it includes an LBC (Long Bit Counter) 233 that generates and outputs an enable signal (EN) for activating the operation of the signal processing unit 120 based on the detection result of the input of the signal of interest from the SBC 231. I can.

The SBC 231 counts the number of occurrences of the rising edge of the mixer output Mix, generates an overflow signal whenever the counting value becomes n (n is a natural number), and outputs the overflow signal to the LBC 233 (OVFLW = 1).

The LBC 233 stores and manages information on a signal reception period and a duty period maintenance time. And, based on the previously stored signal reception period, a duty signal (DUTY) for pre-activation before the start of a new signal period is generated and output.

In addition, the LBC 233 counts the number of times the clock signal is input, and when the counting value becomes m (m is a natural number), after confirming that it has entered the duty section in which the signal of interest is input, the enable signal is stored during the pre-stored duty period maintenance time. Generate and output (EN=1). On the other hand, when the overflow signal of the SBC 231 is input, the counting result and the SBC 231 are simultaneously reset in response thereto (Reset_ovflw=1).

9 is a signal timing diagram for explaining a duty cycle recovery method of a low power receiving apparatus for supporting a duty cycle according to an embodiment of the present invention.

In this case, for convenience of explanation, it is assumed that the signal reception period of the input signal is 100 counts, and the duty period maintenance time is 5% of the signal reception period.

First, the duty generator 230 generates and outputs a duty signal (DUTY = 1) for activating the driving of the amplification unit before the start of a new signal period (eg, 95 counts) with reference to a previously stored signal reception period. do.

The amplification unit 110 is activated in response to the duty signal (DUTY = 1), and starts to receive and amplify the input signal, and the first and second buffers 211 and 212 set two different threshold values. Each is buffered and output through.

The mixer 220 generates and outputs "0" when the first and second buffers 211 and 212 output the same signal value, and otherwise generates and outputs "1".

The duty generation unit 230 counts the number of times the mixer 220 continuously outputs “0”, and when “0” is continuously outputted for more than a preset time, it is indicated that a duty interval in which the signal of interest is transmitted is generated (on-duty). After checking, an enable signal (EN=1) for notifying this is generated and output during a pre-stored duty period maintenance time (eg, for 5 counts).

On the other hand, if "0" is not continuously outputted for more than a preset number of times, after confirming that it is an out of duty period in which only the noise signal is transmitted, an enable signal (EN = 0) to notify this is generated and output. .

Accordingly, the signal processing unit 120 is activated only during the duty period (on-duty) in response to the enable signal (EN=1), processes the received signal according to a preset rule, and outputs the signal to the rear end.

The method according to the present invention described above may be produced as a program for execution in a computer and stored in a computer-readable recording medium. Examples of computer-readable recording media include ROM, RAM, CD-ROM, and magnetic tape. , Floppy disks, optical data storage devices, and the like, and also include those implemented in the form of a carrier wave (for example, transmission through the Internet).

The computer-readable recording medium is distributed over a computer system connected through a network, so that computer-readable codes can be stored and executed in a distributed manner. In addition, functional programs, codes, and code segments for implementing the method can be easily inferred by programmers in the art to which the present invention pertains.

In the above, preferred embodiments of the present invention have been illustrated and described, but the present invention is not limited to the specific embodiments described above, and the present invention is generally in the technical field to which the present invention belongs without departing from the gist of the present invention claimed in the claims. Of course, various modifications may be implemented by a person having the knowledge of, and these modifications should not be individually understood from the technical idea or perspective of the present invention.

Claims (7)

An amplifying unit for receiving and amplifying an input signal;
After buffering the input signal with two different threshold values, if the two buffering results are the same for more than a preset time, a duty cycle recovery unit that checks and reports the occurrence of a duty interval, otherwise checks and reports the occurrence of a duty out interval. ; And
Operation is activated only when the occurrence of the duty-out period is confirmed, the low power receiving device including a signal processing unit for receiving and processing the input signal. The method of claim 1, wherein the duty cycle recovery unit
A first buffer for buffering and outputting the input signal according to a first threshold value;
A second buffer for buffering and outputting the input signal according to a second threshold value greater than the first threshold value;
A mixer that outputs a first value if the outputs of the first and second buffers are the same, and outputs a second value otherwise; And
When the mixer continuously outputs the first value for more than a preset time, the duty section notifies the occurrence of the duty section during the pre-stored duty section maintenance time, and otherwise, a duty generator for notifying the occurrence of the duty out section. . The method of claim 2, wherein the duty generator
And a function of pre-activating the amplification unit based on a previously stored signal reception period. The method of claim 3, wherein the duty generator
SBC (Small Bit Counter) generating and outputting an overflow signal when a second value is continuously input n (n is a natural number) times from the mixer; And
Based on a pre-stored signal reception period, the amplification unit is pre-activated, and when the clock signal is counted m (m is a natural number) times, the occurrence of an on-duty is notified during the pre-stored duty period maintenance time, but the overflow signal And a long bit counter (LBC) for simultaneously resetting the counting result and the SBC whenever is input. The method of claim 2, wherein the mixer
A low-power receiving device, characterized in that implemented through any one of an XOR gate, an AND gate, and a Gilbert cell. A first buffer for buffering and outputting an input signal according to a first threshold value;
A second buffer for buffering and outputting the input signal according to a second threshold value greater than the first threshold value;
A mixer that outputs a first value if the outputs of the first and second buffers are the same, and outputs a second value otherwise; And
When the mixer continuously outputs the first value for more than a preset time, a duty generator notifies the occurrence of a duty period during a pre-stored duty period maintenance time, and otherwise notifies the occurrence of a duty out period. The method of claim 6, wherein the duty generator
And a function of pre-activating an amplification unit for receiving and amplifying the input signal based on a previously stored signal reception period.

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