CN111683399A

CN111683399A - Device wake-up circuit, electronic device, wake-up system and device wake-up method

Info

Publication number: CN111683399A
Application number: CN202010510580.4A
Authority: CN
Inventors: 王吉健; 周亚莉
Original assignee: Nanjing Yingruichuang Electronic Technology Co Ltd
Current assignee: Nanjing Yingruichuang Electronic Technology Co Ltd
Priority date: 2020-06-05
Filing date: 2020-06-05
Publication date: 2020-09-18

Abstract

The application provides a device wake-up circuit, an electronic device, a wake-up system and a device wake-up method, wherein the device wake-up circuit comprises: the signal detection module is used for converting the input signal of the 2.4G frequency band into a high-low level time sequence; the signal judgment module is connected with the signal detection module and used for judging whether the high-low level time sequence is matched with the stored wake-up code time sequence or not and outputting a judgment result; and the awakening control module is connected with the signal judgment module and used for determining whether to output the awakening signal according to the judgment result. According to the technical scheme provided by the embodiment of the application, extra low-frequency sending equipment is not needed, a normal receiving channel is not needed to be opened, the input signal is received at the 2.4G frequency band, the high-low level time sequence and the awakening code time sequence of the input signal are matched, and if the matching is successful, the awakening signal can be output, so that the electronic equipment in the dormant state is awakened, and the energy consumption and the cost of the electronic equipment are reduced.

Description

Device wake-up circuit, electronic device, wake-up system and device wake-up method

Technical Field

The present application relates to the field of communications technologies, and in particular, to an apparatus wake-up circuit, an electronic apparatus, a wake-up system, and an apparatus wake-up method.

Background

In order to reduce the energy consumption of the equipment, the equipment is enabled to enter a dormant state when the equipment does not need to work, and the equipment is awakened when the equipment needs to work.

In order to reduce the power consumption of the slave device, in the prior art, a low-frequency transmitting device is additionally installed in a master device and the slave device, and when the slave device is in a sleep state, the master device generates a wake-up signal to the slave device through a low-frequency communication mode, so that the slave device is woken up when in the sleep state.

This approach requires additional installation of low frequency transmission devices in both the master and slave devices, increasing device cost.

Disclosure of Invention

The embodiment of the application provides an equipment awakening circuit, which can be used for awakening equipment without additionally installing low-frequency sending equipment.

The embodiment of the application provides a device wake-up circuit, including:

the signal detection module is used for converting the input signal of the 2.4G frequency band into a high-low level time sequence;

the signal judgment module is connected with the signal detection module and used for judging whether the high-low level time sequence is matched with the stored wake-up code time sequence or not and outputting a judgment result;

and the awakening control module is connected with the signal judgment module and used for determining whether to output the awakening signal according to the judgment result.

In one embodiment, the signal detection module comprises:

the signal amplification module is used for amplifying the input signal of the 2.4G frequency band;

the envelope detection module is connected with the signal amplification module and used for receiving the amplified input signal and outputting a high level when the energy of the input signal is greater than a threshold value; outputting a low level during a period when the energy of the input signal is less than or equal to a threshold value.

In one embodiment, the signal determination module includes:

a clock generation circuit for generating a clock signal;

the counter is connected with the clock generation circuit and the signal detection module and is used for counting the number of clock cycles of high and low levels in the high and low level time sequence in sequence according to the clock signal;

the decoding judgment module is connected with the counter and used for judging whether the number of the clock cycles of which the high and low levels are sequentially continued is matched with the number of the clock cycles of which the high and low levels are sequentially continued in the stored wakeup code time sequence or not and outputting a judgment result;

and the storage module is connected with the decoding judgment module and used for storing the awakening code time sequence.

In an embodiment, the wake-up code timing sequence includes a wake-up code and a code length, the storage module is further configured to decode a threshold, and the decoding decision module includes:

the decoder is connected with the counter and the storage module and is used for receiving the level indicating signal and the counting value output by the counter, judging whether the difference between the counting value and the coding length is smaller than the decoding threshold value or not, and if the difference is smaller than the decoding threshold value, outputting a decoding value corresponding to the level indicating signal;

a first-in first-out memory connected to the decoder for storing the decoded value;

and the judgment module is connected with the first-in first-out memory and used for acquiring a decoding result consisting of a plurality of decoding values from the first-in first-out memory, judging whether the decoding result is consistent with the awakening code or not and outputting a judgment result.

In an embodiment, the wake-up control module is connected to the signal detection module, and the wake-up control module is further configured to periodically output a first enable signal to the signal detection module and the signal judgment module, so as to control the switching of the signal detection module and the signal judgment module.

An embodiment of the present application provides an electronic device, including:

the device wake-up circuit;

the microcontroller system is connected with the awakening control module of the equipment awakening circuit and used for receiving the awakening signal output by the awakening control module and entering a normal communication mode;

the microcontroller system is also used for responding to a sleep instruction, entering a sleep mode, outputting a second enabling signal to the awakening control module and starting the equipment awakening circuit.

An embodiment of the present application provides a wake-up system, including:

the electronic device described above;

the main device is in communication connection with the electronic device and is used for sending the sleep instruction to the electronic device;

the main device is further configured to periodically send a wake-up instruction to the electronic device, so as to wake up the electronic device in the sleep mode.

In an embodiment, the electronic device is further configured to return an acknowledgement signal to the main device after receiving the wake-up instruction.

In an embodiment, the master device is further configured to enter a normal communication mode after receiving the response signal.

The embodiment of the present application further provides a device wake-up method, including:

converting the input signal of the 2.4G frequency band into a high-low level time sequence;

judging whether the high-low level time sequence is matched with the stored awakening code time sequence to obtain a judgment result;

and determining whether to output a wake-up signal according to the judgment result.

According to the technical scheme provided by the embodiment of the application, extra low-frequency sending equipment is not needed, a normal receiving channel is not needed to be opened, the input signal is received at the 2.4G frequency band, the high-low level time sequence and the awakening code time sequence of the input signal are matched, and if the matching is successful, the awakening signal can be output, so that the electronic equipment in the dormant state is awakened, and the energy consumption and the cost of the electronic equipment are reduced.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required to be used in the embodiments of the present application will be briefly described below.

Fig. 1 is a schematic diagram of a device wake-up circuit according to an embodiment of the present application;

fig. 2 is a schematic diagram of a device wake-up circuit according to another embodiment of the present application;

fig. 3 is a schematic diagram of a device wake-up circuit according to another embodiment of the present application;

fig. 4 is a schematic diagram of a device wake-up circuit according to yet another embodiment of the present application;

fig. 5 is a schematic diagram illustrating a data transmission direction inside a signal determination module according to an embodiment of the present application;

FIG. 6 is a schematic diagram of an electronic device provided by an embodiment of the present application;

FIG. 7 is a schematic diagram of an electronic device provided by another embodiment of the present application;

FIG. 8 is a schematic diagram of a wake-up system according to an embodiment of the present application;

FIG. 9 is a diagram illustrating a wake-up command in a specific encoding format according to an embodiment of the present application;

fig. 10 is a schematic diagram of working timing sequences of a master device and a slave device in a wake-up process according to an embodiment of the present application;

fig. 11 is a flowchart illustrating a device wake-up method according to an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

Like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.

Fig. 1 is a schematic diagram of a device wake-up circuit 100 according to an embodiment of the present disclosure. The device wake-up circuit 100 may be used in an electronic device to wake up the electronic device in a sleep state when a wake-up command is received. As shown in fig. 1, the device wake-up circuit 100 includes a signal detection module 1, a signal determination module 2, and a wake-up control module 3, which are connected in sequence.

The signal detection module 1 is configured to convert an input signal of a 2.4G frequency band into a high-low level timing sequence. The 2.4G frequency band is a frequency band in the wireless router, and the frequency band is between 2.400GHz (gigahertz) and 2.4835GHz, so 2.4G wireless technology is for short. The signal detection module 1 may include a wireless module for communicating via the 2.4G frequency band, and is configured to receive an input signal of the 2.4G frequency band. The signal detection module 1 may detect the energy of the input signal, and output a high level when the energy is greater than a certain threshold (e.g., -40 dBm), and output a low level when the energy is less than or equal to the threshold, thereby obtaining a high-low level timing sequence. High and low are relative terms and do not imply that the level is above or below a certain value.

In one embodiment, the signal detection module 1 outputs a high level when detecting the 2.4G input signal, and otherwise outputs a low level, so as to obtain a high-low level timing sequence.

The signal judging module 2 is connected to the signal detecting module 1, and is configured to judge whether a high-low level timing sequence matches a stored wakeup code timing sequence, and output a judgment result.

Here, matching means that the difference between the high-low level timing and the wake-up code timing is less than a certain value. For example, assuming that the wake-up code timing is 101, 1 represents high level, 0 represents low level, and each bit period is 16 clock periods, if the high-low level timing output by the signal detection module 1 is also high level, low level, and high level, and the high level lasts 16 clock periods, the low level lasts 16 clock periods, and the high level lasts 16 clock periods, then the high-low level timing and the wake-up code timing are considered to match. In one embodiment, since there may be errors, a fault tolerance of several clock cycles (e.g. 2 clock cycles) may be set, and when the high level lasts 14-18 clock cycles, the low level lasts 14-18 cycles, and the high level lasts 14-18 clock cycles, the high level and the low level output by the signal detection module 1 are considered to be matched with the wakeup code timing. In an embodiment, when the high-low level timing matches the wakeup code timing, the signal determination module 2 outputs a high level, otherwise, the signal determination module outputs a low level, and the high level or the low level output by the signal determination module 2 may be referred to as a determination result.

The wake-up control module 3 is connected to the signal judgment module 2, and configured to determine whether to output a wake-up signal according to the judgment result.

In an embodiment, if the signal determining module 2 outputs a high level, the wake-up control module 3 outputs a wake-up signal as a high level, and if the signal determining module 2 outputs a low level, the wake-up signal output by the wake-up control module 3 is a low level. This wake-up signal may be used to wake up an MCU (microcontroller) system of the electronic device 10 in a sleep state.

In an embodiment, the wake-up control module 3 may be connected to the enable terminals of the signal detection module 1 and the signal judgment module 2, respectively, and configured to periodically output a first enable signal (i.e., enable 1) to the signal detection module 1 and the signal judgment module 2, so as to control the switches of the signal detection module 1 and the signal judgment module 2. When the first enable signal output by the wake-up control module 3 is at a high level, the signal detection module 1 and the signal judgment module 2 are turned on, and when the first enable signal is at a low level, the signal detection module 1 and the signal judgment module 2 are turned off, so that energy consumption can be reduced as much as possible.

As shown in fig. 2, in an embodiment, the signal detection module 1 may include a signal amplification module 11 and an envelope detection module 12. The input end of the envelope detection module 12 is connected with the output end of the signal amplification module 11, and the output end of the envelope detection module 12 is connected with the signal judgment module 2.

The signal amplifying module 11 is configured to amplify the input signal in the 2.4G frequency band. The signal amplification module 11 may be a 2.4G amplification module.

The envelope detection module 12 is configured to receive the amplified input signal and output a high level when the energy of the input signal is greater than a threshold; outputting a low level during a period when the energy of the input signal is less than or equal to a threshold value.

In one embodiment, the envelope detection module 12 may be implemented by an RC low pass filter, the low frequency signal may normally pass through, and the output of the envelope detection module 12 is the received signal envelope, which is the output of the signal detection module 1.

As shown in fig. 3, in an embodiment, the signal determining module 2 may include: clock generation circuit 23, counter 21, decoding decision module 22 and storage module 24.

The clock generation circuit 23 is used to generate a clock signal. The counter 21 is connected to the clock generating circuit 23 and the signal detecting module 1, and the counter 21 is configured to count the number of clock cycles in which high and low levels sequentially continue in the high and low level timing sequence output by the signal detecting module 1 according to the clock signal output by the clock generating circuit 23. Assuming that the signal detection module 1 outputs a high level first, the first port of the counter 21 outputs a high level, and the second port outputs the number of clock cycles for which the high level lasts; assuming that the signal detection module 1 outputs a low level later, the first port of the counter 21 outputs a low level, the second port outputs the number of clock cycles for which the low level lasts, and so on. The counter 21 may output a high level for several clock cycles, a low level for several clock cycles, and a switch to a high level for several clock cycles.

The decoding decision module 22 is connected to the output end of the counter 21, and is configured to determine whether the number of clock cycles in which the high and low levels sequentially last matches the number of clock cycles in which the high and low levels sequentially last in the stored wakeup code timing sequence, and output the determination result.

For example, it is assumed that the counter 21 outputs a high level first and the number of the sustained clock cycles is 16, then outputs a low level and the number of the sustained clock cycles is 16, and then outputs a high level again and the sustained clock cycles is 16. The decoding decision module 22 can determine whether the number of clock cycles in which the high and low levels continue in sequence matches the number of clock cycles in which the high and low levels continue in sequence in the wakeup code timing sequence. With reference to the above, a difference of 1-2 clock cycles can be considered as a match, a high level can be output, and conversely a low level can be output.

The storage module 24 is connected to the decoding decision module 22, and can be used for storing the wakeup code timing sequence. The decoding decision module 22 may obtain the number of clock cycles that the high and low levels of the wakeup code timing sequence continuously last from the storage module 24.

In one embodiment, the high level duration and the low level duration of the wake-up code timing may be different. For example, the wake-up code timing may be 101, where the first high level lasts 14 clock cycles, the second low level lasts 20 clock cycles, and the second high level lasts 25 clock cycles. Assuming that the first port of the counter 21 outputs a high level, a low level and a high level in sequence, and the number of clock cycles output by the second port also outputs a clock in sequence within a range of 14 ± 2, a range of 20 ± 2 and a range of 25 ± 2, it can also be considered that the high-low level timing output by the signal detection module 1 matches the wakeup code timing.

In an embodiment, the wake-up code timing may include a wake-up code and a code length. For example, 101 can be regarded as a wake-up code, and each bit period can be regarded as a code length, i.e. the number of clock cycles for which the high level or the low level lasts. The storage module 24 is also used for storing the decoding threshold. The decoding threshold refers to the size of the fault tolerance, and may be 2 clock cycles, for example.

In one embodiment, as shown in fig. 4 and 5, the decoding decision module 22 may include: a decoder 221, a first-in first-out memory 222, and a decision module 223.

The decoder 221 is connected to the counter 21 and the storage module 24, and configured to receive the level indication signal and the count value output by the counter 21, determine whether a difference between the count value and the coding length is smaller than the decoding threshold, and output a decoded value corresponding to the level indication signal if the difference is smaller than the decoding threshold.

When the signal detection module 1 outputs a high level, the level indication signal output by the counter 21 is a high level, and the counter 21 may count the number of clock cycles in which the high level continues, thereby outputting a count value. When the level indicating signal is inverted, assuming that the count value output by the counter 21 is 19, the encoding length is 16, and the decoding threshold is 2, the difference between the count value and the encoding length can be considered to be greater than the decoding threshold, the decoder 221 outputs a decoding value indicating invalidity, assuming that the count value output by the counter 21 is 17, the difference between the count value and the encoding length can be considered to be less than the decoding threshold, and the decoder 221 outputs 1.

Similarly, when the signal detecting module 1 outputs a low level, the level indicating signal output by the counter 21 is a low level, and if the difference between the count value (i.e., the number of clock cycles) corresponding to the low level and the encoding length is smaller than the decoding threshold, the decoder 221 outputs 0.

A first-in first-out memory 222 connected to the decoder 221 for storing the decoded value outputted from the decoder 221.

The decision module 223 is connected to the fifo 222, and configured to obtain a decoding result composed of a plurality of decoded values from the fifo 222, determine whether the decoding result is consistent with the wakeup code, and output a determination result.

Assuming that the wake-up code is 101, the decision module 223 may obtain three valid decoded values from the fifo 222 to obtain a decoding result, and determine whether the decoding result is consistent with the wake-up code, assuming that the decoding result is 101, the decision module 223 outputs a high level determination result, otherwise, the decision module 223 outputs a low level determination result. The decision module 223 is connected to the wake-up control module 3, and can output the decision result to the wake-up control module 3, so that after receiving the decision result, the wake-up control module 3 can determine whether to output the wake-up signal.

Fig. 6 and fig. 7 are schematic diagrams of an electronic device provided in an embodiment of the present application, and as shown in fig. 6 and fig. 7, the electronic device 10 includes the device wake-up circuit 100 in the above embodiment. The electronic device 10 further comprises: and the microcontroller system 200 is connected to the wake-up control module 3 of the device wake-up circuit 100, and is configured to receive a wake-up signal output by the wake-up control module 3, and the microcontroller system 200 enters a normal communication mode after receiving the wake-up signal. The normal communication mode refers to a communication mode of the microcontroller system 200 when it is operating normally. Microcontroller system 200 is part of the circuitry for normal operation of electronic device 10.

The microcontroller system 200 is further configured to enter a sleep mode in response to the sleep command, and output a second enable signal to the wake-up control module 3 to start the device wake-up circuit 100.

The sleep command may be sent from the external device to the microcontroller system 200 of the electronic device 10, and the system receives the sleep command in the normal communication mode, enters the sleep mode, and outputs the second enable signal to the wake-up control module 3 of the device wake-up circuit 100. During normal operation, the device wake-up circuit 100 is turned off, and after the wake-up control module 3 of the device wake-up circuit 100 receives the second enable signal (i.e., enable 2), the first enable signal (i.e., enable 1) may be periodically output to the signal detection module 1 and the signal determination module 2, so that when the microcontroller system 200 enters the sleep mode, the device wake-up circuit 100 may be started to detect the input signal.

As shown in fig. 8, an embodiment of the present application further provides a wake-up system, which may include the electronic device 10 in the above embodiments and a main device 20 communicatively connected to the electronic device 10. This electronic device 10 may also be referred to as a slave device, and the master device 20 comprises two operating modes: an awake mode and a normal communication mode; the slave device also has two modes of operation: a sleep mode and a normal communication mode. To save power consumption, the master device 20 may send a sleep instruction to the slave device to put the slave device into a sleep mode in anticipation of a subsequent period of time during which the slave device is not required to operate. When the master device 20 needs the slave device to normally communicate, a wake-up command is periodically sent to the slave device through the wireless path of the 2.4G frequency band to wake up the slave device in the sleep mode, so that the slave device switches to the normal communication mode.

In one embodiment, the slave device switches to the normal communication mode and sends an acknowledgement signal to the master device 20 after receiving the wake-up command. After receiving the response signal, the master device 20 enters a normal communication mode to start normal data communication with the slave devices. Fig. 9 is a signal diagram of a wake-up instruction according to an embodiment of the present application, where the wake-up instruction corresponds to a wake-up code to wake up a microcontroller system 200 of an electronic device 10, where the wake-up code corresponding to the signal is 101, a 2.4G signal is sent when a codeword in the wake-up code is 1, and the wake-up instruction is not sent when the codeword is 0.

Fig. 10 is an operation timing sequence of the master device and the slave device when waking up according to the embodiment of the present application. The master device 20 periodically sends a wake-up command and initiates normal reception. The slave device periodically activates and deactivates the device wake-up circuit 100, and if a wake-up command is received, normal transmission is activated, transmitting an acknowledgement signal. If no wake-up instruction is received, the hibernate device wake-up circuit 100 continues. During sleep and startup of the device wake-up circuit 100, the microcontroller system 200 of the slave device is in a sleep state, thereby significantly reducing power consumption of the electronic device 10.

According to the technical solution provided by the foregoing embodiment of the present application, the master device 20 may use a specifically encoded wake-up instruction, and the slave device periodically starts to receive the wake-up instruction, so as to cooperate with the wake-up workflow, so that the slave device can also realize a function of waking up the wireless channel in a low power consumption sleep mode.

As shown in fig. 11, an embodiment of the present application further provides a device wake-up method, which may be applied to the device wake-up circuit 100 of the foregoing embodiment, and the method may include the following steps S1101 to S1103.

Step S1101: and converting the input signal of the 2.4G frequency band into high-low level time sequence.

Step S1102: and judging whether the high-low level time sequence is matched with the stored wake-up code time sequence to obtain a judgment result.

Step S1103: and determining whether to output a wake-up signal according to the judgment result.

In an embodiment, the step S1101 may be implemented by the signal detection module 1 of the device wake-up circuit 100, the step S1102 may be implemented by the signal judgment module 2 of the device wake-up circuit 100, and the step S1103 may be implemented by the wake-up control module 3 of the device wake-up circuit 100, which may specifically refer to the embodiment of the device wake-up circuit 100 and is not described herein again.

In the embodiments provided in the present application, the disclosed apparatus and method can be implemented in other ways. The apparatus embodiments described above are merely illustrative, and for example, the flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

In addition, functional modules in the embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.

Claims

1. A device wake-up circuit, comprising:

2. The device wake-up circuit according to claim 1, wherein the signal detection module comprises:

3. The device wake-up circuit according to claim 1, wherein the signal determining module comprises:

a clock generation circuit for generating a clock signal;

4. The device wake-up circuit of claim 3, wherein the wake-up code timing comprises a wake-up code and a code length, the storage module is further configured to decode a threshold, and the decoding decision module comprises:

5. The device wake-up circuit according to claim 1, wherein the wake-up control module is connected to the signal detection module, and the wake-up control module is further configured to periodically output a first enable signal to the signal detection module and the signal determination module to control the switching of the signal detection module and the signal determination module.

6. An electronic device, comprising:

the device wake-up circuit of any of claims 1 to 5;

7. A wake-up system, comprising:

the electronic device of claim 6;

8. Wake-up system according to claim 7, characterized in that the electronic device is further adapted to return a reply signal to the main device after receiving the wake-up instruction.

9. Wake-up system according to claim 8, characterized in that the master device is further adapted to enter a normal communication mode after receiving the reply signal.

10. A device wake-up method, comprising: