KR102246078B1 - Display device - Google Patents

Abstract

A display device according to an embodiment of the present invention includes a display panel; A data driver that applies an image signal to the display panel; And a timing controller that controls the data driver to alternately repeat the image update period and the holding period in which the updated image is held.

Description

Display device {DISPLAY DEVICE}

The present invention relates to a display device.

With the development of various potable devices such as mobile phones, notebook computers, and computers, and information electronic devices that implement high-resolution and high-quality images such as HDTVs, flat panel displays applied thereto. Device) is gradually increasing. As such flat panel display devices, LCD (Liquid Crystal Display), PDP (Plasma Display Panel), FED (Field Emission Display), and OLED (Organic Light Emitting Diodes) have been actively studied. Currently, liquid crystal displays (LCDs) are in the spotlight for reasons of realization and realization of a large-area screen.

In this liquid crystal display, referring to FIG. 1, the driving frequency is defined according to the number of images projected on the screen per second, and the liquid crystal display with the driving frequency set to 60 Hz displays a new image of 60 frames per second. Will be displayed.

In order to reduce power consumption of a conventional liquid crystal display device, a technology for low speed driving in case of a still image has been developed.

In this way, it is determined whether it is a still image, and since it is driven at a low speed only in the case of a still image, there is a problem that the actual power consumption reduction effect is insignificant due to the limited image.

A display device and a driving method thereof according to an embodiment of the present invention provide a display device capable of realizing low-speed driving or high-speed driving according to an image, and a driving method thereof.

A display device and a driving method thereof according to an exemplary embodiment of the present invention drive a frame without flicker and afterimage at a high-speed driving timing and hold the remaining sections, thereby improving image quality and reducing power consumption, and driving the same. It also provides a method.

A display device and a driving method thereof according to an exemplary embodiment of the present invention also provide a display device capable of realizing low consumption by turning off logic power in a holding period and a driving method thereof.

A display device according to an embodiment of the present invention includes a display panel; A data driver that applies an image signal to the display panel; And a timing controller that controls the data driver to alternately repeat the image update period and the holding period in which the updated image is held.

In the display device according to an embodiment of the present invention, the timing controller turns off power to the data driver during the holding period.

In the display device according to an embodiment of the present invention, the timing controller includes: a frame comparison unit configured to compare the previous frame and the current frame to determine a moving image and a still image; A driving frequency setting unit that sets a driving frequency of the display panel based on an image discrimination signal from the frame comparison unit; And a system signal generator configured to generate a data control signal to be supplied to the data driver based on the frequency setting signal from the driving frequency setting unit.

In the display device according to an embodiment of the present invention, the timing controller further comprises a power control unit that is controlled by the system signal generation unit to control power of the data driver.

In the display device according to an embodiment of the present invention, the timing controller further comprises a setting information storage unit for storing a system signal corresponding to the frequency setting signal.

In the display device according to an embodiment of the present invention, the system signal generation unit generates the data control signal by referring to the setting information storage unit.

In the display device according to an embodiment of the present invention, the driving frequency setting unit sets a high-speed driving frequency higher than a basic frequency in a moving picture, and sets a low-speed driving frequency lower than the basic frequency in a still image.

In the display device according to an embodiment of the present invention, the fundamental frequency is n (n is a natural number) Hz, and the high-speed driving frequency is k*n Hz, which is k (k is a natural number of 2 or more) times the n Hz. .

In the display device according to an embodiment of the present invention, the image update period is a period in which any one of n images is updated for 1/(k*n) seconds.

In the display device according to an embodiment of the present invention, the holding period is the updated image for 1/(k*n) *(k-1) seconds after any one of the n images is updated. A display device that is a holding section.

In the display device according to an embodiment of the present invention, the fundamental frequency is n (n is a natural number) Hz, and the low-speed driving frequency is m (m is a natural number less than n) Hz.

In the display device according to an embodiment of the present invention, the image update period is a period in which one of m images is updated for 1/n seconds.

In the display device according to an embodiment of the present invention, in the holding period, after any one of the m images is updated, the updated image is displayed for 1/n*(n/m-1) sec seconds. A display device that is a holding section.

In the display device according to an embodiment of the present invention, a gamma voltage setting unit generating a plurality of gamma voltages and supplying them to the data driver is further included, wherein the timing controller includes a power supply of the gamma voltage setting unit during the holding period. A display device that turns off.

A display device according to an embodiment of the present invention includes: a display panel; A data driver that applies an image signal to the display panel; And a timing controller for controlling a data driver to alternately repeat an image update period and a holding period in which the updated image is held, wherein the timing controller analyzes the input image data to distinguish between a moving image and a still image. The display device controls the data driver with different driving frequencies and turns off the power of the data driver during the holding period.

In the display device according to an embodiment of the present invention, the timing controller sets a high-speed driving frequency higher than a basic frequency in the moving picture and sets a low-speed driving frequency lower than the basic frequency in the still image.

In the display device according to an embodiment of the present invention, the fundamental frequency is n (n is a natural number) Hz, the high-speed driving frequency is k*n Hz, which is k (k is a natural number of 2 or more) times the n Hz, and the The image update period is a period in which any one of n images is updated for 1/(k*n) seconds, and the holding period is, after any one of the n images is updated, 1/( A display device in which the updated image is held for k*n) *(k-1) seconds.

In the display device according to an embodiment of the present invention, the fundamental frequency is n (n is a natural number) Hz, the low-speed driving frequency is m (m is a natural number less than n) Hz, and the image update period includes m It is a section in which any one of the videos is updated for 1/n seconds, and the holding section is for 1/n*(n/m-1) sec seconds after any one of the m videos is updated. A display device in which the updated image is held.

The display device and its driving method according to an embodiment of the present invention can realize low-speed driving or high-speed driving according to an image, and the display device and its driving method according to the embodiment of the present invention have problems of flicker and afterimages due to high-speed driving timing. By driving an empty frame and holding the remaining section, it is possible to improve image quality and reduce power consumption. The display device and its driving method according to an embodiment of the present invention realize low consumption by turning off logic power in the holding section. A display device that can be used and a method of driving the same can be provided.

1 is a schematic diagram of an image output on a display panel according to a driving frequency.
2 is a diagram illustrating a structure of a display device according to an exemplary embodiment of the present invention.
3 is a flowchart illustrating an operation of the timing controller according to the first embodiment of the present invention.
4 is a diagram showing a detailed configuration diagram of a timing controller according to the first embodiment of the present invention.
5A and 5B are diagrams for explaining an operating method of the display device according to the first exemplary embodiment of the present invention.
6 is a flowchart illustrating an operation of a timing controller according to a second embodiment of the present invention.
7 is a block diagram of a timing controller according to an embodiment of the present invention.
8A and 8B are diagrams illustrating a method of updating an image at a high driving frequency.
9A and 9B are diagrams illustrating a method of updating an image at a high driving frequency.
10 and 11 are diagrams illustrating a high-speed driving mode of a display device according to a second exemplary embodiment of the present invention.
12 and 13 are diagrams illustrating a low speed driving mode of a display device according to a second exemplary embodiment of the present invention.

Hereinafter, with reference to the drawings of a display device according to an embodiment of the present invention will be described in detail. The following embodiments are provided as examples in order to sufficiently convey the spirit of the present invention to those skilled in the art. Accordingly, the present invention is not limited to the embodiments described below and may be embodied in other forms. In addition, in the drawings, the size and thickness of the device may be exaggerated for convenience. The same reference numerals represent the same elements throughout the specification.

2 is a diagram illustrating a structure of a display device according to an exemplary embodiment of the present invention.

As illustrated, in the display device of the present invention, a plurality of gate lines GL and data lines DL are intersected, and a display panel 100 in which a pixel is defined at the intersection point, a gate line GL, and a Gate drivers and data drivers 110 and 120 that drive the display panel 100 through a data line (DL), and control drivers by receiving timing signals and image signals from an external system (not shown), It includes a timing controller 130 for determining the driving frequency.

In the display panel 100, a plurality of gate lines GL and a plurality of data lines DL are intersected in a matrix form in a direction perpendicular to the gate line GL on a transparent substrate, and a plurality of pixels are disposed at the intersection points. The area is defined. A thin film transistor T is formed in each pixel area, and a liquid crystal cell CLC and a storage capacitor controlled by the thin film transistor are configured to display a screen through this.

The above-described thin film transistor T is turned on when a scan signal from the gate line GL, that is, a gate high voltage, is applied to apply a data voltage from the data line DL to the liquid crystal cell CLC. In addition, the thin film transistor T is turned off when a gate low voltage is applied from the gate line GL so that the data voltage charged in the liquid crystal cell CLC is maintained for one frame.

The liquid crystal cell CLC is a pixel electrode and a common electrode represented by a capacitor, and includes a common electrode facing each other with a liquid crystal interposed therebetween, and a pixel electrode connected to the thin film transistor T. In addition, the liquid crystal cell CLC is connected to the storage capacitor in order to stably maintain the charged data voltage until it is charged to the next data voltage. In the pixel, the arrangement of liquid crystals is changed according to the data voltage charged through the thin film transistor T, and the light transmittance of the liquid crystal cell CLC is adjusted, thereby implementing gray scale.

In addition, a gate driver 110 including a plurality of shift registers is provided at one end of the display panel 100, and is electrically connected to the gate wiring GL formed on the display panel 100 to sequentially gate one horizontal line. Outputs a drive signal.

The gate driver 110 turns on the thin film transistors T arranged on the display panel 100 in response to the gate control signal GCS applied from the timing controller 130, thereby The data voltage of the analog waveform supplied from the data driver 120 is applied to the liquid crystal cell CLC connected to each thin film transistor T.

The gate control signal GCS includes a gate start pulse (GSP), a gate shift clock (GSC), and a gate output enable (GOE). . Here, the gate start pulse (GSP) is a signal applied to a shift register that generates a first gate pulse among a plurality of shift registers constituting the gate driver 110 to control the first gate pulse to be generated, and a gate shift clock (GSC) is a clock signal commonly input to all shift registers and is a clock signal for shifting the gate start pulse (GSP). In addition, the gate output enable GOE controls the outputs of the shift registers to prevent the thin film transistors corresponding to different horizontal sections from being overlapped and turned on.

The data driver 120 arranges a digital image signal (RGB) input in response to data control signals input from the timing controller 130, selects reference voltages (gamma), and converts it into an analog data voltage. do.

The data voltage is latched by one horizontal section (1H) and is simultaneously input to the display panel 100 through all data lines DL.

The data control signal DCS includes a source start pulse (SSP), a source shift clock (SSC), a source output enable (SOE), and a polarity signal. (Polarity: POL). Here, the source start pulse SSP is a signal that controls the data sampling start timing of the data driver 120, and the source sampling clock SSC is each driving IC constituting the data driver 120 in response to a rising or falling edge. It is a clock signal that controls the sampling timing of the data at. In addition, the source output enable (SOE) serves to control the output timing of the data driver 120.

The timing controller 130 receives timing signals such as image data DATA applied from an external system (not shown), a clock signal DCLK, a horizontal synchronization signal Hsync, and a vertical synchronization signal Vsync. One gate control signal GCS and a data control signal DCS are generated.

Here, the horizontal synchronization signal Hsync represents the time it takes to display one line of the screen, and the vertical synchronization signal Vsync represents the time it takes to display the screen of one frame. In addition, the clock signal DCLK is a signal used as a reference for generating various signals in synchronization with the gate and data drivers 110 and 120 and the timing controller 130.

In addition, although not shown, the timing controller 130 is connected to an external system (not shown) through a predetermined interface so that the timing controller 130 receives an image-related signal and a timing signal output from the external system at high speed without error. do. As such an interface, a Low Voltage Differential Signal (LVDS) method or a Transistor-Transistor Logic (TTL) interface method may be used.

The gamma voltage setting unit 140 of the display device may generate a plurality of gamma voltages and supply them to the data driver 120. The data driver 120 may generate a plurality of gradation voltages by dividing the gamma voltage.

The power unit 150 of the display device may provide data and power (VDD) to the gate drivers 110 and 120, the converter 160, and the timing controller 130, and receive power from the timing controller 130. The power of the data driver 120 may be controlled by the control signal PCS.

The converter 150 of the display device may be configured as a DC-DC converter, and a gate high voltage VGH and a gate low voltage VGL are applied to the gate driver 110 and a common voltage Vcom is applied to the display panel 100. Can be approved.

3 is a flowchart illustrating an operation of the timing controller according to the first embodiment of the present invention.

Referring to FIG. 3, the timing controller 130 may determine a mode whether an image signal is a still image or a moving image using an input data signal Data.

After the mode is determined, a still image may be driven at a low speed, and a moving image may be driven at a high speed.

If the basic driving frequency is 60 Hz, 60 images per second may be updated on the display panel 100.

The low-speed driving frequency means a frequency lower than the basic driving frequency, and the high-speed driving frequency means a frequency higher than the basic driving frequency.

<First Example>

4 is a diagram showing a detailed configuration diagram of a timing controller according to the first embodiment of the present invention.

4, the timing controller 130 according to the first embodiment includes a frame comparison unit 131, a driving frequency setting unit 132, a system signal generation unit 133, and a setting information storage unit 134. can do.

The frame comparison unit 131 may compare the previous frame and the current frame, distinguish whether input image data is a moving image or a still image, and output an image discrimination signal DDS.

The driving frequency setting unit 132 may output a frequency setting signal FES by setting a low-speed driving frequency in case of a still image and a high-speed driving frequency in case of a video based on the image discrimination signal DDS. .

The reference frequency for classifying the low speed and high speed driving frequencies is an existing driving frequency and may be, for example, 60 Hz.

The system signal generation unit 138 receives the frequency setting signal FES, and corresponds to information on a driving frequency included in the frequency setting signal FES and a driving frequency stored in the setting information storage unit 134. The system signal information can be read and the gate and data control signals (GSC and DSC), which are system signals, can be generated and output to the gate and data drivers 110 and 120.

The gate and data control signals GSC and DSC turn on the thin film transistors T connected to all the gate lines GL on the horizontal line and the vertical line on the display panel 100 according to the driving frequency, and each thin film transistor T ) Is a control signal set to provide a data signal, which is an image signal, through the data line DL, and the gate and data drivers 110 and 120 may be controlled.

For example, in the case of a driving frequency of 60 Hz, scanning signals are provided on all gate lines (GL) 60 times per second, and data signals are provided to thin film transistors (T) connected to each gate line (GL), thereby providing 60 times per second. It is to update the video.

<Driving method of the display device according to the first embodiment of the present invention>

5A and 5B are diagrams for explaining an operating method of the display device according to the first exemplary embodiment of the present invention.

Referring to FIG. 5A, in the case of a still image, the driving frequency setting unit 132 sets a low-speed high-speed driving frequency. When the low-speed driving frequency has a frequency of 5 Hz, five images per second (sec) may be updated on the display panel 100.

In addition, according to the polarity control signal POL generated by the system signal generator 133, the data signal may have positive polarity and negative polarity repeatedly for each frame. Therefore, the polarity of the data signal can be reversed every 5 frames.

Referring to FIG. 5B, the driving frequency setting unit 132 sets a high-speed driving frequency. The high-speed driving frequency may be 120Hz, for example. When the high-speed driving frequency has a frequency of 120 Hz, 120 images per second (sec) may be updated on the display panel 100.

In addition, according to the polarity control signal POL generated by the system signal generator 133, the data signal may have positive polarity and negative polarity repeatedly for each frame. Therefore, the polarity of the data signal may be reversed every 120 frames.

When the driving frequency set by the driving frequency setting unit 132 is a low-speed driving frequency, for example, 5 Hz, only images of 5 frames per second may be updated. As described above, in the case of a still image, by lowering the driving frequency, power consumption can be reduced.

In addition, when the driving frequency set by the driving frequency setting unit 132 is a high-speed driving frequency, for example, 120 Hz, images of 120 frames per second may be updated. As described above, in the case of moving pictures, by increasing the driving frequency, motion blur can be reduced.

<Second Example>

6 is a flowchart illustrating an operation of a timing controller according to a second embodiment of the present invention.

Referring to FIG. 6, the timing controller 130 may determine a mode whether an image signal is a still image or a moving image using an input data signal Data.

In the case of a still image after mode determination, it is driven at a low-speed driving frequency, divides the update section and the holding section based on 1 second, outputs the image in the update section, and turns off the power of the data driver 120 in the holding section. I can.

In addition, in the case of a video after mode determination, it is driven at a high-speed driving frequency, the update section and the holding section are divided based on 1 second, the video is continuously updated in the update section, and the power of the data driver 120 is increased for each holding section. You can turn it off.

7 is a block diagram of a timing controller according to an embodiment of the present invention.

Referring to FIG. 7, the timing controller 130 according to an embodiment of the present invention includes a frame comparison unit 131, a driving frequency setting unit 132, a system signal generation unit 133, a setting information storage unit 134, and A power control unit 135 may be provided.

The frame comparison unit 131 may compare the n-1 frame and the n frame to compare whether it is a moving image or a still image.

The frame comparison unit 131 may include a delay unit for delaying the n-1 frame and a comparison unit for comparing the n-1 and n frames delayed by the delay unit, and the n-1 frame It may include a storage unit for temporarily storing and a comparison unit for reading the n-1 frames stored in the storage unit and comparing them with n frames.

The frame comparison unit 131 may receive an n-1 frame and an n frame, compare them, and output an image discrimination signal DDS that determines whether it is a moving image or a still image as a result of the comparison.

The driving frequency setting unit 132 may receive an image discrimination signal DDS from the frame comparison unit 131 and set a driving frequency according to the image discrimination signal DDS.

The driving frequency setting unit 132 may set any one of a low-speed driving frequency that is a frequency lower than a basic driving frequency and a high-speed driving frequency that is a frequency higher than the basic driving frequency based on the image discrimination signal DDS.

The basic driving frequency may be set to a frequency of 60Hz, but is not limited thereto, and a frequency at which the flicker and afterimage are minimized may be preset as the basic driving frequency in consideration of flicker and afterimage of an image.

The low-speed driving frequency may be a frequency of 60 Hz or less.

The low-speed driving frequency may be a minimum frequency of 1 Hz.

The high-speed driving frequency may be a frequency greater than 60Hz, for example, 120Hz, 180Hz, or 240Hz.

The driving frequency setting unit 132 may output a frequency setting signal FES having information on a driving frequency set to one of a low-speed driving frequency and a high-speed driving frequency.

Meanwhile, the driving frequency setting unit 132 may perform a function of determining a driving frequency of the display device by analyzing characteristics of image data Data received from an external system.

Specifically, an image implemented by a display device has different characteristics in a degree of flicker depending on a driving frequency and a system. Accordingly, the driving frequency setting unit 132 may selectively determine the driving frequency according to the gray level section of the image, the number of pixels for each gray level section, and the closeness of the pixels. In this case, the frame comparison unit 131 Otherwise, it may be directly applied to the driving frequency setting unit 132.

The system signal generator 133 may set the gate and data control signals GCS and DCS, which are system signals, based on the frequency setting signal FES output from the driving frequency setting unit 132.

The system signal generation unit 133 reads information about a system signal from a setting information storage unit 134 that stores a system signal corresponding thereto based on the frequency setting signal (FES) to provide a gate and data control signal (GCS). , DCS) can be set.

The setting information storage unit 134 may store setting information that is a reference for generating the gate control signal GCS and the data control signal DSC in a lookup-table (LUT) method.

The setting information storage unit 134 may be implemented as a non-volatile memory such as an electrically erasable and programmable read only memory (EEPROM).

The power control unit 135 may output a power control signal (PCS) capable of controlling the power of the data driver 120 to the power unit 150 based on a system signal output from the system signal generation unit 133. have.

The power unit 150 may control power of the data driver 120 based on the power control signal PCS.

<Driving method of display device according to the second embodiment of the present invention>

8A and 8B are diagrams illustrating a method of updating an image at a high driving frequency.

Referring to FIG. 8A, the basic driving frequency is 60 Hz, and the driving frequency setting unit 132 sets the high-speed driving frequency. The first high-speed driving frequency may be 120 Hz, which is twice the basic driving frequency.

The system signal generation unit 133 generates a system control signal based on the frequency setting signal FES from the setting information storage unit 134 based on the frequency setting signal FES received from the driving frequency setting unit 132. You can refer to information about it.

When the setting information storage unit 134 is the first high-speed driving frequency, it is possible to store information for outputting only the number of frames updated per second from the basic driving frequency and holding the remaining period.

The system signal generation unit 133 refers to the setting information storage unit 134 to update a frame updated per second from a basic driving frequency to a first high-speed driving frequency and hold a data control signal ( DSC) can be output to the data driver 120.

That is, since the first high-speed driving frequency is 120 Hz, and the frequency corresponding to half of the frequency is 60 Hz, the image is outputted not 120 times per second, but 60 times per second. However, the updated video is updated 60 times every 1/120 sec. Accordingly, the image 60 times can be updated under the first high-speed driving frequency and held during the output time of the remaining frame 60 times.

In addition, the power control unit 135 powers the power control signal PCS to turn off the power of the data driver 120 in the frame held based on the data control signal DSC of the system signal generator 133. It can be output to the unit 150.

In addition, the polarity control signal POL may be output at a frequency corresponding to the first high-speed driving frequency. Thus, only the positive data signal is supplied in the update period in which the image is updated, and the polarity control signal (POL) refers to the negative polarity in the holding period, but since the data driver 120 is off, the actual data signal Is not displayed.

Also, as shown in 8b, the polarity control signal POL may be a basic driving frequency. Thus, the polarity of the data signal output from the data driver 120 may be changed for each image update period. That is, the polarity can be reversed every two frames.

9A and 9B are diagrams illustrating a method of updating an image at a high driving frequency.

Referring to FIG. 9A, the basic driving frequency is 60 Hz, and the driving frequency setting unit 132 sets the second high-speed driving frequency. The second high-speed driving frequency may be 180 Hz, which is three times the basic driving frequency.

The system signal generation unit 133 may refer to information on a system signal according to the frequency setting signal FES from the setting information storage unit 134 and output gate and data control signals GSC and DSC.

The data driver 120 may output images 60 times per second at the second high-speed driving frequency according to the data control signal DSC output from the system signal generator 133. In addition, for the remaining time, the data driver 120 may be in a holding state and the data driver 120 may be turned off by the power control unit 135 during the holding time.

Since the polarity control signal POL also has a second high-speed driving frequency, the polarity is reversed each time the image is updated, or the polarity control signal POL has a basic driving frequency as shown in FIG. You can make the polarity reverse each time it is updated.

<High speed drive mode>

The basic driving frequency is n (n is a natural number) Hz, and in the case of a moving picture, it may be set as a high-speed driving frequency by the driving frequency setting unit 132.

When the high-speed driving frequency has a frequency k (k is a natural number greater than or equal to 2) times the basic driving frequency, n images may be updated to a k*n frequency. In addition, the data driver 120 may be held in the remaining period, and the data driver 120 may be powered off in the holding period.

That is, when the high-speed driving frequency is k*n, each of the n images for 1 second may be updated for 1/(k*n) seconds according to the relational expression T=1/f between the period and the frequency. In addition, since the update period and the holding period for updating the image may occur alternately, after any one of the n images is updated, the corresponding image is held for 1/(k*n) *(k-1) time. , After another image is updated for 1/(k*n) seconds, a holding period may be formed for the corresponding image for 1/(k*n) *(k-1) time. In addition, the date driver 120 may be turned off during the holding period.

10 and 11 are diagrams illustrating a high-speed driving mode of a display device according to a second exemplary embodiment of the present invention.

Referring to FIG. 10, in the high-speed driving mode set as the high-speed driving frequency, when the high-speed driving frequency is 120 Hz and the basic driving frequency is 60 Hz, n is 60 and k is 2 in Equation 1/n.

In this case, 120 frames can be calculated numerically in 1 second. In addition, only 60 frames of the 120 frames are actually updated, and the remaining 60 frames may be a holding period.

In the x (x is a natural number)-th frame, the actual image data is updated to 120 Hz, and the updated time is 1/120 sec. In the next frame, the x+1th frame, the holding period is performed for 1/120sec. In this case, the image of the x-th frame is held on the display panel 100. In addition, since the new image of the x+2 th frame is updated and the holding period starts in the x+3 th frame, the updated image in the x+2 th frame may be maintained.

In this way, since each of the 60 images is updated for 1/120 sec, it has an update period for a total of 1/60 sec, a holding period for the remaining 1/60 sec period, and the data driver 120 during the holding period. The power can be turned off.

Referring to FIG. 11, in the high-speed driving mode set as the high-speed driving frequency, when the high-speed driving frequency is 180 Hz and the basic driving frequency is 60 Hz, n is 60 and k is 3 in Equation 1/n.

In this case, 180 frames can be calculated numerically in 1 second. In addition, only 60 frames of the 180 frames are actually updated, and the remaining 120 frames may be a holding period.

In the X (where x is a natural number)-th frame, the actual image data is updated to 180 Hz, and the updated time is 1/180 sec. In addition, a holding period may be formed for 1/180 sec in the next frame x+1 th frame, and a holding period may be formed for 1/80 sec in the next frame x+2 th frame. That is, the holding period is performed for a total of 1/90sec according to Equation 1/(k*n) *(k-1) described above. In this case, the image of the xth frame is held on the display panel 100 even during the x+1 and x+2th frames.

In this way, since each of the 60 images is updated for 1/180 sec, it has an update period for a total of 1/30 sec, a holding period for the remaining 2/30 sec, and the data driver 120 during the holding period. The power can be turned off.

On the other hand, when the data voltage charged in the liquid crystal cell (CLC) on the display panel 100 is maintained for one frame based on 60Hz, the sum of both the image update period and the holding period at the high-speed driving frequency is substantially equal to 60Hz. Therefore, the updated image may still be maintained on the display panel 100 even in the holding period.

<Slow drive mode>

The basic driving frequency is n (n is a natural number) Hz, and in the case of a still image, it may be set as a low-speed driving frequency by the driving frequency setting unit 132.

For example, when the basic driving frequency is n Hz and the low-speed driving frequency is set to m (m is a natural number less than n) Hz, m images per second may be updated. In this case, each of the m images may be updated at 1/n sec, and may be held for the rest of the time. That is, since each of the nm frames has a holding period for 1/n sec, n/m-1 frames are 1/n*(n/m-1) sec after one image is updated for 1/n sec. During the holding period is formed, and the holding period is formed for 1/n*(n/m-1) sec after another image is updated for 1/n sec, the update period and the holding period may be repeated.

For example, when the low-speed driving frequency is 1 Hz, 1/60 sec of one second for updating and holding one image may be an update period, and the remaining 59/60 sec may be a holding period. In addition, the power of the data driver 120 may be turned off during the holding period.

12 and 13 are diagrams illustrating a low speed driving mode of a display device according to a second exemplary embodiment of the present invention.

Referring to FIG. 12, when the basic driving frequency is 60 Hz and the low-speed driving frequency is set to 6 Hz, 6 images per second may be updated. In this case, the first image is updated for 1/60 sec in the x-th frame, and the holding period is performed 9 times for the remaining 1/60 sec. Therefore, a holding period is performed for a total of 9/60 sec x+1 to x+10th frames. In addition, the second image is updated in the x+11th frame, and a holding period of the x+12 to x+20th frames is performed again for 9/60 sec.

In this case, in the holding period, the image immediately before the start of the holding period is maintained on the display panel 100 as a holding state, and the power of the data driver 120 may be turned off.

Referring to FIG. 13, when the basic driving frequency is 60 Hz and the low-speed driving frequency is set to 1 Hz, one image per second may be updated.

In this case, the data voltage is applied to the thin film transistors T along all the gate lines GL for 1/60 sec, and the applied image data is maintained as a holding period for the remaining 59/60 sec, and the data driver ( 120) can be turned off.

Meanwhile, it has been described that the power of the data driver 120 is turned off according to the control of the power control unit 135, but is not limited thereto, and the gamma voltage setting unit 140 also turns off power during the holding period to further reduce power consumption. Can be reduced.

As described above, according to the embodiment of the present invention, power consumption can be reduced by dividing the update period and the holding period and powering off the data driver 120 during the holding period. In addition, in the case of a still image, power consumption can be reduced by performing a low-speed driving mode.

In addition, even in the high-speed driving mode, the image data is updated to the level of the number of images that are updated at the basic driving frequency in which flicker and afterimages are not a problem, and by placing a holding interval in the remaining intervals, it is possible to reduce power consumption while maintaining image optimization. have.

In the detailed description of the present invention described above, it has been described with reference to preferred embodiments of the present invention, but those skilled in the art or those of ordinary skill in the relevant technical field of the present invention described in the claims to be described later It will be appreciated that various modifications and changes can be made to the present invention without departing from the spirit and technical scope. Accordingly, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be determined by the claims.

100 display panel
110 gate driver
120 data driver
130 timing controller
131 frame comparison unit
132 Driving frequency setting unit
133 System signal generator
134 Setting information storage unit
135 Power control unit
140 Gamma voltage setting unit
150 power
160 converter

Claims (18)

Display panel;
A data driver that applies an image signal to the display panel; And
A timing controller for controlling the data driver to alternately repeat an image update period and a holding period in which the updated image is held,
The timing controller includes a driving frequency setting unit for setting a driving frequency of the display panel,
When the video signal is a video, the driving frequency setting unit sets the driving frequency to a high-speed driving frequency of k (k is a natural number of 2 or more)*n Hz, which is higher than the fundamental frequency of n (n is a natural number) Hz,
When the video signal is the video, the video update section is a section in which any one of n videos is updated for 1/(k*n) seconds,
The holding period is a period in which the updated image is held for 1/(k*n)*(k-1) seconds after any one of the n images is updated,
When the video signal is the video, the timing controller turns off the power of the data driver during the holding period. The method of claim 1,
When the image signal is a still image, the timing controller turns off the power of the data driver during the holding period. The method of claim 2,
The timing controller,
A frame comparison unit comparing a previous frame and a current frame to determine a moving image and a still image; And
Further comprising a system signal generation unit for generating a data control signal to be supplied to the data driver based on the frequency setting signal from the driving frequency setting unit,
The display device, wherein the driving frequency setting unit sets a driving frequency of the display panel based on an image discrimination signal from the frame comparison unit. The method of claim 3,
The timing controller,
A power control unit that is controlled by the system signal generator to control power of the data driver. The method of claim 4,
The timing controller,
And a setting information storage unit for storing a system signal corresponding to the frequency setting signal. The method of claim 5,
The system signal generation unit generates the data control signal by referring to the setting information storage unit. The method of claim 3,
The driving frequency setting unit,
When the video signal is a still image, a display device configured to set a driving frequency of the display panel to a low-speed driving frequency lower than the fundamental frequency. delete delete delete The method of claim 7,
The display device wherein the fundamental frequency is n (n is a natural number) Hz, and the low-speed driving frequency is m (m is a natural number less than n) Hz. The method of claim 11,
When the video signal is a still image, the video update section,
A display device in which one of the m images is updated for 1/n seconds. The method of claim 12,
When the video signal is a still image, the holding period,
A display device in which the updated image is held for 1/n*(n/m-1) sec seconds after any one of the m images is updated. The method of claim 1,
And a gamma voltage setting unit generating a plurality of gamma voltages and supplying them to the data driver, wherein the timing controller turns off power of the gamma voltage setting unit during the holding period. Display panel;
A data driver that applies an image signal to the display panel; And
A timing controller for controlling the data driver to alternately repeat an image update period and a holding period in which the updated image is held; and
The timing controller,
Analyzing the image signal to separate a moving image and a still image to control the data driver at different driving frequencies,
When the video signal is the video, the driving frequency is set to a high-speed driving frequency of k (k is a natural number of 2 or more)*n Hz, which is higher than the fundamental frequency of n (n is a natural number) Hz,
When the video signal is the video, the video update section is a section in which any one of n videos is updated for 1/(k*n) seconds, and the holding section is any one of the n videos After this update, the updated video is held for 1/(k*n)*(k-1) seconds,
When the video signal is the video, the timing controller turns off the power of the data driver during the holding period. The method of claim 15,
The timing controller,
A display device configured to set the driving frequency to a low-speed driving frequency lower than the fundamental frequency in the still image. delete The method of claim 16,
The fundamental frequency is n (n is a natural number) Hz, and the low-speed driving frequency is m (m is a natural number less than n) Hz,
In the still image, the image update period is a period in which any one image among m images is updated for 1/n seconds,
In the still image, the holding period is a period in which the updated image is held for 1/n*(n/m-1) sec seconds after any one of the m images is updated.

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