KR102177315B1 - Input/output interceptor logic including flush control logic, and computer-implemented method using the input/output interceptor logic - Google Patents

Abstract

The present invention provides an input/output interceptor logic including an input/output interface, one or more temporary write holding buffers, an order change logic unit, and a flush control logic unit. The input/output interface intercepts a plurality of write inputs and outputs and a plurality of flush requests from an application. The temporary write holding buffer stores write inputs and outputs provided from the input/output interface. The order change logic unit changes the order of write inputs/outputs stored in the temporary write holding buffer, and generates a combined write input/output by combining write inputs/outputs of the changed order. The flush control logic unit notifies the application of the completion of write I/Os on write I/Os before storing the write I/Os in the nonvolatile storage device, and at least one of a flush request selected from among the flush requests, a threshold amount of accumulated data, and expiration of a set time. In response, the combined write input/output is caused to be stored in the nonvolatile storage device. According to the present invention, data storage performance can be improved by reducing the overhead generated by each of individual write inputs and outputs.

Description

Input/output interceptor logic including flush control logic, and a computer-implemented method using the input/output interceptor logic {INPUT/OUTPUT INTERCEPTOR LOGIC INCLUDING FLUSH CONTROL LOGIC, AND COMPUTER-IMPLEMENTED METHOD USING THE INPUT/OUTPUT INTERCEPTOR LOGIC}

The present invention relates to a storage technique provided in a computer, and more specifically, a flush control logic embedded in a storage stack of a computerized device such as a mobile phone or a tablet. Logic) using input/output interceptor (Interceptor) logic.

There is an increasing demand for improving the performance of mobile devices such as mobile phones and tablets. Functions performed by various separate devices such as cameras, calculators, personal computers, servers, and GPS (Global Positioning System) devices have recently been integrated and handled by mobile devices. In mobile devices, while the performance of the processor and the wireless transmission speed of data are steadily improving, the performance of the local storage stack has not improved as fast. The flush request, which is used to ensure data consistency, is an obstacle to performance improvement. This is because I/O is interrupted while the flush command is being executed. As a result, the storage stack and the local storage devices associated therewith have become a bottleneck of the performance of the mobile device.

To solve the above problems, input/output interceptor logic using flush control logic is provided. In an embodiment of the present invention, the flush control logic may notify the application of the completion of the write input/output before storing the write input/output generated from the application in the nonvolatile storage device. The write inputs and outputs are accumulated in the temporary write holding buffer until the Nth flush request selected from among the flush requests of the application occurs, and may be combined into one write input/output. The flush control logic may transmit the combined write input/output to the nonvolatile storage device in response to the selected N-th flush request.

An input/output interceptor logic according to an embodiment of the present invention includes: an input/output interface connected to communicate with a storage stack and configured to intercept a plurality of write input/output and a plurality of flush requests from an application; One or more temporary write holding buffers configured to receive a plurality of write inputs/outputs from the input/output interface and store a plurality of write inputs/outputs; It is connected to communicate with one or more temporary write holding buffers, and is configured to change the order of the plurality of write inputs and outputs stored in the one or more temporary write holding buffers and combine the plurality of write inputs and outputs in the changed order to generate a combined write input/output. An order change logic unit; And receiving multiple flush requests from the I/O interface, notifying the application of the completion of write I/Os for multiple write I/Os without storing the plurality of write I/Os in the nonvolatile storage device, and responding to a selected flush request from among the plurality of flush requests. A flush control logic unit configured to cause the combined write input/output to be stored in the nonvolatile storage device may be included.

As an embodiment, the selected flush request corresponds to an Nth flush request among a plurality of flush requests, and N may have a positive integer value selected in advance.

As an embodiment, the selected flush request corresponds to an Nth flush request among a plurality of flush requests, and N may be an integer of 3 or more.

As an embodiment, the input/output interface includes: a first subset of data write inputs/outputs among a plurality of write inputs/outputs, a first flush request among a plurality of flush requests, a first subset of metadata write inputs/outputs among a plurality of write inputs/outputs, and a plurality of flush requests. Configuration to intercept a second flush request, a second subset of data write I/O among a plurality of write I/Os, a third flush request among a plurality of flush requests, a second subset of metadata write I/O among a plurality of write I/Os, and a selected flush request Can be.

As an embodiment, the order change logic unit: a plurality of write inputs/outputs included in a first subset of data write inputs/outputs, a first subset of metadata write inputs/outputs, a second subset of data write inputs/outputs, and a second subset of metadata write inputs/outputs Arranging logical block addresses related to a plurality of write inputs/outputs in ascending or descending order by changing the order of; Combined write by combining a plurality of write inputs and outputs in a changed order included in the first subset of data write input/output, the first subset of metadata write input/output, the second subset of data write input/output, and the second subset of metadata write input/output It can be configured to generate input and output.

As an embodiment, the order change logic unit is configured to generate a combined write input/output by copying a plurality of write inputs/outputs, headers, and footers to the remapping memory unit, each corresponding to a plurality of write inputs/outputs included in the combined write inputs/outputs A plurality of logical block addresses are arranged in an ascending or descending order, and each of the plurality of write inputs and outputs included in the combined write inputs and outputs may be physically adjacent to each other in the remap memory unit.

As an embodiment, the flush control logic unit: In response to the selected flush request, a combined write input/output including a plurality of write inputs and outputs, each of which is physically adjacent to each other, may be stored in a nonvolatile storage device.

As an embodiment, the order change logic unit: may be configured to convert random write inputs/outputs included in a plurality of write inputs/outputs into sequential write inputs/outputs.

An input/output interceptor logic according to another embodiment of the present invention may include: an input/output interface connected to communicate with a storage stack and configured to intercept a plurality of write input/output and a plurality of flush requests from an application; A plurality of temporary write holding buffers configured to receive a plurality of write inputs/outputs from the input/output interface and store a plurality of write inputs/outputs; A multi-buffer holding queue configured to hold a plurality of temporary write holding buffers; And receiving multiple flush requests from the I/O interface, notifying the application of the completion of write I/Os for multiple write I/Os without storing the plurality of write I/Os in the nonvolatile storage device, and responding to a selected flush request from among the plurality of flush requests. The multi-buffer holding queue may include a flush control logic unit configured to transfer a plurality of write inputs/outputs from the plurality of temporary write holding buffers to the nonvolatile storage device.

As an embodiment, the input/output interface includes: a first subset of data write inputs/outputs among a plurality of write inputs/outputs, a first flush request among a plurality of flush requests, a first subset of metadata write inputs/outputs among a plurality of write inputs/outputs, and a plurality of flush requests. Configuration to intercept a second flush request, a second subset of data write I/O among a plurality of write I/Os, a third flush request among a plurality of flush requests, a second subset of metadata write I/O among a plurality of write I/Os, and a selected flush request Can be.

As an embodiment, the plurality of temporary write holding buffers may include a first temporary write holding buffer, a second temporary write holding buffer, a third temporary write holding buffer, and a fourth temporary write holding buffer. Further, the flush control logic unit: causes a first subset of data write input/output to be stored in a first temporary write holding buffer, a first subset of metadata write input/output is stored in a second temporary write holding buffer, and The second subset may be stored in the third temporary write holding buffer, and the second subset of metadata write input/output may be stored in the fourth temporary write holding buffer.

According to another embodiment of the present invention, a computer-implemented method for intercepting inputs and outputs from an application using an input/output interceptor logic is to perform a plurality of write inputs and outputs and a plurality of flush requests from an application by an input/output interface of the input/output interceptor logic. Intercepting; Storing a plurality of write inputs/outputs intercepted by the input/output interface in one or more temporary write holding buffers; Changing an order of a plurality of write inputs/outputs stored in one or more temporary write holding buffers by an order change logic unit of the input/output interceptor logic; Generating a combined write input/output by combining a plurality of write inputs and outputs in a changed order, by an order change logic unit; Receiving a plurality of flush requests from an input/output interface by a flush control logic unit of the input/output interceptor logic; Not storing the plurality of write inputs/outputs in the nonvolatile storage device, but notifying the application of completion of write inputs and outputs for the plurality of write inputs/outputs by the flush control logic unit; And in response to a flush request selected from among a plurality of flush requests, allowing the combined write input/output to be stored in the nonvolatile storage device by the flush control logic unit.

As an embodiment, the intercepting step includes: a first subset of data write input/output among a plurality of write input/output, a first flush request among a plurality of flush requests, and a first subset of metadata write input/output among a plurality of write input/output by an input/output interface , A second flush request among a plurality of flush requests, a second subset of data write input/output among a plurality of write inputs and outputs, a third flush request among a plurality of flush requests, a second subset of metadata write input/output among a plurality of write inputs, and a selected Intercepting the flush request may be included.

As an embodiment, the changing steps include: a first subset of data write input/output, a first subset of metadata write input/output, a second subset of data write input/output, and a second subset of metadata write input/output, by an order change logic unit. It may include changing the order of a plurality of write input/output included in the. Further, the steps of generating are: included in a first subset of data write input/output, a first subset of metadata write input/output, a second subset of data write input/output, and a second subset of metadata write input/output by the order change logic unit. A combined write input/output may be generated by combining a plurality of write input/output in a changed order.

As an embodiment, the generating step includes: generating a combined write input/output by copying a plurality of write input/output, header, and footer to a remapping memory unit by an order change logic unit, A plurality of logical block addresses respectively corresponding to the included plurality of write inputs and outputs are arranged in an ascending or descending order, and each of the plurality of write inputs and outputs included in the combined write inputs and outputs may be physically adjacent to each other in the remap memory unit.

As an embodiment, the step of causing the storage to be stored includes: In response to the selected flush request, the combined write input/output including a plurality of write input/outputs each physically adjacent to each other is stored in the nonvolatile storage device by the flush control logic unit. It may include the step of.

A storage medium that is non-temporarily read by a computer according to another embodiment of the present invention may store instructions processed using a computing device and input/output interceptor logic. The stored instructions include: intercepting a plurality of write inputs and outputs and a plurality of flush requests from an application executed in the computing device by an input/output interface of the input/output interceptor logic; Storing a plurality of write inputs/outputs intercepted by the input/output interface in one or more temporary write holding buffers; Changing an order of a plurality of write inputs/outputs stored in one or more temporary write holding buffers by an order change logic unit of the input/output interceptor logic; Generating a combined write input/output by combining a plurality of write inputs and outputs in a changed order, by an order change logic unit; Receiving a plurality of flush requests from an input/output interface by a flush control logic unit of the input/output interceptor logic; Not storing the plurality of write inputs/outputs in the nonvolatile storage device, but notifying the application of completion of write inputs and outputs for the plurality of write inputs/outputs by the flush control logic unit; And in response to a flush request selected from among the plurality of flush requests, the flush control logic unit may be configured to perform the step of storing the combined write input/output in the nonvolatile storage device in the computing device.

According to another embodiment of the present invention, a computer-implemented method for intercepting inputs and outputs from an application using an input/output interceptor logic provides a plurality of write inputs and outputs and a plurality of flush requests from the application by the input/output interface of the input/output interceptor logic. Intercepting; Storing a plurality of write inputs/outputs intercepted by the input/output interface in a plurality of temporary write holding buffers; Holding a plurality of temporary write holding buffers by a multi-buffer holding queue of the input/output interceptor logic; Receiving a plurality of flush requests from an input/output interface by a flush control logic unit of the input/output interceptor logic; Not storing the plurality of write inputs/outputs in the nonvolatile storage device, but notifying the application of completion of write inputs and outputs for the plurality of write inputs/outputs by the flush control logic unit; And in response to a flush request selected from among the plurality of flush requests, allowing the multi-buffer holding queue to transfer the plurality of write inputs/outputs from the plurality of temporary write holding buffers to the nonvolatile storage device by the flush control logic unit. have.

As an embodiment, the intercepting step includes: a first subset of data write input/output among a plurality of write input/output, a first flush request among a plurality of flush requests, and a first subset of metadata write input/output among a plurality of write input/output by an input/output interface , A second flush request among a plurality of flush requests, a second subset of data write input/output among a plurality of write inputs and outputs, a third flush request among a plurality of flush requests, a second subset of metadata write input/output among a plurality of write inputs, and a selected Intercepting the flush request may be included.

As an embodiment, the plurality of temporary write holding buffers may include a first temporary write holding buffer, a second temporary write holding buffer, a third temporary write holding buffer, and a fourth temporary write holding buffer. Further, the storing step may include: by the flush control logic unit, a first subset of data write input/output is stored in a first temporary write holding buffer, and a first subset of metadata write input/output is stored in a second temporary write holding buffer. And allowing a second subset of data write input/output to be stored in a third temporary write holding buffer, and causing the second subset of metadata write input/output to be stored in a fourth temporary write holding buffer.

A storage medium that is non-temporarily read by a computer according to another embodiment of the present invention may store instructions processed using a computing device and input/output interceptor logic. The stored instructions include: intercepting a plurality of write inputs and outputs and a plurality of flush requests from an application executed in the computing device by an input/output interface of the input/output interceptor logic; Storing a plurality of write inputs/outputs intercepted by the input/output interface in a plurality of temporary write holding buffers; Holding a plurality of temporary write holding buffers by a multi-buffer holding queue of the input/output interceptor logic; Receiving a plurality of flush requests from an input/output interface by a flush control logic unit of the input/output interceptor logic; Not storing the plurality of write inputs/outputs in the nonvolatile storage device, but notifying the application of completion of write inputs and outputs for the plurality of write inputs/outputs by the flush control logic unit; And in response to a flush request selected from among the plurality of flush requests, allowing the multi-buffer holding queue to transfer the plurality of write inputs and outputs from the plurality of temporary write holding buffers to the nonvolatile storage device by the flush control logic unit. It can be configured to run.

A system according to another embodiment of the present invention includes a mobile device including an application space, a kernel space, and one or more physical hardware devices; And an input/output interceptor logic unit configured to operate in a kernel space. In this embodiment, the input/output interceptor logic unit includes: an input/output interface connected to communicate with the storage stack and configured to intercept a plurality of write input/output and a plurality of flush requests from an application in an application space; One or more temporary write holding buffers configured to receive a plurality of write inputs/outputs from the input/output interface and store a plurality of write inputs/outputs; It is connected to communicate with one or more temporary write holding buffers, and is configured to change the order of the plurality of write inputs and outputs stored in the one or more temporary write holding buffers and combine the plurality of write inputs and outputs in the changed order to generate a combined write input/output. An order change logic unit; And receiving a plurality of flush requests from the input/output interface, not storing the plurality of write inputs and outputs in a nonvolatile storage device included in one or more physical hardware devices, and notifying the application of the completion of write inputs and outputs for the plurality of write inputs/outputs, and A flush control logic unit configured to cause the combined write input/output to be stored in the nonvolatile storage device in response to a flush request selected from among flush requests of may be included.

According to an embodiment of the present invention, data storage performance may be improved by reducing an overhead that occurs when each individual write input/output is independently transmitted to a nonvolatile storage device. Furthermore, since data can be recorded more efficiently, power consumption (eg, consumption of a battery included in a mobile device) can be reduced.

1 is a block diagram showing a system stack according to an embodiment of the present invention.
FIG. 2 is a conceptual diagram illustrating various components included in the system stack of FIG. 1.
3 is a conceptual diagram illustrating a re-order logic unit and a temporary write holding buffer included in the input/output interceptor logic unit of FIGS. 1 and 2.
4 is a conceptual diagram illustrating an order change logic unit included in the input/output interceptor logic unit of FIGS. 1 and 2 and a re-mapped memory unit.
5 is a conceptual diagram illustrating a flush control logic unit and temporary write holding buffers included in the input/output interceptor logic unit of FIGS. 1 and 2.
6 is another conceptual diagram illustrating a flush control logic unit and temporary write holding buffers included in the input/output interceptor logic unit of FIGS. 1 and 2.
7 to 12 are conceptual diagrams illustrating various devices in which the input/output interceptor logic unit of FIG. 1 may be embedded according to an embodiment of the present invention.
13 is a flowchart illustrating a method of intercepting inputs and outputs from an application using an input/output interceptor logic unit according to an embodiment of the present invention.
14 is a flowchart illustrating another method of intercepting inputs and outputs from an application using an input/output interceptor logic unit according to an embodiment of the present invention.
15 is a block diagram illustrating a computing system including an input/output interceptor logic unit according to an embodiment of the present invention.

The above-described characteristics and the detailed description below are all exemplary matters to aid in the description and understanding of the present invention. That is, the present invention is not limited to this embodiment and may be embodied in other forms. The following embodiments are merely examples for completely disclosing the present invention, and are explanations for conveying the present invention to those skilled in the art to which the present invention pertains. Accordingly, when there are multiple methods for implementing the constituent elements of the present invention, it is necessary to clarify that the present invention can be implemented in any of the specific ones or equivalents thereof.

In the present specification, when there is a mention that a certain component includes specific elements, or when there is a mention that a certain process includes specific steps, it means that other elements or other steps may be further included. That is, terms used in the present specification are only for describing specific embodiments, and are not intended to limit the concept of the present invention. Furthermore, examples described to aid in understanding the invention also include complementary embodiments thereof.

Terms used in the present specification have the meanings generally understood by those of ordinary skill in the art to which the present invention belongs. Terms commonly used should be interpreted in a consistent sense according to the context of the present specification. In addition, terms used in the present specification should not be interpreted as excessively ideal or formal meanings unless the meaning is clearly defined.

An embodiment of the present invention may be implemented by a processor such as an ARM processor. Other types of processors or application specific integrated circuits (ASICs) and/or firmware may also be used to implement an embodiment of the present invention. Embodiments of the present invention may be implemented in processors and/or memory modules of various mobile devices such as smart phones, tablets, notebook computers, etc., or various fixed devices such as desktop computers and routers. Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

1 is a block diagram showing a system stack according to an embodiment of the present invention. The system stack 100 may include an application space 105, a kernel space 110, and physical hardware devices 115. According to an embodiment of the present invention, the input/output interceptor logic unit 120 may operate within the kernel space 110. In another embodiment, the input/output interceptor logic unit 120 may operate within the application space 105 or may be embedded in a different part or space of another suitable computing device and operated. The system stack 100 may be included in a mobile device such as, for example, a smartphone, tablet, camera, laptop, computer, and the like, which will be described further below.

As shown in FIG. 1, the system stack 100 may include a storage stack 125. The storage stack 125 performs input/output between one or more applications 130 (eg, the application 132) of the application space 105 and one or more nonvolatile storage devices 135 of the physical hardware devices 115. Transmit and receive can be enabled. The one or more nonvolatile storage devices 135 may include a solid state drive (SSD) 140, a flash memory 145, a hard disk drive (HDD) 150, and the like.

The input/output interceptor logic unit 120 includes an input/output interface 155, one or more temporary write holding buffers 160, a re-order logic unit 165, and a flush. A (Flush) control logic unit 170 may be included. The input/output interface 155 may be connected to and communicate with the storage stack 125. The input/output interceptor logic unit 120 may intercept all inputs and outputs generated from the applications 130 (eg, the application 132), including flush requests. For example, the input/output interface 155 may intercept write input/output, read input/output, and flush requests generated from applications 130 (eg, the application 132).

One or more temporary write holding buffers 160 may receive write inputs and outputs from the input/output interface 155 and store the write inputs and outputs. One or more temporary write holding buffers 160 may be pre-allocated from the free space of the system memory.

The order change logic unit 165 may be connected to and communicate with one or more temporary write holding buffers 160. The order change logic unit 165 may change the order of write inputs/outputs stored in one or more temporary write holding buffers 160. The order change logic unit 165 may generate a combined write input/output by combining the write inputs and outputs of the changed order, which will be described later.

The flush control logic unit 170 may receive flush requests from the input/output interface 155. Even if the write inputs and outputs are not actually written to any of the one or more nonvolatile storage devices 135, the flush control logic unit 170 determines the completion of write inputs and outputs for the write inputs and outputs to the applications 130 (eg, the application 132 ). I can tell. In practice, while write inputs and outputs are not transmitted to the one or more nonvolatile storage devices 135 at a specific time, the application 132 may recognize that the write inputs and outputs are completed. In other words, before the write inputs and outputs are actually written to somewhere among the one or more nonvolatile storage devices 135, the flush control logic unit 170 may notify the application 132 of the completion of write inputs and outputs related to the write inputs and outputs. The flush control logic unit 170 may cause the combined write input/output to be written to the one or more nonvolatile storage devices 135 in response to the N-th flush request selected from among the flush requests (or according to other criteria). , Which will be explained further later.

FIG. 2 is a conceptual diagram illustrating various components included in the system stack of FIG. 1. 2 is a view showing a series of events occurring over time according to an embodiment of the present invention.

The input/output interface 155 includes, for example, data write inputs/outputs D1 generated from the application 132; that is, W0 ¹ to Wn ³ , and metadata write inputs/outputs M1; that is, W0 ⁴ to Wn. ⁶ ), data write inputs/outputs (D2; i.e., W0 ⁷ to Wn ⁹ ), metadata write inputs/outputs (M2; i.e., W0 ¹⁰ to Wn ¹² ), and flush requests (F0, F1, F2, F3, Fn) Write inputs and outputs including) can be intercepted. One or more temporary write holding buffers 160 may receive write inputs and outputs from the input/output interface 155 and store the write inputs and outputs. When a read input/output is provided from the application 132 while data is stored in one or more temporary write holding buffers 160, the input/output interceptor logic unit 120 is stored in one or more temporary write holding buffers 160. A copy of the data can be used to process read I/O requests, or a re-mapped memory location can be used, which will be explained further later.

The order change logic unit 165 may change the order of write inputs/outputs stored in one or more temporary write holding buffers 160, which will be described later. The order change logic unit 165 may convert random write inputs/outputs into sequential write inputs/outputs. The order change logic unit 165 may generate a combined write input/output (CW) by combining write input/outputs (eg, D1, M1, D2, and M2) of a changed order.

The flush control logic unit 170 may receive flush requests F0, F1, F2, F3, and Fn from the input/output interface 155. Even if the write inputs and outputs are not actually written somewhere among the one or more nonvolatile storage devices 135, the flush control logic unit 170 uses completion messages (CM0, CM1, CM2, CM3, CMn) corresponding to the write inputs and outputs. Thus, the completion of write input/output may be notified to the application 132. In other words, the flush control logic unit 170 may respond almost immediately to each of the flush requests. As a result, the application 132 may continue to transmit additional write inputs/outputs without waiting for the flush request to actually be completed for one of the nonvolatile storage devices 135. Accordingly, the performance of the application 132 can be remarkably improved. In other words, before the write inputs and outputs are actually written to somewhere among the one or more nonvolatile storage devices 135, the flush control logic unit 170 performs completion messages CM0, CM1, CM2, CM3, and CMn corresponding to the write inputs and outputs. ) Can be used to notify the application 132 of completion of write input/output regarding write input/output.

Since the write inputs and outputs are stored in the one or more temporary write holding buffers 160, the flush control logic unit 170 returns the combined write inputs and outputs (CW) to one or more nonvolatile storage devices 135 after a little more time elapses. It can actually be written to the flush (CFn) passed to it. In other words, the flush control logic unit 170 may implement a selective flush technique. The transferred flush (CFn) may be a synchronous operation.

Since the size of the combined write input/output (CW) is larger than the size of the individual write inputs/outputs, the overhead that occurs as each of the individual write inputs/outputs is independently transmitted to the nonvolatile storage devices 135 is reduced, Storage performance is improved. Further, since write inputs and outputs can be completed in a system memory having significantly higher performance (ie, high throughput and low latency) than the nonvolatile storage devices 135, performance of an application is significantly improved.

In addition, the forwarded flush (CFn) of the combined write input/output (CW) is with or after the flush boundary (Fn) (e.g. in response to the selected Nth flush (Fn)). As it occurs, the data can remain consistent. Even if data is lost due to a sudden power loss, data of the nonvolatile storage devices 135 can be maintained consistently. The application can accommodate the loss of data. This is because the application can read the data stored in the nonvolatile storage devices 135 and restore the state of the application based on the stored data or can roll back in another way. However, inconsistency of data is usually not accepted by the application and can lead to unpredictable behaviors or even make the application inoperable. According to an embodiment of the present invention, by accumulating write inputs/outputs between transmitted flushes (eg, CF0 and CFn) and flushing the combined write input/output data to the nonvolatile storage devices 135, data consistency is achieved. Guaranteed.

The one or more nonvolatile storage devices 135 may return flush confirmation messages CFM0 and CFMn. The flush confirmation messages CFM0 and CFMn are provided to the input/output interceptor logic unit 120 to confirm that the transaction of each of the flushes CF0 and CFn delivered to the nonvolatile storage devices 135 has been completed. Can be used. Thereby, synchronous flush operations can be provided. In other words, during a specific synchronous flush operation, write inputs and outputs (D1, M1, D2, M2) and flush requests (F1, F2, F3) that are not transmitted without configuring the specific flush operation are It is accumulated until another synchronous flush operation subsequent to the flush operation is performed, but is not actually flushed to the nonvolatile storage devices 135.

At any point in time, no matter how sudden power loss occurs, the data can remain consistent. In other words, metadata paired with data may always be stored in one or more nonvolatile storage devices 135. In other words, it cannot occur when metadata is stored in one or more nonvolatile storage devices 135 without data corresponding thereto. As a result, according to an embodiment of the present invention, data consistency can be maintained while remarkably improving performance of an application and a storage stack.

Furthermore, since those that are flush requests that are originally to be delivered (eg, F1, F2, and F3) can be converted into flush requests that are not to be delivered, the breadth of opportunities to change the order of write I/Os is expanded. Usually, the order of write inputs and outputs can only be changed between flush boundaries (eg, between F0 and F1). However, in an embodiment of the present invention, normal flush requests (e.g., F1, F2, and F3) are changed to flush requests that will not be delivered, and the order of write I/Os spans the boundaries of the flush requests that will not be delivered ( That is, between F0 and Fn) across F1, F2, and F3. This is because the flushes that are actually delivered (eg, CF0 and CFn) occur over an extended time width.

In other words, the number of write I/Os between two delivered flushes (e.g., CF0 and CFn) is between two undelivered flush requests that occur frequently in a shorter time span (e.g., between F0 and F1, F1 Between F2 and F2, between F2 and F3, etc.). By expanding the range of opportunities to change the order of write inputs and outputs, performance can be further improved. This is because the order of the write inputs and outputs may be changed so that the write inputs and outputs can be more efficiently written to the nonvolatile storage devices 135 and can be combined into one write input/output of a larger size.

The flush control logic unit 170 may cause the combined write input/output (CW) to be written to the one or more nonvolatile storage devices 135 in response to the Nth flush request (eg, Fn) selected from among the flush requests. As an example, the N-th flush request to be selected may be predetermined, and N may be a predetermined positive integer. For example, N may be an integer of 3 or more. For example, N may be an integer such as 4, 5, 8, 10, 16, 20, 32, 64, 100, and the like. N can be set to any suitable value among positive integers. The number of N flush requests accumulated before the transmitted flush (CFn) occurs may be predetermined before operation. Alternatively, the number of N flush requests accumulated before the transmitted flush (CFn) occurs may have a configurable value that can be modified by a user or a system administrator.

Alternatively, the flush control logic unit 170 writes the write input/output (CW) combined with the flush (CFn) delivered in response to a threshold amount of accumulated data to one or more nonvolatile storage devices 135 You can do it. In other words, when the amount of accumulated data reaches the threshold amount, the flush control logic unit 170 may generate a flush CFn to be transmitted.

Alternatively, the flush control logic unit 170 may write the write input/output CW to which the transmitted flush CFn is combined in the one or more nonvolatile storage devices 135 in response to expiration of the set time. The set time may be set in units of seconds, such as 5 seconds, 10 seconds, 30 seconds, 60, etc. This improves performance and maintains data consistency while reducing the possibility of data loss in the event of sudden power loss.

Alternatively, the flush control logic unit 170 is a flush (CFn) transmitted in response to the satisfaction of the first criterion regarding the threshold amount of accumulated data and the satisfaction of the second criterion for the N-th flush request selected thereafter. The combined write input/output CW may be written to one or more nonvolatile storage devices 135. In other words, when both criteria are satisfied, a transferred flush (CFn) may occur.

The input/output interface 155 of the input/output interceptor logic unit 120 includes a first subset of data write inputs/outputs (D1), a first flush request (F1), a first subset of metadata write inputs/outputs (M1), and a second flush request ( F2), a second subset of data write inputs/outputs (D2), a third flush request (F3), a second subset of metadata write inputs/outputs (M2), and a selected N-th flush request (Fn) may be provided.

The order change logic unit 165 includes a first subset of data write inputs/outputs (D1), a first subset of metadata write inputs/outputs (M1), a second subset of data write inputs/outputs (D2), and a second subset of metadata write inputs/outputs. The order of write inputs/outputs included in the subset M2 may be changed. In other words, the order change logic unit 165 may change the order of write inputs/outputs included in each subset or change the order of write inputs/outputs across several subsets. The order change logic unit 165 includes a first subset of data write inputs/outputs (D1), a first subset of metadata write inputs/outputs (M1), a second subset of data write inputs/outputs (D2), and a second subset of metadata write inputs/outputs. The subset M2 may be combined to generate a combined write input/output CW. The order change logic unit 165 may insert a header (HDR) and a footer (FTR) into the combined write input/output 225, which will be further described later.

3 is a conceptual diagram illustrating an order change logic unit and a temporary write holding buffer included in the input/output interceptor logic unit of FIGS. 1 and 2. As described above, the order change logic unit 165 may change the order of write inputs/outputs included in each subset or change the order of write inputs/outputs across several subsets.

In the embodiment of FIG. 3, the write input/output (W0 ¹ ) corresponds to the 6th logical block address (Logical Block Address, hereinafter “LBA”), the write input/output (W1 ² ) corresponds to the 12th LBA, and the write input/output ( Wn ³ ) corresponds to 9th LBA, write input/output (W0 ⁴ ) corresponds to 7th LBA, write input/output (W1 ⁵ ) corresponds to 10th LBA, and write input/output (Wn ⁶ ) corresponds to 11th LBA Correspondence, write input/output (W0 ⁷ ) corresponds to 5th LBA, write input/output (W1 ⁸ ) corresponds to 4th LBA, write input/output (Wn ⁹ ) corresponds to 8th LBA, write input/output (W0 ¹⁰⁾ ) Corresponds to LBA #2, write input/output (W1 ¹¹ ) corresponds to LBA #3, and write input/output (Wn ¹² ) corresponds to LBA #1. LBAs correspond to logical locations in which several write inputs and outputs are stored in one or more nonvolatile storage devices 135, respectively.

The order change logic unit 165 may change the order of several write inputs/outputs. Accordingly, the write inputs and outputs may be arranged in the combined write inputs and outputs CW so that LBAs corresponding to the write inputs and outputs of the combined write inputs and outputs CW are arranged in ascending or descending order. For example, write inputs and outputs are initially W0 ¹ /6 LBA, W1 ² /12 LBA, Wn ³ /9 LBA, W0 ⁴ /7 LBA, W1 ⁵ /10 LBA, Wn ⁶ /11 LBA, W0 ⁷ /5 LBA, W1 ⁸ /4 LBA, Wn ⁹ /8 LBA, W0 ¹⁰ /2 LBA, W1 ¹¹ /3 LBA, Wn ¹² /1 LBA. The above LBA values are only examples and are not intended to limit the present invention.

The order change logic unit 165 includes write inputs and outputs in the temporary write holding buffer 160, Wn ¹² /1 LBA, W0 ¹⁰ /2 LBA, W1 ¹¹ /3 LBA, W1 ⁸ /4 LBA, W0 ⁷ /5th LBA, W0 ¹ /6th LBA, W0 ⁴ /7th LBA, Wn ⁹ /8th LBA, Wn ³ /9th LBA, W1 ^5th /10th LBA, Wn ⁶ /11th LBA, W1 ² / You can change the order of write I/Os to have the order of 12 LBA. In this way, the LBAs can be arranged in ascending or descending order. Accordingly, the combined write input/output (CW) can be more efficiently written to one or more nonvolatile storage devices 135 (see FIGS. 1 and 2 ).

4 is a conceptual diagram illustrating an order change logic unit included in the input/output interceptor logic unit of FIGS. 1 and 2 and a remapping memory unit. The remapping memory unit 405 may be allocated from system memory or may be allocated in the input/output interceptor logic unit 120 (see FIG. 1) according to an embodiment of the present invention. In general, because LBAs are widely distributed, reordering LBAs into ascending, descending, or contiguous groups is not simple. For example, write inputs and outputs are initially W0 ¹ /50 LBA, W1 ² /11 LBA, Wn ³ /18 LBA, W0 ⁴ /65 LBA, W1 ⁵ /99 LBA, Wn ⁶ /10 LBA, W0 ⁷ /41 LBA, W1 ⁸ /34 LBA, Wn ⁹ /77 LBA, W0 ¹⁰ /19 LBA, W1 ¹¹ /55 LBA, Wn ¹² /100 LBA. The above LBA values are only examples and are not intended to limit the present invention.

The order change logic unit 165 may change the order of write inputs and outputs by connecting the header HDR and the footer FTR back and forth and remapping the write inputs and outputs to the remapping memory unit 405. In other words, the order change logic unit 165 may generate a combined write input/output CW by copying the write input/outputs, the header HDR, and the footer FTR. Accordingly, several LBAs respectively corresponding to several write inputs/outputs of the combined write input/output CW may be arranged in an ascending or descending order. Furthermore, each of the write input/outputs of the combined write input/output CW may be arranged to be physically adjacent to other write input/outputs in the remapped memory unit 405. The order change logic unit 165 may convert random write inputs/outputs into sequential write inputs/outputs.

As an example, the combined write input/output (CW) of the remapping memory unit 405 is header/0 LBA, Wn ¹² /1 LBA, W0 ¹⁰ /2 LBA, W1 ¹¹ /3 LBA, W1 ⁸ /4 LBA, W0 ⁷ /5 LBA, W0 ¹ /6 LBA, W0 ⁴ /7 LBA, Wn ⁹ /8 LBA, Wn ³ /9 LBA, W1 ⁵ /10 LBA, Wn ⁶ /11 Write inputs and outputs that are remapped in the order of LBA, W1 ² /12 LBA, and footer/13 LBA may be included. In this way, LBAs can be arranged in a continuous fashion. Accordingly, the combined write input/output (CW) can be more efficiently written to one or more nonvolatile storage devices 135 (see FIGS. 1 and 2 ).

In some embodiments, the remapping memory unit 405 may be recognized only by the input/output interceptor logic unit 120. The header (HDR) and/or the footer (FTR) may include remapping transformation information. The header HDR and/or the footer FTR may include information indicating that the combined write input/output CW is valid. The combined write input/output CW including the header HDR but not the footer FTR in the one or more nonvolatile storage devices 135 may be treated as invalid. This may occur when a sudden power loss occurs while an operation related to the transmitted flush (CFn) is performed. In this case, the combined write input/output (CW) is determined to be invalid and may be discarded. When a valid combined write input/output (CW) is read from one or more nonvolatile storage devices 135 to read a valid combined write input/output (CW) in a read input/output operation, the header (HDR) and/or the footer (FTR) The stored remapping conversion information may be used by the input/output interceptor logic unit 120 to provide expected data and/or LBA information to the application 132.

The flush control logic unit 170 may cause the physically continuous combined write input/output (CW) to be written to the one or more nonvolatile storage devices 135 in response to the selected N-th flush request or other criteria.

5 is a conceptual diagram illustrating a flush control logic unit and temporary write holding buffers included in the input/output interceptor logic unit of FIGS. 1 and 2.

The order change logic unit 165 need not be included in the input/output interceptor logic unit 120. Instead, as an embodiment, the flush control logic unit 170 may manage a plurality of temporary write holding buffers 160 such as buffer 0, buffer 1, buffer 2, and buffer N. The temporary write holding buffers 160 may receive write inputs and outputs from the input/output interface 155 of FIGS. 1 and 2 and store the write inputs and outputs. The multi-buffer holding queue 505 may hold temporary write holding buffers.

The flush control logic unit 170 may receive a plurality of flush requests (eg, F0, F1, F2, etc.) from the input/output interface 155. Even if the write inputs and outputs are not written to the one or more nonvolatile storage devices 135 of FIGS. 1 and 2, the flush control logic unit 170 provides a message of input/output completion regarding write inputs/outputs (eg, CM0 and CM1 of FIG. 2 ). , CM2, CM3, and CMn) can be delivered to an application (eg, the application 132 of FIGS. 1 and 2). In other words, before the write inputs and outputs are actually written somewhere among the one or more nonvolatile storage devices 135, the flush control logic unit 170 may notify the application 132 of the completion of the write inputs and outputs related to the write inputs and outputs.

The flush control logic unit 170 allows the first subset of data write inputs/outputs (eg, D1 in FIG. 2) to be stored in the 0th buffer B0 of the temporary write holding buffers 160, and One subset (eg, M1 in FIG. 2) is stored in the first buffer B1 of the temporary write-holding buffers 160, and a second subset of data write inputs and outputs (eg, D2 in FIG. 2) is temporarily write-holding. To be stored in the second buffer B2 of the buffers 160, the second subset of metadata write inputs and outputs (for example, M2 in FIG. 2) are stored in the Nth buffer BN of the temporary write holding buffers 160. Can be saved.

The flush control logic unit 170 responds to the selected N-th flush request, in the order in which the multi-buffer holding queue 505 receives write inputs and outputs, one or more nonvolatile storage devices 135 from the temporary write holding buffers 160. ). In this embodiment, reordering and remapping of write inputs/outputs is not performed, and additional headers or footers are not required. On the other hand, compared to the embodiment described above, the performance is not significantly improved. This is because the LBAs are delivered to one or more nonvolatile storage devices 135 in a virtually random order. In the event of a sudden power loss, the order in which the application 132 intends to write data is preserved, so the consistency of the data is still maintained.

6 is another conceptual diagram illustrating a flush control logic unit and temporary write holding buffers included in the input/output interceptor logic unit of FIGS. 1 and 2.

6 is similar to FIG. 5, but in FIG. 6, there is a difference in that LBAs are widely distributed. Nevertheless, the operation of this embodiment is the same as or similar to that described with reference to FIG. 5. Therefore, redundant descriptions are omitted. The embodiment of FIG. 6 showing the wide distribution of LBAs is also included in the embodiment of the present invention, and may be implemented in the same or similar to that described with reference to FIG. 5.

7 to 12 are conceptual diagrams illustrating various devices in which the input/output interceptor logic unit of FIG. 1 may be embedded according to an embodiment of the present invention.

As an example, as shown in FIG. 7, the smartphone 705 may include the input/output interceptor logic unit 120 described above. Similarly, the tablet 805 shown in Fig. 8, the notebook computer 905 shown in Fig. 9, the mobile phone 1005 shown in Fig. 10, the camera 1105 shown in Fig. 11, and the desktop computer 1205 shown in Fig. 12. ) May include the input/output interceptor logic unit 120 described above. A device using the nonvolatile storage includes the input/output interceptor logic unit 120 described above and can operate using it.

13 is a flowchart illustrating a method of intercepting inputs and outputs from an application using an input/output interceptor logic unit according to an embodiment of the present invention.

The method of FIG. 13 starts in step S1305. In step S1305, a plurality of write input/output and a plurality of flush requests from an application may be intercepted by an input/output interface of the input/output interceptor logic unit.

In step S1310, a plurality of write inputs/outputs intercepted by the input/output interface may be stored in one or more temporary write holding buffers.

In step S1315, the order change logic unit may change the order of a plurality of write inputs/outputs stored in one or more temporary write holding buffers.

In step S1320, the order change logic unit may generate a combined write input/output by combining the write input/outputs of the changed order.

In step S1325, the flush control logic unit may receive a plurality of flush requests from the input/output interface.

In step S1330, without storing the plurality of write inputs and outputs in the nonvolatile storage device, the flush control logic unit may notify the application of completion of write inputs and outputs related to the plurality of write inputs and outputs. In other words, before the write inputs and outputs are actually written to somewhere among one or more nonvolatile storage devices, the flush control logic unit may notify the application of the completion of write inputs and outputs for the write inputs and outputs.

In step S1335, the flush control logic unit is in response to at least one of the N-th flush request selected from among the plurality of flush requests, the accumulated data threshold, and the expiration of the set time, so that the combined write input/output is written to the nonvolatile storage device. can do.

14 is a flowchart illustrating another method of intercepting inputs and outputs from an application using an input/output interceptor logic unit according to an embodiment of the present invention.

The method of FIG. 14 starts in step S1405. In step S1405, a plurality of write input/output and a plurality of flush requests from an application may be intercepted by an input/output interface of the input/output interceptor logic unit.

In step S1410, a plurality of write inputs/outputs intercepted by the input/output interface may be stored in a plurality of temporary write holding buffers.

In step S1415, the multi-buffer holding queue may hold a plurality of temporary write holding buffers.

In step S1420, the flush control logic unit may receive a plurality of flush requests from the input/output interface.

In step S1425, without storing the plurality of write inputs and outputs in the nonvolatile storage device, the flush control logic unit may notify the application of completion of write inputs and outputs related to the plurality of write inputs and outputs. In other words, before the write inputs and outputs are actually written to somewhere among one or more nonvolatile storage devices, the flush control logic unit may notify the application of the completion of write inputs and outputs for the write inputs and outputs.

In step S1430, the flush control logic unit responds to at least one of an N-th flush request selected from among a plurality of flush requests, a threshold amount of accumulated data, and expiration of a set time, the multi-buffer holding queue receives a plurality of write inputs/outputs. It can be transferred from the temporary write holding buffer to the nonvolatile storage device.

15 is a block diagram illustrating a computing system including an input/output interceptor logic unit according to an embodiment of the present invention. Referring to FIG. 15, the computing system 1500 includes a clock 1510, a random access memory (RAM) 1515, a user interface 1520, and a modem (MODEM 1525) such as a baseband chipset. , SSD 1540, a memory controller 1545, and a battery 1535 may be included. Although not shown in FIG. 15, the computing system 1500 may further include an application processor (AP) chipset, a camera image sensor (CIS), and a mobile dynamic RAM (DRAM).

Some or all of the clock 1510, RAM 1515, user interface 1520, baseband chipset 1525, SSD 1540, memory controller 1545, and battery 1535 are on the system bus 1505. Can be electrically connected. The input/output interceptor logic unit 1530 may correspond to the input/output interceptor logic unit 120 of FIGS. 1 to 12. The input/output interceptor logic unit 1530 may also be electrically connected to the system bus 1505.

When the computing system 1500 is a mobile device, the battery 1535 may supply power to the computing system 1500. When the embodiment of the present invention described above is implemented, since data can be more efficiently written to a storage (eg, SSD 1540), battery consumption can be reduced.

As an embodiment, the computing system 1500 is a computer, a portable computer, an ultra mobile personal computer (UMPC), a workstation, a net-book, a personal digital assistant (PDA), a web tablet, a wireless telephone, a mobile Telephone, smartphone, electronic book, portable multimedia player (PMP), digital camera, digital audio recorder/player, digital video/video recorder/player, portable game console, navigation system, black box, 3D television, wireless A device that can transmit and receive information in the environment, one of several electronic devices that make up a home network, one of several electronic devices that make up a computer network, one of several electronic devices that make up a telematics network, RFID (Radio Frequency Identification), or can be used as one of several electronic devices constituting a computing system.

The following discussion is intended to provide a brief and general description of a suitable device in which an embodiment of the present invention may be implemented. The device includes a system bus to which processors, memory (eg, RAM, read-only memory (ROM), or other state-saving medium), storage devices, video interfaces, and input/output interface ports are connected. do. Devices are provided not only through inputs provided by input devices such as keyboards and mice, but also through interactions with other devices, virtual reality environments, biometric signals, or other input signals. Can be controlled by the input being

Here, the term "device" has been used to broadly include a single device, a virtual machine, a system of devices or virtual machines connected to communicate with each other, or devices operating together. For example, the device may be a personal computer, a workstation, a server, a portable computer, a small device, a computing device such as a telephone, a tablet, etc., as well as a private or public means of transportation (e.g., car, train, taxi). Etc.).

The device may include programmable or non-programmable logic devices or arrays, and embedded controllers such as application specific integrated circuits (ASICs). The device may utilize a connection with one or more remote devices through a network interface, modem, or other communication connection. The device may be connected to other devices using a physical and/or logical network such as an intranet, the Internet, a local area network (LAN), and a wide area network (WAN). Network communication is a short distance or short distance such as RF (Radio Frequency), satellite, microwave, IEEE (Institute of Electrics and Electronics Engineers) 545.11, Bluetooth, Optical, Infrared, cable, laser, etc. It can be implemented using a long-distance wired or wireless carrier or protocol.

An embodiment of the present invention may be implemented in a data form including a function, a procedure, a data structure, an application program, and the like. When data implementing an embodiment of the present invention is accessed by a device, the device performs tasks corresponding to the embodiment of the present invention, or uses an abstract data type or low-level hardware context. Context) can be defined.

The data implementing the embodiment of the present invention is, for example, a volatile and/or nonvolatile memory such as RAM and ROM, or a hard drive, floppy disk, optical storage, tape, flash memory, memory stick, digital video disk, It may be stored in a storage device such as storage. Data implementing an embodiment of the present invention is a packet, serial data, parallel data, propagated signal, etc. through a communication environment such as a physical and/or logical network. It may be transmitted in the form of, and may be used in a compressed or encrypted form. Data implementing the embodiment of the present invention may be used in a distributed environment, and may be stored in a local and/or remote location for access to a device.

An embodiment of the present invention may be implemented in a non-transitory machine-readable medium including instructions executable by one or more processors. This command may include commands for performing the processes of the embodiments of the present invention described above.

The configuration shown in each conceptual diagram should be understood only from a conceptual point of view. In order to help understand the present invention, the shape, structure, size, etc. of each of the constituent elements shown in the conceptual diagram are exaggerated or reduced. The configuration actually implemented may have a physical shape different from that shown in each conceptual diagram. Each conceptual diagram is not intended to limit the physical shape of the component.

The device configuration shown in each block diagram is intended to aid understanding of the invention. Each block may be formed of blocks of smaller units depending on the function. Alternatively, a plurality of blocks may form a larger unit block according to a function. That is, the technical idea of the present invention is not limited by the configuration shown in the block diagram.

In the above, the present invention has been described based on the embodiments of the present invention. However, due to the nature of the technical field to which the present invention pertains, the object to be achieved by the present invention may be achieved in a form different from the above embodiments while including the gist of the present invention. Therefore, the above embodiments should be understood in terms of description rather than limitation. That is, the technical idea capable of achieving the same object as the present invention while including the gist of the present invention should be interpreted as being included in the technical idea of the present invention.

Therefore, the technical idea modified or modified within the scope not departing from the essential characteristics of the present invention is to be included in the scope of protection claimed by the present invention. In addition, the scope of protection of the present invention is not limited to the above embodiments.

100: system stack 105: application space
110: kernel space 115: physical hardware devices
120: input/output interceptor logic unit 125: storage stack
130: one or more applications
132: application
135: one or more nonvolatile storage devices
140: SSD 145: flash memory
150: HDD 155: input/output interface
160: already write holding buffer 165: order change logic unit
170: flush control logic unit
405: remapping memory unit 505: multi-buffer holding queue
705: smartphone 805: tablet
905: notebook computer 1005: mobile phone
1105: camera 1205: desktop computer
1500: computing system 1505: system bus
1510: clock 1515: RAM
1520: user interface 1525: modem
1530: I/O interceptor logic unit
1535: battery 1540: SSD
1545: memory controller

Claims (20)

An input/output interface connected to communicate with the storage stack and intercepting a plurality of write input/output and a plurality of flush requests from an application;
One or more temporary write holding buffers configured to receive the plurality of write inputs and outputs from the input/output interface and store the plurality of write inputs/outputs;
A write input/output connected to communicate with the one or more temporary write holding buffers, changing the order of the plurality of write inputs/outputs stored in the one or more temporary write holding buffers, and combining the plurality of write inputs/outputs in the changed order An order change logic unit for generating a; And
Receives the plurality of flush requests from the input/output interface, informs the application of the completion of write inputs/outputs for the plurality of write inputs/outputs without storing the plurality of write inputs/outputs in a nonvolatile storage device, and is selected from among the plurality of flush requests. Input/output interceptor logic including a flush control logic unit for storing the combined write input/output in the nonvolatile storage device in response to a flush request. The method of claim 1,
The selected flush request corresponds to an Nth flush request among the plurality of flush requests,
Wherein N is an input/output interceptor logic having a preselected positive integer value. The method of claim 1,
The selected flush request corresponds to an Nth flush request among the plurality of flush requests,
The input/output interceptor logic where N is an integer of 3 or more. The method of claim 1,
The input/output interface is:
A first subset of data write inputs/outputs among the plurality of write inputs/outputs, a first flush request among the plurality of flush requests, a first subset of metadata write inputs/outputs among the plurality of write inputs/outputs, a second flush request among the plurality of flush requests , A second subset of data write input/output among the plurality of write inputs/outputs, a third flush request among the plurality of flush requests, a second subset of metadata write input/output among the plurality of write inputs/outputs, and the selected among the plurality of flush requests I/O interceptor logic to intercept flush requests. The method of claim 4,
The order change logic unit:
Change the order of the plurality of write inputs/outputs included in the first subset of the data write input/output, the first subset of the metadata write input/output, the second subset of the data write input/output, and the second subset of the metadata write input/output Arranging the plurality of write input/output-related logical block addresses in ascending or descending order;
The changed order of a plurality of write inputs/outputs included in the first subset of the data write input/output, the first subset of the metadata write input/output, the second subset of the data write input/output, and the second subset of the metadata write input/output Input/output interceptor logic that combines to generate the combined write input/output. The method of claim 4,
The order change logic unit:
Copying the plurality of write input/output, header, and footer to a remapping memory unit to generate the combined write input/output,
A plurality of logical block addresses respectively corresponding to the plurality of write input/output included in the combined write input/output are arranged in an ascending or descending order,
Each of the plurality of write inputs and outputs included in the combined write inputs and outputs is physically adjacent to each other in the remapping memory unit. The method of claim 6,
The flush control logic unit:
In response to the selected flush request, input/output interceptor logic for storing the combined write input/output including the plurality of write inputs and outputs, each of which is physically adjacent to each other, in the nonvolatile storage device. The method of claim 1,
The order change logic unit:
Input/output interceptor logic for converting random write inputs/outputs included in the plurality of write inputs/outputs into sequential write inputs/outputs. An input/output interface connected to communicate with the storage stack and intercepting a plurality of write input/output and a plurality of flush requests from an application;
A plurality of temporary write holding buffers receiving the plurality of write inputs and outputs from the input/output interface and storing the plurality of write inputs/outputs;
A multi-buffer holding queue for holding the plurality of temporary write holding buffers; And
Receives the plurality of flush requests from the input/output interface, informs the application of the completion of write inputs/outputs for the plurality of write inputs/outputs without storing the plurality of write inputs/outputs in a nonvolatile storage device, and is selected from among the plurality of flush requests. Input/output interceptor logic comprising a flush control logic unit configured to allow the multi-buffer holding queue to transfer the plurality of write inputs and outputs from the plurality of temporary write holding buffers to the nonvolatile storage device in response to a flush request. The method of claim 9,
The selected flush request corresponds to an Nth flush request among the plurality of flush requests,
Wherein N is an input/output interceptor logic having a preselected positive integer value. The method of claim 9,
The selected flush request corresponds to an Nth flush request among the plurality of flush requests,
The input/output interceptor logic where N is an integer of 3 or more. The method of claim 9,
The input/output interface is:
A first subset of data write inputs/outputs among the plurality of write inputs/outputs, a first flush request among the plurality of flush requests, a first subset of metadata write inputs/outputs among the plurality of write inputs/outputs, a second flush request among the plurality of flush requests , A second subset of data write input/output among the plurality of write inputs/outputs, a third flush request among the plurality of flush requests, a second subset of metadata write input/output among the plurality of write inputs/outputs, and the selected among the plurality of flush requests I/O interceptor logic to intercept flush requests. The method of claim 12,
The plurality of temporary write holding buffers include a first temporary write holding buffer, a second temporary write holding buffer, a third temporary write holding buffer, and a fourth temporary write holding buffer,
The flush control logic unit:
The first subset of the data write input/output is stored in the first temporary write holding buffer, the first subset of the metadata write input/output is stored in the second temporary write holding buffer, and the second subset of the data write input/output is stored. I/O interceptor logic for storing in the third temporary write holding buffer and storing a second subset of the metadata write input/output in the fourth temporary write holding buffer. In a computer-implemented method to intercept inputs and outputs from an application using input/output interceptor logic:
Intercepting a plurality of write inputs and outputs and a plurality of flush requests from the application by the input/output interface of the input/output interceptor logic;
Storing the plurality of write inputs/outputs intercepted by the input/output interface in one or more temporary write holding buffers;
Changing an order of the plurality of write inputs/outputs stored in the one or more temporary write holding buffers by an order change logic unit of the input/output interceptor logic;
Generating a combined write input/output by combining the plurality of write inputs/outputs in the changed order by the order change logic unit;
Receiving, by a flush control logic unit of the input/output interceptor logic, the plurality of flush requests from the input/output interface;
Not storing the plurality of write inputs/outputs in a nonvolatile storage device, and notifying the application of completion of write inputs/outputs related to the plurality of write inputs/outputs by the flush control logic unit; And
And storing, by the flush control logic unit, the combined write input/output in the nonvolatile storage device in response to a flush request selected from among the plurality of flush requests. The method of claim 14,
The selected flush request corresponds to an Nth flush request among the plurality of flush requests,
Wherein N has a preselected positive integer value. The method of claim 14,
The selected flush request corresponds to an Nth flush request among the plurality of flush requests,
Wherein N is an integer of 3 or more. The method of claim 14,
The intercepting step is:
By the input/output interface, a first subset of data write input/output among the plurality of write inputs/outputs, a first flush request among the plurality of flush requests, a first subset of metadata write input/output among the plurality of write inputs/outputs, and the plurality of flushes A second flush request among the requests, a second subset of data write input/output among the plurality of write inputs/outputs, a third flush request among the plurality of flush requests, a second subset of metadata write input/output among the plurality of write inputs/outputs, and the plurality of And intercepting the selected flush request of the flush request. The method of claim 17,
The step of changing is:
The order change logic unit includes the first subset of the data write input/output, the first subset of the metadata write input/output, the second subset of the data write input/output, and the second subset of the metadata write input/output. Including the step of changing the order of the plurality of write input and output,
The generating step is:
The order change logic unit includes the first subset of the data write input/output, the first subset of the metadata write input/output, the second subset of the data write input/output, and the second subset of the metadata write input/output. And generating the combined write input/output by combining a plurality of write inputs and outputs in a changed order. The method of claim 17,
The generating step is:
And generating the combined write input/output by copying the plurality of write input/output, header, and footer to a remapping memory unit by the order change logic unit,
A plurality of logical block addresses respectively corresponding to the plurality of write input/output included in the combined write input/output are arranged in an ascending or descending order,
Each of the plurality of write inputs and outputs included in the combined write inputs and outputs is physically adjacent to each other in the remapping memory unit. The method of claim 19,
Storing in the nonvolatile storage device includes:
In response to the selected flush request, storing, by the flush control logic unit, the combined write input/output including the plurality of write inputs and outputs, each of which is physically adjacent to each other, in the nonvolatile storage device .

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