KR102156431B1 - Distance measurement device and operating method of distance measurement device - Google Patents

Abstract

The present invention relates to a distance measurement device with an improved distance measurement range, and an operation method thereof. According to an embodiment of the present invention, the distance measurement device comprises: a photoreaction part; first and second capacitors; a first transmission gate configured to connect the first capacitor with the photoreaction part in response to a first gate voltage; and a second transmission gate configured to connect the second capacitor with the photoreaction part in response to a second gate voltage, wherein the photoreaction part includes a third capacitor, and is configured to share charges of the first to third capacitors through the first and second transmission gates in response to incident light and vary the time shared by the charges in response to the amount of the incident light.

Description

The distance measuring device and the operating method of the distance measuring device {DISTANCE MEASUREMENT DEVICE AND OPERATING METHOD OF DISTANCE MEASUREMENT DEVICE}

TECHNICAL FIELD The present invention relates to a semiconductor device, and more particularly, to a distance measuring apparatus and a method of operating the distance measuring apparatus having a wider sensing range and measuring an extended range.

In order to measure the distance to the object, various types of distance measuring devices are used. For example, some of the distance measuring devices may photograph an object with multiple pixels and measure the distance according to an angle difference between the object seen from the multiple pixels. Some of the distance measuring devices irradiate light toward a target, and measure the distance to the target by using Time of Flight (ToF) when the light is reflected from the target and returned.

One of the important elements of a distance measuring device is the measuring range. Typically, light reflected from an object at a very close distance has a large amount of light, thus causing saturation in a distance measuring device, making it impossible to measure an accurate distance. In addition, light reflected from a very distant object has a very small amount of light, and thus does not induce a meaningful reaction in the distance measuring apparatus, and makes it impossible to measure an accurate distance.

It is difficult to extend the distance measurement range with the existing distance measurement device. Accordingly, there is a need for a new apparatus or method capable of extending the range of distance measurement without significantly increasing the cost.

It is an object of the present invention to provide a distance measuring device having an improved distance measuring range and a method of operating the distance measuring device.

A distance measuring device according to an embodiment of the present invention includes a light reaction unit; First and second capacitors; A first transfer gate configured to connect the first capacitor to the photoreactive part in response to a first gate voltage; And a second transfer gate configured to connect the second capacitor to the photo-reactive part in response to a second gate voltage, and the photo-reactive part includes a third capacitor, and the first and second 2, the first to third capacitors share charges through the transfer gates, and the time at which the charges are shared is varied in response to the amount of incident light.

As an embodiment, in the same period, the first gate voltage decreases from a high level to a low level, and the second gate voltage increases from a low level to a high level.

In an embodiment, the light reaction unit varies the time period during which the electric charges are shared according to the amount of the incident light, regardless of a time period in which the incident light is incident.

In an embodiment, the light reaction unit may include a fourth capacitor; And a photodiode configured to discharge the fourth capacitor as the incident light is incident.

In an embodiment, the light reaction unit may include a fifth capacitor; And a first transistor configured to discharge a voltage of the fifth capacitor as the fourth capacitor is discharged.

In an embodiment, before the incident light is incident, a voltage corresponding to the threshold voltage of the first transistor is charged in the fourth capacitor.

In an embodiment, the photoreactive part may include: a second transistor configured to selectively connect the third capacitor to the first and second transfer gates; Further, it further includes a complementary metal-oxide-semiconductor inverter (CMOS) configured to invert the logic value of the voltage of the fourth capacitor and transfer it to the gate of the second transistor.

In an embodiment, the CMOS inverter includes: an N-type third transistor connected between a ground node and the gate of the second transistor; And a P-type fourth transistor connected between the fifth capacitor and the gate of the second transistor.

As an embodiment, the CMOS inverter outputs a ground voltage when the voltage of the fourth capacitor is at a high level, and outputs a voltage of the fifth capacitor when the voltage of the fourth capacitor is at a low level.

In an embodiment, before the incident light is incident, a power voltage is charged to the fifth capacitor.

In an embodiment, before the incident light is incident, a negative voltage is charged to the third capacitor.

In an embodiment, before the incident light is incident, a power voltage is charged to the first and second capacitors.

In an embodiment, a light source is further included, and the incident light is reflected light of light irradiated from the light source.

In an embodiment, it further includes transistors configured to output voltages of the first and second capacitors in response to a selection signal.

As an embodiment, further comprising a data processing unit configured to calculate a distance based on the voltages of the first and second capacitors.

A method of operating a distance measuring apparatus according to an embodiment of the present invention includes: charging first to fifth capacitors; Irradiating light toward the object; Discharging the fourth capacitor at a rate proportional to the amount of incident light incident on the photodiode; Sharing charges of the first to third capacitors in response to discharge of the fourth capacitor; Discharging a fifth capacitor at a rate proportional to the amount of the incident light; Stopping sharing of charges of the first to third capacitors according to the voltage level of the fifth capacitor; And calculating a distance to the object using voltages of the first and second capacitors.

As an embodiment, charging the first to fifth capacitors includes charging the fourth capacitor with a voltage corresponding to a threshold voltage of a transistor configured to discharge the fifth capacitor.

In an embodiment, the voltage of the fourth capacitor is transmitted to the gate of the transistor.

In an embodiment, when the voltage of the fourth capacitor is at a low level, it is determined whether the first to third capacitors share the charges in response to the voltage of the fifth capacitor.

As an embodiment, charging the first to fifth capacitors includes charging a negative voltage to the third capacitor, and charging a power voltage to the first and second capacitors.

According to the present invention, the photodiode functions as a trigger for initiating an operation for measuring a distance, and also varies the duration of the operation for measuring a distance. Discharging pre-charged capacitors for distance measurement is performed by peripheral devices associated with the photodiode. Accordingly, even when the amount of incident light incident on the photodiode is very large or very small, since the distance to the target is successfully measured, a distance measurement apparatus having an improved distance measurement range and a method of operating the distance measurement apparatus are provided.

1 is a block diagram showing a distance measuring apparatus according to an embodiment of the present invention.
2 is a circuit diagram illustrating an example of the image sensor shown in FIG. 1.
FIG. 3 shows an example of voltages supplied to the image sensor of FIG. 2 and voltages generated by the image sensor.
4 is a circuit diagram showing an optical reaction unit according to an embodiment of the present invention.
FIG. 5 shows an example in which voltages of the light reaction unit change in relation to the third time and the fourth time of FIG. 3.
6 shows a state of a light reaction unit before third to fifth reset signals are deactivated and second light is incident.
7 shows a state of the light reaction unit when the second light starts to be incident at a third time.
8 shows an example in which the eighth transistor is turned on at time 3_1.
9 shows an example in which a seventh transistor is controlled according to voltages of fourth and fifth capacitors.
10 shows an example in which the eighth transistor is controlled according to the voltage of the second node and the voltage of the third capacitor.
11 shows changes in voltages of the light reaction unit when the amount of second light is greater than that of FIG. 5.
12 shows an example in which a seventh transistor is controlled according to voltages of fourth and fifth capacitors when the amount of second light increases.
13 shows an example in which the eighth transistor is controlled according to the voltage of the second node and the voltage of the third capacitor when the amount of light of the second light increases.
14 is a flowchart illustrating a method of operating a distance measuring apparatus according to an embodiment of the present invention.
15 shows the result of a simulation when a photodiode is used in place of the light reaction unit.
16 shows a result of a simulation of an image sensor according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings in order to describe in detail enough to enable a person of ordinary skill in the art to easily implement the technical idea of the present invention. .

1 is a block diagram showing a distance measuring apparatus 100 according to an embodiment of the present invention. Referring to FIG. 1, the distance measuring apparatus 100 includes a light source 110, a light source driving unit 120, an image sensor 130, an image sensor driving unit 140, a data processing unit 150, and a control unit 160. do.

The light source 110 may irradiate the first light L1 under the control of the light source driver 120. For example, the light source 110 may irradiate the first light L1 in a pulse form toward the target 10 in response to the pulse signal PUL received from the light source driver 120. For example, the light source 110 may be a pulsed laser light source.

The light source driver 120 may control the light source 110 under the control of the controller 160. For example, the light source driver 120 receives a command notifying the start of distance measurement from the control unit 160, and converts the pulse signal PUL to the light source 110 when a predetermined time elapses from the time the command is received. Can be printed. As another example, the light source driving unit 120 may receive a command requesting to output a pulse signal PUL from the control unit 160 and output the pulse signal PUL to the light source 110 according to the received command. have.

The image sensor 130 may operate under the control of the image sensor driver 140. For example, the image sensor 130 may be reset in response to reset signals RST received from the image sensor driver 140. The reset of the image sensor 130 may mean that the image sensor 130 discards previously collected information and prepares to collect new information.

The image sensor 130 may generate information on light received from the outside in response to the gate voltages VG received from the image sensor driver 140. For example, the image sensor 130 may generate information on the intensity of the second light L2 reflected from the object 10 by the first light L1.

The image sensor 130 may output information collected in response to the selection signals SEL received from the image sensor driver 140 to the image sensor driver 140. For example, the collected information may be transferred to the output voltages VOUT. The image sensor 130 may also receive various voltages required to generate information on the intensity of the second light L2 from the image sensor driver 140, as described with reference to FIGS. 2 to 4. Can

The image sensor driver 140 may control the image sensor 130 under the control of the controller 160. For example, the image sensor driver 140 receives a command indicating the start of distance measurement from the control unit 160, and when a predetermined time elapses from the time the command is received, the reset signals RST and the gate voltage are respectively Fields VG and selection signals SEL may be output to the image sensor 130.

As another example, the image sensor driver 140 receives commands requesting to output reset signals RST, gate voltages VG, and selection signals SEL from the control unit 160, and the received command The reset signals RST, the gate voltages VG, and the selection signals SEL may be output to the image sensor 130, respectively.

The image sensor driver 140 also applies various voltages required for the image sensor 130 to generate information on the intensity of the second light L2 as described with reference to FIGS. 2 to 4. You can pass it to (130).

The data processing unit 150 may receive output voltages VOUT from the image sensor 130. The data processing unit 150 may calculate a distance DT between the object 10 and the distance measuring device 100 from the output voltages VOUT. The calculated distance DT may be transmitted to, for example, the controller 160.

The controller 160 may control the light source driving unit 120, the image sensor driving unit 140, and the data processing unit 150 to perform distance measurement. The controller 160 may display the distance DT calculated by the data processing unit 150 through a display device such as an LCD (Liquid Crystal Display), or may transmit it to another device through a wired or wireless interface.

2 is a circuit diagram showing an example of the image sensor 130 illustrated in FIG. 1. Illustratively, an example of one pixel of the image sensor 130 is shown in FIG. 2. The image sensor 130 may include a plurality of pixels, and in this case, each pixel may have the same structure as shown in FIG. 2.

1 and 2, the image sensor 130 includes first to sixth transistors TR1 to TR6, first and second capacitors C1 and C2, and first and second transfer gates ( TG1, TG2), and a light reaction unit 200.

First and second gate voltages VG1 and VG2 are supplied to the gates of the first and second transfer gates TG1 and TG2, respectively. The first and second gate voltages VG1 and VG2 may be supplied from the image sensor driver 140. Second nodes (eg, drains) of the first and second transfer gates TG1 and TG2 are connected to the first and second detection nodes FD1 and FD2. A node between the first and second transfer gates TG1 and TG2 may be a first node N1. The first and second transfer gates TG1 and TG2 may be N-type transistors.

The first capacitor C1 is connected between the first detection node FD1 and the ground terminal. The first detection node FD1 may be connected to a second node (eg, a drain) of the first transistor TR1 and may be connected to a gate of the third transistor TR3. The second capacitor C2 is connected between the second detection node FD2 and the ground terminal. The second detection node FD2 may be connected to a second node (eg, a drain) of the second transistor TR2 and may be connected to a gate of the fifth transistor TR5.

A first node (eg, a source) of the first transistor TR1 is connected to a power node to which the power voltage VDD is supplied. The second node (eg, the drain) of the first transistor TR1 is connected to the first detection node FD1. The first reset signal RST1 is supplied to the gate of the first transistor TR1. The first reset signal RST1 may be supplied from the image sensor driver 140.

A first node (eg, a source) of the second transistor TR2 is connected to a power node to which the power voltage VDD is supplied. The second node (eg, the drain) of the second transistor TR2 is connected to the second detection node FD2. A second reset signal RST2 is supplied to the gate of the second transistor TR2. The second reset signal RST2 may be supplied from the image sensor driver 140.

A first node (eg, a source) of the third transistor TR3 is connected to a second node (eg, a drain) of the fourth transistor TR4. The second node (eg, the drain) of the third transistor TR3 is connected to the power terminal. The gate of the third transistor TR3 is connected to the first detection node FD1.

The first node (eg, a source) of the fourth transistor TR4 may be a first output terminal that outputs the first output voltage VOUT1. A second node (eg, a drain) of the fourth transistor TR4 is connected to a first node (eg, a source) of the third transistor TR3. The first selection signal SEL1 is supplied to the gate of the fourth transistor TR4. The first selection signal SEL1 may be supplied from the image sensor driver 140.

A first node (eg, a source) of the fifth transistor TR5 is connected to a second node (eg, a drain) of the sixth transistor TR6. The second node (eg, the drain) of the fifth transistor TR5 is connected to the power terminal. The gate of the fifth transistor TR5 is connected to the second detection node FD2.

The first node (eg, the source) of the sixth transistor TR6 may be a second output terminal that outputs the second output voltage VOUT2. A second node (eg, a drain) of the sixth transistor TR6 is connected to a first node (eg, a source) of the fifth transistor TR5. The second select signal SEL2 is supplied to the gate of the sixth transistor TR6. The second selection signal SEL2 may be supplied from the image sensor driver 140.

For example, the first and second transistors TR1 and TR2 may charge the power voltage VDD in the first and second capacitors C1 and C2 before the distance measurement starts. The first and second transfer gates TG1 and TG2 may electrically connect the first and second capacitors C1 and C2 to the light reaction unit 200 while distance measurement is being performed.

The light reaction part 200 is connected between the first node N1 and the ground node. The photoreactive part 200 may discharge the first and second capacitors C1 and C2 through the first and second transfer gates TG1 and TG2 in response to the amount of incident light. For example, the light reaction unit 200 may discharge the first and second capacitors C1 and C2 for a time in inverse proportion to the amount of incident light.

As the amount of incident light increases, the light reaction unit 200 may discharge the first and second capacitors C1 and C2 for a shorter time. As the incident light decreases, the light reaction unit 200 may discharge the first and second capacitors C1 and C2 for a longer time. For example, the photoreactive part 200 may maintain a constant capacity to discharge charges from the first node N1. The amount of charges actually discharged by the photoreactive unit 200 from the first and second capacitors C1 and C2 may be controlled by the first and second gate voltages VG1 and VG2, respectively.

After the first and second capacitors C1 and C2 are discharged in relation to the distance to the object 10, the third and fifth transistors TR3 and TR5 are formed with the first and second capacitors C1 and C2. The voltages of C2) can be amplified. The fourth and sixth transistors TR4 and TR6 may output the amplified voltages as the first and second output voltages VOUT1 and VOUT2.

For example, the first and second transistors TR1 and TR2 may be PMOSFETs. The third to sixth transistors TR3 to TR6 may be NMOSFETs. The first and second transfer gates TG1 and TG2 may be NMOFETs. However, the pixel of the image sensor 130 according to the technical idea of the present invention is not limited to the structure shown in FIG. 2. For example, PMOSFETs and NMOSFETs may be interchanged, and a power terminal and a ground terminal may be interchanged.

3 shows an example of voltages supplied to the image sensor 130 of FIG. 2 and voltages generated by the image sensor 130. 1 to 3, when the distance measurement apparatus 100 attempts to measure a distance, the image sensor driver 140 first activates the reset signals RST1 and RST2 at a first time T1 ( It can be deactivated (e.g., logic high) after being turned (e.g. logic low).

While the reset signals RST1 and RST2 are activated, the first and second transistors TR1 and TR2 are turned on. When the first and second transistors TR1 and TR2 are turned on, the voltages of the first and second detection nodes FD1 and FD2 are charged to the power voltage VDD. Since the first and second capacitors C1 and C2 are connected to the first and second detection nodes FD1 and FD2, respectively, even when the first and second transistors TR1 and TR2 are turned off. Voltages of the first and second detection nodes FD1 and FD2 may maintain the power voltage VDD. For example, while the reset signals RST1 and RST2 are activated, the first and second output voltages VOUT1 and VOUT2 may be reset to an initial value, for example, a ground voltage.

After the image sensor 130 is reset, that is, after the first and second capacitors C1 and C2 are charged to the power supply voltage VDD, at a second time T2, the light source driver 120 transmits a pulse signal ( PUL). In response to the pulse signal PUL, the light source 110 may irradiate the first light L1 (eg, a laser) in the form of a pulse toward the target 10.

The first gate voltage VG1 and the second gate voltage VG2 are controlled complementarily or differentially at a second time T2 in synchronization with the light source 110 irradiating the first light L1 ( Or driven). For example, the image sensor driver 140 lowers the first gate voltage VG1 during a predetermined duty time, for example, a time between the second time T2 and the fifth time T5. It can gradually increase from (eg, low level) to high level (eg, high level).

In addition, the image sensor driver 140 sets the second gate voltage VG2 to a high level (eg, during a predetermined duty time, for example, a time between the second time T2 and the fifth time T5). For example, it may gradually decrease from a high level) to a low level (eg, a low level).

While the first gate voltage VG1 and the second gate voltage VG2 are complementarily or differentially driven, the photoreactive unit 200 receives the first and second detection nodes FD1 and FD2. And the second capacitors C1 and C2 are discharged. For example, between the third time T3 and the fourth time T4, the second light L2 may be incident on the photoreactive part 200 as incident light. The photoreactive unit 200 may start discharging the first and second capacitors C1 and C2 from a third time T3 when the second light L2 is incident.

The photoreactive unit 200 may vary a time to discharge the first and second capacitors C1 and C2 regardless of the fourth time T4 at which the incident of the second light L2 ends. For example, the light reaction unit 200 may vary a time to discharge the first and second capacitors C1 and C2 according to the amount of light of the second light L2.

As the amount of light of the second light L2 increases, the light reaction unit 200 may reduce a time period in which the first and second capacitors C1 and C2 are discharged. As the amount of light of the second light L2 decreases, the light reaction unit 200 may increase a time period during which the first and second capacitors C1 and C2 are discharged.

The photoreactive unit 200 may maintain a constant amount of charges collectively discharged from the first and second capacitors C1 and C2. Depending on the levels of the first and second gate voltages VG1 and VG2, the amount of charges discharged by the photoreactive unit 200 from the first and second capacitors C1 and C2, respectively, may be adjusted. .

The first gate voltage VG1 gradually increases during the duty time. Therefore, the number of electrons that can be transferred through the first transfer gate TG1 decreases as the time when the second light L2 is incident is closer to the second time T2, that is, the time when the first light L1 is irradiated. do. As the incident time of the second light L2 is closer to the fifth time T5, that is, the time when the driving of the first gate voltage VG1 is terminated, electrons that can be transferred through the first transfer gate TG1 are The number increases.

Likewise, the second gate voltage VG2 gradually decreases during the duty time. Therefore, the number of electrons that can be transferred through the second transfer gate TG2 increases as the time when the second light L2 is incident is closer to the second time T2, that is, the time when the first light L1 is irradiated. do. As the incident time of the second light L2 is closer to the fifth time T5, that is, the time at which the driving of the second gate voltage VG2 is terminated, electrons that can be transmitted through the second transfer gate TG2 are The number decreases.

That is, the first transfer gate TG1 responds to (for example, inversely proportional) the amount of light (or the intensity or intensity of light) of the second light L2 incident on the light reaction unit 200, and The voltage of the first detection node FD1 may be reduced in proportion to a time elapsed from the second time T2 in which L1 is irradiated or the first gate voltage VG1 is driven.

The second transfer gate TG2 responds (for example, in inverse proportion) to the amount of light (or intensity or intensity of light) of the second light L2 incident on the photodiode PD of the light reaction unit 200, In addition, the voltage of the second detection node FD2 may be reduced in inverse proportion to the time elapsed from the second time T2 when the first light L1 is irradiated or the second gate voltage VG2 is driven.

Referring to the first exposure section EI1 in which the second light L2 is incident, between the second time T2 and the fifth time T5, a third time T3 at which the second light L2 is incident. ) Is closer to the first time T1 than the fifth time T5. Accordingly, the voltage of the second detection node FD2 decreases more than the voltage of the first detection node FD1.

At the fifth time T5 when the duty time ends, the image sensor driver 140 turns off the first and second gate voltages VG1 and VG2 so that the first and second transfer gates TG1 and TG2 are turned off. ) Can be controlled. For example, the image sensor driver 140 may supply a ground voltage with the first and second gate voltages VG1 and VG2.

At the sixth time T6, the image sensor driver 140 activates the first and second selection signals SEL1 and SEL2. When the first and second selection signals SEL1 and SEL2 are activated, voltages of the first and second detection nodes FD1 and FD2 are amplified by the third and fifth transistors TR3 and TR5, It is output through the fourth and sixth transistors TR4 and TR6. For example, the fourth and sixth transistors TR4 and TR6 may output the first and second output voltages VOUT1 and VOUT2.

The first and second reset signals RST1 and RST2 for the next distance measurement may be received at the seventh time T7. Thereafter, during the eighth time period T8 to the eleventh time period T11, the next distance measurement may be performed. During the next distance measurement, referring to the second exposure section EI2 in which the second light L2 is incident, the times when the second light L2 is incident are the ninth time T9 and the tenth time T10. , These are closer to the eleventh time T11 at which the duty time ends than the eighth time T8 at which the first light L1 is irradiated. Accordingly, the voltage of the first detection node FD1 decreases more than the voltage of the second detection node FD2.

As described above, the light reaction unit 200 discharges the first and second capacitors C1 and C2 in inverse proportion to the amount of incident light, for example, the second light L2. That is, the first and second transfer gates TG1 and TG2 reduce voltages of the first and second detection nodes FD1 and FD2 in inverse proportion to the amount of light of the second light L2.

The first and second gate voltages VG1 and VG2 are controlled complementarily or differentially. The first gate voltage VG1 rises from the low level to the high level, and the second gate voltage VG2 decreases from the high level to the low level. Therefore, the first transfer gate TG1 decreases the voltage of the first detection node FD1 in proportion to the time elapsed from the time when the first light L1 is irradiated, and the second transfer gate TG2 reduces the voltage of the first light. The voltage of the second detection node FD2 is reduced in inverse proportion to the time elapsed from the time L1 is irradiated.

The first output voltage VOUT1 and the second output voltage VOUT2 are not only information about the amount of light of the second light L2, but also whether the incident time of the second light L2 is close to the start or end point of the duty time. Complementarily or differentially contain information about whether it is close. The time between the time when the first light L1 is irradiated and the time at which the second light L2 is incident may be a time of flight (TOF).

That is, the first output voltage VOUT1 and the second output voltage VOUT2 further include information on what percentage of the duty time the flight time TOF occupies. Accordingly, when the distance is calculated using the first output voltage VOUT1 and the second output voltage VOUT2 complementarily or differentially, the reliability of the calculated distance is improved.

4 is a circuit diagram showing a light reaction unit 200 according to an embodiment of the present invention. 1 to 4, the photoreactive part 200 includes a photodiode PD, seventh to thirteenth transistors TR7 to TR13, and third to fifth capacitors C3 to C5. do.

The photodiode PD is connected in parallel with the fourth capacitor C4. The photodiode PD and the fourth capacitor C4 may be connected between the ground node and the twelfth transistor TR12. The twelfth transistor TR12 is connected between the node to which the trigger voltage VTRIG is supplied and the fourth capacitor C4 and the photodiode PD. A node between the fourth capacitor C4 and the photodiode PD and the ground node may be a third node N3.

The twelfth transistor TR12 may charge the trigger voltage VTRIG in the fourth capacitor C4 in response to the fifth reset signal RST5. The fifth reset signal RST5 may have the same waveform as the first and second reset signals RST1 and RST2.

The ninth and tenth transistors TR9 and TR10 are connected in series. The ninth and tenth transistors TR9 and TR10 are connected between the ground node and the fifth capacitor C5. The voltage of the fourth capacitor C4 is transmitted to the gates of the ninth and tenth transistors TR9 and TR10. A node between the ninth and tenth transistors TR9 and TR10 may be a second node N2.

The ninth and tenth transistors TR9 and TR10 may form a CMOS inverter that inverts the logic level of the voltage of the fourth capacitor C4 and outputs it to the second node N2. When the logic level of the voltage of the fourth capacitor C4 is a high level, the ninth and tenth transistors TR9 and TR10 may output a low-level ground voltage to the second node N2.

When the logic level of the voltage of the fourth capacitor C4 is a low level, the ninth and tenth transistors TR9 and TR10 are at a high level and output the voltage of the fifth capacitor C5 to the second node N2 can do. The fifth capacitor C5 may be connected between the tenth transistor TR10 and the ground node.

The seventh transistor TR7 is connected in parallel with the fifth capacitor C5. The fifth capacitor C5 and the seventh transistor TR7 may be connected in parallel between the tenth transistor TR10 and the ground node. The voltage of the fourth capacitor C4 may be transmitted to the gate of the seventh transistor TR7. The seventh transistor TR7 may discharge the voltage of the fifth capacitor C5.

The eleventh transistor TR11 may be connected between a power node to which the power voltage VDD is supplied and a node between the tenth transistor TR10 and the fifth capacitor C5. The eleventh transistor TR11 may charge the power voltage VDD in the fifth capacitor C5 in response to the fourth reset signal RST4. The fourth reset signal RST4 may have the same waveform as the first and second reset signals RST1 and RST2.

The eighth transistor TR8 may selectively connect the third capacitor C3 to the first node N1 in response to the voltage of the second node N2. That is, the eighth transistor TR8 may allow the third capacitor C3 to selectively share charges with the first and second capacitors C1 and C2.

The thirteenth transistor TR13 is connected between a node to which the signal voltage VSIG is supplied and a node between the eighth transistor TR8 and the third capacitor C3. The thirteenth transistor TR13 may charge the signal voltage VSIG in the third capacitor C3 in response to the third reset signal RST3. The third reset signal RST3 may have a waveform opposite to that of the first and second reset signals RST1 and RST2. That is, a form obtained by inverting the first and second reset signals RST1 and RST2 may be the third reset signal RST3.

5 shows an example in which voltages of the photoreactive unit 200 change in relation to the third time T3 and the fifth time T5 of FIG. 3. 2 to 5, between a first time T1 and a second time T2, in response to the third to fifth reset signals RST3 to RST5, the third capacitor C3 is The signal voltage VSIG may be charged, the trigger voltage VTRIG may be charged in the fourth capacitor C4, and the power voltage VDD may be charged in the fifth capacitor C5.

The signal voltage VSIG may be a negative voltage. The trigger voltage VTRIG may be a positive voltage lower than the power voltage VDD. 6 illustrates a state of the photoreactive unit 200 before the third to fifth reset signals RST3 to RST5 are deactivated and the second light L2 is incident. Referring to FIG. 6, transistors other than the ninth transistor TR9 may be turned off. When the trigger voltage VTRIG is charged in the fourth capacitor C4, the ninth transistor TR9 is turned on to supply the ground voltage VSS to the second node N2. Each of the third and fifth capacitors C3 and C5 may have a signal voltage VSIG and a power voltage VDD.

Referring back to FIGS. 2 to 5, the second light L2 may start to be incident at the third time T3. When the second light L2 starts to be incident, the photodiode PD may generate electrons. Due to the former, the voltage of the fourth capacitor C4 may decrease from the trigger voltage VTRIG. For example, when the voltage of the fourth capacitor C4 starts to decrease, the seventh and eighth transistors TR7 and TR8 may be turned on.

7 shows a state of the light reaction unit 200 when the second light L2 starts to be incident at the third time T3. Referring to FIG. 7, the seventh transistor TR7 is turned on, and the fifth capacitor C5 may be connected to a ground node. As shown by the first arrow A1, a current flows from the fifth capacitor C5 to the ground node, and the fifth capacitor C5 is discharged, so that the voltage of the fifth capacitor C5 may decrease. As shown by the second arrow A2, the tenth transistor TR10 is turned on, and the voltage of the fifth capacitor C5 may start to be transferred to the eighth transistor TR8.

Referring back to FIGS. 2 to 5, when the difference between the voltage of the second node N2 and the voltage of the third capacitor C3 is higher than the threshold voltage of the eighth transistor TR8 at a time 3_1 time T3_1, The eighth transistor TR8 is turned on. An example in which the eighth transistor TR8 is turned on at a time 3_1 time T3_1 is shown in FIG. 8.

Referring to FIG. 8, as shown by the second arrow A2, the voltage of the fifth capacitor C5 is transmitted to the eighth transistor TR8 through the tenth transistor TR10. The eighth transistor TR8 is turned on by the voltage of the fifth capacitor C5. As shown by the third arrow A3, the third capacitor C3 is connected to the first node N1 through the eighth transistor TR8.

Referring back to FIGS. 2 to 5, as the eighth transistor TR8 is turned on, the first to third capacitors C1 to C3 share charges. For example, since the signal voltage VSIG is a negative voltage, the third capacitor C3 of the photoreactive unit 200 may discharge the first and second capacitors C1 and C2. Due to charge sharing, the voltage of the third capacitor C3 may rise from the signal voltage VSIG.

For example, in the 4_1 time T4_1, the voltage of the second node N2 may reach the voltage of the fifth capacitor C5 (eg, the second voltage V2). From the 4_1 time T4_1, the voltage of the second node N2 may be lowered by following the voltage of the fifth capacitor C5. In FIG. 5, a point in time when the voltage of the second node N2 is equal to the voltage of the fifth capacitor C5 is shown as a 4_1 time T4_1, but the voltage of the second node N2 is the fifth capacitor C5. The point of time equal to the voltage of) is not limited and may vary.

As the eighth transistor TR8 is turned on, the voltage of the first node N1 becomes equal to the voltage of the third capacitor C3. The voltage of the first node N1 decreases until the 4_1 time T4_1 when the voltage of the first node N1 is equal to the voltage of the third capacitor C3. Thereafter, the voltage of the first node N1 may be increased by following the voltage of the third capacitor C3.

For example, the voltage of the fourth capacitor C4 may reach the first voltage V1 at the fourth time T4. Due to electrons generated in the photodiode PD, the first voltage V1 may be a negative voltage. In FIG. 5, the voltage of the fourth capacitor C4 is shown to reach the first voltage V1 at the time 4_1 time T4_1, but the voltage of the fourth capacitor C4 reaches the first voltage V1. The time is not limited and is subject to change.

As the voltage of the second node N2 decreases and the voltage of the third capacitor C3 increases, the eighth transistor TR8 may be turned off at the 4_2th time T4_2. When the eighth transistor TR8 is turned off, the third capacitor C3 is separated from the first and second capacitors C1 and C2. Accordingly, the voltage of the third capacitor C3 may be maintained. As the eighth transistor TR8 is turned off, the voltage of the first node N1 starts to rise toward the ground voltage.

At the 4th_3th time T4_3, the voltage of the first node N1 may be restored to the ground voltage. However, the time point at which the voltage of the first node N1 is restored to the ground voltage is not limited and may be changed. As the voltage of the fifth capacitor C5 decreases, the seventh transistor TR7 may be turned off at a 4_4 time T4_4. As the seventh transistor TR7 is turned off, the voltage of the fifth capacitor C5 may be maintained at the third voltage V3. Also, the voltage of the second node N2 may be maintained at the third voltage V3.

9 shows an example in which the seventh transistor TR7 is controlled according to voltages of the fourth and fifth capacitors C4 and C5. In Fig. 9, the horizontal axis indicates time (T), and the vertical axis indicates voltage (V). In FIG. 9, the level of the ground voltage VSS is shown by a dotted line.

4, 5, and 9, the fourth and fifth capacitors C4 and C5 may be initially charged with a trigger voltage VTRIG and a power voltage VDD, respectively. The trigger voltage VTRIG may be lower than the power voltage VDD and higher than the ground voltage VSS, for example.

For example, a voltage difference between the power voltage VDD and the trigger voltage VTRIG may be determined depending on the threshold voltage (eg, the first threshold voltage VTH1) of the seventh transistor TR7. The trigger voltage VTRIG may be set such that when the trigger voltage VTRIG starts to decrease, the seventh transistor TR7 or the tenth transistor TR10 is immediately turned on. Accordingly, when the voltage of the fourth capacitor C4 starts to decrease at the third time T3, the seventh and tenth transistors TR7 and TR10 may be turned on.

As the trigger voltage VTRIG rapidly decreases, the voltages of the fourth capacitor C4, that is, the gate voltage of the seventh transistor TR7, between the third time T3 and the fourth_4 time T4_4 5 It is kept lower than the voltage of the capacitor C5, that is, the voltage of the source. Accordingly, the seventh transistor TR7 maintains a turned-on state.

At the 4th_4th time T4_4, a difference between the voltage of the fifth capacitor C5 and the voltage of the fourth capacitor C4 may be equal to or smaller than the first threshold voltage VTH1. Accordingly, the seventh transistor TR7 may be turned off during the 4_4 time T4_4. A time period between the third time T3 and the fourth time T4_4 may be a first ON time T_ON1 when the seventh transistor TR7 is turned on.

10 shows an example in which the eighth transistor TR8 is controlled according to the voltage of the second node N2 and the voltage of the third capacitor C3. In FIG. 10, the horizontal axis indicates time (T), and the vertical axis indicates voltage (V). In FIG. 10, the level of the ground voltage VSS is shown by a dotted line.

4, 5, and 10, the voltage of the second node N2 starts to rise at a third time T3. The voltage of the second node N2 may be the gate voltage of the eighth transistor TR8, and the voltage of the third capacitor C3 may be the voltage of the source of the eighth transistor TR8.

At time 3_1 (T3_1), the difference between the voltage of the second node N2 and the voltage of the third capacitor C3 is the threshold voltage of the eighth transistor TR8 (for example, the second threshold voltage VTH2) When it is equal to or higher than ), the eighth transistor TR8 is turned on. At a time 4_2 (T4_2), when the difference between the voltage of the second node N2 and the voltage of the third capacitor C3 becomes equal to or lower than the second threshold voltage VTH2, the eighth transistor TR8 is It turns off. A time interval between the 3_1 time T3_1 and the 4_2 time T4_2 may be a second ON time T_ON2 when the eighth transistor TR8 is turned on.

11 shows changes in voltages of the light reaction unit 200 when the amount of light of the second light L2 is greater than that of FIG. 5. Referring to FIGS. 4 and 11, and comparing with FIG. 5, between the third time T3 to the fourth time T4 when the second light L2 is incident, the photodiode PD is shown in FIG. 5. Can generate more electrons than As more electrons are generated, the voltage of the fourth capacitor C4 may be discharged faster than that of FIG. 5.

As the speed at which the fourth and fifth capacitors C4 and C5 are discharged is accelerated, the eighth transistor TR8 is turned on at a time 3_1 (T3_1) and the eighth transistor TR8 is turned off. The 4_2th time T4_2 and the 4_4th time T4_4 when the seventh transistor TR7 is turned off may be longer than that of FIG. 5.

12 shows an example in which the seventh transistor TR7 is controlled according to voltages of the fourth and fifth capacitors C4 and C5 when the amount of light of the second light L2 increases. In FIG. 12, the horizontal axis indicates time (T), and the vertical axis indicates voltage (V). In FIG. 12, the level of the ground voltage VSS is shown by a dotted line.

4, 11, and 12, and compared with FIG. 9, as the voltage of the fourth capacitor C4 starts to decrease at a third time T3, the seventh transistor TR7 is turned- Can be turned on. The time when the seventh transistor TR7 is turned on is a time when the second light L2 starts to be incident, and is not affected by the amount of light.

As the voltage of the fifth capacitor C5 decreases during the 4_4 time T4_4, the seventh transistor TR7 is turned off. As the amount of light of the second light L2 increases, the speed at which the voltage of the fifth capacitor C5 decreases increases. Accordingly, the 4_4 time T4_4 is pulled when the voltage difference between the fourth and fifth capacitors C4 and C5 reaches the first threshold voltage VTH1. That is, compared to the case of FIG. 9, the first ON time T_ON1 at which the seventh transistor TR7 is turned on is shortened.

13 illustrates an example in which the eighth transistor TR8 is controlled according to the voltage of the second node N2 and the voltage of the third capacitor C3 when the amount of light of the second light L2 increases. In Fig. 13, the horizontal axis indicates time (T), and the vertical axis indicates voltage (V). In FIG. 13, the level of the ground voltage VSS is shown by a dotted line.

Referring to FIGS. 4, 11, and 13, and comparing with FIG. 10, as the voltage of the second node N2 increases at a time 3_1 time T3_1, the eighth transistor TR8 may be turned on. have. As the voltage of the fourth capacitor C4 decreases faster than that of FIG. 5, the voltage of the second node N2 also increases faster than that of FIG. 5.

In addition, as the voltage of the fifth capacitor C5 decreases faster than that of FIG. 5, the voltage of the second node N2 also decreases faster than that of FIG. 5. Accordingly, the 4_2th time T4_2 when the voltage difference between the voltage of the second node N2 and the third capacitor C3 reaches the second threshold voltage VTH2 is pulled. That is, compared to the case of FIG. 9, the second on time T_ON2 at which the eighth transistor TR8 is turned on is shortened.

As described above, the photoreactive unit 200 according to an embodiment of the present invention varies the length of the time period during which charges are discharged from the first node N1 according to the amount of light of the second light L2. For example, the light reaction unit 200 may change a time period in inverse proportion to the amount of light. When the amount of light increases, the light reaction unit 200 may reduce a time for discharging the first node N1. When the amount of light decreases, the light reaction unit 200 may increase the time to discharge the first node N1.

Instead of discharging the first node N1 using electrons generated in the photodiode PD, the photoreactive unit 200 triggers an operation for measuring distance at the time when electrons are generated in the photodiode PD ( trigger). Accordingly, even when the amount of electrons generated by the photodiode PD is less than the charges charged in the first and second capacitors C1 and C2, the measurement operation may be started. Accordingly, even when the amount of light of the second light L2 is less than before, measurement may be performed.

The photoreactive unit 200 discharges the first node N1 by causing the third capacitor C3 to share electric charges with the first and second capacitors C1 and C2 in the measurement operation. The amount of discharge is determined according to the capacities of the first to third capacitors C1 to C3 and voltages charged in the first to third capacitors C1 to C3.

That is, the sensitivity at which the image sensor 130 measures the second light L2 is determined according to the first to third capacitors C1 to C3, not the photodiode PD. The first to third capacitors C1 to C1 to measure a minute amount of light, and to prevent the first to third capacitors C1 to C3 from being saturated while the first and second gate voltages VG1 and VG2 are applied. By setting the capacities and voltages of C3), the image sensor 130 can have an extended distance measurement range.

According to an embodiment of the present invention, by adding a few transistors to an existing photodiode without using a relatively expensive high-performance photodiode, an extended distance measurement range can be achieved while using a relatively low-cost conventional photodiode. There is provided a distance measuring device.

14 is a flow chart illustrating a method of operating the distance measuring apparatus 100 according to an embodiment of the present invention. 1 to 5 and 14, in step S110, the image sensor 130 may charge the first to fifth capacitors C1 to C5.

In step S120, the light source 110 may irradiate the first light L1 toward the object 10. The first light L1 may be reflected from the surface of the object 10 and may reach the image sensor 130 as the second light L2.

In step S130, the photoreactive unit 200 may discharge the fourth capacitor C4 at a rate proportional to the incident light, that is, the amount of light of the second light L2. As the amount of light of the second light L2 increases, the photodiode PD of the light reaction unit 200 may discharge the fourth capacitor C4 more rapidly.

In step S140, in response to the discharge of the fourth capacitor C4, the image sensor 130 may share charges of the first to third capacitors C1 to C3. The voltages of the first and second capacitors C1 and C2 may decrease, and the voltage of the third capacitor C3 may increase.

In step S150, the light reaction unit 200 may discharge the fifth capacitor C5 at a rate proportional to the incident light, that is, the amount of light of the second light L2. As the amount of light of the second light L2 increases, the node N3 of the light reaction unit 200 may discharge the fifth capacitor C5 more quickly.

In step S160, the photoreactive unit 200 may stop sharing charges of the first to third capacitors C1 to C3 according to the voltage level of the fifth capacitor C5. For example, when the voltage of the fifth capacitor C5 is lowered to a specific level, sharing of charges may be stopped. That is, the time at which charges are shared may be affected by the rate at which the voltage of the fifth capacitor C5 decreases.

For example, the time during which charges are shared may be inversely proportional to the amount of light of the second light L2. As the amount of light of the second light L2 increases, the time during which the first to third capacitors C1 to C3 share charges may decrease.

In step S170, the data processing unit 150 uses the voltages of the first and second capacitors C1 and C2, for example, the first and second output voltages VOUT1 and VOUT2 to measure the distance. ) And the distance DT between the object 10 may be calculated.

15 shows the result of a simulation when a photodiode is used in place of the light reaction unit 200. As an example, the result of a simulation when the photodiode PD is connected to the position of the light reaction unit 200 in the image sensor 130 of FIG. 2 is shown in FIG. 15. In FIG. 15, a horizontal axis indicates a time delay, and a vertical axis indicates a difference between the first and second output voltages VOUT1 and VOUT2.

Referring to FIG. 15, when the amount of current generated by the photodiode PD is in the range of 400 nA to 2 uA, a time delay (for example, the irradiation time of the first light L1 and the second light L2) The difference between the first and second voltages VOUT1 and VOUT2 according to the delay between incident times) shows a significant change. That is, the distance can be successfully measured.

When the amount of current generated by the photodiode PD is 7.5nA or 7uA, the difference between the first and second voltages VOUT1 and VOUT2 according to the time delay does not show any significant change. That is, the measurement of the distance may fail.

16 shows a result of a simulation of the image sensor 130 according to an embodiment of the present invention. In FIG. 1, a horizontal axis indicates a time delay, and a vertical axis indicates a difference between the first and second output voltages VOUT1 and VOUT2.

Referring to FIG. 16, even when the amount of current generated by the photodiode PD is 7.5 nA, in the image sensor 130 according to the embodiment of the present invention, first and second voltages VOUT1 according to a time delay , VOUT2) shows a significant change. That is, the distance can be successfully measured.

In addition, even when the amount of current generated by the photodiode PD exceeds 7uA and exceeds 70uA, the image sensor 130 according to the embodiment of the present invention includes first and second voltages VOUT1 and VOUT2 according to a time delay. ) Shows a meaningful change. That is, the distance can be successfully measured. That is, according to the present invention, it is confirmed that the distance measurement range of the distance measurement apparatus 100 is remarkably improved.

In the detailed description of the present invention, specific embodiments have been described, but various modifications are possible without departing from the scope and technical spirit of the present invention. Therefore, the scope of the present invention is limited to the above-described embodiments and should not be determined, but should be determined by the claims and equivalents of the present invention as well as the claims to be described later.

10: target
100: distance measuring device
110: light source
120: light source driver
130: image sensor
140: image sensor driver
150: data processing unit
160: control unit
TR1 to TR13: first to thirteenth transistors
C1 to C5: first to fifth capacitors
PD: photodiode

Claims (20)

Light reaction unit;
First and second capacitors;
A first transfer gate configured to connect the first capacitor to the photoreactive part in response to a first gate voltage; And
And a second transfer gate configured to connect the second capacitor with the photoreactive part in response to a second gate voltage,
The photo-reactive part includes a third capacitor, shares charges of the first to third capacitors through the first and second transfer gates in response to incident light, and shares the charges in response to the amount of light of the incident light. It is configured to vary the time to be
The optical reaction unit, regardless of the time interval in which the incident light is incident, the distance measuring device for varying the time the charges are shared according to the amount of the incident light. The method of claim 1,
In the same period, the first gate voltage decreases from a high level to a low level, and the second gate voltage increases from a low level to a high level. delete Light reaction unit;
First and second capacitors;
A first transfer gate configured to connect the first capacitor to the photoreactive part in response to a first gate voltage; And
And a second transfer gate configured to connect the second capacitor with the photoreactive part in response to a second gate voltage,
The photo-reactive part includes a third capacitor, shares charges of the first to third capacitors through the first and second transfer gates in response to incident light, and shares the charges in response to the amount of light of the incident light. It is configured to vary the time to be
The light reaction unit:
A fourth capacitor; And
Distance measuring apparatus further comprising a photodiode configured to discharge the fourth capacitor as the incident light is incident. The method of claim 4,
The light reaction unit:
A fifth capacitor; And
The distance measuring device further comprises a first transistor configured to discharge a voltage of the fifth capacitor as the fourth capacitor is discharged. The method of claim 5,
A distance measuring device in which a voltage corresponding to the threshold voltage of the first transistor is charged in the fourth capacitor before the incident light is incident. The method of claim 5,
The light reaction unit:
A second transistor configured to selectively connect the third capacitor to the first and second transfer gates; And
The distance measuring apparatus further comprises a CMOS inverter configured to invert the logic value of the voltage of the fourth capacitor and transmit it to the gate of the second transistor. The method of claim 7,
The CMOS inverter is:
An N-type third transistor connected between a ground node and the gate of the second transistor; And
A distance measuring apparatus comprising a P-type fourth transistor connected between the fifth capacitor and the gate of the second transistor. The method of claim 7,
The CMOS inverter outputs a ground voltage when the voltage of the fourth capacitor is at a high level, and outputs a voltage of the fifth capacitor when the voltage of the fourth capacitor is at a low level. The method of claim 5,
A distance measuring device in which a power voltage is charged in the fifth capacitor before the incident light is incident. The method of claim 5,
A distance measuring device in which a negative voltage is charged to the third capacitor before the incident light is incident. The method of claim 4,
A distance measuring device in which a power voltage is charged to the first and second capacitors before the incident light is incident. The method of claim 4,
It further includes a light source,
The incident light is a distance measuring device that is reflected light of light irradiated from the light source. The method of claim 4,
The distance measurement apparatus further comprising transistors configured to output voltages of the first and second capacitors in response to a selection signal. The method of claim 4,
The distance measuring apparatus further comprises a data processing unit configured to calculate a distance based on voltages of the first and second capacitors. In the operating method of the distance measuring device:
Charging the first to fifth capacitors;
Irradiating light toward the object;
Discharging the fourth capacitor at a rate proportional to the amount of incident light incident on the photodiode;
Sharing charges of the first to third capacitors in response to discharge of the fourth capacitor;
Discharging a fifth capacitor at a rate proportional to the amount of the incident light;
Stopping sharing of charges of the first to third capacitors according to the voltage level of the fifth capacitor; And
And calculating a distance to the object using voltages of the first and second capacitors. The method of claim 16,
Charging the first to fifth capacitors comprises charging the fourth capacitor with a voltage corresponding to a threshold voltage of a transistor configured to discharge the fifth capacitor. The method of claim 17,
An operating method in which the voltage of the fourth capacitor is transmitted to the gate of the transistor. The method of claim 17,
When the voltage of the fourth capacitor is at a low level, it is determined whether the first to third capacitors share the charges in response to the voltage of the fifth capacitor. The method of claim 17,
Charging the first to fifth capacitors includes charging a negative voltage to the third capacitor, and charging a power voltage to the first and second capacitors.

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