KR102123423B1 - High Speed Current Steering DAC having Dynamic Resolution Function - Google Patents

Abstract

The present invention relates to a high-speed current-driven digital-to-analog converter (DAC) to which a variable resolution function is applied. According to the present invention, the current-driven DAC supports selective driving of multiple resolutions such as 8-bit, 10-bit, 12-bit with only a single core (DAC current cell) to dramatically reduce the size of a silicon die (e.g. about 1/3 for three resolutions) and accordingly, it can be effectively applied to increase the efficiency of electronic devices such as a human interface system, a portable application system, and a multi-standard communication system that are receiving the most attention recently.

Description

High Speed Current Steering DAC having Dynamic Resolution Function with variable resolution function

The present invention relates to a current driving (Current Steering) digital-to-analog converter (DAC), and more specifically, a multi-standard communication (Multi-Standard Communication) or a portable application system in a way that the resolution can be adjusted externally without structural changes. Digital-to-analog converter (DAC) is widely applicable to electronic devices.

1 shows a general structure of a typical current-driven DAC. As shown in FIG. 1, a typical current-driven DAC consists of a digital input processing unit (Thermometer Decoder), a DAC core unit (DAC Current Cell), a clock generator, and an analog output buffer (OP-Amp). The digital signals IN1 to IN12 are converted to analog signals by being driven by the clock signals CLK to be outputted through the analog output buffer OP-Amp.

However, in order to realize multiple resolutions, the core portion of the current-driven DAC had to be implemented separately for each resolution. In other words, there was no case where the DAC had only a single core portion and supported multiple resolutions.

Therefore, the present invention has been devised to solve the above-mentioned problems, and the object of the present invention is to support selective driving of multiple resolutions such as 8 bits, 10 bits, and 12 bits with only a single core (DAC Current Cell). By dramatically reducing the size of the silicon die (e.g., about 1/3 for three resolutions), the efficiency of electronic devices such as human interface systems, portable application systems, and multi-standard communication systems, which have been receiving the most attention, is increased. It is to provide a current-driven (Current Steering) digital-to-analog converter (DAC) that can be effectively applied.

First, to summarize the features of the present invention, the DAC according to an aspect of the present invention for achieving the above object, an input latch unit for synchronizing and outputting input digital data according to a clock signal of a clock generator; A thermometer decoder unit for generating thermometer codes for digital data output from the input latch unit, and including a plurality of thermometer decoders for multiple resolutions; A multiplexer unit selectively outputting a thermometer code output by operating a thermometer decoder of a corresponding resolution of the thermometer decoder unit according to a selection value of a logical combination in the resolution selector; A DAC core unit outputting analog voltage corresponding to corresponding thermometer codes inputted through the multiplexer unit; And an analog output buffer for buffering and outputting the output of the DAC core unit.

The DAC of the present invention is characterized by supporting the multiple resolution by configuring the DAC core unit as a single unit and outputting the corresponding analog voltage to the digital bits of the selective multiple resolution inputted to the single DAC core unit.

That is, the DAC of the present invention does not need separate DAC cores that output analog voltages corresponding to the thermometer codes of multiple resolutions, and uses a single DAC core to share the effect of process error when changing resolution. It is characterized by being absent.

The input latch unit is characterized by being implemented with a True Single-Phase Clock (TSPC) DFF (D-Flip Flop).

When the selected resolution is not the maximum resolution, the multiplexer unit uniformly overlaps the number of signals for each digital value of the corresponding thermometer code and outputs a signal corresponding to the maximum resolution to each current cell of the DAC core unit. Is done.

Then, a method of operating a DAC according to another aspect of the present invention includes: synchronizing and outputting input digital data according to a clock signal of a clock generator; Generating a thermometer code for the digital data, the thermometer decoder unit including a plurality of thermometer decoders for multiple resolutions, the thermometer decoder of the corresponding resolution of the thermometer decoder unit according to the selection value of the logical combination in the resolution selector Generating a thermometer code of the corresponding resolution; A multiplexing step of selectively outputting a thermometer code output by operating a thermometer decoder having a corresponding resolution of the thermometer decoder unit to a DAC core unit; Outputting an analog voltage corresponding to corresponding thermometer codes input from the DAC core unit; And buffering and outputting the output of the DAC core unit using a buffer.

The high-speed current-driven DAC to which the variable resolution function according to the present invention is applied has a thermometer decoder unit according to a corresponding resolution type to enable selective driving of 8 bits, 10 bits, 12 bits, etc. with only a single core (DAC Current Cell). By adding and providing a multiplexer unit for selection, it can be effectively applied to increase efficiency in electronic devices such as human interface systems, portable application systems, and multi-standard communication systems, which have been recently attracting attention.

In addition, the high-speed current-driven DAC to which the variable resolution function according to the present invention is applied can also significantly reduce the size of a chip by using only a single core, rather than multiple cores, which were required to support several conventional resolutions.

In addition, since the high-speed current-driven DAC to which the variable resolution function according to the present invention is applied is used by sharing a single DAC core unit, there is no influence of process error due to the conventional resolution change when changing the resolution.

The accompanying drawings included as part of the detailed description to aid understanding of the present invention provide embodiments of the present invention and describe the technical spirit of the present invention together with the detailed description.
1 shows a general structure of a typical current-driven DAC.
2 is a block diagram of a multi-resolution current driving DAC according to an embodiment of the present invention.
FIG. 3 is a diagram showing the relationship between the internal circuit 100 of the multiplexer unit 600 of FIG. 2 and the internal circuit 200 of the DAC core unit 700.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. At this time, the same components in each drawing are denoted by the same reference numerals as possible. In addition, detailed descriptions of already known functions and/or configurations are omitted. The contents disclosed below focus on parts necessary for understanding the operation according to various embodiments, and descriptions of elements that may obscure the subject matter of the description will be omitted. Also, some components of the drawings may be exaggerated, omitted, or schematically illustrated. The size of each component does not entirely reflect the actual size, and thus the contents described herein are not limited by the relative size or spacing of the components drawn in each drawing.

In describing the embodiments of the present invention, when it is determined that a detailed description of known technology related to the present invention may unnecessarily obscure the subject matter of the present invention, the detailed description will be omitted. In addition, terms to be described later are terms defined in consideration of functions in the present invention, which may vary according to a user's or operator's intention or practice. Therefore, the definition should be made based on the contents throughout this specification. The terminology used in the detailed description is only for describing embodiments of the present invention and should not be limiting. Unless expressly used otherwise, a singular form includes a plural form. In this description, expressions such as “including” or “equipment” are intended to indicate certain characteristics, numbers, steps, actions, elements, parts or combinations thereof, and one or more other than described. It should not be interpreted to exclude the presence or possibility of other characteristics, numbers, steps, actions, elements, or parts or combinations thereof.

Further, terms such as first and second may be used to describe various components, but the components are not limited by the terms, and the terms are used to distinguish one component from other components. Used only.

2 is a block diagram of a multi-resolution current driving DAC according to an embodiment of the present invention.

Referring to FIG. 2, the multi-resolution current-driven DAC according to an embodiment of the present invention includes an input latch unit 400, a thermometer decoder unit 500, a multiplexer unit 600, and a resolution selector unit of a data flip-flop structure. 650), a DAC core unit (DAC Current Cell) 700, an analog output buffer 800 and a clock generator 900.

The clock generator 900 receives an external reference clock signal CLK as an input and generates clock signals for all digital controls necessary for internal operation, such as the input latch unit 400.

The data flip-flop input latch unit 400 used a True Single-Phase Clock (TSPC) DFF to implement a high-speed, low-power operation instead of a conventional D-Flip (DFF), which is a clock generator (900). ) Outputs input digital data (eg, IN1 to IN12) according to a clock signal, but improves glitch by synchronizing and outputting input digital data (eg, IN1 to IN12) as one clock signal.

The thermometer decoder unit 500 receives synchronized digital data (eg, 8 bits, 10 bits, or 12 bits) from the input latch unit 400 and outputs a thermometer code. The thermometer decoder unit 500 has a plurality of thermometer decoders for multiple resolutions, and each thermometer decoder may operate according to the selection of the resolution selector 650. In the figure, each thermometer decoder for 8-bit, 10-bit, or 12-bit resolution is shown, but is not limited thereto, and may be configured with more or less thermometer decoders as needed. The thermometer decoders of the thermometer decoder unit 500 each have a number of thermometer code signals according to a corresponding resolution, for example, 128 signals for 8 bits, 1024 signals for 10 bits, or 4096 signals for 12 bits. Can output However, in the case of a method of classifying and processing upper and lower bits according to the design of the DAC core unit 700, for 8-bit resolution, dividing them by 4 bits and corresponding 16+16=32 thermometer code signals are the DAC core unit 700 It is input, and the DAC core unit 700 may classify and process 16 signals corresponding to the upper and lower bits, and then synthesize and output the same analog voltage as when 128 signals are input. In the case of 10-bit resolution, the corresponding 32+32=64 thermometer code signals are input to the DAC core unit 700 by dividing them by 5 bits, and the DAC core unit 700 classifies and processes 32 signals corresponding to the upper and lower bits and synthesizes them. The analog voltage can be output as if 1024 signals were input. Similarly, in the case of 12-bit resolution, the corresponding 64+64=128 thermometer code signals are divided into 6 bits, and the DAC core unit 700 classifies and processes 64 signals corresponding to the upper and lower bits. It can also be synthesized and output the same analog voltage as when 4096 signals are input.

The multiplexer unit 600 receives the thermometer codes output from the thermometer decoder 500 and selectively selects the thermometer codes of the corresponding resolution according to the values selected by the resolution selector 650 (logical combination values of A1 and A2), and the DAC core unit. (700).

The DAC core unit 700 outputs analog voltages corresponding to corresponding thermometer codes input through the multiplexer unit 600. The analog output buffer 800 buffers the output of the DAC core unit 700 using an operational amplifier or the like to generate a corresponding analog output to be transmitted without distortion to a subsequent processing unit.

FIG. 3 is a diagram showing the relationship between the internal circuit 100 of the multiplexer unit 600 of FIG. 2 and the internal circuit 200 of the DAC core unit 700. 3 shows the relationship of the internal circuits 100 and 200 for resolutions of 8 bits, 10 bits, and 12 bits. In the drawing, p<1:4096>, q<1:1024>, and r<1:256> indicate thermometer code signals of the corresponding number output from the 12-bit, 10-bit, and 8-bit thermometer decoders 500, respectively.

As shown in FIG. 3, the internal circuit 100 of the multiplexer unit 600 outputs 4096 (=2 ¹² ) switch signals s<1:4096> corresponding to the selected resolution to each current cell of the DAC core unit 700 do. Since q<1:1024> and r<1:256> signals are less than 4096 (=2 ¹² ) signals, 4 and 16 signals are overlapped, respectively, that is, 4*q<1:1024>, 16 *r<1:256> so as to be selectively connected by switches (sw1, sw2, sw3), 4096 (=2 ¹² ) switch signals s<1:4096> corresponding to the selected resolution can be output. .

In FIG. 3, the DAC core unit 700 includes 4096 (=2 ¹² ) current cells including switches (eg, MOSFETs) for receiving the thermometer codes selected from the multiplexer unit 600, respectively. The switches are turned on or off depending on the logic high or logic low state of the thermometer codes, and the current flowing through the switches (eg, MOSFET) from the current of the current source by the turned on switches flows through the resistance of the output terminal. Can generate an analog voltage. The MOSFET is a Metal Oxide Semiconductor Field Effect Transistor.

That is, as shown in FIG. 3, the thermometer decoder unit 500 outputs the outputs of p<1:4096>, q<1:1024>, and r<1:256> from the 12-bit, 10-bit, and 8-bit thermometer decoders, respectively. In the case of 12-bit, every signal p<1:4096> corresponds to 4096 unit current cells, in case of 10-bit, four unit current cells per signal q<1:1024>, and in case of 8-bit There are 16 unit current cells per r<1:256>. Therefore, the switch input signal of the internal circuit 100 of the multiplexer unit 600 of FIG. 3 is p<1:4096> at 12 bits, 4*q<1:1024> at 10 bits, and 16*r<1 at 8 bits: 256>, which is selected by the multiplexer 600 according to the signal selected by the resolution selector 650, and comes out as a single output s<1:4096>. In FIG. 3, N*q<1:k> means a signal in which q<1> is N times, q<2> is N times, and ..., q<k> is N times. For example, 2*q<1:3> represents q<1>, q<1>, q<2>, q<2>, q<3>, and q<3>. That is, when the selected resolution is not the maximum resolution (eg, 8 bits, 10 bits), the multiplexer unit 600 uniformly overlaps the number of signals for each digital value of the thermometer code (eg, 12 bits). The number of signals corresponding to is output to each current cell of the DAC core unit 700.

As described above, the high-speed current-driven DAC to which the variable resolution function according to the present invention is applied has a thermometer decoder unit to enable selective driving of multiple resolutions such as 8-bit, 10-bit, and 12-bit with only a single core (DAC Current Cell). By adding a multiplexer for selection according to the resolution type, it can be effectively applied to increase efficiency in electronic devices such as human interface systems, portable application systems, and multi-standard communication systems, which are receiving the most attention recently. In addition, the high-speed current-driven DAC to which the variable resolution function according to the present invention is applied can significantly reduce the size of a chip by using only a single core rather than several cores required to support multiple conventional resolutions. In addition, since the high-speed current-driven DAC to which the variable resolution function according to the present invention is applied is used by sharing a single DAC core unit, there is no effect of process error between chips due to the conventional resolution change when changing the resolution.

As described above, in the present invention, specific matters such as specific components and the like have been described by limited embodiments and drawings, but these are provided only to help the overall understanding of the present invention, and the present invention is not limited to the above embodiments , Those of ordinary skill in the art to which the present invention pertains will be able to make various modifications and variations without departing from the essential characteristics of the present invention. Therefore, the spirit of the present invention is not limited to the described embodiments, and should not be determined, and all technical spirits equivalent to or equivalent to the claims as well as the claims described below are included in the scope of the present invention. It should be interpreted as.

Input latch part (400)
Thermometer decoder unit 500
Multiplexer unit (600)
Resolution selector (650)
DAC core part (DAC Current Cell) (700)
Analog Output Buffer (800)
Clock generator (900)

Claims (6)

An input latch unit for synchronizing and outputting input digital data according to the clock signal of the clock generator;
A thermometer decoder unit generating a thermometer code for digital data output from the input latch unit and including a plurality of thermometer decoders for multiple resolutions;
A multiplexer unit selectively outputting a thermometer code output by operating a thermometer decoder of a corresponding resolution of the thermometer decoder unit according to a selection value of a logical combination in the resolution selector;
A DAC core unit that outputs analog voltages corresponding to corresponding thermometer codes input through the multiplexer unit; And
Analog output buffer for buffering and outputting the output of the DAC core
DAC comprising a. According to claim 1,
A DAC, characterized in that the DAC core portion is configured singly. According to claim 2,
DAC without the need for separate DAC cores that output analog voltages corresponding to the thermometer codes of multiple resolutions, and having a single DAC core shared therebetween, so that there is no process error when changing resolution. According to claim 1,
The input latch is a DAC characterized in that it is implemented as a True Single-Phase Clock (TSPC) DFF (D-Flip Flop). According to claim 1,
When the selected resolution is not the maximum resolution, the multiplexer unit uniformly overlaps the number of signals for each digital value of the corresponding thermometer code and outputs a signal corresponding to the maximum resolution to the DAC core unit. . Synchronizing and outputting input digital data according to the clock signal of the clock generator;
Generating a thermometer code for the digital data, the thermometer decoder unit including a plurality of thermometer decoders for multiple resolutions, the thermometer decoder of the corresponding resolution of the thermometer decoder unit according to the selection value of the logical combination in the resolution selector Generating a thermometer code of the corresponding resolution;
A multiplexing step of selectively outputting a thermometer code output by operating a thermometer decoder having a corresponding resolution of the thermometer decoder unit to a DAC core unit;
Outputting an analog voltage corresponding to corresponding thermometer codes input from the DAC core unit; And
Buffering and outputting the output of the DAC core unit using a buffer
DAC operation method comprising a.

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