KR102117299B1 - Display Device - Google Patents

Abstract

The display device according to the present invention includes: an upper substrate including a gate wiring formed on an inner surface opposite to an outer surface facing outward; A lower substrate bonded to face an inner surface of the upper substrate; And an anti-reflection unit formed on an outer surface or an inner surface of the upper substrate so as to overlap the gate wiring to reduce reflectance of external light to the gate wiring.

Description

Display device

The present invention relates to a display device, and more particularly, to a display device in which the aesthetic sense is improved while the thickness is reduced.

With the advent of the information age, a display device displaying a large amount of information has rapidly developed. In particular, a liquid crystal display device or an organic light emitting display device, which is a flat panel display device having excellent performance of thinning, lightening, and low power consumption, has been developed and existing Is replacing the Cathode Ray Tube.

Among liquid crystal display devices (LCDs), an active matrix type liquid crystal display device including an array substrate provided with a thin film transistor, which is a switching element capable of adjusting voltage on and off for each pixel, has a resolution and It is attracting the most attention because of its excellent ability to realize videos.

In addition, the organic light emitting display device (OLED) has high luminance and low operating voltage characteristics, and is a self-emission type that emits light by itself, and has advantages of high C / R (contrast ratio) characteristics, ultra-thin implementation, low temperature stability, and low driving voltage. With this, it has a response time of a few microseconds, and thus it is easy to implement a moving image, and it is attracting the most attention as a flat panel display device because it is easy to manufacture and design a driving circuit.

Various improvement measures are required so that such display devices can appeal to more consumers. In particular, it is necessary to minimize the thickness of the display device and appeal to the aesthetic sense of the consumer to enhance the aesthetic sense of the design. Development is progressing steadily.

1 is a schematic cross-sectional view of a conventional display device.

As shown in FIG. 1, a conventional display device includes a display panel 10 including a lower substrate 12 and an upper substrate 14, a panel driver 20, and a top case 30.

The lower substrate 12 includes a plurality of gate lines and a plurality of data lines intersecting each other to define a pixel area, a thin film transistor formed for each pixel area, and a pixel electrode connected to the thin film transistor.

The upper substrate 14 includes a color filter, and is oppositely bonded to the lower substrate 12, in order to apply a signal to the gate wiring and the data wiring formed on the lower substrate 12, the lower substrate 12 Some should be exposed outside. To this end, some regions of the lower substrate 12 are not bonded to the upper substrate 14, and the panel driving unit 20 is located at the edge portion of the lower substrate 12 that is not bonded to the upper substrate 14. It is connected to the formed pad portion to transmit signals to the gate wire and the data wire through the pad portion.

The top case 30 is formed to cover the front edge portion and each side of the display panel 10. The top case 30 is applied to prevent the panel driving part 20 connected to the pad part of the lower substrate 12 from being exposed to the outside.

However, as the top case 30 is formed to cover the front edge portion and each side of the display panel 10 in order to prevent exposure to the outside of the panel driving unit 20, the following disadvantages are: have.

First, since the top case 30 is formed on the upper substrate 14, the thickness of the display device increases as much as that, and a step portion is generated on the front surface of the display device, thereby deteriorating aesthetics.

In addition, due to the width of the top case 30 for preventing exposure of the panel driving unit 20, the width of the bezel of the display device is increased, so that there is a disadvantage that a sense of beauty is reduced.

On the other hand, due to the enlargement of the display device, when a large number of users watch from various angles, the viewing angle has become an important issue.

A typical display device includes a black matrix (or light-blocking layer) that defines a pixel area while preventing light leakage caused by misalignment when bonding the upper substrate 14 and the lower substrate 12. However, as the width of the black matrix becomes larger than the width of the gate wiring and the data wiring, as the problem of a decrease in aperture ratio and a decrease in luminance arises, an improvement is required.

The present invention has been devised to solve the above-mentioned problems, and it is a technical problem to provide a display device with improved aesthetics while minimizing thickness.

In addition, another technical problem of the present invention is to provide a display device capable of improving a reflection problem of external light due to wiring formed on an upper substrate in consideration of a viewing angle problem.

In addition to the technical problems of the present invention mentioned above, other features and advantages of the present invention are described below, or it will be clearly understood by those skilled in the art from the description and description.

A display device according to the present invention for achieving the above-described technical problem includes an upper substrate including a gate wiring formed on an inner surface opposite to an outer surface facing outward; A lower substrate bonded to face an inner surface of the upper substrate; And an anti-reflection unit formed on an outer surface or an inner surface of the upper substrate so as to overlap the gate wiring to reduce reflectance of external light to the gate wiring.

The anti-reflection unit includes first and second anti-reflection layers interposed between the inner surface of the upper substrate and the gate wiring so as to overlap the gate wiring, and the first anti-reflection layer is made of a transparent conductive material, so that the upper substrate Interposed between the inner surface of the and the gate wiring, the second anti-reflection layer is made of a metal material, characterized in that interposed between the inner surface of the upper substrate and the first anti-reflection layer.

The anti-reflection portion includes first and second anti-reflection layers formed on outer surfaces of the upper substrate so as to overlap the gate wiring, and the first anti-reflection layer is made of a transparent conductive material, so that the upper substrate overlaps the gate wiring. It is formed on the outer surface, the second anti-reflection layer is made of a metal material, characterized in that formed to cover the first anti-reflection layer or the top surface of the first anti-reflection layer.

The first anti-reflection layer is indium-tin-oxide (ITO), indium-zinc-oxide (IZO), zinc-oxide (ZnO), indium-gallium-zinc-oxide (IGZO), aluminum-zinc-oxide (AZO) , In ₂ O ₃ , Ga ₂ O ₃ -In ₂ O ₃ , ZnO: B, and ZnO-In ₂ O ₃ It is made of any one of the transparent conductive material, the second anti-reflection layer is made of a metal material of any one of molybdenum (Mo), titanium (Ti), lead (Pb), nickel (Ni), and chromium (Cr) It is characterized by.

The anti-reflection unit may further include a third anti-reflection layer interposed between the inner surface of the upper substrate and the second anti-reflection layer.

The anti-reflection portion is made of a light absorbing material that absorbs the external light, and is characterized in that it further comprises a light absorbing layer interposed between the inner surface of the upper substrate and the second anti-reflection layer.

The anti-reflection portion is interposed between the gate wiring and the inner surface of the upper substrate so as to overlap with the gate wiring, and is characterized by comprising a light absorbing material that absorbs the external light. Here, the gate wiring is made of first and second metal layers stacked to have different reflectivity, and the second metal layer is interposed between the anti-reflection part and the second metal layer.

The anti-reflection unit includes first and second anti-reflection layers interposed between the inner surface of the upper substrate and the gate wiring so as to overlap the gate wiring, and the first anti-reflection layer is made of an insulating material or a transparent conductive material, It is characterized in that it is interposed between the inner surface of the upper substrate and the gate wiring, and the second anti-reflection layer is made of a light absorbing material and interposed between the first anti-reflection layer and the gate wiring.

The anti-reflection unit includes first and second anti-reflection layers formed in a stacked structure on an outer surface of the upper substrate so as to overlap with the gate wiring, and the first anti-reflection layer is made of a metal material, so that the gate wiring overlaps the It is formed on the outer surface of the upper substrate, the second anti-reflection layer is made of a light absorbing material, it characterized in that it is formed to cover the top or the first anti-reflection layer of the first anti-reflection layer.

The anti-reflection portion is made of an insulating material or a transparent conductive material, and is formed on an upper surface of the second anti-reflection layer or a third anti-reflection layer formed to cover the top surface of the second anti-reflection layer and each side of the first and second anti-reflection layers. It characterized in that it further comprises a.

According to the present invention, there are the following effects.

First, without forming a panel driver to cover a side surface of the upper substrate, and positioned on the rear surface of the upper substrate, the width of the non-display area can be reduced, and a narrow bezel display device that does not require a top case can be implemented. That is, the thickness of the display device is reduced, and the front step of the display device is removed, thereby obtaining an aesthetic design effect in which the front surface of the display device is recognized as one structure.

Second, while taking into account the viewing angle characteristics, by improving the reflection visual and optical characteristics generated by the wiring of the upper substrate, there is an effect of improving the luminance and improving the immersion of the screen of the user. In particular, the anti-reflection portion is formed on the inner surface or the outer surface of the upper substrate overlapping the gate electrode and the gate wiring, thereby reducing the reflectance caused by external light to improve the viewing angle problem while improving the reflection problem caused by the wiring of the upper substrate. Can be.

1 is a schematic cross-sectional view of a conventional display device.
2 is a cross-sectional view schematically showing a display device according to a first embodiment of the present invention.
3 is a cross-sectional view of one pixel area in the display device according to the first exemplary embodiment of the present invention.
4 is a cross-sectional view showing a gate electrode according to a first embodiment of the present invention.
5 is a view comparing the reflectivity of the display device according to the comparative example and the first embodiment.
6 is a cross-sectional view showing a gate electrode according to a second embodiment of the present invention.
7 is a graph showing reflectance according to the thickness of the antireflection layer made of amorphous silicon in the gate electrode according to the second embodiment of the present invention.
8 is a cross-sectional view illustrating a gate electrode according to a third embodiment of the present invention.
9 is a graph showing reflectance according to the thickness of the first anti-reflection layer made of silicon nitride in the gate electrode according to the third embodiment of the present invention.
10 is a graph showing reflectance according to the thickness of the first anti-reflection layer made of indium-tin-oxide (ITO) in the gate electrode according to the third embodiment of the present invention.
11 is a cross-sectional view showing a gate electrode according to a fourth embodiment of the present invention.
12 is a cross-sectional view schematically showing a display device according to a second embodiment of the present invention.
13 is a cross-sectional view for describing a first embodiment of the anti-reflection layer shown in FIG. 12.
14 is a cross-sectional view for describing a second embodiment of the anti-reflection layer shown in FIG. 12.
15 is a cross-sectional view for describing a third embodiment of the anti-reflection layer shown in FIG. 12.

The meaning of the terms described in this specification should be understood as follows.

It should be understood that a singular expression includes a plurality of expressions unless the context clearly defines otherwise, and the terms "first", "second", etc. are intended to distinguish one component from another component, The scope of rights should not be limited by these terms.

It should be understood that terms such as “include” or “have” do not preclude the existence or addition possibility of one or more other features or numbers, steps, actions, components, parts or combinations thereof.

It should be understood that the term “at least one” includes all possible combinations from one or more related items. For example, the meaning of "at least one of the first item, the second item, and the third item" means 2 of the first item, the second item, or the third item, as well as the first item, the second item, and the third item, respectively. Any combination of items that can be presented from more than one dog.

The term "on" is meant to include not only the case where a certain component is formed on the upper surface of another component, but also when a third component is interposed between these components.

Hereinafter, a preferred embodiment of the display device according to the present invention will be described in detail with reference to the accompanying drawings.

2 is a cross-sectional view schematically showing a display device according to a first embodiment of the present invention.

Referring to FIG. 2, the display device 100 according to the first exemplary embodiment of the present invention includes a display panel on which an upper substrate (or transistor array substrate; 102) and a lower substrate (or color filter array substrate; 181) are bonded. (101). At this time, the panel driver 196 is disposed on the rear surface of the upper substrate 102 corresponding to the non-display area NA, rather than the side surface of the upper substrate 102. Here, the panel driver 196 includes a flexible circuit film (or flexible printed circuit board; 196a) on which the driving IC chip 196b is mounted, and a data printed circuit board 196c connected to the flexible circuit film 196a. Although shown as, the configuration of the panel driving unit can be designed by variously changing, and the spirit of the present invention is not limited thereto.

The display device 100 according to the first exemplary embodiment of the present invention includes a thin film transistor including a gate line and a data line defining a plurality of pixel areas crossing each other,  An upper substrate 102 having pixel electrodes formed for each pixel region P to be connected to the thin film transistor;  The lower substrate 181 facing the upper substrate 102 and having a color filter 186 includes a display panel 101 bonded with the liquid crystal layer 195 interposed therebetween.

Although not shown in the drawing, a backlight unit (not shown) is included on the rear surface of the lower substrate 181.

As described above, the features of the present invention include a plurality of gate wirings having a display area AA defining a plurality of pixel areas and a non-display area NA formed on a border of the display area AA, and crossing each other. The upper substrate 102 including a plurality of data wires is disposed on a surface viewed by a user when the actual final product is implemented. At this time, the outer circuit (or front (front); 102F) of the upper substrate 102, the panel driver 196 is disposed on the surface facing the user, so that the flexible circuit film 196a of the upper substrate 102 After being attached to the non-display area NA, it is not bent to cover the side surface of the upper substrate 102, but is bent toward the rear surface of the lower substrate 181 to be lower than the non-display area NA of the upper substrate 102 Will be placed on.

Accordingly, the display device 100 according to the first embodiment of the present invention has a minimum distance between the flexible circuit film 196a and the side surfaces of the upper substrate 102 and the flexible circuit film as compared to the conventional display device (FIG. 1). Since the bezel width is reduced by the thickness of (196a), it is possible to have a narrow bezel having a thinner width.

In addition, since the display apparatus 100 according to the first embodiment of the present invention is exposed to only the outer surface 102F of the upper substrate 102 in front of the upper substrate 102 viewed by the user, the user may view the image. There are no obstructing or annoying components, and the panel driving unit 196 is disposed on the inner surface (or rear surface) 102R of the upper substrate 102 so that the non-display area NA of the upper substrate 102 is Because it is covered by), it does not require a separate case such as a separate top case to solve problems such as aesthetic or internal parts being exposed to the outside.

3 is an enlarged cross-sectional view of one pixel area including a thin film transistor among a plurality of pixel areas formed in a display area of a display device according to a first embodiment of the present invention, and FIG. 4 is a first embodiment of the present invention It is a sectional view showing the gate electrode according to the.

As shown in FIG. 3, in one embodiment, the display device 100 includes a gate electrode 105 forming a multi-layer structure, a gate insulating layer 110 formed on the gate electrode 105, and the gate electrode A thin film transistor (TFT) including a semiconductor layer 120 formed on the gate insulating layer 110 overlapping the 105 and source and drain electrodes 133 and 136 formed to be spaced apart from each other on the semiconductor layer 120 is provided. Includes. At this time, the gate electrode 105 is connected to a gate wiring (not shown), and the source electrode 133 is connected to the data wiring 130. In addition, the semiconductor layer 120 is formed to be spaced apart from each other on the active layer 120a of the amorphous silicon and the impurity amorphous silicon formed on the gate insulating layer 110 overlapping the gate electrode 105, the source and drain electrodes It may be made of an ohmic contact layer (120b) connected to (133, 136).

As described above, another feature of the present invention is that the gate electrode 105 and the gate wiring are formed in a multi-layered structure including at least two anti-reflection layers, thereby reflecting the reflectance of the gate electrode 105 and the gate wiring by external light. It is to reduce.

As illustrated in FIG. 4, the gate electrode 105 formed on the inner surface 102R of the upper substrate 102 has a multi-layer structure including a metal wiring 105a and an anti-reflection unit (ARC). Have At this time, since the gate electrode 105 is formed to extend or protrude from the gate wire when the gate wire is formed, the gate wire also has the same multi-layer structure as the gate electrode 105. Accordingly, in the following description, the description of the structure of the gate wiring will be omitted.

The gate electrode 105 according to the first embodiment is a low-resistance metal material, for example, aluminum (Al), aluminum alloy (AlNd), copper (Cu), copper alloy, molybdenum (Mo), and molybdenum alloy (MoTi) ) Consists of a single-layer or multi-layer metal wiring 105a, and an anti-reflection unit (ARC) formed under the metal wiring 105a. For example, the metal wiring 105a may be a single layer structure of aluminum alloy (AlNd) or a double layer structure of aluminum alloy (AlNd) and molybdenum alloy (MoTi). Further, the metal wiring 105a may be a single layer structure of copper (Cu), a copper (Cu) and molybdenum alloy (MoTi), or a double layer structure of copper (Cu) and molybdenum (Mo).

The anti-reflection unit ARC has a structure in which the first anti-reflection layer 105b and the second anti-reflection layer 105c are sequentially stacked.

The first anti-reflection layer 105b is a transparent conductive material, for example, indium-tin-oxide (ITO), indium-zinc-oxide (IZO), zinc-oxide (ZnO), indium-gallium-zinc-oxide (IGZO ), Aluminum-zinc-oxide (AZO), In ₂ O ₃ , Ga ₂ O ₃ -In ₂ O ₃ , ZnO: B, and ZnO-In ₂ O ₃ It can be made of any one of. The first anti-reflection layer 105b may be formed to a thickness of 300Å to 1000Å.

The second anti-reflection layer 105c may be made of any one of a metallic material, for example, molybdenum (Mo), titanium (Ti), lead (Pb), nickel (Ni), and chromium (Cr). The second anti-reflection layer 105c may be formed to a thickness of 10Å to 200Å.

Although not shown in the drawing, the anti-reflection unit ARC is a third anti-reflection layer (not shown) formed below the second anti-reflection layer 105c, that is, between the upper substrate 102 and the second anti-reflection layer 105c. ) May be further included. At this time, the third anti-reflection layer (not shown) may be made of an inorganic insulating material, for example, silicon oxide (SiO ₂ ) or silicon nitride (SiNx), and may have a refractive index similar to that of the first anti-reflection layer 105b. . In addition, the third anti-reflection layer (not shown) may be formed to a thickness of 100 Å to 1000 Å.

Hereinafter, the configuration of the transistor array substrate provided on the upper side, that is, the upper substrate 102 will be described in more detail.

First, the upper substrate 102 may be made of a transparent insulating material forming a base, for example, glass or plastic material. The inner surface 102R of the upper substrate 102, that is, the opposite surface facing the lower substrate 104, with the gate insulating film 110 interposed therebetween, extends vertically and horizontally to the lower portion and the upper portion thereof to cross a plurality of A plurality of gate wirings and data wirings defining the pixel region P are formed.

In addition, a common wiring may be further formed on the inner surface 102R of the upper substrate 102 according to the liquid crystal driving mode of the display device. In this case, the common wiring is made of the same material as the gate wiring, and passes through each pixel area P while being separated from the gate wiring.

In addition, a gate pad electrode (not shown) connected to one end of the gate wiring may be formed in one non-display area NA of the inner surface 102R of the upper substrate 102, and each data wiring may be A data pad electrode (not shown) connected to the end may be formed. When the common wiring is formed, an auxiliary common wiring (not shown) connecting one end of the common wiring and a common pad electrode (not shown) connected to one end of the common common wiring may be further formed. Here, each of the gate wiring, the data wiring, and the common wiring is a low-resistance metal material, for example, aluminum (Al), aluminum alloy (AlNd), copper (Cu), copper alloy, molybdenum (Mo), molybdenum alloy (MoTi) It can be made of one or more of.

As described above, the gate insulating layer 110 is formed on the gate electrode 105, and the semiconductor layer 120 composed of the active layer 120a and the ohmic contact layer 120b is formed on the gate insulating layer 110. Source and drain electrodes 133 and 136 spaced apart from each other are formed on the semiconductor layer 120. Accordingly, a thin film transistor (TFT) that is a switching device including the gate electrode 105, the semiconductor layer 120, and source and drain electrodes 133 and 136 is formed on the upper substrate 102.

The upper substrate 102 on which the thin film transistor (TFT) is formed is made of an inorganic insulating material, for example, silicon oxide (SiO ₂ ) or silicon nitride (SiNx), or an organic insulating material, for example, photo acryl. ) Or a protective layer 140 made of benzocyclobutene (BCB) may be formed. In this case, the protective layer 140 includes a drain contact hole 143 exposing the drain electrode 136 of each thin film transistor TFT, the gate pad electrode (not shown) and the data pad electrode (not shown), respectively. A gate pad contact hole (not shown) and a data pad contact hole (not shown) may be formed to expose each.

When the common wiring (not shown) and the auxiliary common wiring (not shown) are formed, a common contact hole (not shown) exposing the common wiring (not shown) in each pixel area P in the protective layer 140 City) may be formed, and a common pad contact hole (not shown) exposing the common pad electrode (not shown) connected to the auxiliary common wiring (not shown) may be formed. When the common wiring (not shown) is used as a storage electrode, the common contact hole (not shown) may be omitted.

Meanwhile, a pixel electrode 150 in the form of a plate in contact with each drain electrode 136 through the drain contact hole 143 is formed on the protective layer 140 corresponding to each pixel region P. An auxiliary gate pad electrode (not shown) that is in contact with the gate pad electrode (not shown) through the gate pad contact hole (not shown) on the protective layer 140 corresponding to the non-display area NA City), and an auxiliary data pad electrode (not shown) contacting the data pad electrode (not shown) through the data pad contact hole (not shown), respectively. In addition, when the auxiliary common wiring (not shown) is formed, an auxiliary common pad electrode contacting the common pad electrode (not shown) through the common pad contact hole (not shown) on the protective layer 140. (Not shown) may be formed.

Meanwhile, the upper substrate 102 having the above-described configuration may be used as a transistor array substrate of a twisted nematic mode liquid crystal display device if only the pixel electrode 150 is provided in each pixel area P, but is not limited thereto. The electrode structure of the pixel electrode 150 and the common wiring may be variously modified depending on the case of a transverse electric field type or fringe field switching mode liquid crystal display device of the liquid crystal display device. In addition, the upper substrate 102 may be used as a substrate for an organic light emitting display device.

In one embodiment, when the upper substrate 102 is used as a transistor array substrate for a liquid crystal display device in a transverse electric field mode, the pixel electrode 150 formed in each pixel area P is not a plate-shaped bar (bar). ), A plurality of common electrodes having a bar shape may be formed between the plurality of bar-shaped pixel electrodes. At this time, the plurality of bar-shaped common electrodes are connected to the common wiring (not shown) through the common contact hole (not shown).

Although not shown in the figure, the common electrode and the pixel electrode having the bar shape are symmetrically bent based on the central portion of each pixel region P, and each pixel region P is a double domain region in the upper and lower portions. It can be formed to achieve. In this way, the pixel region P forms a dual domain region in order to improve display quality by suppressing color difference caused by a change in a viewing angle when a user views the display region AA.

In another embodiment, when the upper substrate 102 is used as a transistor array substrate for a liquid crystal display device in a fringe field switching mode, a protective layer (not shown) is further added over the pixel electrode 150 in the plate shape. A common electrode (not shown) in the form of a bar having a plurality of first openings (not shown) may be formed on the protective layer (not shown) corresponding to the plurality of pixel electrodes 150. It may be formed to be spaced apart at regular intervals. In this case, the common electrode (not shown) may be formed on the front surface of the display area AA, and in this case, a second opening (not shown) may be further formed on the common electrode in response to the thin film transistor TFT. have. In the case of a transistor array substrate for a liquid crystal display device in a fringe field switching mode having such a configuration, the plurality of first openings may be formed in a symmetrically bent structure based on a central portion of each pixel area P. Each pixel region P may be formed to have a dual domain.

On the other hand, in the transistor array substrate for a liquid crystal display device in a fringe field switching mode having the above-described configuration, the pixel electrode 150 and the common electrode (not shown) may be formed by changing their positions. In this case, the pixel electrode 150 is positioned on the common electrode, and the plurality of first openings (not shown) may be provided on the pixel electrode 150.

In another embodiment, when the upper substrate 102 is used as a substrate for an organic light emitting display device, although not shown in the drawing, on the same layer of the upper substrate 102 on which the gate wiring or data wiring is formed A power wiring having a predetermined interval formed of the same material as the gate wiring or the data wiring may be further provided. In this case, a pixel driving circuit (not shown) including at least one thin film transistor TFT connected to the power supply wiring in addition to at least one thin film transistor TFT connected to the gate wiring and data wiring in each pixel region P, and An organic light emitting device including a first electrode connected to a drain electrode (or source electrode) of the driving thin film transistor, an organic emission layer connected to the first electrode, and a second electrode connected to the organic emission layer may be further provided. have.

Meanwhile, the lower substrate 181 is positioned below the upper substrate 102 having various configurations as described above.

Hereinafter, the configuration of the color filter array substrate provided on the lower side, that is, the lower substrate 181 will be described in detail.

First, a black matrix 183 overlapping the boundary of each pixel region P and the thin film transistor TFT is formed on the inner side of the lower substrate 181 made of transparent glass or plastic. In addition, a color filter 186 in which red, green, and blue color filter patterns 186a, 186b, and 186c are sequentially repeated in an opening area corresponding to each pixel area P defined by the black matrix 183. Can be formed. In this case, when the upper substrate 102 is a twisted nematic mode transistor array substrate, a common electrode 188 made of a transparent conductive material may be formed on the color filter 186. In addition, when the upper substrate 102 is a transistor array substrate for a liquid crystal display device of a transverse electric field type or fringe field switching mode, the color filter 186 is covered on the upper portion of the color filter 186 and has a flat surface. An overcoat layer (not shown) may be formed.

In addition, a liquid crystal layer 195 is provided between the upper substrate 102 and the lower substrate 181 having such a configuration, and the upper substrate 102 and the lower substrate 181 leak the liquid crystal layer 195. The display panel 101 is formed by opposingly bonding the liquid crystal layer 195 with a seal pattern (not shown) formed to surround the display area AA to prevent.

Although not shown in the drawing, the liquid crystal layer 195 between the upper substrate 102 and the lower substrate 181 maintains a constant thickness over the entire display area AA, at the boundary of the pixel area P. A plurality of columnar patterned spacers (not shown) that simultaneously contact the upper substrate 102 and the lower substrate 181 may be formed to be spaced apart at regular intervals.

In addition, a backlight unit 200 is provided on the outer surface of the lower substrate 181 of the display panel 101 having such a configuration, and an auxiliary gate provided in the non-display area NA of the upper substrate 102 and A flexible circuit film 196a on which the driving IC chip 196b is mounted is attached to the data pad electrode (not shown), and the flexible circuit film 196b on which the driving IC chip 196b is mounted is the backlight unit 200. The outer surface of the upper substrate 102 may be bent so as not to be exposed to the outer side.

On the other hand, when the display device 100 is an organic light emitting display device, instead of the lower substrate 181 including the color filter 186, an encapsulation substrate (not shown) faces the upper substrate 102. It is formed, and such an encapsulation substrate (not shown) does not have components such as a color filter and a black matrix. In addition, the encapsulation substrate or the upper substrate 102 may be made of an opaque material such as aluminum foil or stainless steel in addition to a transparent plastic or glass material. In addition, since the organic light emitting display device is a self-luminous element, the backlight unit (200 in FIG. 3) is omitted.

Accordingly, the display device 100 (liquid crystal display device or organic light emitting display device) according to the first embodiment of the present invention is disposed such that the transistor array substrate, that is, the upper substrate 102 is positioned above the user's view, and is colored. After the filter array substrate, that is, the lower substrate 181 is disposed under the flexible circuit film 196a on which the driving IC chip 196b is mounted, is attached to the non-display area NA of the upper substrate 102, and then the upper Without bending to cover the side surface of the substrate 102, so as to be positioned on the outer surface of the lower substrate 181, more specifically, the rear surface of the backlight unit 200 located on the outer surface of the lower substrate 181 By bending, the width of the non-display area NA is reduced compared to a conventional liquid crystal display device (FIG. 1), and thus a product having a narrow bezel can be realized. In addition, the display apparatus 100 according to the first embodiment of the present invention can improve the user's screen immersion by implementing a borderless by a narrow bezel.

5 is a view comparing the reflectivity of the display device according to the comparative example and the first embodiment.

As illustrated in FIG. 5, reflectances of comparative examples and examples according to structural differences of the gate electrodes were evaluated. In this case, the comparative example is a gate electrode that does not include an antireflection layer, and the embodiment is a gate in which indium-tin-oxide (ITO) having a thickness of 60 nm and molybdenum having a thickness of 7 nm are formed on the lower portion of the metal wiring as an antireflection layer. It is an electrode.

Accordingly, when the transparent conductive material and the metallic material are further formed as in the embodiment of the present invention in contrast to the case where the gate electrode is formed of only a low-resistance metallic material, the reflectance of about 25 to 35% of external light is reflected. It can be seen that it has the effect of reducing the. Here, the transparent conductive material should satisfy the value of n (refractive index) of 1 to 3, and the metal material is a multiplication operation value of n (refractive index) and k (absorption coefficient) as shown in Equation 1 below (n × k) must exceed 3.

In addition, when the inorganic insulating material is further formed under the metal material, the inorganic insulating material must satisfy an n value similar to that of the transparent conductive material.

Therefore, the display device 100 according to the first exemplary embodiment of the present invention may improve a viewing angle problem while improving a reflection problem caused by wiring of the upper substrate.

6 is a cross-sectional view showing a gate electrode according to a second embodiment of the present invention.

As illustrated in FIG. 6, the gate electrode 105 according to the second embodiment of the present invention has a multi-layer structure including an anti-reflection unit (ARC) including a light absorbing material and a metal wiring 105a. Have

The anti-reflection unit ARC is interposed between the inner surface 102R of the upper substrate 102 and the metal wiring 105a so as to overlap with the metal wiring 105a, and is transmitted through the upper substrate 102. It serves to absorb external light traveling toward the metal wiring 105a. The anti-reflection unit (ARC) is any light absorbing material capable of absorbing light incident toward the metal wiring 105a is applicable. For example, the anti-reflection unit (ARC) may be made of amorphous silicon (a-Si). In general, the amorphous silicon (a-Si) has a high light absorption rate and is used to convert solar energy into electrical energy, and has a feature that the light absorption rate is approximately 100 times higher than that of crystalline silicon. The anti-reflection unit (ARC) reduces the amount of light traveling toward the metal wiring 105a by absorbing about 60 to 70% of the incident light passing through the upper substrate 102 to the metal wiring 105a. Reduces the amount of reflected light reflected by.

The metal wiring 105a is made of a low-resistance metal material, and may be formed of first and second metal layers ML1 and ML2.

The first metal layer ML1 may be made of any one of aluminum (Al), aluminum alloy (AlNd), copper (Cu), and copper alloy.

The second metal layer ML2 is interposed between the anti-reflection unit ARC and the first metal layer ML1, and may be made of a metal material having a lower reflectivity than the first metal layer ML1. For example, the second metal layer ML2 may be formed of any one of molybdenum (Mo), titanium (Ti), molybdenum (Mo) / titanium (Ti), and chromium (Cr). The second metal layer ML2 is applied to enhance the adhesion of the first metal layer ML1, but is made of a metal material having a lower reflectivity than the first metal layer ML1. It also serves to reduce the reflectance of the metal layer ML1.

Meanwhile, the external light is reflected by the anti-reflection unit ARC as the primary reflected light RL1, and a part of the light that is not absorbed and transmitted through the anti-reflection unit ARC is secondary reflected light in the second metal layer ML2. (RL2). However, the primary reflected light RL1 and the secondary reflected light RL2 are extinguished by canceling interference. To this end, the thickness of the anti-reflection unit ARC is preferably set so that the primary reflected light RL1 and the secondary reflected light RL2 are extinguished by canceling interference due to a phase difference (or path difference).

7 is a graph showing reflectance according to the thickness of the antireflection layer made of amorphous silicon in the gate electrode according to the second embodiment of the present invention.

In general, when the reflectance of the metal wiring 105a to external light is 35% or less, the reflected light is not recognized by the user. Accordingly, as can be seen in FIG. 7, when the thickness of the amorphous silicon (a-Si) interposed between the inner surface 102R of the upper substrate 102 and the metal wiring 105a is formed to be 3 nm or more. , The reflectance by the metal wiring 105a may be 35% or less. Therefore, in order to ensure the reflectivity of the gate electrode 105 to 35% or less, the anti-reflection portion (ARC) made of the amorphous silicon (a-Si) is preferably formed to a thickness in the range of 3nm ~ 120nm.

8 is a cross-sectional view showing a gate electrode according to a third embodiment of the present invention, which changes the structure of the anti-reflection unit (ARC) in the gate electrode 105 according to the third embodiment of the present invention shown in FIG. It is composed by. Accordingly, in the following description, only the anti-reflection unit ARC will be described.

The anti-reflection unit ARC may include first and second anti-reflection layers AR1 and AR2.

The first anti-reflection layer AR1 is interposed between the inner surface 102R of the upper substrate 102 and the metal wiring 105a so as to overlap with the metal wiring 105a described above, and the metal wiring 105a. It serves to extinguish reflected light reflected by the outside through offset interference. To this end, the first anti-reflection layer AR1 may be made of a material having a refractive index of 1.5 to 2.4. For example, the first anti-reflection layer AR1 may be made of an insulating material or a transparent conductive material. Here, the insulating material may be silicon oxide (SiO ₂ ) or silicon nitride (SiNx). In addition, the transparent conductive material is indium-tin-oxide (ITO), indium-zinc-oxide (IZO), zinc-oxide (ZnO), indium-gallium-zinc-oxide (IGZO), aluminum-zinc-oxide (AZO ), In ₂ O ₃ , Ga ₂ O ₃ -In ₂ O ₃ , ZnO: B, and ZnO-In ₂ O ₃ It can be made of any one of.

The second anti-reflection layer AR2 is interposed between the first anti-reflection layer AR1 and the metal wiring 105a, and passes through the first anti-reflection layer AR1 and proceeds toward the metal wiring 105a. It serves to absorb light. Any of the second anti-reflection layer AR2 may be applied as long as it is a light absorbing material capable of absorbing light incident toward the metal wiring 105a. For example, the anti-reflection unit (ARC) may be made of the above-mentioned amorphous silicon (a-Si), it is preferably formed to a thickness in the range of 3nm ~ 120nm.

Meanwhile, external light is reflected from the first anti-reflection layer AR1 to the primary reflection light RL1, and a part of the light that is not absorbed and transmitted through the first anti-reflection layer AR1 is transmitted from the second anti-reflection layer AR2. It is reflected by the secondary reflected light RL2. However, the primary reflected light RL1 and the secondary reflected light RL2 are extinguished by canceling interference. To this end, the thickness of the first anti-reflection layer AR1 is preferably set such that the primary reflected light RL1 and the secondary reflected light RL2 are extinguished by offset interference due to a phase difference (or path difference).

9 is a graph showing reflectance according to the thickness of the first anti-reflection layer made of silicon nitride in the gate electrode according to the third embodiment of the present invention.

9, it can be seen that the gate electrode 105 including the first anti-reflection layer made of silicon nitride (SiNx) has a reflectance of 15% or less. Accordingly, it can be seen that the gate electrode 105 including the first anti-reflection layer made of silicon nitride (SiNx) has a reflectance of 15% or less. Accordingly, the first anti-reflection layer (AR1) is preferably formed to a thickness in the range of 5nm ~ 300nm.

10 is a graph showing reflectance according to the thickness of the first anti-reflection layer made of indium-tin-oxide (ITO) in the gate electrode according to the third embodiment of the present invention.

10, it can be seen that the gate electrode 105 including the first anti-reflection layer made of indium-tin-oxide (ITO) has a reflectance of 15% or less. Accordingly, it can be seen that the gate electrode 105 including the first anti-reflection layer made of indium-tin-oxide (ITO) has a reflectance of 15% or less. Accordingly, the first anti-reflection layer (AR1) is preferably formed to a thickness in the range of 5nm ~ 300nm.

11 is a cross-sectional view showing a gate electrode according to a fourth embodiment of the present invention, which changes the structure of the anti-reflection unit (ARC) in the gate electrode 105 according to the first embodiment of the present invention shown in FIG. It is composed by. Accordingly, in the following description, only the anti-reflection unit ARC will be described.

The anti-reflection unit ARC may be formed of a light absorbing layer 105d and first and second anti-reflection layers 105b and 105c.

The light absorbing layer 105d is interposed between the inner surface 102R of the upper substrate 102 and the second anti-reflection layer 105c so as to overlap with the metal wiring 105a described above, and the upper substrate 102 It serves to absorb light traveling through the metal wiring 105a. The light absorbing layer 105d may be applied as long as it is a light absorbing material capable of absorbing light incident toward the metal wiring 105a. For example, the light absorbing layer 105d may be made of the above-mentioned amorphous silicon (a-Si), and is preferably formed to a thickness in the range of 3nm to 120nm.

The second anti-reflection layer 105c is interposed between the light-absorption layer 105d and the second anti-reflection layer 105c, and a metal material, for example, molybdenum (Mo), titanium (Ti), lead (Pb) , Nickel (Ni), and chromium (Cr). The second anti-reflection layer 105c may be formed to a thickness of 10Å to 200Å.

The first anti-reflection layer 105b is interposed between the second anti-reflection layer 105c and the metal wiring 105a, and a transparent conductive material, for example, indium-tin-oxide (ITO), indium-zinc- Oxide (IZO), zinc-oxide (ZnO), indium-gallium-zinc-oxide (IGZO), aluminum-zinc-oxide (AZO), In ₂ O ₃ , Ga ₂ O ₃ -In ₂ O ₃ , ZnO: B , And ZnO-In ₂ O ₃ It can be made of any one of. The first anti-reflection layer 105b may be formed to a thickness of 300Å to 1000Å.

As described above, in the display device including the gate electrode of any one of the first to fourth embodiments of the present invention, the gate electrode 105 is formed of a multi-layer structure including an anti-reflection unit (ARC) Although described as being not limited thereto, the anti-reflection unit ARC may be formed on the outer surface 102F of the upper substrate 102 so as to overlap the gate electrode 105, as shown in FIG. 12. have.

Hereinafter, the anti-reflection layer formed on the outer surface 102F of the upper substrate 102 will be described in more detail.

12 is a cross-sectional view schematically showing a display device according to a second embodiment of the present invention, and FIG. 13 is a cross-sectional view for describing a first embodiment of the anti-reflection layer shown in FIG. 12, which is included in the gate electrode An antireflection layer is formed on the outer surface of the upper substrate. In describing the present embodiment, description of the same or corresponding components as the previous embodiments will be omitted. In the following description, only the gate electrode and the anti-reflection layer will be described.

First, the gate electrode 105 is formed on the inner surface 102R of the upper substrate 102, a low-resistance metal material, for example, aluminum (Al), aluminum alloy (AlNd), copper (Cu), Copper alloy, molybdenum (Mo), and molybdenum alloy (MoTi) is made of any one of a single-layer or multi-layer structure. At this time, since the gate electrode 105 is formed to extend or protrude from the gate wire when forming the gate wire, the gate wire also has the same single-layer or multi-layer structure as the gate electrode 105.

The anti-reflection unit ARC according to the first embodiment is formed on the outer surface 102F of the upper substrate 102 so as to overlap with the gate electrode 105, the gate electrode 105 shown in FIG. ) Is made of the same structure as the antireflection layer, and is composed of the first antireflection layer AR1 and the second antireflection layer AR2.

The first anti-reflection layer AR1 is formed on the outer surface 102F of the upper substrate 102 so as to overlap with the gate electrode 105, and a transparent conductive material, for example, indium-tin-oxide (ITO) , Indium-zinc-oxide (IZO), zinc-oxide (ZnO), indium-gallium-zinc-oxide (IGZO), aluminum-zinc-oxide (AZO), In ₂ O ₃ , Ga ₂ O ₃ -In ₂ O ₃ , ZnO: B, and ZnO-In ₂ O ₃ . The first anti-reflection layer AR1 may be formed to a thickness of 300Å to 1000Å.

The second anti-reflection layer (AR2) is formed on the top surface of the first anti-reflection layer (AR), a metal material, for example, molybdenum (Mo), titanium (Ti), lead (Pb), nickel (Ni), And chromium (Cr). The second anti-reflection layer AR2 may be formed to a thickness of 10Å to 200Å. Here, the second anti-reflection layer AR2 may be formed to cover not only the top surface of the first anti-reflection layer AR but also each side surface within a range that does not decrease the viewing angle of the display device as much as possible.

Although not shown in the drawing, the anti-reflection unit ARC according to the first embodiment may further include a third anti-reflection layer (not shown) formed between the first anti-reflection layer AR1 and the upper substrate 102. . At this time, the third anti-reflection layer (not shown) may be made of an inorganic insulating material, for example, silicon oxide (SiO ₂ ) or silicon nitride (SiNx), and may have a refractive index similar to that of the second anti-reflection layer (AR2). . In addition, the third anti-reflection layer (not shown) may be formed to a thickness of 100 Å to 1000 Å.

The display device according to the second embodiment of the present invention including the anti-reflection unit (ARC) according to the first embodiment of the present invention includes the gate electrode 105 shown in FIG. 4. In the same manner as the display device according to, it is possible to improve the reflection problem caused by wiring of the upper substrate while improving the viewing angle problem.

14 is a cross-sectional view for describing a second embodiment of the anti-reflection layer shown in FIG. 12.

The anti-reflection unit ARC according to the second embodiment includes a first anti-reflection layer AR1 and a second anti-reflection layer AR2.

The first anti-reflection layer AR1 is formed on the outer surface 102F of the upper substrate 102 so as to overlap the gate electrode 105, and the gate for external light traveling toward the gate electrode 105 is formed. It serves to reduce the reflectivity of the electrode 105. To this end, the first anti-reflection layer (AR1) is a metal material having a lower reflectivity than the gate electrode 105, for example, molybdenum (Mo), titanium (Ti), molybdenum (Mo) / titanium (Ti), and It can be made of any one of chromium (Cr).

The second anti-reflection layer AR2 is formed on an upper surface of the first anti-reflection layer AR1 to absorb external light traveling from the outside toward the first anti-reflection layer AR1, and the first anti-reflection layer AR1 and the It serves to reduce the reflectivity of the gate electrode 105. The second anti-reflection layer AR2 is applicable to any light absorbing material capable of absorbing light incident toward the first anti-reflection layer AR1. For example, the second anti-reflection layer AR2 may include amorphous silicon (a-Si). Here, the second anti-reflection layer AR2 may be formed to cover not only the top surface of the first anti-reflection layer AR but also each side surface within a range that does not decrease the viewing angle of the display device as much as possible.

The second anti-reflection layer (AR2) formed of the amorphous silicon (a-Si) on the top surface of the first anti-reflection layer (AR1), as shown in Figure 7, has a reflectivity according to the thickness, the upper substrate ( It is preferable to form a thickness in the range of 3nm ~ 120nm in order to improve the reflection problem caused by the wiring of 102).

As such, external light incident on the anti-reflection unit ARC is reflected from the second anti-reflection layer AR2 as the primary reflection light RL1, and is transmitted through the second anti-reflection layer AR2 without being absorbed. A portion is reflected by the second reflection light RL2 in the first anti-reflection layer AR1. However, the primary reflected light RL1 and the secondary reflected light RL2 are extinguished by canceling interference. To this end, the thickness of the second anti-reflection layer AR2 is preferably set such that the primary reflected light RL1 and the secondary reflected light RL2 are extinguished by offset interference due to a phase difference (or path difference).

15 is a cross-sectional view for describing a third embodiment of the anti-reflection layer shown in FIG. 12, which is a third anti-reflection layer AR3 in the anti-reflection unit ARC according to the second embodiment of the present invention shown in FIG. 14. ). Accordingly, in the following description, only the third antireflection layer AR3 will be described.

The third anti-reflection layer AR3 is formed on an upper surface of the second anti-reflection layer AR2 and serves to extinguish reflected light reflected by the second anti-reflection layer AR2 through offset interference. To this end, the third anti-reflection layer AR3 may be made of a material having a refractive index of 1.5 to 2.4. For example, the third anti-reflection layer AR3 may be made of silicon oxide (SiO ₂ ), silicon nitride (SiNx), or a transparent conductive material. Here, the transparent conductive material is indium-tin-oxide (ITO), indium-zinc-oxide (IZO), zinc-oxide (ZnO), indium-gallium-zinc-oxide (IGZO), aluminum-zinc-oxide (AZO ), In ₂ O ₃ , Ga ₂ O ₃ -In ₂ O ₃ , ZnO: B, and ZnO-In ₂ O ₃ It can be made of any one of. Here, the third anti-reflection layer (AR3) as well as the upper surface of the second anti-reflection layer (AR2) within a range that does not degrade the viewing angle of the display device as much as possible, each of the first and second anti-reflection layers (AR1, AR2) It may be formed to cover the side.

The third anti-reflection layer (AR3) formed of the silicon nitride (SiNx) or the indium-tin-oxide (ITO) on the upper surface of the second anti-reflection layer (AR2), as shown in Figure 9 or 10, Since it has a reflectivity according to the thickness, it is preferable to be formed to a thickness in the range of 5nm ~ 300nm in order to improve the reflection problem caused by the wiring of the upper substrate 102.

As described above, external light incident on the anti-reflection unit ARC is reflected by the third anti-reflection layer AR3 as the primary reflected light RL1, and is transmitted through the third anti-reflection layer AR3 without being absorbed. A portion of the second anti-reflection layer AR2 is reflected by the secondary reflected light RL2. However, the primary reflected light RL1 and the secondary reflected light RL2 are extinguished by canceling interference. To this end, the thickness of the third anti-reflection layer AR3 is preferably set such that the primary reflected light RL1 and the secondary reflected light RL2 are extinguished by offset interference due to a phase difference (or path difference).

As described above, in the description of the present invention, it has been described that the above-described anti-reflection unit (ARC) is included in the gate electrode 105 (including the gate wiring) or overlapped with the gate electrode, but is not limited thereto. It may be formed on the outer surface or the inner surface of the upper substrate to be included in (including source / drain electrodes) or overlap the data wiring. However, since a gate insulating layer is formed between the data wiring and the upper substrate, the reflectivity of the data wiring to external light is relatively less than that of the gate wiring. Therefore, in order to simplify the process and improve the yield, it is more preferable that the above-described anti-reflection portion is not formed on the upper substrate overlapping the data wiring.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and it is common in the technical field to which the present invention pertains that various substitutions, modifications and changes are possible without departing from the technical details of the present invention. It will be obvious to those who have the knowledge of Therefore, the scope of the present invention is indicated by the following claims, and all modifications or variations derived from the meaning and scope of the claims and equivalent concepts should be interpreted to be included in the scope of the present invention.

100: display device 101: display panel
102: upper substrate 105: gate electrode
110: gate insulating film 120: semiconductor layer
133: source electrode 136: drain electrode
140: protective layer 143: drain contact hole
150: pixel electrode 181: lower substrate
183: Black Matrix 186: Color filter
195: liquid crystal layer 196: panel driver
196b: driving IC chip 200: backlight unit
AA: Display area ARC: Anti-reflection part
ML1, ML2: Metal layer NA: Non-display area

Claims (19)

An upper substrate including a gate wiring formed on an inner side opposite to the outer side facing outward;
A lower substrate bonded to face an inner surface of the upper substrate; And
It is formed on the outer surface or the inner surface of the upper substrate so as to overlap the gate wiring and includes an anti-reflection unit for reducing the reflectance of the external light to the gate wiring,
The anti-reflection unit includes a first anti-reflection layer and a second anti-reflection layer,
The first anti-reflection layer is made of a transparent conductive material, and the second anti-reflection layer is made of a metal material. According to claim 1,
The first anti-reflection layer is interposed between the inner surface of the upper substrate and the gate wiring,
The second anti-reflection layer is interposed between the inner surface of the upper substrate and the first anti-reflection layer, a display device. According to claim 1,
The first anti-reflection layer is formed on the outer surface of the upper substrate so as to overlap the gate wiring,
The second anti-reflection layer is formed to cover the top surface of the first anti-reflection layer or the first anti-reflection layer, a display device. According to claim 1,
The first anti-reflection layer is indium-tin-oxide (ITO), indium-zinc-oxide (IZO), zinc-oxide (ZnO), indium-gallium-zinc-oxide (IGZO), aluminum-zinc-oxide (AZO) , In ₂ O ₃ , Ga ₂ O ₃ -In ₂ O ₃ , ZnO: B, and ZnO-In ₂ O ₃ is made of a transparent conductive material,
The second anti-reflection layer is made of a metal material of any one of molybdenum (Mo), titanium (Ti), lead (Pb), nickel (Ni), and chromium (Cr). According to claim 1,
The anti-reflection unit further comprises a third anti-reflection layer interposed between the inner surface of the upper substrate and the second anti-reflection layer, the display device. The method of claim 5,
The third anti-reflection layer is made of silicon oxide (SiO ₂ ) or silicon nitride (SiNx), a display device. According to claim 1,
The second anti-reflection layer is a display device made of a metal material having a multiplication operation value (n × k) of n (refractive index) and k (absorption coefficient) greater than 3. According to claim 1,
The first anti-reflection layer is made of a transparent conductive material having an n (refractive index) of 1 to 3, a display device. According to claim 1,
The anti-reflection unit is made of a light absorbing material that absorbs the external light, and further comprising a light absorbing layer interposed between the inner surface of the upper substrate and the second anti-reflection layer. delete According to claim 1,
The gate wiring is made of first and second metal layers stacked to have different reflectivity,
The second metal layer is interposed between the anti-reflection portion and the first metal layer, a display device. An upper substrate including a gate wiring formed on an inner side opposite to the outer side facing outward;
A lower substrate bonded to face an inner surface of the upper substrate; And
Includes an anti-reflection unit interposed between the inner surface of the upper substrate and the gate wiring so as to overlap the gate wiring, reducing the reflectance of the external light to the gate wiring,
The anti-reflection unit includes a first anti-reflection layer and a second anti-reflection layer,
The first anti-reflection layer is made of an insulating material or a transparent conductive material, and is interposed between the inner surface of the upper substrate and the gate wiring,
The second anti-reflection layer is made of a light absorbing material and interposed between the first anti-reflection layer and the gate wiring. An upper substrate including a gate wiring formed on an inner side opposite to the outer side facing outward;
A lower substrate bonded to face an inner surface of the upper substrate; And
It is formed in a stacked structure on the outer surface of the upper substrate so as to overlap with the gate wiring, and includes an anti-reflection unit for reducing the reflectance of external light to the gate wiring,
The anti-reflection unit includes a first anti-reflection layer and a second anti-reflection layer,
The first anti-reflection layer is made of a metal material, and is formed on the outer surface of the upper substrate so as to overlap the gate wiring,
The second anti-reflection layer is made of a light absorbing material, and is formed to cover the top surface of the first anti-reflection layer or the first anti-reflection layer. The method of claim 13,
The anti-reflection portion is made of an insulating material or a transparent conductive material, and is formed on an upper surface of the second anti-reflection layer or a third anti-reflection layer formed to cover the top surface of the second anti-reflection layer and each side of the first and second anti-reflection layers A display device configured to further include. The method of claim 14,
The third anti-reflection layer is made of a material having a refractive index of 1.5 to 2.4, a display device. The method of any one of claims 9 or 12 to 15,
The light absorbing material is amorphous silicon, the display device. The method of claim 12 or 14,
The insulating material is silicon oxide (SiO ₂ ) or silicon nitride (SiNx), the display device. The method of claim 12 or 14,
The transparent conductive material is indium-tin-oxide (ITO), indium-zinc-oxide (IZO), zinc-oxide (ZnO), indium-gallium-zinc-oxide (IGZO), aluminum-zinc-oxide (AZO), A display device according to any one of In ₂ O ₃ , Ga ₂ O ₃ -In ₂ O ₃ , ZnO: B, and ZnO-In ₂ O ₃ . The method according to claim 13 or 14,
The first anti-reflection layer is made of a metal material of any one of molybdenum (Mo), titanium (Ti), molybdenum (Mo) / titanium (Ti), and chromium (Cr).

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