KR102099939B1 - Energy harvesting interface circuit, power extraction system and method including the same - Google Patents

Abstract

The present invention relates to a multi-input power extraction interface circuit for harvesting energy from a piezoelectric (PZT) device that converts vibrational energy into electrical energy and a photovoltaic (PV) device that converts light energy into electrical energy, and a system for controlling the same. The system includes an interface circuit that receives the photoelectric power generated by a photoelectric device and the piezoelectric power generated by a piezoelectric device, converts the received power and outputs the converted power, and a circuit controller that analyzes the signals of the photoelectric power and piezoelectric power received from the interface circuit, controls the interface circuit to be driven in a maximum power point tracking (MPPT) mode and a boost converter mode corresponding to the photoelectric power, and controls the interface circuit to be driven in a synchronous electric charge extraction (SECE) mode when the piezoelectric power is an instantaneous signal and in a pile-up mode when the piezoelectric power is a continuous signal.

Description

Interface circuit for energy harvesting, power extraction system and method using the same {ENERGY HARVESTING INTERFACE CIRCUIT, POWER EXTRACTION SYSTEM AND METHOD INCLUDING THE SAME}

The present invention relates to an interface circuit for energy harvesting, and a power extraction system and method using the same, and more specifically, a piezoelectric (PZT) device that converts vibration energy to electrical energy and light energy to electrical energy. It is a technology related to a multi-input power extraction interface circuit for harvesting energy from photovoltaic (PV) devices and a control system that controls it.

With the development of the Internet of Things, efforts are being made to increase the battery life of individual devices. As a related alternative, Energy Harvesting technology, which can supply energy from the surrounding environment, has been spotlighted. Typical energy sources include piezoelectric elements (PZT) for extracting vibrational energy, photovoltaic cells (PV) for extracting light energy, and thermoelectric generators (TEG) for extracting energy of temperature differences.

In order to secure more energy for a given environment, a harvesting interface circuit is needed to extract energy from various sources in one circuit.

)로 인해 압전전압(

)이 사인파(sine wave)로 나타나게 된다. AC소스를 DC소스로 변환하기 위해서는 AC-DC컨버터(converter)가 필요로 하게 되는데, 대표적인 AC-DC컨버터로는 전파정류기(Full wave rectifier) 또는 풀브릿지정류기(Full bridge rectifier, FBR)가 있다.The piezoelectric element is a piezoelectric current that is an AC source converted by mechanical vibration (

) Due to piezoelectric voltage (

) Appears as a sine wave. An AC-DC converter is required to convert an AC source to a DC source. Typical AC-DC converters include a full wave rectifier or a full bridge rectifier (FBR).

)에 전하가 채워진 후에야 압전전압의 극성도 전환되는데, 이와 같이 기생커패시터(

)에 전하가 채워지는 동안 압전소자의 전류를 전달하지 못하고 기생커패시터(

)를 충전하는데 에너지를 소모하게 되는 영역이 존재 하게 된다. 즉, 압전전압(

)의 극성이 전환될 때 기생커패시터(

)의 특성에 의해 에너지를 출력으로 보내지 못하고 압전전압(

)의 극성을 전환하는 데에 에너지를 소모하게 되어 추출할 수 있는 에너지가 한정되는 문제가 있다. 또한, 회로의 전압보다 압전전압(

)의 값이 낮으면 에너지가 출력되지 않는 문제가 있다. 즉, 전압변환율(Voltage Conversion Ratio, VCR)이 1보다 작기 때문에 회로의 전압을 압전전압(

)의 임계 전압보다 높일 수 없는 어려움이 있다. 따라서, 이와 같은 문제를 해결하기 위해 인덕터를 이용하는 회로 구조가 제안되었다.However, in the conventional full-wave rectifier or full-bridge rectifier, when the polarity of the piezoelectric current is switched, the parasitic capacitor included in the piezoelectric element (

The polarity of the piezoelectric voltage is also switched only after the charge is filled in the parasitic capacitor.

) While the electric charge of the piezoelectric element is not delivered while the charge is filled, the parasitic capacitor (

), There is an area that consumes energy to charge. That is, the piezoelectric voltage (

When the polarity of) is switched, the parasitic capacitor (

), The piezoelectric voltage (

), Which consumes energy to convert the polarity, thereby limiting the energy that can be extracted. In addition, the piezoelectric voltage (

If the value of) is low, there is a problem that energy is not output. That is, since the voltage conversion ratio (VCR) is less than 1, the voltage of the circuit is the piezoelectric voltage (

) There is a difficulty that cannot be higher than the threshold voltage. Therefore, a circuit structure using an inductor has been proposed to solve this problem.

)에 쌓이는 에너지를 인덕터와 기생커패시터(

)의 공진을 이용하여 매우 빠르게 반전시킬 수 있다. 따라서, 기존 전파정류기에서 기생커패시터(

)로 인해 출력으로 전달되지 못하는 현상을 최대한 줄일 수 있다. 그러나, 제1회로구조는 압전전압(

)이 회로의 출력전압(

)에 종속적이게 되고, 이것은 낮은 출력 전압에서 추출 되는 에너지가 낮은 단점을 가진다.Referring to FIG. 1 (a), a first circuit structure using an inductor is a bias-flip rectifier structure disclosed in ISSCC 2009. The first circuit structure is a parasitic capacitor (

) The energy accumulated in the inductor and parasitic capacitor (

) Can be used to invert very quickly. Therefore, parasitic capacitors (

), It is possible to reduce the phenomenon that cannot be transmitted to the output as much as possible. However, the first circuit structure is a piezoelectric voltage (

) The output voltage of this circuit (

), Which has the disadvantage that the energy extracted at low output voltage is low.

)의 에너지를 순간적으로 인덕터에 저장했다가 출력으로 전달하는 구조이다. 전류 형태로 출력에 에너지를 전달하기 때문에 이상적으로는 출력 전압과 무관하게 에너지 출력이 가능한 장점이 있다. 그러나 이 회로의 압전전압은 압전소자의 개방회로전압(open circuit voltage)의 2배만큼 밖에 압전전압을 증가 시키지 못한다. 즉, 압전소자 소스는 압전전압이 높을수록 많은 에너지 추출이 가능하기 때문에 출력으로 전달되는 에너지의 양이 상대적으로 작은 단점이 있다.Referring to FIG. 1 (b), a second circuit structure using an inductor is a rectifier-less structure disclosed in ISSCC 2010. The second circuit structure is different from the first circuit structure by the parasitic capacitor (

) Is the structure that instantly stores the energy of the inductor and transmits it to the output. Since energy is transmitted to the output in the form of an electric current, ideally, an energy output is possible regardless of the output voltage. However, the piezoelectric voltage of this circuit only increases the piezoelectric voltage by twice the open circuit voltage of the piezoelectric element. That is, the piezoelectric element source has a disadvantage in that the higher the piezoelectric voltage, the more energy can be extracted, so the amount of energy transferred to the output is relatively small.

Referring to FIG. 2 (a), a third circuit structure using an inductor is an investment structure disclosed in ISSCC 2013. The key feature of the third circuit structure is that the energy of the battery can be invested to further increase the width of the piezoelectric voltage, so that more energy can be extracted than the second circuit structure.

Referring to FIG. 2 (b), a fourth circuit structure using an inductor is a pile-up structure published in ISSCC 2014. The fourth circuit structure is a structure that can increase the piezoelectric voltage as much as possible than the third circuit structure. The fourth circuit structure is a structure that amplifies up to the maximum break down voltage that a MOSFET can withstand and transmits as much energy as output by accumulating a piezoelectric voltage using periodic idle resonance.

)을 최대로 증폭하면서도 에너지 추출 횟수를 한주기에 2회 실시하여 출력되는 에너지를 증가시킨 것이 특징이다.Referring to FIG. 3, a fifth circuit structure (DPM), which is a modification of the fourth circuit structure, was announced at JSSC 2017. The fifth circuit structure is the piezoelectric voltage (

It is characterized by increasing the output energy by performing the number of energy extraction twice a cycle while amplifying) to the maximum.

)이 너무 높으면 다이오드가 도통되어 추출할 수 있는 에너지가 오히려 줄어들게 되고, 광전전압(

)이 너무 낮으면 추출할 수 있는 에너지가 적다. 즉, 다이오드가 턴온(turn on) 되기 직전의 전압인

전압에서 최대의 에너지를 추출할 수 있다. 대략적으로 광전소자의 개방회로전압(open circuit voltage,

)의 0.75배가

가 되는 것이 일반적이다.Meanwhile, the photoelectric device converts light energy into electrical energy, and includes a diode connected in parallel with a DC current source as shown in FIG. 4. Figure 5 shows the electrical properties of the photoelectric device, because the photoelectric device is composed of diodes in parallel, the photoelectric voltage (

) Is too high, the diode conducts and the energy that can be extracted decreases, and the photoelectric voltage (

) Is too low, there is less energy to extract. That is, the voltage just before the diode turns on

The maximum energy can be extracted from the voltage. Approximately the open circuit voltage of the photoelectric device (open circuit voltage,

) Is 0.75 times

It is common to become.

Therefore, the photoelectric device needs a circuit capable of applying MPPT (Maximum Power Point Tracking) technology for maximum energy extraction efficiency.

As described above, the piezoelectric element and the photoelectric element require circuits of different structures to extract energy to the maximum.

A structure using a conventional rectifier or an additional control technique excluding the SSHI structure should have a sufficiently high battery voltage. And since the voltage coming into the input is an AC source, a (-) voltage source source is needed to turn on / off the internal switch. And, if it is not a (-) voltage source, a gate driver that uses a large capacitor to instantaneously generate a (-) voltage is required.

Therefore, in order to be practically used, it must be possible to operate even without a high battery voltage as an additional energy source. Also, there should be no additional circuitry to make a negative voltage source.

)이 출력 전압 정도만 가지는 한계를 가지게 된다. 이 때문에, 출력 전압이 높아야만 많은 압전전압(

)를 추출할 수 있다는 종속성이 있다. 이것을 극복하기 위해 제안된 제5회로구조의 더블파일업(double pile-up) 또한 게이트 드라이버(gate driver)의 구동 전압의 한계로 실제 출력 전압 이상의 압전전압(

)을 얻어 낼 수 없는 것으로 나타났다.The bias-flip or SSHI technology that is currently widely used is piezoelectric voltage (

) Has a limit that only has an output voltage level. For this reason, the piezoelectric voltage (

). In order to overcome this, the double pile-up of the proposed fifth circuit structure also limits the driving voltage of the gate driver to the piezoelectric voltage that is higher than the actual output voltage (

).

Therefore, in order to be practically used, it is necessary to be able to extract a lot of power even when the output voltage is low, and to maintain high F.O.M in a wide output voltage range.

Referring to FIG. 6, the SECE (Synchronous Electric Charge Extraction) structure proposed in ISSCC 2018 insists that the extraction of power is important even for aperiodic signals such as transient shock. The SECE structure does not have higher energy output than the SSHI or pile up structure, but has no dependency on the output voltage, and has the advantage of immediately extracting energy as a periodic signal is input.

Thus, for practical use, it is necessary to extract energy even for aperiodic inputs.

에 도달해야만 에너지를 출력할 수 있다. 즉, 압전소자의 전압이

전압에 도달되지 못하면 진동입력이 있더라도 압전소자가 에너지 출력하지 못하는 문제가 있다. 또한, 두 구조는

이라는 새로운 레퍼런스 전압을 만들어야 하는 단점이 있다.In the conventional pile up structure and double pile up structure, the voltage of the piezoelectric element is

It can only output energy. That is, the voltage of the piezoelectric element

If the voltage is not reached, there is a problem that the piezoelectric element cannot output energy even if there is a vibration input. Also, the two structures

There is a drawback to making a new reference voltage.

Republic of Korea Registered Patent Publication No. 10-1454435

Accordingly, the present invention has been proposed to solve the above-mentioned general problems, and the object of the present invention is a piezoelectric (piezoelectric, PZT) device that converts vibration energy into electrical energy and a photoelectricity that converts light energy into electrical energy ( It is to provide a multi-input power extraction interface circuit for harvesting energy from photovoltaic (PV) devices and a control system for controlling it.

In order to achieve the above object, the interface circuit for energy harvesting according to the technical idea of the present invention, and a power extraction system using the same, receive photoelectric power generated by a photoelectric element and piezoelectric power generated by a piezoelectric element, and receive An interface circuit that outputs power after conversion; Analyze the signals of the photoelectric power and the piezoelectric power received by the interface circuit, and control the interface circuit to be driven in MPPT (Maximum Power Point Tracking) mode and boost converter mode in response to the photoelectric power, And a circuit controller for controlling the interface circuit to be driven in a SECE (Synchronous Electric Charge Extraction) mode when the piezoelectric power is a momentary signal and a pile-up mode when the piezoelectric power is a continuous signal. .

)와, 상기 압전소자의 출력단 타측에 연결되는 우향플립스위치(

)와, 상기 좌향플립스위치(

)와 상기 우향플립스위치(

) 사이에 연결되는 인덕터(

)와, 입력단이 상기 좌향플립스위치(

)와 상기 인덕터(

) 사이에 연결되고, 출력단이 회로의 출력단과 연결되는 좌출구스위치(

)와, 입력단이 상기 인덕터(

)와 상기 우향플립스위치(

) 사이에 연결되고 출력단이 회로의 출력단과 연결되는 우출구스위치(

)를 포함하는 것을 특징으로 할 수 있다.In addition, the interface circuit is a left flip switch connected to one side of the output terminal of the piezoelectric element (

), And a right-hand flip switch connected to the other side of the output terminal of the piezoelectric element (

), And the left flip switch (

) And the right flip switch (

) Connected between inductors (

), The input terminal is the left flip switch (

) And the inductor (

), The output terminal of the circuit is connected to the output terminal of the left outlet switch (

), The input terminal is the inductor (

) And the right flip switch (

) And the output terminal of the circuit is connected to the output terminal of the circuit.

It may be characterized by including a.

)와 상기 우향플립스위치(

)를 on하여 상기 압전전력이 상기 인덕터(

)에 충전되게 하고, 상기 인덕터(

)의 충전이 상기 압전소자의 일방향에서 출력된 좌향 압전전력(

)에 의한 것이면 상기 우향플립스위치(

)의 off 및 상기 우출구스위치(

)를 on하여 상기 인덕터(

)에 충전된 전력이 회로의 출력단으로 전달되게 하는 것을 특징으로 할 수 있다.In addition, the circuit controller analyzes the piezoelectric power and the piezoelectric signal analysis unit to identify whether an instantaneous signal or a continuous signal, and the interface circuit in SECE mode or file-up mode corresponding to the signal type identified by the piezoelectric signal analysis unit It includes a piezoelectric control unit for controlling to be driven, the piezoelectric control unit when the SECE mode is executed, the left flip switch (

) And the right flip switch (

) To turn the piezoelectric power on the inductor (

), And the inductor (

) Is the left piezoelectric power output from one direction of the piezoelectric element (

), The right flip switch (

) Off and the right exit switch (

) To turn on the inductor (

It may be characterized in that the power charged in) is transferred to the output terminal of the circuit.

)와 상기 우향플립스위치(

)를 on하여 상기 압전전력이 상기 인덕터(

)에 충전되게 하고, 상기 인덕터(

)에 충전된 전력 일부가 상기 압전소자에 포함된 기생커패시터(

)에 충전되는 시간동안 지연 후 상기 인덕터(

)의 출력이 상기 압전소자의 일방향에서 출력된 좌향 압전전력(

)에 의한 것이면 상기 우향플립스위치(

) off 및 상기 우출구스위치(

) on 하여 상기 인덕터(

)에 충전된 전력이 회로의 출력단으로 전달되게 하는 것을 특징으로 할 수 있다.In addition, the piezoelectric control unit, when the file-up mode is executed, the left flip switch (

) And the right flip switch (

) To turn the piezoelectric power on the inductor (

), And the inductor (

) A part of the electric power charged in the parasitic capacitor included in the piezoelectric element (

After the delay for charging time in the inductor (

), The output of the piezoelectric element left in the direction of the piezoelectric power (

), The right flip switch (

) off and the right exit switch (

) on to the inductor (

It may be characterized in that the power charged in) is transferred to the output terminal of the circuit.

)는 상기 압전소자에 포함된 기생커패시터(

)와의 공전에 의해 충전되는 것을 특징으로 할 수 있다.In addition, the inductor (

) Is a parasitic capacitor included in the piezoelectric element (

It can be characterized by being charged by revolution with).

)와 상기 우향플립스위치(

)를 on하는 것을 특징으로 할 수 있다.In addition, the piezoelectric signal analysis unit monitors that the voltage of the piezoelectric power reaches a threshold, and the piezoelectric controller controls the left flip switch when the voltage of the piezoelectric power reaches a threshold (

) And the right flip switch (

) On.

) 사이에 연결되는 광전력스위치(

)와, 입력단이 상기 인덕터(

)와 상기 좌출구스위치(

) 사이에 연결되고, 출력단이 그라운드에 연결되는 빌드업스위치(

)를 더 포함하는 것을 특징으로 할 수 있다.In addition, the interface circuit is the output terminal of the photoelectric element and the inductor (

) Is connected between the optical power switch (

), The input terminal is the inductor (

) And the left exit switch (

), And the output terminal is connected to the ground.

It may be characterized in that it further comprises a.

)가 충전되게 부스트 컨버터 모드로 상기 인터페이스회로를 제어하는 광전제어부를 더 포함하고, 상기 광전제어부는 상기 관전전력이 수신되면 상기 광전력스위치(

) 및 상기 빌드업스위치(

)를 on 하고, 상기 인덕터(

)에 충전된 전력이 상기 MPP 전압에 대응되게 충전되면 상기 빌드업스위치(

) off 및 상기 좌출구스위치(

) on 하여 상기 인덕터(

)에 충전된 전력이 회로의 출력단으로 전달되게 하는 것을 특징으로 할 수 있다.In addition, the circuit controller analyzes the signal of the photoelectric power to search for an MPP (Maximum Power Point) voltage, the photoelectric signal analysis unit, and the photoelectric signal analysis unit analyzes the inductor as much as the power corresponding to the analyzed MPP voltage (

) Further comprises a photoelectric control unit that controls the interface circuit in a boost converter mode to be charged, and the photoelectric control unit receives the optical power switch (

) And the build-up switch (

) On, and the inductor (

When the power charged in) is charged to correspond to the MPP voltage, the build-up switch (

) off and the left exit switch (

) on to the inductor (

It may be characterized in that the power charged in) is transferred to the output terminal of the circuit.

)가 상기 광전전력에 의해 충방전되는 타이밍과 상기 압전전력에 의해 충방전되는 타이밍이 서로 중복되지 않게 제어하는 스케줄러를 더 포함하는 것을 특징으로 할 수 있다.In addition, the circuit controller is the inductor (

It may be characterized in that it further comprises a scheduler that controls the timing of charging and discharging by the photoelectric power and the timing of charging and discharging by the piezoelectric power so that they do not overlap each other.

)와, 상기 압전시동스위치(

)의 출력단과 연결되어 인가되는 전력을 충전하는 시동커패시터(

)와, 상기 시동커패시터(

)의 입력단과 상기 회로의 출력단 사이에 연결되며, 상기 시동커패시터(

)가 충전되었을 때 on 되어 상기 회로제어기가 각성되게 하는 제어기시동스위치(

)를 더 포함하는 것을 특징으로 할 수 있다.In addition, the interface circuit is a piezoelectric start switch (input terminal is connected to the output terminal of the piezoelectric element)

) And the piezoelectric start switch (

) Is connected to the output terminal of the starting capacitor to charge the applied power (

) And the starting capacitor (

) Is connected between the input terminal and the output terminal of the circuit, and the starting capacitor (

) When the charge is turned on, the controller start switch () that causes the circuit controller to awaken

It may be characterized in that it further comprises a.

)의 입력단과 연결되며, 상기 회로제어기가 휴면상태일 때 상기 광전전력의 전압이 상기 시동커패시터(

)의 전압보다 큰 경우 상기 광전전력을 상기 시동커패시터(

)로 흐르게하는 패시브다이오드를 더 포함하고, 상기 광전력스위치(

) 및 상기 빌드업스위치(

)는 상기 회로제어기가 휴면상태일 때 상기 광전소자의 전압이 상기 시동커패시터(

)의 전압보다 작은 경우 on 되어, 상기 인덕터(

)에서 상기 광전전력이 증폭되게 하는 것을 특징으로 할 수 있다.In addition, in the interface circuit, an input terminal is connected to an output terminal of the photoelectric element, and an output terminal is the starting capacitor (

), The voltage of the photoelectric power when the circuit controller is in the dormant state, the starting capacitor (

), The photoelectric power is greater than the voltage of the starting capacitor (

) Further comprising a passive diode to flow through the optical power switch (

) And the build-up switch (

) Is the voltage of the photoelectric element when the circuit controller is in the dormant state, the starting capacitor (

) Is less than the voltage of the on, the inductor (

) May be characterized in that the photoelectric power is amplified.

); 상기 압전소자의 출력단 타측에 연결되는 우향플립스위치(

); 상기 좌향플립스위치(

)와 상기 우향플립스위치(

) 사이에 연결되는 인덕터(

); 입력단이 상기 좌향플립스위치(

)와 상기 인덕터(

) 사이에 연결되고, 출력단이 회로의 출력단과 연결되는 좌출구스위치(

); 입력단이 상기 인덕터(

)와 상기 우향플립스위치(

) 사이에 연결되고 출력단이 회로의 출력단과 연결되는 우출구스위치(

); 상기 광전소자의 출력단과 상기 인덕터(

) 사이에 연결되는 광전력스위치(

); 입력단이 상기 인덕터(

)와 상기 좌출구스위치(

) 사이에 연결되고, 출력단이 그라운드에 연결되는 빌드업스위치(

)를 포함하는 것을 특징으로 한다.On the other hand, in order to achieve the above object, the interface circuit for energy harvesting according to the technical idea of the present invention targets the piezoelectric power of the piezoelectric element in a SECE (Synchronous Electric Charge Extraction) mode or a pile-up mode. An interface circuit driven and driven in an MPPT (Maximum Power Point Tracking) mode and a boost converter mode for the photoelectric power of the photoelectric device, the left flip switch connected to one side of the output terminal of the piezoelectric element (

); Right flip switch connected to the other side of the output terminal of the piezoelectric element (

); The left flip switch (

) And the right flip switch (

) Connected between inductors (

); The input terminal is the left flip switch (

) And the inductor (

), The output terminal of the circuit is connected to the output terminal of the left outlet switch (

); The input terminal is the inductor (

) And the right flip switch (

) And the output terminal of the circuit is connected to the output terminal of the circuit.

); The output terminal of the photoelectric element and the inductor (

) Is connected between the optical power switch (

); The input terminal is the inductor (

) And the left exit switch (

), And the output terminal is connected to the ground.

It characterized in that it comprises a.

); 상기 압전시동스위치(

)의 출력단과 연결되어 인가되는 전력을 충전하는 시동커패시터(

); 상기 시동커패시터(

)의 입력단과 상기 회로의 출력단 사이에 연결되며, 상기 시동커패시터(

)가 충전되었을 때 on 되어 회로제어기가 각성되게 하는 제어기시동스위치(

)를 더 포함하는 것을 특징으로 할 수 있다.In addition, a piezoelectric start switch (in which the input terminal is connected to the output terminal of the piezoelectric element to flow the piezoelectric power output from the piezoelectric element

); The piezoelectric start switch (

) Is connected to the output terminal of the starting capacitor to charge the applied power (

); The starting capacitor (

) Is connected between the input terminal and the output terminal of the circuit, and the starting capacitor (

) When the charge is on, the controller start switch that turns on and awakens the circuit controller (

It may be characterized in that it further comprises a.

)의 입력단과 연결되며, 상기 회로제어기가 휴면상태일 때 상기 광전전력의 전압이 상기 시동커패시터(

)의 전압보다 큰 경우 상기 광전전력을 상기 시동커패시터(

)로 흐르게하는 패시브다이오드를 더 포함하고, 상기 광전력스위치(

) 및 상기 빌드업스위치(

)는 상기 회로제어기가 휴면상태일 때 상기 광전소자의 전압이 상기 시동커패시터(

)의 전압보다 작은 경우 on 되어, 상기 인덕터(

)에서 상기 광전전력이 증폭되게 하는 것을 특징으로 할 수 있다.In addition, the input terminal is connected to the output terminal of the photoelectric element, the output terminal is the starting capacitor (

), The voltage of the photoelectric power when the circuit controller is in the dormant state, the starting capacitor (

), The photoelectric power is greater than the voltage of the starting capacitor (

) Further comprising a passive diode to flow through the optical power switch (

) And the build-up switch (

) Is the voltage of the photoelectric element when the circuit controller is in the dormant state, the starting capacitor (

) Is less than the voltage of the on, the inductor (

) May be characterized in that the photoelectric power is amplified.

In addition, in order to achieve the above object, the power extraction method for energy harvesting according to the technical idea of the present invention receives photoelectric power generated by a photoelectric element and piezoelectric power generated by a piezoelectric element, and converts the received power. What is claimed is: 1. A power extraction method of a circuit controller that controls an output interface circuit, comprising: discriminating the reception of the photoelectric power or the piezoelectric power; (A) when the photoelectric power is received, controlling the interface circuit to be driven in an MPPT (Maximum Power Point Tracking) mode and a boost converter mode; (B) when the piezoelectric power is received, characterized in that it comprises the step of controlling the interface circuit to be driven in a SECE (Synchronous Electric Charge Extraction) mode.

In addition, step (A) may include deriving a maximum power point (MPP) voltage value by analyzing the received photoelectric power; Using the inductor included in the interface circuit to build-up the photoelectric power until the MPP voltage is reached; When the voltage of the photoelectric power reaches the MPP voltage, it may be characterized in that it comprises the step of connecting the path of the inductor and the circuit output terminal of the interface circuit so that the photoelectric power is moved to the circuit output terminal.

In addition, step (B) may include monitoring the signal of the piezoelectric power while reaching the threshold while monitoring the signal of the piezoelectric power; When the voltage of the piezoelectric power reaches a threshold, connecting the piezoelectric element of the interface circuit and the path of the inductor such that the piezoelectric power is charged in the inductor; And connecting a path between the inductor of the interface circuit and the circuit output terminal so that the photoelectric power can be transferred to the circuit output terminal.

In addition, the step of connecting the path of the piezoelectric element and the inductor of the interface circuit may be characterized in that the path is connected only for a time during which the piezoelectric power of the piezoelectric element moves to the inductor.

In addition, the step of monitoring that the voltage of the piezoelectric power reaches a threshold value determines whether the piezoelectric power is a repeated continuous signal, and if the piezoelectric power is a continuous signal, the path of the piezoelectric element and the inductor of the interface circuit The step of connecting is a file-up (pile-up) by connecting a path only for a time during which the piezoelectric power of the piezoelectric element is transferred to the inductor and part of the electric power charged in the inductor is charged in the parasitic capacitor included in the piezoelectric element. It can be characterized in that the mode to be executed.

In addition, the circuit controller may be characterized in that the timing of using the inductor in the steps (A) and (B) does not overlap with each other.

According to the interface circuit for energy harvesting according to the present invention, and a power extraction system and method using the same,

First, effective energy harvesting is possible by using one interface circuit for two sources of a piezoelectric element and a photoelectric element.

Second, when the circuit controller is in the dormant state, the circuit controller itself can be awakened if piezoelectric power or photoelectric power is input even if there is no separate battery power supply.

Third, it is possible to perform a double pile up mode and a SECE mode within one circuit structure targeting piezoelectric power.

Fourth, a negative voltage is not formed in the interface circuit.

Fifth, it has a wide output voltage range and a high F.O.M, which is different from the prior art dependent on the output voltage, but does not depend on the output voltage.

Sixth, there is no need for a converter circuit for battery voltage or additional power supply, and a gate driver using a large-capacity capacitor is also unnecessary, so the system can be operated with only photoelectric power and piezoelectric power.

Figure 1 (a) is a bias-flip rectifier (Bias-flip rectifier) structure and voltage characteristics presented in ISSCC 2009, (b) is a diagram showing a rectifier-less structure and voltage characteristics presented in ISSCC 2010.
Figure 2 (a) is an investment (Investment) structure and voltage characteristics presented in ISSCC 2013, (b) is a diagram showing the pile-up (pile-up) structure and voltage characteristics presented in ISSCC 2014
3 is a diagram showing the DPM structure and signal characteristics of a modified file-up (pile-up) structure announced at JSSC 2017.
4 is a view showing a circuit structure of a general photoelectric device.
5 is a graph showing the electrical characteristics of a photoelectric device.
Figure 6 is a view showing the structure and signal characteristics of the SECE (Synchronous Electric Charge Extraction) proposed in ISSCC 2018.
7 is a block diagram of a power extraction system according to an embodiment of the present invention.
8 is a circuit diagram of an interface circuit according to an embodiment of the present invention.
9 is a circuit diagram showing a path in which the generated piezoelectric power is moved when the circuit controller is in a dormant state.
FIG. 10 is a circuit diagram showing the movement path of photoelectric power when piezoelectric power is not supplied, photoelectric power is supplied, and the voltage of the secondary battery and the starting capacitor is lower than the starting voltage and the voltage of the photoelectric power is higher than the voltage of the starting capacitor. .
FIG. 11 is a circuit diagram showing the movement path of photoelectric power when piezoelectric power is not supplied, photoelectric power is supplied, and the voltage of the secondary battery and the starting capacitor is lower than the starting voltage and the voltage of the photoelectric power is lower than the voltage of the starting capacitor. .
12 is a circuit diagram showing the power flow when both the piezoelectric power and the photoelectric power are supplied when the circuit controller is in a dormant state.
13 is a circuit diagram highlighting a configuration and a path for charging a secondary battery using piezoelectric power among interface circuits.
14 is a view showing the relationship between the flow sequence of the leftward piezoelectric power and the piezoelectric current, the left piezoelectric voltage, the right piezoelectric voltage, and the inductor current when the circuit controller is driven in the SECE mode.
15 is a diagram illustrating a circuit operation process when rightward piezoelectric power is input when the circuit controller is driven in SECE mode.
FIG. 16 is a schematic circuit and voltage amplification characteristic graph in which the file-up mode is performed.
FIG. 17 is a view showing the relationship between the flow order of the leftward piezoelectric power and the piezoelectric current, the left piezoelectric voltage, the right piezoelectric voltage and the current of the inductor when the circuit controller is driven in the pile-up mode.
18 is a graph showing the relationship between piezoelectric voltage, flip switch, output switch, inductor current and harvested voltage when the file-up mode is executed.
19 is a diagram illustrating a circuit operation process when rightward piezoelectric power is input when the circuit controller is driven in the file-up mode.
20 is a graph showing the relationship between the voltage stored in the parasitic capacitor of the piezoelectric element in each mode when the continuous vibration occurs, the signal detected by the piezoelectric signal analyzer, the timing of the file-up mode execution, and the voltage output from the interface circuit in each step. .
21 is a circuit diagram highlighting a configuration and a path for charging a secondary battery by using photoelectric power among interface circuits.
22 is a diagram showing a circuit structure and signal characteristics showing a process of extracting an MPP voltage by sampling photoelectric power.
23 is a graph of voltage and current showing the state in which the photoelectric power is maintained at the MPP voltage level and is output.
24 is a circuit diagram showing a configuration and a path to be used when piezoelectric power and photoelectric power are simultaneously input to the interface circuit.
25 is a graph showing a state in which the timing of charging and discharging by the photoelectric power and the timing of charging and discharging by the piezoelectric power are not overlapped by the scheduler.
26 is a circuit diagram of a power extraction module in which an interface circuit and a circuit control unit are combined according to an embodiment of the present invention.
27 is a flowchart of a power extraction method according to an embodiment of the present invention.

An interface circuit for energy harvesting according to embodiments of the present invention and a power extraction system and method using the same will be described in detail with reference to the accompanying drawings. The present invention can be variously changed and may have various forms, and specific embodiments will be illustrated in the drawings and described in detail in the text. However, it is not intended to limit the present invention to a specific disclosure form, it should be understood to include all modifications, equivalents, or substitutes included in the spirit and scope of the present invention. In describing each drawing, similar reference numerals are used for similar components.

In addition, unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by a person skilled in the art to which the present invention pertains. Terms such as those defined in a commonly used dictionary should be interpreted as having meanings consistent with meanings in the context of related technologies, and should not be interpreted as ideal or excessively formal meanings unless explicitly defined in the present application. Does not.

Referring to FIG. 7, a power extraction system according to an embodiment of the present invention includes an interface circuit for receiving photoelectric power generated by a photoelectric element and piezoelectric power generated by a piezoelectric element, converting the received power, and outputting the converted power. Analyze the signals of the photoelectric power and the piezoelectric power received in the interface circuit, and control the interface circuit to be driven in MPPT (Maximum Power Point Tracking) mode and boost converter mode in response to the photoelectric power, And a circuit controller 100 for controlling the interface circuit to be driven in a SECE (Synchronous Electric Charge Extraction) mode when the piezoelectric power is an instantaneous signal and a pile-up mode when the piezoelectric power is a continuous signal.

및

), 압전소자의 출력단 일측에 연결되는 좌향플립스위치(

), 상기 압전소자의 출력단 타측에 연결되는 우향플립스위치(

), 상기 좌향플립스위치(

)와 상기 우향플립스위치(

) 사이에 연결되는 인덕터(

), 입력단이 상기 좌향플립스위치(

)와 상기 인덕터(

) 사이에 연결되고, 출력단이 회로의 출력단과 연결되는 좌출구스위치(

), 입력단이 상기 인덕터(

)와 상기 우향플립스위치(

) 사이에 연결되고 출력단이 회로의 출력단과 연결되는 우출구스위치(

)를 포함한다. 또한, 광전소자의 출력단과 상기 인덕터(

) 사이에 연결되는 광전력스위치(

), 입력단이 상기 인덕터(

)와 상기 좌출구스위치(

) 사이에 연결되고, 출력단이 그라운드에 연결되는 빌드업스위치(

)를 포함한다. 아울러, 입력단이 상기 압전소자의 출력단과 연결되는 압전시동스위치(

), 상기 압전시동스위치(

)의 출력단과 연결되어 인가되는 전력을 충전하는 시동커패시터(

), 상기 시동커패시터(

)의 입력단과 상기 회로의 출력단 사이에 연결되며, 상기 시동커패시터(

)가 충전되었을 때 on 되어 상기 회로제어기(100)가 각성되게 하는 제어기시동스위치(

), 출력단이 상기 시동커패시터(

)의 입력단과 연결되며, 상기 회로제어기(100)가 휴면상태일 때 상기 광전전력의 전압이 상기 시동커패시터(

)의 전압보다 큰 경우 상기 광전전력을 상기 시동커패시터(

)로 흐르게하는 패시브다이오드(D)를 포함한다.Referring to FIG. 8, an interface circuit according to an embodiment of the present invention is connected to both sides of an output terminal of a piezoelectric element, and a cross coupled transistor that connects an output terminal facing the direction in which the piezoelectric voltage is output to ground is connected.

And

), A leftward flip switch connected to one side of the output terminal of the piezoelectric element (

), A right-hand flip switch connected to the other side of the output terminal of the piezoelectric element (

), The left flip switch (

) And the right flip switch (

) Connected between inductors (

), The input terminal is the left flip switch (

) And the inductor (

), The output terminal of the circuit is connected to the output terminal of the left outlet switch (

), The input terminal is the inductor (

) And the right flip switch (

) And the output terminal of the circuit is connected to the output terminal of the circuit.

). In addition, the output terminal of the photoelectric device and the inductor (

) Is connected between the optical power switch (

), The input terminal is the inductor (

) And the left exit switch (

), And the output terminal is connected to the ground.

). In addition, a piezoelectric start switch (in which the input terminal is connected to the output terminal of the piezoelectric element)

), The piezoelectric start switch (

) Is connected to the output terminal of the starting capacitor to charge the applied power (

), The starting capacitor (

) Is connected between the input terminal and the output terminal of the circuit, and the starting capacitor (

) Is on when the controller is started when the circuit controller 100 is awakened when it is charged (

), The output terminal is the starting capacitor (

), And the voltage of the photoelectric power when the circuit controller 100 is in the dormant state is the starting capacitor (

), The photoelectric power is greater than the voltage of the starting capacitor (

It includes a passive diode (D) to flow.

,

)는 좌향 압전전력, 우향 압전전력 중 신호가 발생되는 곳과 반대되는 부위가 자동으로 그라운드와 연결되는 동작을 수행한다. Cross-connected transistor (

,

) Performs an operation in which the part opposite to the place where the signal is generated among the leftward piezoelectric power and the rightward piezoelectric power is automatically connected to the ground.

The interface circuit according to this embodiment is characterized in that only one inductor for processing the power of the piezoelectric element and the power of the photoelectric element is shared. In addition, most circuit configurations are also shared to simultaneously collect the power of the piezoelectric element and the photoelectric element.

)만으로 회로제어기(100)에 전력이 공급될 경우, 방전된 2차전지를 매우 긴 시간동안 충전해야 한다. 이러한 문제를 해결하기 위해, 이 실시예는 내부에 커패시터로 구성된 시동커패시터(

)가 포함된다. 압전전력 또는 광전전력이 공급되면 시동커패시터(

)가 신속하게 충전되고, 이로써 인터페이스회로가 신속히 각성될 수 있게 된다.The circuit controller 100 of this embodiment enters a dormant state when the input of piezoelectric power and photoelectric power is insufficient or absent. In order to awaken the circuit controller 100, sufficient power must be supplied to the circuit controller 100. If, a typical secondary battery (

), When power is supplied to the circuit controller 100, the discharged secondary battery must be charged for a very long time. In order to solve this problem, this embodiment is a starting capacitor consisting of a capacitor therein (

) Is included. When piezoelectric power or photoelectric power is supplied, the starting capacitor (

) Is quickly charged, thereby allowing the interface circuit to be quickly awakened.

) 및 시동커패시터(

)의 전압이 시동전압(1.2V)보다 낮은 경우의 에너지 수확 경로를 나타낸 도면이다. 도면을 참조하면, 인터페이스회로가 각성될 수 있게, 압전소자에서 생성된 압전전력을 시동커패시터(

)로 공급한다. 시동커패시터(

)의 전압이 0이거나 그에 가까운 상태이므로, 압전소자의 출력 전압이 시동커패시터(

)로 흐를 수 있게 된다. 이때, 압전소자 양편에 마련된 압전시동스위치(

)는 다이오드의 특성을 가지면서, 인터페이스회로가 휴면상태인 경우에는 on 상태이고, 인터페이스회로가 각성된 경우에는 off 될 수 있게 NMOS(n-channel MOS)가 적용되었다. NMOS의 게이트와 소스를 연결하여 다이오드로 이용 가능하다.9, piezoelectric power is supplied, photoelectric power is not supplied, and a secondary battery (

) And starting capacitor (

It is a diagram showing the energy harvesting path when the voltage of) is lower than the starting voltage (1.2V). Referring to the drawings, the piezoelectric power generated by the piezoelectric element can be awakened so that the interface circuit is a starting capacitor (

). Starting capacitor (

), The output voltage of the piezoelectric element is the starting capacitor (

). At this time, the piezoelectric start switch provided on both sides of the piezoelectric element (

) Has the characteristics of a diode, and when the interface circuit is in the dormant state, it is on, and when the interface circuit is awakened, NMOS (n-channel MOS) is applied. It can be used as a diode by connecting the gate and source of the NMOS.

)이 높게 나타나면 교차연결트랜지스터(

,

)의

이 on되어 우향 압전전력(

) 측의 노드가 그라운드에 연결된다. 반대로, 우향 압전전력(

)이 높게 나타나면

은 off 되고,

은 on 되어 좌향 압전전력(

) 측의 노드가 그라운드에 연결된다. 이로써 압전소자의 양단 전압이 항상 0V 이상을 가질 수 있게 된다.Leftward piezoelectric power (

) Appears high, the cross-connected transistor (

,

)of

Is turned on, the piezoelectric power to the right (

) Side node is connected to the ground. Conversely, the piezoelectric power to the right (

) Appears high

Is off,

Is on and leftward piezoelectric power (

) Side node is connected to the ground. Accordingly, the voltage at both ends of the piezoelectric element can always have 0 V or more.

In the energy collection using the interface circuit according to this embodiment, since no power is consumed, a complete cold-startup is possible.

) 및 시동커패시터(

)의 전압이 시동전압보다 낮고, 광전전력의 전압이 시동커패시터(

)의 전압보다 높을 경우의 에너지 수확 경로를 나타낸 도면이다. 이 경우에는 압전전력이 패시브다이오드(D)를 통과하여 즉시 시동커패시터(

)로 공급된다.10, piezoelectric power is not supplied, photoelectric power is supplied, and a secondary battery (

) And starting capacitor (

) Is lower than the starting voltage, and the photoelectric power voltage is the starting capacitor (

) It is a diagram showing the energy harvesting path when it is higher than the voltage. In this case, the piezoelectric power passes through the passive diode (D) to immediately start the capacitor (

).

) 및 시동커패시터(

)의 전압이 시동전압보다 낮고, 광전전력의 전압이 시동커패시터(

)의 전압보다 낮은 경우의 에너지 수확 경로를 나타낸 도면이다. 이 경우에는 광전전압이 패시브다이오드를 통과할 수 없기 때문에, 이때는 인덕터(

)를 이용하여 전압을 승압시키는 부스트 컨버터(boost converter)가 실시된다. 회로제어기(100)가 휴면상태이고, 광전소자의 전압이 시동커패시터(

)의 전압보다 작은 경우, 광전력스위치(

) 및 빌드업스위치(

)는 on 되어, 광전전력에 의해 인덕터(

)의 전류가 빌드업(build up) 되게 한다. 즉, 이때 인덕터(

)에 의해 광전전력이 증폭된다. 빌드업스위치(

)를 경유하여 이동된 광전전력에 의해 별개 구성된 오실레이터가 펄스를 생성한다. 이후, 빌드업스위치(

)가 off 되고, 광전시동스위치(

)가 on 되면 증폭된 광전전력이 시동커패시터(

)로 흐르게 된다. 이때, 광전시동스위치(

)는 회로제어기(100)가 각성되면 off 되는 것을 특징으로 한다. 광전시동스위치(

)는 회로제어기(100)의 각성 후 off 될 수 있게 NMOS로 구성될 수 있다.11, piezoelectric power is not supplied, photoelectric power is supplied, and a secondary battery (

) And starting capacitor (

) Is lower than the starting voltage, and the photoelectric power voltage is the starting capacitor (

) Is a diagram showing the energy harvesting path when the voltage is lower than. In this case, since the photoelectric voltage cannot pass through the passive diode, the inductor (

) To boost the voltage using a boost converter. The circuit controller 100 is in a dormant state, and the voltage of the photoelectric element is a starting capacitor (

), The optical power switch (

) And build-up switch (

) Is on, and the inductor (

) Causes the current to build up. That is, the inductor (

), The photoelectric power is amplified. Build-up switch (

Oscillators separately constructed by photoelectric power moved via) generate pulses. After that, the build-up switch (

) Is off, photoelectric start switch (

) Is turned on, the amplified photoelectric power is started capacitor (

). At this time, the photoelectric start switch (

) Is characterized in that when the circuit controller 100 is awakened, it is turned off. Photoelectric start switch (

) May be configured as an NMOS so that it can be turned off after the awakening of the circuit controller 100.

)는 광전전력이 충분하지 않을 때만 on 된다. 커넥트(connect)신호를 이용하면 빌드업스위치(

)의 on 필요 여부를 판단할 수 있다.Build-up switch (

) Is turned on only when there is not enough photoelectric power. If you use the connect signal, the build-up switch (

) On can be determined.

) 및 시동커패시터(

)의 전압이 시동전압보다 낮 경우의 에너지 수확 경로를 나타낸 도면이다. 이 실시예는 압전소자와 광전소자의 회로 경로가 별도 구성되어 있기 때문에 압전소자에 대한 콜드스타트업과 광전소자에 대한 콜드스타트 없이 동시에 이루어질 수 있다. 또한, 압전전력이 작더라도 광전전력과 합해지기 때문에 압전전력이 미소하더라도 콜드스타트업이 가능하게 된다.12, piezoelectric power and photoelectric power are simultaneously supplied, and a secondary battery (

) And starting capacitor (

) Shows the energy harvesting path when the voltage is lower than the starting voltage. In this embodiment, since the circuit paths of the piezoelectric element and the photoelectric element are separately configured, it can be simultaneously performed without a cold start-up for the piezoelectric element and a cold start for the photoelectric element. In addition, even if the piezoelectric power is small, it is combined with the photoelectric power, so even if the piezoelectric power is small, a cold start-up is possible.

)에 전력이 충전되면 회로제어기(100)가 각성된다. 회로제어기(100)가 각성되면 제어기시동스위치(

)가 on 된다.Starting capacitor (

) When the power is charged, the circuit controller 100 is awakened. When the circuit controller 100 is awakened, the controller start switch (

) Is on.

)가 충전되는 전력을 생성하는 회로를 강조한 도면이다.13 is a piezoelectric power secondary battery (

) Is a diagram emphasizing a circuit that generates power to be charged.

), 좌향 압전전압(

), 우향 압전전압(

) 및 인덕터의 전류(

)의 관계를 나타낸 도면이다.FIG. 14 shows the flow sequence and piezoelectric current of the leftward piezoelectric power when the circuit controller 100 is driven in SECE (Synchronous Electric Charge Extraction) mode.

), Leftward piezoelectric voltage (

), Rightward piezoelectric voltage (

) And inductor current (

).

The circuit controller 100 of this embodiment analyzes the piezoelectric power, and the piezoelectric signal analysis unit 122 identifies whether an instantaneous signal or a continuous signal, and a SECE mode corresponding to the signal type identified by the piezoelectric signal analysis unit 122. Or it includes a piezoelectric control unit 124 to control the interface circuit to be driven in the file-up mode.

)와 우향플립스위치(

)를 on하여 압전전력이 인덕터(

)에 충전되게 하고, 상기 인덕터(

)의 충전이 압전소자의 일방향에서 출력된 좌향 압전전력(

)에 의한 것이면 우향플립스위치(

)의 off 및 우출구스위치(

)를 on하여 인덕터(

)에 충전된 전력이 회로의 출력단으로 전달되게 한다.SECE mode effectively harvests power when an aperiodic vibration signal, such as a temporary shock, is input. When the SECE mode is executed, the piezoelectric control unit 124 may rotate the left flip switch (

) And right flip switch (

) To turn the piezoelectric power on

), And the inductor (

) Is the left piezoelectric power output from one direction of the piezoelectric element (

), The right flip switch (

) Off and right exit switch (

) On to inductor (

) To transfer the power charged to the output terminal of the circuit.

)가 그래프와 같이 발생된다. 압전전류(

)가 발생되면 압전소자에 포함된 기생커패시터(

)에 좌향 압전전압(

)이 두 번째 그래프와 같이 충전된다. 상승된 압전전류(

)가 0에 도달될 때까지 기생커패시터(

)가 충전된다.Specifically, when a shock vibration is input to the piezoelectric element while the circuit controller 100 is awakened, SECE mode operation is performed. Referring to Figure 14 (a), when the voltage is generated in the (+) direction in the piezoelectric element, the piezoelectric current (

) Is generated like a graph. Piezoelectric current (

) Occurs, the parasitic capacitor included in the piezoelectric element (

) To the left piezoelectric voltage (

) Is charged as in the second graph. Elevated piezoelectric current (

Parasitic capacitor () until it reaches 0

) Is charged.

)와 우향플립스위치(

)를 on 한다. 이때,

은 off,

은 on 된다. 압전소자와 인덕터(

)의 경로가 연결되면 충전된 기생커패시터(

)와 인덕터(

)가 공진하여 기생커패시터(

)에 저장된 전하가 인덕터(

)로 흐르는 전류(

)로 변환된다. 즉, 인덕터(

)가 압전소자에 포함된 기생커패시터(

)와의 공전에 의해 충전된다. 기생커패시터(

)의 에너지가 인덕터(

)로 전달되므로, 기생커패시터(

)에 저장된 전압(

)은 하강하게 된다. 즉, 기생커패시터(

)의 전압(

) 하강과 인덕터(

)의 전류(

) 상승이 동시에 발생된다.Referring to FIG. 14 (b), the piezoelectric signal analysis unit 122 detects the moment when the current of the piezoelectric power rises to 0, that is, the voltage of the piezoelectric power reaches a threshold, and the piezoelectric control unit 124 When the current of power rises to 0 after rising, the left flip switch (

) And right flip switch (

) On. At this time,

Is off,

Becomes on. Piezoelectric element and inductor

When the path of) is connected, the charged parasitic capacitor (

) And inductor (

) Resonates and the parasitic capacitor (

) The charge stored in the inductor (

Current flowing through)

). That is, the inductor (

) Is a parasitic capacitor included in the piezoelectric element (

). Parasitic capacitor (

) Is the energy of the inductor (

), So the parasitic capacitor (

Voltage stored in)

) Goes down. That is, the parasitic capacitor (

) Voltage (

) Descent and inductor (

) Of current (

) Rise occurs simultaneously.

) 및 우향플립스위치(

)의 on 상태는 기생커패시터(

)의 전압(

)이 감소되고, 인덕터(

)의 전류(

)가 상승되는 짧은 시간(

)동안만 유지된다.Left flip switch (

) And right flip switch (

) On the parasitic capacitor (

) Voltage (

) Is reduced, the inductor (

) Of current (

A short time ()

).

) 및 우향플립스위치(

)가 on 된 후, 압전소자에 포함된 기생커패시터(

)의 전압이 0이 되면 우향플립스위치(

)의 off 및 우출구스위치(

)를 on를 실행한다. 기생커패시터(

)의 전압(

)이 0이 되면, 인덕터(

)의 전류(

)가 최대가 된다. 이때, 우향플립스위치(

)가 off, 우출구스위치(

)가 on 되면 인덕터(

)와 회로의 출력단이 서로 연결된다. 인덕터(

)와 회로의 출력단이 서로 연결되면, 회로의 출력단에 연결된 배터리(

)가 충전된다.Referring to Figure 14 (c), the piezoelectric control unit 124 when the SECE mode is executed, the left flip switch (

) And right flip switch (

) Is on, the parasitic capacitor included in the piezoelectric element (

When the voltage of) is 0, the right flip switch (

) Off and right exit switch (

) On. Parasitic capacitor (

) Voltage (

) Becomes 0, the inductor (

) Of current (

) Becomes the maximum. At this time, right flip switch (

) Is off, right exit switch (

) Is on, the inductor (

) And the output terminal of the circuit are connected to each other. Inductor (

) And the output terminal of the circuit are connected to each other, the battery connected to the output terminal of the circuit (

) Is charged.

) off 및 우출구스위치(

) on 상태는 인덕터(

)의 전류(

)가 0이 되는 시간(

) 동안만 유지된다.Right flip switch (

) off and right exit switch (

) on state of the inductor (

) Of current (

Time when) becomes 0

).

)의 전압을 검출하는 대신, 기 설정된 시간(

)을 적정하게 설정하면 동일한 효과를 얻을 수 있다. 기 설정된 시간(

)은 0.20

내지 0.5

가 될 수 있다. 이 실시예에서는 0.25

으로 설정하였다. 즉, SECE모드는 플립스위치(

,

)의 on 후 기 설정된 시간(

) 회로 상태를 유지하고, 기 설정된 시간(

)이 되면 우향플립스위치(

)의 off 및 우출구스위치(

)를 on 하는 것으로 실시될 수 있다.In another embodiment, the piezoelectric signal analysis unit 122 is a parasitic capacitor (

) Instead of detecting the voltage,

) Can be set properly to achieve the same effect. Preset time (

) Is 0.20

To 0.5

Can be 0.25 in this example

Was set to That is, the SECE mode is a flip switch (

,

) After on

) Maintain the circuit state, and the preset time (

) To the right flip switch (

) Off and right exit switch (

) On.

)이 입력될 때의 회로 동작 과정을 나타낸 것이다. 압전소자의 입력은 AC 신호의 성격을 가지므로, 일반적으로 도 14 및 도 15의 동작이 서로 연결되어 반복된다.15 is a piezoelectric power in the right direction while the circuit controller 100 is driven in SECE mode (

) Shows the process of circuit operation when input. Since the input of the piezoelectric element has the characteristics of an AC signal, the operations of FIGS. 14 and 15 are generally connected and repeated.

)가 그래프와 같이 발생된다. 압전전류(

)가 발생되면 압전소자에 포함된 기생커패시터(

)에 우향 압전전압(

)이 두 번째 그래프와 같이 충전된다. 상승된 압전전류(

)가 0에 도달될 때까지 기생커패시터(

)가 충전된다.Referring to FIG. 15 (a), when a voltage is generated in the (-) direction from the piezoelectric element, the piezoelectric current (

) Is generated like a graph. Piezoelectric current (

) Occurs, the parasitic capacitor included in the piezoelectric element (

) To the right piezoelectric voltage (

) Is charged as in the second graph. Elevated piezoelectric current (

Parasitic capacitor () until it reaches 0

) Is charged.

)와 우향플립스위치(

)를 on 한다. 이때,

은 on,

은 off 된다. 압전소자와 인덕터(

)의 경로가 연결되면 충전된 기생커패시터(

)와 인덕터(

)가 공진하여 기생커패시터(

)에 저장된 전하가 인덕터(

)로 흐르는 전류(

)로 변환된다. 기생커패시터(

)의 에너지가 인덕터(

)로 전달되므로, 기생커패시터(

)에 저장된 전압(

)은 하강하게 된다. 즉, 기생커패시터(

)의 전압(

) 하강과 인덕터(

)의 전류(

) 상승이 동시에 발생된다.Referring to FIG. 15 (b), the piezoelectric control unit 124 may rotate the left flip switch when the voltage of the piezoelectric power reaches a threshold value.

) And right flip switch (

) On. At this time,

Is on,

Is off. Piezoelectric element and inductor

When the path of) is connected, the charged parasitic capacitor (

) And inductor (

) Resonates and the parasitic capacitor (

) The charge stored in the inductor (

Current flowing through)

). Parasitic capacitor (

) Is the energy of the inductor (

), So the parasitic capacitor (

Voltage stored in)

) Goes down. That is, the parasitic capacitor (

) Voltage (

) Descent and inductor (

) Of current (

) Rise occurs simultaneously.

) 및 우향플립스위치(

)의 on 상태는 기생커패시터(

)의 전압(

)이 감소되고, 인덕터(

)의 전류(

)가 상승되는 짧은 시간(

)동안만 유지된다.Left flip switch (

) And right flip switch (

) On the parasitic capacitor (

) Voltage (

) Is reduced, the inductor (

) Of current (

A short time ()

).

)의 전압(

)이 0이 되고, 인덕터(

)의 전류(

)가 최대가 되면 압전제어부(124)가 좌향플립스위치(

)를 off, 좌출구스위치(

)를 on 하여 인덕터(

)와 회로의 출력단이 서로 연결되게 한다. 인덕터(

)와 회로의 출력단이 서로 연결되면, 회로의 출력단에 연결된 배터리(

)가 충전된다.15 (c), the parasitic capacitor (

) Voltage (

) Becomes 0, the inductor (

) Of current (

) Is the maximum, the piezoelectric controller 124 turns the left flip switch (

) Off, left exit switch (

) To turn on the inductor (

) And the output terminal of the circuit are connected to each other. Inductor (

) And the output terminal of the circuit are connected to each other, the battery connected to the output terminal of the circuit (

) Is charged.

)를 off 및 좌출구스위치(

)를 on 상태는 인덕터(

)의 전류(

)가 0이 되는 시간(

) 동안만 유지된다.Left flip switch (

) Off and left exit switch (

) On the inductor (

) Of current (

Time when) becomes 0

).

With respect to the pile-up mode, in the case of the fifth circuit structure (DPM) announced in JSSC 2017, there is a disadvantage that the piezoelectric power can reach the break down voltage to harvest energy. However, this embodiment has the advantage that energy can be harvested even if the collapse voltage is not reached.

)에 누적된 후 S1스위치가 on 되어 기생커패시터와 인덕터가 연결되면 기생커패시터에 저장된 전하가 인덕터로 전달된다. 이때, 기생커패시터의 전하가 인덕터에 모두 전달된 후에도 S1스위치를 on 한 상태로 유지하면 인덕터의 전하가 다시 기생커패시터로 이동되어 기생커패시터가 반대 극성, 즉 (-)극성으로 충전된다. 기생커패시터가 (-)극성으로 충전된 후 압전소자에서 (-)극성의 전하가 발생되어 기생커패시터가 추가 충전되면 기생커패시터에 더 많은 전하가 저장되게 된다. 이와 같은 단계로 기생커패시터의 전하 누적과 방전이 반복되면 도 16의 우측 그래프와 같이 압전전력의 전압이 증폭되는 효과가 발생된다. 예를 들어, 압전소자에서 발생된 전압이 0.5V일 때 파일업 모드가 실행되면 인덕터에서 출력되는 전압이 5V와 같이 나타게 할 수 있다.Referring to FIG. 16, when vibration is continuously generated, the piezoelectric controller 124 controls the circuit in a pile-up mode. Pile-up is a method to virtually maximize the voltage appearing in a piezoelectric element. Referring to the schematic example drawing of the upper left of FIG. 16, when the S1 switch is turned off, the (+) polar charge generated in the piezoelectric element is converted into a voltage and the parasitic capacitor (

After accumulating in), when the S1 switch is turned on and the parasitic capacitor and the inductor are connected, the electric charge stored in the parasitic capacitor is transferred to the inductor. At this time, if the S1 switch is kept on even after all the charge of the parasitic capacitor is transferred to the inductor, the charge of the inductor is transferred to the parasitic capacitor again, so that the parasitic capacitor is charged with the opposite polarity, that is, (-) polarity. After the parasitic capacitor is charged with (-) polarity, a charge of (-) polarity is generated in the piezoelectric element, and when the parasitic capacitor is additionally charged, more charge is stored in the parasitic capacitor. When the charge accumulation and discharge of the parasitic capacitor are repeated in this step, the effect of amplifying the voltage of the piezoelectric power is generated as shown in the graph on the right in FIG. 16. For example, when the voltage generated in the piezoelectric element is 0.5V and the file-up mode is executed, the voltage output from the inductor may be displayed as 5V.

)와 우향플립스위치(

)를 on하여 압전전력이 인덕터(

)에 충전되게 하고, 인덕터(

)에 충전된 전력 일부가 압전소자에 포함된 기생커패시터(

)에 충전되는 시간동안 지연 후, 상기 인덕터(

)의 충전이 압전소자에서 출력된 좌향 압전전력(

)에 의한 것이면 우향플립스위치(

) off 및 우출구스위치(

) on 하여 인덕터(

)에 충전된 전력이 회로의 출력단으로 전달되게 한다.17 and 18, the file-up mode control of the piezoelectric control unit 124 is a left flip switch (

) And right flip switch (

) To turn the piezoelectric power on

), And inductor (

) A part of the electric power charged in the piezoelectric element parasitic capacitor (

After the delay for charging time, the inductor (

), The piezoelectric power to the left output from the piezoelectric element (

), The right flip switch (

) off and right exit switch (

) on to inductor (

) To transfer the power charged to the output terminal of the circuit.

,

) 및 출구스위치(

,

)가 on 또는 off 되는 타이밍에 차이가 있다.The file-up mode is operated similarly to the SECE mode, but the flip switch (

,

) And exit switch (

,

) Is on or off timing.

)이 상승되어 시작되는 것은 기생커패시터(

)에 이미 전하가 충전되어 있음을 나타낸다. 압전소자에서 (+)극성의 전하가 발생되면, 기생커패시터(

)에 전압(

)이 쌓이게 된다. 이때, 기생커패시터(

)에 전압(

)이 이미 충전된 상태에서 추가 충전이 실시되므로 SECE모드 때보다 기생커패시터(

)에 더 많은 전하가 충전될 수 있게 된다.Specifically, referring to FIG. 17 (a), the left piezoelectric voltage of the second graph (

) Begins when the parasitic capacitor (

) Is already charged. When a positive (+) polar charge is generated in the piezoelectric element, the parasitic capacitor (

Voltage)

) Will accumulate. At this time, the parasitic capacitor (

Voltage)

), The additional charging is performed in the already charged state, so the parasitic capacitor (

) Can be charged with more charge.

)의 전압(

)이 임계치에 도달되는 것을 검출하면, 압전제어부(124)가 좌향플립스위치(

) 및 우향플립스위치(

)를 on 하여 기생커패시터(

)와 인덕터(

)가 공진되게 한다. 이때, 플립스위치(

,

)의 on 상태를 기 설정된 시간(

)동안 유지하여 인덕터(

)의 전하가 재차 기생커패시터(

)로 이동되게 하면, 인덕터(

)의 전류(

)가 감소하는 대신 기생커패시터(

)가 (-)극성의 전하로 충전된다.Referring to Figure 17 (b), the piezoelectric signal analysis unit 122 is a parasitic capacitor (

) Voltage (

) Detects that the threshold is reached, the piezoelectric controller 124 turns the left flip switch (

) And right flip switch (

) To turn on the parasitic capacitor (

) And inductor (

) To resonate. At this time, flip switch (

,

) On state for a preset time (

) For an inductor (

) Again the parasitic capacitor (

), The inductor (

) Of current (

) Instead of decreasing, the parasitic capacitor (

) Is charged with a negative charge.

) 및 우향플립스위치(

)가 on 된 후, 압전소자에 포함된 기생커패시터(

)가 우향 압전전압(

)으로 임계치까지 충전되면 우향플립스위치(

)의 off 및 우출구스위치(

)를 on 한다. 기생커패시터(

)의 임계치 충전은 압전신호분석부(122)가 수행한다.The piezoelectric control unit 124, when the file up mode is executed, the left flip switch (

) And right flip switch (

) Is on, the parasitic capacitor included in the piezoelectric element (

) Is the right piezoelectric voltage (

When it is charged to the threshold with), the right flip switch (

) Off and right exit switch (

) On. Parasitic capacitor (

) Is performed by the piezoelectric signal analysis unit 122.

)의 전압을 검출하는 대신, 기 설정된 시간(

)을 적정하게 설정하면 동일한 효과를 얻을 수 있다. 이때, 기 설정된 시간(

)은 0.5

내지 1.0

로 설정될 수 있다. 즉, 파일업모드는 플립스위치(

,

)의 on 후 기 설정된 시간(

) 회로 상태를 유지하고, 기 설정된 시간(

)이 되면 우향플립스위치(

)의 off 및 우출구스위치(

)를 on 하는 것으로 실시될 수 있다.In another embodiment, the piezoelectric signal analysis unit 122 is a parasitic capacitor (

) Instead of detecting the voltage,

) Can be set properly to achieve the same effect. At this time, the preset time (

) Is 0.5

1.0

Can be set to That is, in the file up mode, the flip switch (

,

) After on

) Maintain the circuit state, and the preset time (

) To the right flip switch (

) Off and right exit switch (

) On.

) 후 우향플립스위치(

)를 off하고, 우출구스위치(

)를 on 하여 인덕터(

)의 전류를 회로의 출력단으로 이동되게 한다.Referring to Figure 17 (c), the preset time (

) And right flip switch (

) Off, right exit switch (

) To turn on the inductor (

) To move the current to the output terminal of the circuit.

)이 발생되는 경우의 파일업모드 구동을 나타낸 도면이다. 도 19(c)단계가 실행 완료되면, 이어서 도 17(a)의 동작이 실행된다.FIG. 19 is an operation connected to FIG. 17 (c), in which a piezoelectric voltage to the right in the piezoelectric element (

) Is a diagram showing the operation of the file-up mode when it occurs. When step 19 (c) is completed, the operation of Figure 17 (a) is subsequently executed.

)에 저장되는 전압, 압전신호분석부(122)가 검출하는 신호, 파일업모드 실행 타이밍, 각 단계별로 인터페이스회로에서 출력되는 전압을 나타낸 도면이다. 휴면상태의 인터페이스회로에서 수확하는 에너지(passive harvesting)는 전압이 작지만, SECE모드에서의 에너지가 수확(SECE harvesting)은 보다 증대되는 효과 있다. 또한, 파일업모드가 실행되면 수확되는 에너지(Pile-Up harvesting)의 양이 매우 더 크게 증가되는 효과가 있음을 알 수 있다.Figure 20 is a parasitic capacitor of the piezoelectric element in each mode when the continuous vibration occurs (

), The voltage stored in the piezoelectric signal analysis unit 122, the timing of the file-up mode execution, and the voltage output from the interface circuit in each step. The energy harvested from the dormant interface circuit (passive harvesting) has a small voltage, but the energy harvested from the SECE mode (SECE harvesting) is more effective. In addition, it can be seen that when the file-up mode is executed, the amount of energy harvested (Pile-Up harvesting) is greatly increased.

The piezoelectric signal analysis unit 122 analyzes the signal pattern of the piezoelectric power and executes the file-up mode when it is determined that the vibration is repeated.

21 to 23 are diagrams for explaining power flow when photoelectric power is input and execution of the MPPT mode and the boost converter mode.

)가 충전되게 부스트 컨버터 모드로 인터페이스회로를 제어하는 광전제어부(144)를 더 포함한다. 이때, MPP 전압은 광전전력의 개방회로전압(open circuit voltage)의 0.7배 내지 0.8배 사이가 된다. 가장 바람직한 배수는 0.75배이다.The circuit controller 100 analyzes a signal of photoelectric power and searches for an MPP (Maximum Power Point) voltage. The photoelectric signal analysis unit 142 and the photoelectric signal analysis unit 142 analyze the inductor as much as the power corresponding to the analyzed MPP voltage. (

) Further includes a photoelectric control unit 144 that controls the interface circuit in the boost converter mode to be charged. At this time, the MPP voltage is between 0.7 and 0.8 times the open circuit voltage of the photoelectric power. The most preferred multiple is 0.75 times.

) 및 빌드업스위치(

)를 on 하고, 인덕터(

)에 충전된 전력이 MPP 전압에 대응되게 충전되면 빌드업스위치(

) off 및 좌출구스위치(

) on 하여 인덕터(

)에 충전된 전력이 회로의 출력단으로 전달되게 한다.When the photoelectric power is received, the photoelectric control unit 144 receives an optical power switch (

) And build-up switch (

) On, inductor (

When the power charged in) is charged corresponding to the MPP voltage, the build-up switch (

) off and left exit switch (

) on to inductor (

) To transfer the power charged to the output terminal of the circuit.

)에 대한 샘플링을 실시한다. 광전제어부(144)에 포함되는 MPP샘플러(Maximum Power Point Sampler)는 광전전력이 수신되면 Sample스위치를 off, Harvest스위치를 on 한다. 이때 4C와 C 사이에서 충전공유(charge sharing)가 발생되고, 입력된 광전전압(

)의 80%가 되는 전압이 Harvest스위치 양단에서 나타나게 된다.Specifically, first, the photovoltaic element open circuit voltage (

). The MPP sampler (Maximum Power Point Sampler) included in the photoelectric control unit 144 turns off the sample switch and turns on the harvest switch when photoelectric power is received. At this time, charge sharing occurs between 4C and C, and the input photoelectric voltage (

), A voltage of 80% appears across the harvest switch.

)과 대비하여, MPP전압 수준에서만 광전전압(

)이 수확되게 인터페이스회로를 제어한다. 광전제어부(144)는 광전전압(

)과 MPP전압을 대비하면서 광전전압(

)이 MPP전압에 도달될 때까지 광전전압(

)을 인덕터(

)를 이용하여 빌드업 한다. 광전전압(

)이 MPP전압에 도달되면 빌드업스위치(

)를 off 하고, 좌출구스위치(

)를 on 하여 광전전력이 배터리로 공급되게 한다.The photoelectric control unit 144 uses the voltage appearing at both ends of the harvest switch as an MPP voltage to generate a photoelectric voltage (

), The photovoltaic voltage only at the MPP voltage level (

) To control the interface circuit to be harvested. The photoelectric control unit 144 is a photoelectric voltage (

) And MPP voltage, while photoelectric voltage (

) Until the photovoltaic voltage (

) To the inductor (

) To build up. Photovoltaic voltage (

) When the MPP voltage is reached, the build-up switch (

) Off, left exit switch (

) To turn on the photoelectric power to be supplied to the battery.

Referring to FIG. 24, this embodiment enables various modes capable of effectively harvesting energy while using circuits used for piezoelectric power harvesting together in photoelectric power harvesting.

)가 광전전력에 의해 충방전되는 타이밍과 압전전력에 의해 충방전되는 타이밍이 중복되지 않게 제어하는 스케줄러(160)를 더 포함한다.Referring to FIG. 25, the circuit controller 100 includes an inductor (

) Includes a scheduler 160 that controls the timing of charging and discharging by photoelectric power and the timing of charging and discharging by piezoelectric power so as not to overlap.

26 is a circuit diagram of a power extraction module in which an interface circuit and a circuit control unit are combined according to an embodiment of the present invention. The shaded box is configured to function only when the circuit control unit is awakened.

The power extraction module of this embodiment can be applied in combination with various systems.

As a first embodiment, the present invention can be an IoT sensor device composed of a sensor module that acquires environmental information to be detected, a piezoelectric element, a photoelectric element, and a power extraction module that supplies power to the sensor module. The environment information to be detected by the sensor module may be temperature, humidity, illuminance, gas concentration, and the like.

As a second embodiment, the present invention comprises a mobile operating system, a computing module including an associative device and a memory for executing the mobile operating system, a power extraction module coupled to a piezoelectric element and a photoelectric element, and supplying power to the computing module. It can be a wearable device. Mobile operating systems include iOS and Android. The wearable device may be variously implemented, such as a wrist wear type, glasses type, and garment type.

Next, a power extraction method according to an embodiment of the present invention will be described.

Referring to FIG. 27, a method for extracting power according to an embodiment of the present invention controls an interface circuit that receives photoelectric power generated by a photoelectric element and piezoelectric power generated by a piezoelectric element, and converts and outputs the received power. In the power extraction method of the circuit controller 100, the step of discriminating the reception of the photoelectric power or the piezoelectric power (S100) When the photoelectric power is received, the interface circuit MPMP (Maximum Power Point Tracking) mode and boost Step to control to be driven in a converter (boost converter) mode (S140, S160, S180), when the piezoelectric power is received, controlling the interface circuit to be driven in the SECE (Synchronous Electric Charge Extraction) mode (S240, S260) , S280).

Controlling the interface circuit to be driven in an MPPT (Maximum Power Point Tracking) mode and a boost converter mode includes analyzing the received photoelectric power to derive an MPP (Maximum Power Point) voltage value (S140), Using the inductor included in the interface circuit to build-up the photoelectric power until the MPP voltage is reached (S160), when the voltage of the photoelectric power reaches the MPP voltage, the photoelectric And connecting the inductor of the interface circuit and the path of the circuit output terminal so that power can be transferred to the circuit output terminal (S180).

Controlling the interface circuit to be driven in the SECE mode includes analyzing the signal of the piezoelectric power (S210) and determining whether the piezoelectric power is a repeated continuous signal (S220), if the piezoelectric power is not a continuous signal, Step of monitoring the decrease in current while monitoring the signal of the piezoelectric power (S240), if the current of the piezoelectric power increases and then decreases, the path of the piezoelectric element and the inductor of the interface circuit so that the piezoelectric power can be charged to the inductor Connecting (S260), the step of connecting the path of the inductor and the circuit output terminal of the interface circuit so that the power charged in the inductor can be moved to the circuit output terminal (S280).

At this time, step S260 is characterized in that the path is connected only for a time during which the piezoelectric power of the piezoelectric element is moved to the inductor.

In addition, step S280 has a condition that is executed when the voltage of the parasitic capacitor included in the piezoelectric element becomes zero.

If it is determined in step S220 that the piezoelectric power is a continuous signal, monitoring the signal of the piezoelectric power and monitoring that the voltage of the piezoelectric power reaches a threshold value (S340), wherein the voltage of the piezoelectric power is at a threshold value. When it is reached, after the piezoelectric power of the piezoelectric element is moved to the inductor, the interface so that the piezoelectric power is charged to the inductor for a time during which a portion of the electric power charged in the inductor is charged in the parasitic capacitor included in the piezoelectric element Connecting the path of the piezoelectric element and the inductor of the circuit (S360), when the parasitic capacitor included in the piezoelectric element is charged to a threshold with a piezoelectric voltage of opposite polarity, power charged in the inductor can be moved to the circuit output terminal And connecting a path between the inductor of the interface circuit and the circuit output terminal (S380).

Although the preferred embodiments of the present invention have been described above, the present invention can use various changes, modifications, and equivalents. It is clear that the present invention can be equally applied by appropriately modifying the above embodiments. Therefore, the above description is not intended to limit the scope of the present invention as defined by the following claims.

100: circuit controller 122: piezoelectric signal analysis unit
124: piezoelectric control unit 142: photoelectric signal analysis unit
144: photoelectric control unit 160: scheduler

Claims (23)

An interface circuit that receives the photoelectric power generated by the photoelectric element and the piezoelectric power generated by the piezoelectric element, and converts and outputs the received power;
Analyze the signals of the photoelectric power and the piezoelectric power received by the interface circuit, and control the interface circuit to be driven in MPPT (Maximum Power Point Tracking) mode and boost converter mode in response to the photoelectric power, , A circuit controller for controlling the interface circuit to be driven in a SECE (Synchronous Electric Charge Extraction) mode if the piezoelectric power is a momentary signal and a pile-up mode when the piezoelectric power is a continuous signal,
A cross coupled transistor connected to both sides of the output terminal of the piezoelectric element and connecting the output terminal opposite to the direction in which the piezoelectric voltage is output to ground.

And

), And a leftward flip switch connected to one side of the output terminal of the piezoelectric element (

), And a right-hand flip switch connected to the other side of the output terminal of the piezoelectric element (

), And the left flip switch (

) And the right flip switch (

) Connected between inductors (

), The input terminal is the left flip switch (

) And the inductor (

), The output terminal of the circuit is connected to the output terminal of the left outlet switch (

), The input terminal is the inductor (

) And the right flip switch (

) And the output terminal of the circuit is connected to the output terminal of the circuit.

Power extraction system comprising a). delete According to claim 1,
The circuit controller analyzes the piezoelectric power so that the piezoelectric signal analysis unit identifies whether an instantaneous signal or a continuous signal and the interface circuit is driven in a SECE mode or a file-up mode corresponding to the signal type identified by the piezoelectric signal analysis unit. It includes a piezoelectric control unit for controlling,
When the SECE mode is executed, the piezoelectric control unit may rotate the left flip switch (

) And the right flip switch (

) To turn the piezoelectric power on the inductor (

), And the inductor (

) Is the leftward piezoelectric power (

), The right flip switch (

) Off and the right exit switch (

) To turn on the inductor (

Power extraction system, characterized in that to transfer the power charged in) to the output terminal of the circuit. According to claim 3,
When the piezoelectric control unit executes the file up mode, the left flip switch (

) And the right flip switch (

) To turn the piezoelectric power on the inductor (

), And the inductor (

) A part of the electric power charged in the parasitic capacitor included in the piezoelectric element (

After the delay for charging time, the inductor (

) Is the leftward piezoelectric power (

), The right flip switch (

) off and the right exit switch (

) on to the inductor (

Power extraction system, characterized in that to transfer the power charged in) to the output terminal of the circuit. The method of claim 3 or 4,
The inductor (

) Is a parasitic capacitor included in the piezoelectric element (

Power charging system characterized in that it is charged by revolution with). According to claim 4,
The piezoelectric signal analysis unit detects the moment when the current of the piezoelectric power rises to 0,
The piezoelectric control unit is the moment when the current of the piezoelectric power rises to 0 and the left flip switch (

) And the right flip switch (

Power extraction system, characterized in that on. The method of claim 6,
When the piezoelectric controller is in SECE mode, the left flip switch (

) And the right flip switch (

) Is turned on, the parasitic capacitor included in the piezoelectric element (

) When the voltage of 0 is 0, the right flip switch (

) Off and the right exit switch (

Power extraction system, characterized in that on. The method of claim 6,
When the piezoelectric controller executes the file up mode, the left flip switch (

) And the right flip switch (

) Is turned on, the parasitic capacitor included in the piezoelectric element (

) Is the right piezoelectric voltage (

) Is charged to the threshold value, the right flip switch (

) Off and the right exit switch (

Power extraction system, characterized in that on. The method of claim 3, wherein the interface circuit
The output terminal of the photoelectric element and the inductor (

) Is connected between the optical power switch (

), The input terminal is the inductor (

) And the left exit switch (

), And the output terminal is connected to the ground.

Power extraction system, characterized in that it further comprises a. The method of claim 9,
The circuit controller analyzes the signal of the photoelectric power and searches for an MPP (Maximum Power Point) voltage. The photoelectric signal analysis unit and the photoelectric signal analysis unit analyzes the inductor as much as the power corresponding to the analyzed MPP voltage (

) Further comprises a photoelectric control unit that controls the interface circuit in a boost converter mode to be charged,
When the photoelectric power is received, the photoelectric control unit may include the optical power switch (

) And the build-up switch (

) On, and the inductor (

When the power charged in) is charged to correspond to the MPP voltage, the build-up switch (

) off and the left exit switch (

) on to the inductor (

Power extraction system, characterized in that to transfer the power charged in) to the output terminal of the circuit. 11. The method of claim 10, The circuit controller
The inductor (

) The timing of charging and discharging by the photoelectric power and the timing of charging and discharging by the piezoelectric power further include a scheduler that controls so that they do not overlap each other. 10. The method of claim 9, The interface circuit
Piezoelectric start switch (in which the input terminal is connected to the output terminal of the piezoelectric element)

) And the piezoelectric start switch (

) Is connected to the output terminal of the starting capacitor to charge the applied power (

) And the starting capacitor (

) Is connected between the input terminal and the output terminal of the circuit, and the starting capacitor (

) When the charge is turned on, the controller start switch () that causes the circuit controller to awaken

Power extraction system, characterized in that it further comprises a. The method of claim 12, wherein the interface circuit
The input terminal is connected to the output terminal of the photoelectric element, and the output terminal is the starting capacitor (

), The voltage of the photoelectric power when the circuit controller is in the dormant state, the starting capacitor (

), The photoelectric power is greater than the voltage of the starting capacitor (

) To pass the passive diode further,
The optical power switch (

) And the build-up switch (

) Is the voltage of the photoelectric element when the circuit controller is in the dormant state, the starting capacitor (

) Is less than the voltage of the on, the inductor (

) In the power extraction system characterized in that the photoelectric power is amplified. It is driven in the SECE (Synchronous Electric Charge Extraction) mode or the pile-up mode for the piezoelectric power of the piezoelectric element, and the MPPT (Maximum Power Point Tracking) mode and boost converter (boost) for the photoelectric power of the photoelectric element converter) mode interface circuit,
A cross coupled transistor connected to both sides of the output terminal of the piezoelectric element and connecting the output terminal opposite to the direction in which the piezoelectric voltage is output to ground.

And

);
Left flip switch connected to one side of the output terminal of the piezoelectric element (

);
Right flip switch connected to the other side of the output terminal of the piezoelectric element (

);
The left flip switch (

) And the right flip switch (

) Connected between inductors (

);
The input terminal is the left flip switch (

) And the inductor (

), The output terminal of the circuit is connected to the output terminal of the left outlet switch (

);
The input terminal is the inductor (

) And the right flip switch (

) And the output terminal of the circuit is connected to the output terminal of the circuit.

);
The output terminal of the photoelectric element and the inductor (

) Is connected between the optical power switch (

);
The input terminal is the inductor (

) And the left exit switch (

), And the output terminal is connected to the ground.

) Interface circuit comprising a. The method of claim 14,
A piezoelectric start switch for connecting the output terminal of the piezoelectric element to the piezoelectric power output from the piezoelectric element (

);
The piezoelectric start switch (

) Is connected to the output terminal of the starting capacitor to charge the applied power (

);
The starting capacitor (

) Is connected between the input terminal and the output terminal of the circuit, and the starting capacitor (

) When the charge is on, the controller start switch that turns on and awakens the circuit controller (

) Further comprising an interface circuit. The method of claim 15,
The input terminal is connected to the output terminal of the photoelectric element, and the output terminal is the starting capacitor (

), The voltage of the photoelectric power when the circuit controller is in the dormant state, the starting capacitor (

), The photoelectric power is greater than the voltage of the starting capacitor (

) To pass the passive diode further,
The optical power switch (

) And the build-up switch (

) Is the voltage of the photoelectric element when the circuit controller is in the dormant state, the starting capacitor (

) Is less than the voltage of the on, the inductor (

) In the interface circuit characterized in that the photoelectric power is amplified. In the photoelectric power generated by the photoelectric device and the piezoelectric power generated by the piezoelectric element, in the power extraction method of the circuit controller for controlling the interface circuit for output after converting the received power,
(A) discriminating the reception of the photoelectric power or the piezoelectric power;
(B) when the photoelectric power is received, controlling the interface circuit in an MPPT (Maximum Power Point Tracking) mode and a boost converter mode;
(C) when the piezoelectric power is received, the power extraction method comprising the step of controlling the interface circuit in a SECE (Synchronous Electric Charge Extraction) mode. The method of claim 17, step (B) is
Deriving a maximum power point (MPP) voltage value by analyzing the received photoelectric power;
Using the inductor included in the interface circuit to build-up the photoelectric power until the MPP voltage is reached;
And when the voltage of the photoelectric power reaches the MPP voltage, connecting the inductor of the interface circuit and the path of the circuit output terminal so that the photoelectric power can be transferred to the circuit output terminal. The method of claim 18, step (B) is
Monitoring a decrease in current while monitoring the signal of the piezoelectric power;
Connecting the path of the piezoelectric element and the inductor of the interface circuit so that the piezoelectric power is charged to the inductor when the current of the piezoelectric power increases and decreases;
And connecting a path between the inductor of the interface circuit and the circuit output terminal so that the power charged in the inductor can be moved to the circuit output terminal. The method of claim 19,
The step of connecting the path of the piezoelectric element and the inductor of the interface circuit,
A method of extracting power, characterized in that a path is connected only for a time during which the piezoelectric power of the piezoelectric element is moved to the inductor. The method of claim 19, wherein the step of connecting the inductor of the interface circuit and the path of the circuit output terminal,
A power extraction method characterized in that it is executed when the voltage of the parasitic capacitor included in the piezoelectric element becomes zero. The method of claim 19,
The step of monitoring that the voltage of the piezoelectric power reaches a threshold value determines whether the piezoelectric power is a repeated continuous signal,
If the piezoelectric power is a continuous signal, the step of connecting the path of the piezoelectric element and the inductor of the interface circuit is performed when the parasitic capacitor included in the piezoelectric element is charged to a threshold with a piezoelectric voltage of opposite polarity. Power extraction method. The method of claim 19,
The circuit controller controls the timing of using the inductor in steps (A) and (B) so that they do not overlap each other.

Images