KR102013994B1 - Super capacitor and manufacturing method thereof - Google Patents

Abstract

The present invention discloses a structure of a chip-type supercapacitor and a method of manufacturing the same that can provide the largest capacitance possible in a small chip size. According to the present invention, a set of first collection electrodes and second collection electrodes spaced apart from each other and applied with an external voltage, and a set of the first collection electrodes and the second collection electrodes respectively disposed on opposite surfaces of each of the first collection electrodes and the second collection electrodes And a plurality of unit cells, each of which is composed of an active electrode and a separator interposed between the set of active electrodes, wherein each of the plurality of unit cells includes a plurality of unit cells. Provided are a supercapacitor and a method of manufacturing the same, in which unit cells are electrically connected in a parallel circuit so that total capacitance becomes a sum of capacitances of each of the plurality of unit cells.

Description

Super Capacitor and Manufacturing Method thereof {SUPER CAPACITOR AND MANUFACTURING METHOD THEREOF}

TECHNICAL FIELD The present invention relates to supercapacitors, and more particularly to an improved structure of supercapacitors capable of providing the largest capacitance possible at small chip sizes.

The present invention also relates to a method of manufacturing the supercapacitor.

A super capacitor is a method of accumulating electricity by ion movement to an electrode and an electrolyte interface, unlike a conventional secondary battery using a chemical reaction. Therefore, it has the advantage of high output, fast charge and discharge speed, and excellent cycle characteristics. In particular, due to the use of environmentally friendly materials, long life and high charging and discharging efficiency, the importance of the technology has been highlighted in terms of environmental economy.

However, with the current technology level, supercapacitors have relatively lower energy density than lithium-ion batteries, and their use is limited to the backup power supply of small electronic products and mobile communication devices. It is expected to be applied as an auxiliary power source for various power systems such as automobiles or fuel cell vehicles.

1 schematically shows a structure of a general super capacitor.

Referring to FIG. 1, a general super capacitor is largely coupled between a cathode 10 and a cathode 10 ′ with a separator 30 interposed therebetween, which is housed in an insulating substrate 55 and a cavity lead 50 as a housing. The electrolyte 90 is injected therein. The cavity lead 50 is sealed to the upper surface of the insulating substrate 55 through the bonding member 80 to prevent leakage of the electrolyte 90 to form a kind of chip package. The cavity lead 50 is made of, for example, stainless steel and is electrically connected to the external terminal 72.

In addition, each of the anode 10 and the cathode 10 'includes a pair of current collecting electrodes 11 and 11' and a pair of porous active electrodes 12 coated on the current collecting electrodes 11 and 11 ', respectively. , 12 '). Thus, the separator 30 is disposed between these active electrodes 12, 12 'and allows the impregnated electrolyte 9 to pass through the separator 30 while maintaining electrical insulation therebetween, for example, a cellulose fiber membrane or the like. Is prepared.

In addition, the current collecting electrodes 11 and 11 ′ may be made of a conductive material such as aluminum foil, and the current collecting electrodes 11 may be electrically connected to an upper portion of the cavity lead 50 electrically connected to the external terminal 72. The current collecting electrode 11 ′ is electrically connected to the terminal 74.

In the above structure, when a voltage is applied to the terminals 72 and 74, an electric field is formed between the current collecting electrodes 11 and 11 ′ electrically connected to the terminals 72 and 74, thereby charging the electrolyte 90. The ions move through the separator 30 and are arranged at the interface between the electrolyte 90 and each of the active electrodes 12 and 12 'and are adsorbed on the surface of each of the active electrodes 12 and 12' to store electricity.

On the other hand, such supercapacitors are generally manufactured in pouch, cylindrical, square, and coin or chip forms. Pouch type, cylindrical and square supercapacitor packages are widely used in medium or large capacity capacitor products, but coin type and chip type are mainly used as small and low capacity supercapacitors used for backup power in low power electronic devices such as mobile devices.

Conventional coin-type supercapacitors are manufactured by molding metal and plastic resins, and thus have difficulty in miniaturization, and require a separate exterior lead to be mounted on a circuit board. Therefore, the surface mount yield is low. In addition, moisture easily penetrates between the cavity lead and the metal material, and the volumetric efficiency of the capacity is relatively low due to the layout of the electrode. Accordingly, in recent years, the demand for chip-type supercapacitors using ceramic substrates having low leakage current, good moisture resistance and excellent heat resistance when soldering has increased.

As a conventional technology for improving surface mountability as a chip-type device, for example, Korean Patent No. 10-1297091 (August 14, 2013) "Surface Mounted Super Capacitor and Its Manufacturing Method", and Korean Patent No. 10-1709591 (2017 3. 8 Announcements) Although a number of techniques have been disclosed, such as "surface mounted supercapacitors and manufacturing methods thereof," the conventional chip type supercapacitors have structural limitations in increasing the capacitance of the device.

This is because in the chip type super capacitor, the thickness of each of the active electrodes 12 and 12 'is generally limited to about 100 μm. Of course, increasing the thickness of the active electrode layer can increase the capacitance value of the device, but in this case, the equivalent series resistance (ESR) value of the chip type supercapacitor increases, resulting in a deterioration of the capacitor performance. Will result.

Therefore, in the case of a small chip type supercapacitor having a small device size of 3225 (i.e., 3.2 mm x 2.5 mm) or smaller, the chip type supercapacitor of the conventional structure is provided as long as the capacitance of the active electrode layer embedded in the chip is not improved. The capacitance value that can be provided is bound to be limited.

Accordingly, the present invention is to provide a structure and a manufacturing method of a chip-type supercapacitor which can provide the largest capacitance possible, especially in a small chip size.

The supercapacitor according to an aspect of the present invention for achieving the above object is a set of first and second collector electrodes facing each other spaced apart from each other and applied with an external voltage, and the first and second collector electrodes And a plurality of unit cells each composed of one set of active electrodes disposed on each of the surfaces facing each other and a separator interposed between the set of active electrodes, wherein each of the plurality of unit cells includes a plurality of unit cells. The first collector electrode and the second collector electrode are connected such that the plurality of unit cells electrically form a parallel circuit, so that the total capacitance may be the sum of the capacitances of the plurality of unit cells.

In this case, the separator included in each of the plurality of unit cells may form a continuous unity over the plurality of unit cells.

In addition, the plurality of unit cells may be prepared as unit cells having three or more radix.

In addition, the plurality of unit cells may be accommodated in an inner space formed by an insulation substrate and a cavity lead sealed around the insulation substrate, and an inner wall surface of the cavity lead may be coated with an insulating film.

In addition, one of the first current collector electrode and the second current collector electrode may be electrically connected to a government contact portion located at the top of the cavity lead, and the government contact portion may be excluded from coating of the insulating layer.

In addition, the insulating film has heat resistance in a temperature range of 150 ° C. or higher, and includes polyimide (PI), polytetrafluoroethylene (PTFE), polyethylene (PE), polyvinylidene fluoride (PVDF), and styrene butadiene rubber (SBR). It may be one or more selected from the group consisting of.

In addition, the manufacturing method of the supercapacitor according to another aspect of the present invention is a manufacturing method of the supercapacitor having the above-described structure, and may include the following process:

(i) forming a first electrode assembly by arranging three or more first active electrodes on one surface of the first current collecting electrode in a line to be spaced apart from each other, and forming three or more second active electrodes on one surface of the second current collecting electrode; Arranging the second electrode assembly in a row to be spaced apart from each other, and disposing one third active electrode and one fourth active electrode at both ends of the separator;

(ii) The first electrode assembly and the second electrode assembly may have a first active electrode and a second active electrode, except for one first active electrode and one second active electrode, respectively positioned at each end of the first electrode assembly and the second electrode assembly. The one first active electrode and one second active electrode attached to the separator so as to form a pair of opposite to each other, respectively, are disposed in the one of the third active electrode and the fourth active electrode, respectively. Forming one assembly set composed of one of the first electrode assembly and the second electrode assembly and a plurality of unit cells connected to each other through the separation membrane by forming a pair of opposite one another with the separation membrane therebetween. Doing; And

(iii) connecting the plurality of unit cells of the assembly set so that the plurality of unit cells are stacked up and down and the first and second collector electrodes alternate with each other over the stacked plurality of unit cells. Bending the separator and the first current collector electrode or the second current collector electrode to overlap each of the plurality of unit cells.

At this time, the inner wall surface of the cavity lead may be coated with an insulating film formed by at least one method of coating, hot pressing and molding of the resin solution.

According to the present invention, by stacking a plurality of unit cells to form an electrical parallel circuit, the active electrode layer may be formed in a thin layer, and the capacitance may be significantly increased, and the active electrode layer may be deteriorated while degrading the performance of the capacitor to increase the capacitance as in the prior art. There is no need to excessively increase the thickness of the present invention, and the present invention has a fast charge and discharge performance and a low equivalent series resistance (ESR) value as the active electrode layer is formed in a thin layer. In addition, in the packaging process of the chip type supercapacitor, which has occurred in the prior art, the alignment of the active electrode and the separator is separated and there is no fear of causing an electrical short circuit to cause a defect. Provide a possible way.

1 is a structural diagram of a general super capacitor.
2 is a structural diagram of a supercapacitor stacked in such a manner that three unit cells formed by three pairs of active electrodes, one pair of collector electrode pairs, and one separator according to an embodiment of the present invention form an electrical parallel circuit.
FIG. 3 is a view for explaining a method of manufacturing unit cells including an active electrode pair, a separator, and a collecting electrode as a set according to another embodiment of the present invention.
4 is a structural diagram of a supercapacitor stacked in such a manner that five unit cells formed by five pairs of active electrodes, one pair of collection electrode pairs, and one separator each form an electrical parallel circuit, according to another embodiment of the present invention.
FIG. 5 is a view for explaining a method of manufacturing unit cells including an active electrode pair, a separator, and a collecting electrode as a set according to another embodiment of the present invention.
FIG. 6A schematically illustrates only the cavity leads 150 and 250 coated with the insulating films 140 and 240 in the embodiments of FIG. 2 or 4.
FIG. 6B illustrates the formation of an insulating layer 140 and 240 on one surface of a sheet to be the cavity leads 150 and 250 in the embodiment of the present invention, and then presses the insulating mold 140 and 320 into a cavity shape. It is a schematic diagram explaining the molding molding method to process.

Schematically, the present invention includes a plurality of active electrode pairs having a thin thickness in a chip-type supercapacitor, wherein a plurality of unit cells formed by the active electrode pairs, the collecting electrode pairs, and the separator are stacked to form an electrical parallel circuit. . In this way, since the sum of the capacitor values of each unit cell becomes the total capacitance value, the capacitance can be greatly increased while forming the active electrode layer in a thin layer. Therefore, in the present invention, it is not necessary to excessively increase the thickness of the active electrode layer in order to increase the capacitance.

Further, in the present invention, the separator between the active electrode layers is formed of a plurality of sheet bodies as in the prior art, and each sheet body is formed of one sheet body without being disposed independently of each other between the active electrode pairs of each unit cell, and each unit It is located between the active electrode pairs of the cells and continues as one sheet body over the unit cells. Thus, when the alignment of the active electrode and the separator is separated in the packaging process of the chip type super capacitor, which is a problem occurring in the prior art, an electrical short may occur to structurally solve the problem.

Hereinafter, with reference to the accompanying drawings will be described embodiments of the present invention;

2 illustrates a super capacitor structure in which three unit cells formed by three pairs of active electrodes, one pair of current collector electrode pairs, and one separator each form an electrical parallel circuit, according to an embodiment of the present invention.

Referring to FIG. 2, in the novel embodiment, three unit cells C1 to C3 are provided in one chip type super capacitor package 100. More specifically, the chip-type supercapacitor 100 according to the present embodiment has a voltage from three pairs of active electrodes 112 and 112 ', 114 and 114', 116 and 116 ', respectively, and an external power supply (not shown). And a pair of current collectors 111 and 111 ′ having an electrical polarity of (+) or (−), respectively, and one separator 130 continuously crossing the pair of active electrodes. In addition, the electrolyte 190 is injected into the chip type super capacitor 100, and is sealed by the cavity lead 150 and the insulating substrate 155 as the external housing through the bonding member 80. In the present invention, the electrolyte 190 may be made of all known materials including aqueous, non-aqueous and solid electrolytes.

In particular, the three pairs of active electrodes 112 and 112 ', 114 and 114', 116 and 116 'are stacked up and down and each pair of active electrodes 112 and 112', 114 and 114 ', 116 and 116'. And each of the collecting electrodes 111 and 111 ′ and one separator 130 constitute one unit cell C1 to C3, and each of the collecting electrodes 111 and 111 ′ is electrically connected in parallel with each other. ) Is in contact with the active electrodes. On the right side of Fig. 2 there is schematically shown an equivalent circuit connected in parallel. In this case, the separator 130 is composed of one sheet body and is located between the active electrode pairs 112 and 112 ', 114 and 114', 116 and 116 'of each unit cell, and is disposed in the unit cells C1 to C3. It is continued as one sheet body over.

Therefore, according to the present embodiment, according to an advantageous electrical parallel connection between these unit cells represented by the right equivalent circuit of FIG. 2, the capacitance C _T of the chip type super capacitor 100 composed of these unit cells is the three units. The sum of the capacities of the cells becomes C _T = C 1 + C 2 + C 3.

In addition, in FIG. 2, the current collecting electrode 111 is electrically connected to the government contact 160 of the cavity lead 150 electrically connected to the terminal 172, and the current collecting electrode 111 ′ is directly connected to the terminal 174. Electrically connected. Thus, each of the current collecting electrodes 111 and 111 'electrically contacting each of the active electrode pairs 112 and 112', 114 and 114 ', 116 and 116' is supplied with an externally applied voltage to the unit cells C1. And an electric field at C3), whereby charged ions in the electrolyte 190 in each unit cell move through the separator 130 to cause respective active electrodes 112 and 112 ', 114 and 114', 116 and 116 The electricity is stored by being adsorbed on the surface of ').

In addition, according to another embodiment of the present invention, the active electrode pairs 112 and 112 ', 114 and 114', 116 and 116 ', the separator 130 and the collecting electrodes 111 and 111' are one assembly. It can be produced simply as a set. 3 is a view for explaining a method of manufacturing a unit cell composed of an active electrode pair, a separator, and a collecting electrode as a set according to another novel embodiment of the present invention.

Referring to FIG. 3, active electrodes of a predetermined length are printed on one surface of each of the pair of conductive current collecting electrodes 111 and 111 ′ so as to be spaced apart from each other by a predetermined distance “d”. Accordingly, the conductive current collecting electrode 111 and the active electrodes 114 and 116 printed on the surface thereof form a first electrode assembly, and the conductive collecting electrode 111 'and the active electrodes 112' and 114 printed on the surface thereof. ') Forms the second electrode assembly.

In this case, in the present invention, the current collecting electrodes 111 and 111 ′ may be made of any conductive material known in the art, including aluminum, titanium, nickel, and stainless steel, and may be, for example, aluminum foil. In addition, the active electrodes 114 and 116 may be made of any porous material known in the art, including activated carbon, carbon aerogel, CNT, graphene and ruthenium hydrate.

The first electrode assembly and the second electrode assembly are attached to the separator 130 so as to face each other with respect to the separator 130, and are arranged on the active electrodes and the second electrode assembly arranged in the first electrode assembly. The active electrodes are pushed one by one with respect to each other and are attached to face and align with each other. That is, in the first electrode assembly and the second electrode assembly, the remaining active electrodes 114 and 114 'except for the two active electrodes 116 and 112' positioned at one end thereof face each other with respect to the separator 130. And stacked on both sides of the separator 130 to align to form an active electrode pair. And. In the case of the two active electrodes 116 and 112 ', the two active electrodes 116' and 112 corresponding to one surface of the separator 130 at positions opposite to the two active electrodes are printed in advance, thereby these active electrodes 116. , 112 ', 116', 112 are also opposed to and aligned with each other to form respective active electrode pairs 116 and 116 ', 112' and 112, respectively. Thus, a plurality of assembly of unit cells C1 to C3 are manufactured.

At this time, in the present invention, the separator 130 is a polyethylene nonwoven fabric, polypropylene nonwoven fabric, polyester nonwoven fabric, polyacrylonitrile porous separator, poly (vinylidene fluoride) hexafluoropropane copolymer porous separator, cellulose porous separator, It can be of any material known in the art, including kraft paper and rayon fibers.

In addition, the assembly set in which the plurality of unit cells C1 to C3 arranged to be spaced apart from each other by a predetermined distance “d” is arranged based on one unit cell C2 positioned at the center of the unit cells. As shown in FIG. 2, the current collector electrodes 111 and 111 ′ are connected to each other so that the separators 130 and the current collectors connected between the unit cells C1 and C3 and the unit cell C2 positioned at both ends are arranged up and down alternately. The electrodes 111 and 111 'are bent toward the unit cell C2 in the center in the arrow direction of FIG. 3 to overlap the unit cells with each other to form a plurality of unit cells C1 to C3 stacked up and down. Such bending may be performed using an upper and lower folding jig as an example.

In addition, FIG. 4 illustrates a supercapacitor structure in which five unit cells formed by five pairs of active electrodes, one pair of collector electrode pairs, and one separator each form an electrical parallel circuit according to another embodiment of the present invention. Shows.

Referring to FIG. 4, in this embodiment, five unit cells C1 to C5 are provided in one chip type super capacitor package 200. The chip-type super capacitor 200 of the present embodiment is configured in the same manner as the embodiment of FIG. 2, and the material of each component is also the same as the embodiment of FIG. 2.

Specifically, five pairs of active electrodes 212 and 212 ', 214 and 214', 216 and 216 ', 218 and 218', 220 and 220 ', respectively, and a pair of current collectors to which voltage is applied from an external power source ( 211 and 211 ', and one separator 230 that traverses between the pair of active electrodes continuously. In addition, an electrolyte 290 is injected into the chip type supercapacitor 200, and is sealed by the cavity lead 250 and the insulating substrate 255 as the external housing through the bonding member 280.

In particular, five pairs of active electrodes 212 and 212 ', 214 and 214', 216 and 216 ', 218 and 218', 220 and 220 'are stacked up and down, and each pair of active electrodes and each current collecting electrode ( 211 and 211 ') and one separator 230 each constitute one unit cell C1 to C5, and each of the current collector electrodes 211 and 211' is electrically connected to each other so that the five unit cells are electrically connected in parallel. Contact with them. 4 schematically shows these paralleled equivalent circuits. In this case, the separator 230 is positioned between the active electrode pairs 212 and 212 ', 214 and 214', 216 and 216 ', 218 and 218', 220 and 220 'of each unit cell as one sheet body. But it is continuous over the unit cells (C1 ~ C5).

Therefore, according to the present embodiment, as shown in the schematic equivalent circuit on the right side of FIG. 4, according to an advantageous electrical parallel connection between these unit cells, the capacitance C _T of the chip type super capacitor 200 composed of these unit cells is equal to 5 above. The sum of the respective capacity of the unit cells becomes C _T = C 1 + C 2 + C 3 + C 4 + C 5.

2, the current collecting electrode 211 is electrically connected to the government contact 260 of the cavity lead 250 electrically connected to the terminal 272, and the current collecting electrode 211 ′ is connected to the terminal (2). 274 is directly and electrically connected. Thus, each current collecting electrode 211, 211 'electrically contacting each of the active electrode pairs 212 and 212', 214 and 214 ', 216 and 216', 218 and 218 ', 220 and 220' is applied externally. The electric field is applied to each of the unit cells C1 to C5 by receiving the supplied voltage, and thus, charged ions in the electrolyte 290 are moved through the separator 230 in each unit cell so that each of the active electrodes 212 and 212 ', 214 and 214', 216 and 216 ', 218 and 218', 220 and 220 ') by adsorb | sucking on the surface, electricity is accumulate | stored.

4, the active electrode pairs 212 and 212 ', 214 and 214', 216 and 216 ', 218 and 218', 220 and 220 'and a separator ( The plurality of unit cells formed by the 230 and the collecting electrodes 211 and 211 ′ may be simply manufactured as one assembly set. FIG. 5 is a view for explaining a method of manufacturing unit cells including an active electrode pair, a separator, and a collecting electrode as a set according to another embodiment of the present invention.

Referring to FIG. 5, active electrodes of a predetermined length are printed on one surface of each of the pair of conductive current collecting electrodes 211 and 211 ′ so as to be spaced apart from each other by a predetermined distance “d”. As a result, the conductive current collecting electrode 211 and the active electrodes 212, 214, 216, and 218 printed on the surface thereof form a first electrode assembly, and the conductive current collecting electrode 211 ′ and the active electrodes printed on the surface thereof. 214 ', 216', 218 ', and 220' form a second electrode assembly.

The first electrode assembly and the second electrode assembly are attached thereto to face each other with respect to the separator 230, and active electrodes arranged in the first electrode assembly and active electrodes arranged in the second electrode assembly may be provided. They are pushed one against the other and attached so as to face and align with each other. That is, the first electrode assembly and the second electrode assembly have the remaining active electrodes 214, 216, 218, 214 ′, 216 ′ and 218 ′ except for the two active electrodes 212 and 220 ′ respectively positioned at one end thereof. The separator 230 is stacked on both sides of the separator 230 so as to face and align with each other and form an active electrode pair. In the case of the two active electrodes 212 and 220 ', the two active electrodes 212' and 220 corresponding to one surface of the separator 230 at positions opposite to the two active electrodes are printed in advance, whereby these active electrodes 212 , 220 ', 212', and 220 are also opposed to and aligned with each other to form active pairs 212 and 212 ', 220' and 220, respectively. In this way, a plurality of unit cell C1 to C5 assembly as a set is manufactured.

In addition, the assembly set in which the plurality of unit cells C1 to C5 arranged to be spaced apart from each other by a predetermined distance “d” as described above is centered on one unit cell C3 positioned at the center thereof. As shown in Fig. 4, between each of the unit cells C2 and C4 starting from each unit cell C1 and C5 located at both ends and adjacent to each other such that the respective collecting electrodes 111 and 111 'are arranged alternately up and down, and Each of the separators 230 and the collecting electrodes 111 and 111 ′ connecting the central unit cells C2 adjacent to each unit cell C2 and C4 in the direction of the arrow in FIG. By bending toward) to overlap the unit cells to form a plurality of unit cells (C1 ~ C5) of the stacked structure up and down as shown in FIG.

As described above, in the present invention, the unit cells including the active electrode pair, the collecting electrode pair, and the separator are stacked in a plurality of electrical parallel circuits. In particular, in the present invention, the number of such unit cells is not limited, but the number is preferably 2n + 1 (in this case, an integer of n ≧ 1).

For example, in order to apply a voltage from an external power source to the current collecting electrodes 111 and 111 ′, 211 and 211 ′ of the supercapacitors 100 and 200, one current collecting electrode 111 and 211 may be a cavity lead 150 or 250. And the other current collector electrodes 111 ′ and 211 ′ are electrically connected to the terminals 174 and 274, respectively. As described above, it is preferable to become three or more odd numbers. However, in the present invention, the active electrodes 112, 112 ', 114, 114', 116, 116 ', 212, 212', 214, 214 ', 216, 216', 218, 218 ', 220, 220' are generally used. Considering that the thickness of is about 100 μm and the thicknesses of the collecting electrodes 111, 111 ′, 211, and 211 ′ and the separators 130 and 230 are about 20 μm, the number of unit cells stacked in the small chip size is It cannot be increased indefinitely, and as an example, about 7 to 9 may be the maximum number.

Meanwhile, in the present invention, the inner wall surfaces of the cavity leads 150 and 250 may be coated with an insulating material except for the government contacts 160 and 260 to which the current collecting electrodes 111 and 211 are applied with an external voltage. . 6A schematically illustrates cavity leads 150, 250 coated with insulating films 140, 240 in the inventive embodiments of FIG. 2 or 4.

In this case, when the alignment of the active electrode and the collecting electrode occurs in the packaging process of the chip type super capacitor, which is a problem occurring in the related art, an electrical short occurs due to electrical contact between the electrodes and the inner wall of the cavity lead. The failure can be prevented from occurring.

In the present invention, the insulating material includes all known polymers such as polyimide (PI), polytetrafluoroethylene (PTFE), polyethylene (PE), and polyvinylidene fluoride (PVDF) or styrene butadiene rubber (SBR). It may be made of an insulating material, but a material having heat resistance at a temperature of about 150 ° C. or higher is particularly preferable. In the present invention, polyimide (PI) or polytetrafluoroethylene (PTFE) is most preferred.

In the present invention, the insulating material may be coated with a resin solution or hot pressed or molded in the form of a film on the inner wall surfaces of the cavity leads 150 and 250. FIG. 6B illustrates the formation of an insulating layer 140 and 240 on one surface of a sheet to be the cavity leads 150 and 250 in the embodiment of the present invention, and then presses the insulating mold 140 and 320 into a cavity shape. It is a schematic diagram explaining the molding molding method to process.

As described above, the present invention includes a plurality of active electrode pairs having a thin thickness in the chip type supercapacitor, and the plurality of unit cells formed by the active electrode pairs, the current collector electrode pairs, and the separator are stacked to form an electrical parallel circuit. . Thus, since the sum of the capacitor values of each unit cell becomes the total capacitance value, the capacitance can be dramatically increased while the active electrode layer is formed in a thin layer, and the performance of the capacitor is degraded to increase the capacitance as in the prior art. The thickness of the active electrode layer does not have to be excessively increased. In addition, the present invention has a fast charge and discharge performance and a low equivalent series resistance (ESR) value as the active electrode layer is formed into a thin layer.

Further, in the present invention, the separator between the active electrode layers is positioned between the active electrode pairs of each unit cell, unlike the prior art, and is composed of one sheet body that is continuous over the unit cells. In the process, the alignment of the active electrode and the separator is separated, there is no fear of causing a short circuit caused by the failure.

Preferred embodiments and embodiments of the present invention described above are disclosed for purposes of illustration, and any person skilled in the art may make various modifications, changes, additions, etc. within the spirit and scope of the present invention. Such modifications, changes, additions, and the like should be considered to be within the scope of the claims.

100, 200: super capacitor, 111, 111 ': current collector, 112, 112', 114, 114 ', 116, 116', 212, 212 ', 214, 214', 216, 216 ', 218, 218', 220, 220 ': active electrode, 130, 230: separator, 140, 240: insulating film, 150, 250: cavity lead, 155, 255: insulating substrate, 160, 260: government contact, 172, 272, 174, 274: Terminal, 176, 276: lead bonding member, 180, 280: bonding member, 190, 290: electrolyte

Claims (9)

A set of first and second collector electrodes spaced apart from each other and applied with an external voltage;
A set of active electrodes disposed on one surface of each of the first and second collector electrodes facing each other;
An electrolyte impregnating the set of active electrodes;
And a plurality of unit cells, each of which is composed of a separator interposed between the set of active electrodes, wherein each of the plurality of unit cells includes a plurality of unit cells. Supercapacitors, characterized in that the total capacitance is the sum of the capacitance of each of the plurality of unit cells by being connected to form a parallel circuit. The method of claim 1,
The separator included in each of the plurality of unit cells is a super capacitor, characterized in that forming a continuous integral across the plurality of unit cells. The method of claim 1,
The plurality of super capacitors, characterized in that three or more radix. The method of claim 1,
And the plurality of unit cells are stored in an inner space formed by an insulating substrate and a cavity lead sealed around the insulating substrate, and an inner wall surface of the cavity lead is covered with an insulating film. The method of claim 4, wherein
And one of the first and second collector electrodes is electrically connected to a government contact portion located at the top of the cavity lead, and the government contact portion is not covered with the insulating film. The method of claim 4, wherein
The insulating film is a super capacitor, characterized in that it has a heat resistance in the temperature range of 150 ℃ or more. The method of claim 4, wherein
The material of the insulating film is at least one selected from the group consisting of polyimide (PI), polytetrafluoroethylene (PTFE), polyethylene (PE), polyvinylidene fluoride (PVDF) and styrene butadiene rubber (SBR) Super capacitor. In the method of manufacturing a super capacitor according to claim 1 or 2,
Three or more first active electrodes are arranged in one line on one surface of the first collecting electrode to form a first electrode assembly, and three or more second active electrodes on one surface of the second collecting electrode are spaced apart from each other. Arranging in a row to form second electrode assemblies, and disposing one third active electrode and one fourth active electrode at both ends of the separator;
The first electrode assembly and the second electrode assembly may have a first active electrode and a second active electrode except for one first active electrode and one second active electrode positioned at each end portion thereof with the separator interposed therebetween. The one first active electrode and the one second active electrode attached to the separator to form a pair, respectively, and opposing each other may be different from each other of the one third active electrode and one fourth active electrode. Forming one assembly set including one of the first electrode assembly and the second electrode assembly and a plurality of unit cells connected to each other through the separation membrane by forming a pair of opposed to each other with the separator interposed therebetween; ;
The separation membrane connecting the plurality of unit cells of the assembly set such that the plurality of unit cells are stacked up and down and the first and second collector electrodes alternate with each other over the stacked plurality of unit cells; Bending the first current collecting electrode or the second current collecting electrode to overlap each of the plurality of unit cells;
And impregnating the first active electrode, the second active electrode, the third active electrode, and the fourth active electrode in the electrolyte and encapsulating it in an outer housing. The method of claim 8,
And an inner wall surface of a portion of the outer housing is coated with an insulating film formed by at least one method of coating, hot pressing and molding of a resin solution.

Images