KR102010542B1 - Apparatus for prediction electrostatic discharge damage of smart junction box - Google Patents

Abstract

The present invention relates to an electrostatic discharge damage prediction simulation apparatus of a smart junction box, comprising: a data input unit for receiving circuit information corresponding to a type of smart junction box to be tested for electrostatic discharge (ESD) damage; A 3D modeling unit generating a 3D PCB shape based on the circuit information; An ESD applying unit for applying an ESD of a specified level to a designated position of the 3D PCB shape; An electromagnetic field and a transmission path analyzer for analyzing the electromagnetic fields of all ESD transmission paths from the point where the ESD is applied to the ground in the 3D PCB shape; And a simulation result output unit configured to output a simulation result of completing the electromagnetic analysis of the ESD transmission path in a specified format.

Description

Electrostatic discharge damage prediction simulation device of smart junction box {APPARATUS FOR PREDICTION ELECTROSTATIC DISCHARGE DAMAGE OF SMART JUNCTION BOX}

The present invention relates to an electrostatic discharge damage prediction simulation apparatus of a smart junction box, and more particularly, does not apply static electricity to a real smart junction box product, but instead is statically generated by software through three-dimensional modeling using the data of the smart junction box. The present invention relates to an electrostatic discharge damage prediction simulation apparatus of a smart junction box, which can perform damage simulation (or damage) by applying a simulation.

In general, the electric device of the vehicle can be compared to the nervous system, and the electric vehicle can only properly exhibit its performance until the electric device is normally operated.

The electric device of such a vehicle can be divided into an engine-side device and a vehicle-side device. The engine-side device includes an ignition device consisting of an ignition coil, a distributor high voltage cable, a spark plug, and a charging device including a generator and a regulator. In addition, the vehicle-side electric device includes a battery, a lighting device for lighting, a sign, a signal, an instrument warning display device and an air conditioner / heating device installed in an instrument panel, and the like.

The electric devices of the vehicle are all wired and connected to an electronic control unit (ECU) in the engine room of the vehicle. In this case, a smart junction box (SJB) is an intermediate medium connecting the wires and the ECU to each other. Smart Junction Box, or Smart Junction Block) is used.

Therefore, since the smart junction box is a very important device directly connected to the safety of the vehicle, the safety must be secured by verifying the performance through safety inspection before mounting on the vehicle.

As the safety inspection of the smart junction box (SJB), as shown in Figure 1, by applying static electricity directly to the smart junction box (SJB) using an electrostatic application device (eg ESD GUN: Electro Static Discharge GUN) In addition, a test (safety inspection) is performed to determine whether a component breakage or malfunction of the smart junction box (SJB: Smart Junction Box, or smart junction block) is caused by static electricity.

As described above, the test (safety inspection) that checks whether parts are damaged or malfunctions by directly applying static electricity to a product (for example, SJB) can be judged as normal (abnormal), but it is accurate to damage the part caused by static electricity. It was difficult to identify the voltage and had difficulty in suggesting countermeasures for improving static electricity (eg, changing the capacity of parts or adding parts to absorb static electricity).

Background art of the present invention is disclosed in Republic of Korea Patent Registration No. 10-0811090 (2008.02.29. Registration, smart junction box with a failure diagnosis function).

According to an aspect of the present invention, the present invention was created to solve the above problems, and does not apply static electricity to the actual smart junction box products, instead of software through the three-dimensional modeling using the data of the smart junction box instead It is an object of the present invention to provide an electrostatic discharge damage prediction simulation apparatus of a smart junction box that can predict damage (or damage) by performing simulation to apply static electricity.

An electrostatic discharge damage prediction simulation apparatus of a smart junction box according to an aspect of the present invention includes a data input unit configured to receive circuit information corresponding to a type of smart junction box to be tested for electrostatic discharge (ESD) damage; A 3D modeling unit generating a 3D PCB shape based on the circuit information; An ESD applying unit for applying an ESD of a specified level to a designated position of the 3D PCB shape; An electromagnetic field and a transmission path analyzer for analyzing the electromagnetic fields of all ESD transmission paths from the point where the ESD is applied to the ground in the 3D PCB shape; And a simulation result output unit configured to output a simulation result in which the electromagnetic field analysis of the ESD transmission path is completed in a specified format.

In the present invention, the circuit information includes a circuit diagram of a smart junction box, a PCB ASCII file, stack_up data, and device data.

In the present invention, the PCB (Printed Circuit Board) data is ASCII file data as PCB design data, the stack up data includes copper foil and epoxy thickness data of the pattern as PCB laminate structure data, The device data may be data including at least one of a fuse, a cable, and passive device information.

In the present invention, the three-dimensional PCB shape is characterized in that the three-dimensional shape on which at least one or more of a PCB, a pattern, a fuse, a passive element, a cable, and a jump line are mounted.

In the present invention, the ESD applying unit may apply an ESD waveform of the same type as the ESD waveform that is actually applied in the electrostatic applying device, and by changing the capacitance conditions of the resistor and capacitor for generating the ESD waveform of another form It is characterized in that it is implemented to generate an ESD waveform.

In the present invention, the electromagnetic field and the transmission path analysis unit, the degree of damage to the ESD transmission path is displayed in color on the three-dimensional PCB shape, the smaller the ESD damage degree is darker in the designated first color, the ESD damage degree The larger the value is, the darker the color of the designated second color.

In the present invention, the electromagnetic field and the transmission path analysis unit, if the ESD damage measure is applied to the ESD improvement measures for the point, by analyzing it again through the simulation to determine whether or not, and the ESD improvement measures, It is characterized in that it comprises at least one of inserting, increasing or decreasing the capacity of the existing inserted device, changing the type of the existing inserted device, or adjusting the thickness or width of the copper foil of the PCB pattern.

According to an aspect of the present invention, the present invention does not apply static electricity to the actual smart junction box product, instead of performing damage by performing simulation of applying static electricity in software through three-dimensional modeling using the data of the smart junction box (or By making it possible to predict damage, it is possible to check the exact damage voltage of the problem caused by static electricity, and to easily suggest countermeasures for static electricity improvement (e.g. changing the capacity of a component or adding a component to absorb static electricity). It is effective.

1 is a photograph taken of the electrostatic discharge test apparatus of the conventional smart junction box.
2 is an exemplary view showing a schematic configuration of an electrostatic discharge damage prediction simulation apparatus of a smart junction box according to an embodiment of the present invention.
3 is a flowchart illustrating a schematic operation of an electrostatic discharge damage prediction simulation apparatus of a smart junction box according to an embodiment of the present invention.
4 is an exemplary view shown to explain data received through a data input unit in FIG.
5 is an exemplary view showing a three-dimensional PCB shape generated by the 3D modeling unit in FIG. 2.
FIG. 6 is an exemplary diagram in which the degree of damage to the ESD transmission path analyzed by the electromagnetic and transmission path analysis unit is displayed in color on a modeled 3D PCB shape in FIG. 2.
FIG. 7 is an exemplary view shown in FIG. 2 for comparing test results before and after improving ESD damage. FIG.

Hereinafter, an embodiment of an electrostatic discharge damage prediction simulation apparatus of a smart junction box according to the present invention will be described with reference to the accompanying drawings.

In this process, the thickness of the lines or the size of the components shown in the drawings may be exaggerated for clarity and convenience of description. In addition, terms to be described below are terms defined in consideration of functions in the present invention, which may vary according to the intention or convention of a user or an operator. Therefore, the definitions of these terms should be made based on the contents throughout the specification.

2 is an exemplary view showing a schematic configuration of an electrostatic discharge damage prediction simulation apparatus of a smart junction box according to an embodiment of the present invention.

As shown in FIG. 2, the electrostatic discharge damage prediction simulation apparatus of the smart junction box according to the present embodiment includes a data input unit 110, a 3D modeling unit 120, an ESD application position selector 130, and an ESD application level. The setting unit 140, the ESD applying unit 150, the electromagnetic field and the transmission path analysis unit 160, and the simulation result output unit 170 are included.

The data input unit 110 receives circuit information (eg, a circuit diagram, PCB ASCII file, Stack_up data, BOM data, etc.) corresponding to the type of smart junction box to be tested (see FIG. 4).

4 is an exemplary view illustrating the data received through the data input unit in FIG. 2.

The data input unit 110 includes a PCB data input unit 111 for receiving PCB (Printed Circuit Board) data. The PCB data means PCB design data (ie, ASCII file data), as shown in FIG. 4A.

The data input unit 110 includes a stack up data input unit 112 for receiving stack up data. The stack up data refers to data related to a PCB laminate structure (eg, copper foil, epoxy thickness, etc.), as shown in FIG. 4B.

The data input unit 110 includes a device data input unit 113 for receiving device data (ie, a BOM list). The device data (ie, BOM list) includes passive device information, as shown in FIG. 4C.

The 3D modeling unit 120 generates a 3D PCB shape in which a device is mounted based on circuit information (eg, a circuit diagram, PCB ASCII file, Stack_up data, BOM data, etc.) input through the data input unit 110. (See Figure 5).

FIG. 5 is an exemplary view illustrating a 3D PCB shape generated by the 3D modeling unit in FIG. 2.

As shown in FIG. 5, the three-dimensional PCB shape is a PCB, a pattern, an element (eg, a fuse, a passive element, etc.), and a cable (eg, a jump line, etc.) are modeled in a three-dimensional shape. That is, a 3D PCB shape corresponding to the circuit information (for example, a circuit diagram, PCB ASCII file, Stack_up data, BOM data, etc.) input through the data input unit 110 is modeled.

The ESD applying unit 150 applies ESD (electrostatic) of a predetermined waveform and level to a desired specific point (or device) of the 3D PCB shape (see FIG. 5).

The ESD may apply the same waveform (eg, ESD waveform of 330Ω-330pF Gun model) that is applied by an actual static electricity applying device (eg, ESD GUN), and may change the capacitance condition of the resistor and capacitor. Another type of ESD waveform may be generated and applied.

The ESD application position selector 130 receives a position (eg, an element, a pattern, a contact, etc.) to apply ESD (electrostatic) to the modeled 3D PCB shape through the ESD application unit 150.

The ESD application level setting unit 140 applies an ESD (electrostatic) level to be applied to a position (eg, an element, a pattern, a contact, etc.) designated by the ESD application position selection unit 130 through the ESD application unit 150. Get set.

For example, the ESD (electrostatic) level can be varied, such as ± 4KV, ± 8KV.

Accordingly, when an ESD (electrostatic) of a specified level (eg, ± 4KV, ± 8KV, etc.) is applied to the designated location (eg, device, pattern, contact, etc.), the electromagnetic field and transmission path analyzer 160 may model the model. In this three-dimensional PCB configuration, the electromagnetic field is analyzed for all ESD (electrostatic) transmission paths (for example, paths including patterns and elements) from the point where the ESD is applied to ground (see FIG. 6).

At this time, the electromagnetic field and the transmission path analysis unit 160 may be applied to the algorithm using the Maxwell equation for the electromagnetic field analysis.

FIG. 6 is an exemplary diagram in which the degree of damage (damage) of the ESD (electrostatic) transmission path analyzed by the electromagnetic field and transmission path analysis unit is displayed in color on a modeled 3D PCB shape.

Referring to FIG. 6, the smaller the degree of ESD (electrostatic) damage (damage) is displayed in blue, and the larger the degree of ESD (electrostatic) damage (damage) is displayed in red.

Accordingly, in the modeled three-dimensional PCB shape, the user can easily check the location of a large degree of ESD (electrostatic) damage (damage) according to the ESD (electrostatic) level by referring to the color.

As illustrated in FIG. 6, the simulation result output unit 170 outputs location information with ESD damage according to an applied ESD level, and a user may determine that damage is caused by a voltage limit value. If out of range, an ESD response device (ESD improvement measure) is inserted into the modeled three-dimensional PCB shape.

For example, the data may be inserted into the modeled 3D PCB shape by inputting the ESD response device data through the data input unit 110. However, the present invention is not limited thereto, and another method (eg, a method of directly inserting a corresponding device modeled in 3D into the modeled 3D PCB shape) may be applied.

In this case, the ESD countermeasure (ESD improvement measure) does not necessarily include inserting a new device, and increases or decreases the capacity of an existing inserted device, changes the type of an existing inserted device, or changes the thickness or width of a copper foil of a pattern. It includes even adjusting.

When the simulation is performed again by applying the ESD countermeasure (ESD improvement measure) as described above, as shown in FIG. 7, the ESD improvement result may be easily and quickly derived. FIG. 7 is an exemplary view shown in FIG. 2 to compare test results before and after improving ESD (electrostatic) damage (damage).

3 is a flowchart illustrating a schematic operation of an electrostatic discharge damage prediction simulation apparatus of a smart junction box according to an embodiment of the present invention.

As illustrated in FIG. 3, the apparatus for predicting electrostatic discharge damage of the smart junction box according to the present embodiment may include circuit information corresponding to a type of smart junction box to be tested through the data input unit 110 (eg, a circuit diagram, PCB ASCII file, Stack_up data, BOM data, etc.) are received (S101, S102).

Next, a 3D PCB shape is generated based on the received circuit information (eg, a circuit diagram, PCB ASCII file, Stack_up data, BOM data, etc.) through the 3D modeling unit 120 (S103).

Next, ESD (electrostatic) at a predetermined level (eg, ± 4KV, ± 8KV, etc.) is applied to a specific position (eg, device, pattern, contact, etc.) previously designated in the 3D PCB shape through the ESD applying unit 150. (S104), all the ESD (electrostatic) transmission path from the point where the ESD (electrostatic) is applied to the ground in the modeled three-dimensional PCB shape through the electromagnetic and transmission path analysis unit 160 (for example, patterns and elements An electromagnetic field for the path included (S105).

If the result of the analysis of the electromagnetic field for the ESD transmission path is not suitable (non-conformance of S105), the electromagnetic field and the transmission path analysis unit 160 analyzes the ESD improvement measures proposed by the user whether the ESD improvement measures are appropriate or not. It checks (S106).

The ESD improvement measures include a concept of inserting a new device, increasing or decreasing the capacity of an existing inserted device, changing a type of an existing inserted device, or adjusting a copper foil thickness or width of a PCB pattern. .

Accordingly, if the ESD improvement measures are inappropriate, the circuit information is changed or redesigned.

Next, the simulation result output unit 170 outputs the simulation result in a specific format (eg, ESD test report form).

As described above, the present embodiment does not apply static electricity to an actual smart junction box product, but instead, it is possible to predict damage (or damage) by performing simulation of applying static electricity by software through 3D modeling using data of the smart junction box. By doing so, it is possible to confirm the exact damage voltage of the problem caused by the static electricity, and to easily suggest the countermeasures for improving the static electricity (eg, changing the capacity of the component or adding a component to absorb the static electricity). have.

Although the present invention has been described with reference to the embodiments illustrated in the drawings, this is merely exemplary, and various modifications and equivalent other embodiments are possible for those skilled in the art to which the art pertains. I will understand the point. Therefore, the technical protection scope of the present invention will be defined by the claims below.

110: data input unit 120: 3D modeling unit
130: ESD application position selection unit 140: ESD application level setting unit
150: ESD application unit 160: electromagnetic field and transmission path analysis unit
170: simulation result output unit

Claims (1)

A data input unit configured to receive circuit information corresponding to a type of smart junction box to be tested for electrostatic discharge (ESD) damage;
A 3D modeling unit generating a 3D PCB shape based on the circuit information;
An ESD applying unit for applying an ESD of a specified level to a designated position of the 3D PCB shape;
An electromagnetic field and a transmission path analyzer for analyzing the electromagnetic fields of all ESD transmission paths from the point where the ESD is applied to the ground in the 3D PCB shape;
A simulation result output unit configured to output a simulation result of completing the electromagnetic analysis of the ESD transmission path in a specified format; And
And an ESD application position selector configured to receive a position to apply ESD to the 3D PCB shape through the ESD application unit.
Where to apply the ESD,
At least one or more of devices, patterns, and contacts,
The three-dimensional PCB shape is a three-dimensional shape in which a PCB, a pattern, a fuse, a passive element, a cable, and a jump line are mounted.
The designated format for outputting the simulation results includes the specified ESD test evaluation form,
The ESD transfer path is a path including a pattern and a device,
The ESD applicator,
It is possible to apply an ESD waveform of the same type as the ESD waveform applied from the actual electrostatic applying device, and to implement another type of ESD waveform by changing the capacitance condition of the resistor and capacitor for generating the ESD waveform. ,
The electromagnetic field and transmission path analysis unit,
The degree of damage to the ESD path is color coded on the 3D PCB geometry.
The smaller the ESD damage, the darker the specified first color,
The electrostatic discharge damage prediction simulation apparatus of the smart junction box, characterized in that the greater the ESD damage degree darker in the specified second color.

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