KR102010157B1 - Transparent active layer, thin film transistor comprising the same, and method of fabricating of the thin film transistor - Google Patents

Abstract

A method of manufacturing a thin film transistor is provided. The method of manufacturing the thin film transistor may include preparing a plastic substrate, providing a first source containing zinc on the plastic substrate, and providing a second source including sulfur at 7: 1 to Forming a transparent active layer on the plastic substrate by atomic layer deposition, providing a gate electrode overlapping the transparent active layer, and a gate insulating film between the gate electrode and the transparent active layer Providing a step.

Description

Transparent active layer, thin film transistor comprising same, and method for manufacturing the same {Transparent active layer, thin film transistor comprising the same, and method of fabricating of the thin film transistor}

The present invention relates to a transparent active layer, a thin film transistor comprising the same, and a method of manufacturing the same, and more particularly, to a transparent active layer formed by providing a first source containing zinc and a second source containing sulfur on a plastic substrate. It relates to a thin film transistor comprising a and a method of manufacturing the same.

Recently, large-area display, ultra high definition (UHD), and high-speed driving have been progressed, and there is a demand for a flexible display that can be applied to a wearable device. Since conventional amorphous silicon TFTs have low mobility (0.5 cm ² / Vs or less), they are not suitable for large-area and ultra-high resolution displays, and have limitations in implementing flexible display devices. There is.

In order to solve such a problem, research and development on an organic thin film transistor, an oxide thin film transistor, and the like are in progress. For example, Korean Patent Publication No. 10-2011-0095530 (Application No. 10-2010-0015052) includes a gate insulating film having a recessed region thereon and a gate insulating film to reduce an operating voltage and simplify a manufacturing process. A technique for an organic thin film transistor comprising an organic semiconductor layer disposed in the recess region of is disclosed.

In another example, Korean Patent Publication No. 10-2008-0054941 (Application No. 10-2006-0127671), in order to prevent the signal delay occurs in the large-area display device, the contact between the compound semiconductor layer and the source / drain electrode A technique for forming a source / drain electrode with a first conductive layer and a second conductive layer formed with low resistance so as to form this well is disclosed.

One technical problem to be solved by the present invention is to provide a highly reliable transparent active layer, a thin film transistor comprising the same, and a method of manufacturing the same.

Another technical problem to be solved by the present invention is to provide a transparent active layer having high flexibility, a thin film transistor including the same, and a method of manufacturing the same.

Another technical problem to be solved by the present invention is to provide a thin film transistor having an improved on / off ratio, and a method of manufacturing the same.

Another technical problem to be solved by the present invention is to provide a high mobility transparent active layer, a thin film transistor including the same, and a method of manufacturing the same.

Another technical problem to be solved by the present invention is to provide a transparent active layer that can be easily deposited on a plastic substrate, a thin film transistor including the same, and a method of manufacturing the same.

The technical problem to be solved by the present invention is not limited to the above.

In order to solve the above technical problem, the present invention provides a method of manufacturing a thin film transistor.

According to an embodiment, the method of manufacturing the thin film transistor may include preparing a plastic substrate, providing a first source including zinc on the plastic substrate, and providing a second source including sulfur. Performing a step in a ratio of 7: 1 to 13: 1 to form a transparent active layer on the plastic substrate by atomic layer deposition, providing a gate electrode overlapping the transparent active layer, and the gate electrode and the And providing a gate insulating film between the transparent active layers.

According to one embodiment, the first source and the second source may be provided at a process temperature of 80 ℃.

According to an embodiment, the providing of the first source and the second source may be provided within a range of providing the first source and the providing of the second source in a ratio of 7: 1 to 13 :: 1. By adjusting the number of times, the flexibility of the transparent active layer can be adjusted.

According to an embodiment of the present disclosure, as compared with the providing of the first source, the higher the ratio of providing the second source may increase the flexibility of the transparent active layer.

According to one embodiment, the second source may have a thiol group.

In order to solve the above technical problem, the present invention provides a thin film transistor.

According to an embodiment, the thin film transistor may be disposed on a plastic substrate, the plastic substrate, and may include a transparent active layer including 2.60 to 6.45% sulfur, and a zinc content of 33.98 to 43.90%, overlapping the transparent active layer. The gate electrode may include a gate insulating layer between the gate electrode and the transparent active layer.

According to an embodiment, the thin film transistor may have an on / off ratio of 10 ⁶ or more.

According to an embodiment, the transparent active layer may have a mobility of 7 cm ² / Vs or more.

According to an embodiment of the present invention, providing a first source containing zinc and providing a second source containing sulfur on a plastic substrate is performed at a ratio of 7: 1 to 13: 1, so that In the atomic layer deposition method, a transparent active layer may be deposited on the plastic substrate. Accordingly, the transparent active layer may be easily deposited on the plastic substrate which is easily degraded at high temperature, may have high mobility, and the on / off ratio of the thin film transistor including the transparent active layer may be improved. . Accordingly, a highly reliable transparent active layer, a thin film transistor including the same, and a method of manufacturing the same can be provided.

1 is a flowchart illustrating a method of manufacturing a thin film transistor including a transparent active layer according to an embodiment of the present invention.
2 is a view for explaining a first embodiment of a thin film transistor including a transparent active layer according to an embodiment of the present invention.
3 is a view for explaining a second embodiment of a thin film transistor including a transparent active layer according to an embodiment of the present invention.
4 is a diagram for describing a display device including a thin film transistor according to an exemplary embodiment of the present invention.
5A to 5E illustrate current voltage characteristics of a thin film transistor including a transparent active layer according to an exemplary embodiment of the present invention.
6 is a graph illustrating a growth rate of a transparent active layer according to an embodiment of the present invention.
7 is a graph measuring elastic modulus and hardness of a transparent active layer according to an embodiment of the present invention.
8A and 8B are graphs illustrating current voltage characteristics according to bias stress of a thin film transistor according to an exemplary embodiment of the present invention.
8C and 8D are graphs illustrating threshold voltage characteristics according to bias stress of a thin film transistor according to an exemplary embodiment of the present invention.
9 is a graph analyzing a defect in a transparent active layer according to an embodiment of the present invention.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the technical idea of the present invention is not limited to the exemplary embodiments described herein and may be embodied in other forms. Rather, the embodiments introduced herein are provided to ensure that the disclosed contents are thorough and complete, and that the spirit of the present invention can be sufficiently delivered to those skilled in the art.

In the present specification, when a component is mentioned to be on another component, it means that it may be formed directly on the other component or a third component may be interposed therebetween. In addition, in the drawings, the thicknesses of films and regions are exaggerated for effective explanation of technical contents.

In addition, in various embodiments of the present specification, terms such as first, second, and third are used to describe various components, but these components should not be limited by these terms. These terms are only used to distinguish one component from another. Thus, what is referred to as a first component in one embodiment may be referred to as a second component in another embodiment. Each embodiment described and illustrated herein also includes its complementary embodiment. In addition, the term 'and / or' is used herein to include at least one of the components listed before and after.

In the specification, the singular encompasses the plural unless the context clearly indicates otherwise. In addition, the terms "comprise" or "having" are intended to indicate that there is a feature, number, step, element, or combination thereof described in the specification, and one or more other features or numbers, steps, configurations It should not be understood to exclude the possibility of the presence or the addition of elements or combinations thereof. In addition, the term "connection" is used herein to mean both indirectly connecting a plurality of components, and directly connecting.

In addition, in the following description of the present invention, if it is determined that a detailed description of a related known function or configuration may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

1 is a flowchart illustrating a method of manufacturing a thin film transistor including a transparent active layer according to an embodiment of the present invention.

Referring to Figure 1, a plastic substrate is prepared (S100). The plastic substrate may be flexible. For example, the plastic substrate may be a PET, PES, PEN, PC, or PI substrate. The plastic substrate may be prepared in a chamber.

Providing a first source comprising zinc (Zn) on the plastic substrate, and providing a second source comprising sulfur (S) to form a transparent active layer on the plastic substrate. It may be formed by a deposition method (S120). For example, the first source may be dizinc (DEZn) or dimethyl zinc (DMZn). According to an embodiment, the second source may have a thiol group. For example, the second source may include at least one of 4-mercaptophenol, 2-sulfanylphenol, 3-Sulfanylphenol, benzenedithiol, 1,3-Benzenedithiol, or 1,4-Benzenedithiol.

According to one embodiment, providing the first source comprising zinc includes supplying the first source into the chamber, purging the chamber with an inert gas (eg, argon gas). And supplying H ₂ O into the chamber, and purging the chamber with an inert gas. In this case, a zinc oxide thin film may be formed on the plastic substrate.

According to an embodiment, the providing of the second source including sulfur may include: supplying the first source into the chamber, purging the chamber with an inert gas, and adding the second source to the chamber. Supplying into the chamber, and purging the chamber with an inert gas. In this case, a compound thin film of zinc and sulfur may be formed on the plastic substrate. By the combination of zinc and sulfur, the reliability and stability in the air of the transparent active layer can be improved.

In addition, as described above, when the second source includes an organic material, the transparent active layer may be a hybrid thin film of an organic material and an inorganic material.

According to an embodiment of the present disclosure, while the first source and the second source are provided, the process temperature in the chamber may be maintained at 100 ° C. or less. As a result, molecules in the first source and the second source can be densely packed, and the densely packed molecules can provide a plurality of active sites that are easy to react with subsequently supplied molecules. Accordingly, the quality of the film of zinc oxide in the transparent active layer or the transparent active layer can be improved.

Unlike the above-described embodiment of the present invention, when the first source and the second source are provided, when the process temperature in the chamber is a high temperature (eg, greater than 100 ° C.), the growth rate of the transparent active layer is Can be degraded. In other words, molecules in the first source and the second source may be packed at a low density to reduce the quality of the film and at the same time reduce the process efficiency. For this reason, mobility of the transparent active layer may be reduced.

However, as described above, according to the embodiment of the present invention, while the first source and the second source are provided, the process temperature in the chamber is maintained at 100 ° C. or less, so that the transparent active layer having the high mobility Manufacturing methods may be provided.

When the ratio of the step of providing the first source and the step of providing the second source is less than 7: 1, the mobility of the transparent active layer is significantly reduced, the thin film transistor manufactured using the transparent active layer The on / off ratio can be significantly reduced. In addition, when the ratio of providing the first source and providing the second source is higher than 13: 1, the on / off ratio of the thin film transistor manufactured using the transparent active layer may be significantly reduced. have. Accordingly, according to an embodiment of the present disclosure, the providing of the first source and the providing of the second source may be performed at a ratio of 7: 1 to 13: 1. The providing of the first source and the providing of the second source are performed at a ratio of 7: 1 to 13: 1, so that the transparent active layer is 2.60 to 6.45% sulfur and 33.98 to 43.90% zinc. Including, and having a mobility of 7cm ² / Vs or more, the thin film transistor manufactured using the transparent active layer may have an on / off ratio of 10 ⁶ or more.

According to one embodiment, the step of providing the first source, and the step of providing the first source, and the step of providing the first source within the range of 7: 1 to 13 :: 1 2 by adjusting the ratio of the step of providing the source, the elastic modulus and hardness of the transparent active layer can be adjusted. In other words, the flexibility of the transparent active layer may be controlled by adjusting the number of times the first source and the second source are provided. Specifically, as the number of provision of the second source including sulfur increases, elastic modulus and hardness of the transparent active layer may be reduced, thereby increasing flexibility. However, when the ratio of the step of providing the first source and the step of providing the second source is less than 7: 1, as described above, the mobility of the transparent active layer is significantly lowered, and the transparent active layer The on / off ratio of the thin film transistor fabricated using can be significantly reduced.

A gate electrode overlapping the transparent active layer may be provided (S130). The gate electrode may be provided on the transparent active layer or between the transparent active layer and the plastic substrate. In other words, in the embodiment of the present invention, the order of forming the transparent active layer and the gate electrode is not limited.

A gate insulating layer may be provided between the transparent active layer and the gate electrode (S140). As described above, in the embodiment of the present invention, the order of forming the transparent active layer and the gate insulating layer is not limited.

According to an embodiment of the present disclosure, in a low temperature process condition, the providing of the first source and the providing of the second source may be performed at a ratio of 7: 1 to 13: 1, and thus, on the plastic substrate, A transparent active layer can be formed. Accordingly, the transparent active layer may be easily formed on the plastic substrate vulnerable to heat. In addition, at the same time, the quality of the transparent active layer may be improved to provide a thin film transistor having high mobility and improved on / off ratio.

As described above, the transparent active layer according to the embodiment of the present invention may be disposed on or under the gate electrode. Hereinafter, a thin film transistor including a transparent active layer according to an embodiment of the present invention will be described with reference to FIGS. 2 and 3.

2 is a view for explaining a first embodiment of a thin film transistor including a transparent active layer according to an embodiment of the present invention.

Referring to FIG. 2, the thin film transistor may include a gate electrode 110, a gate insulating layer 120, a transparent active layer 130, a drain electrode 140d, and a source electrode 140s on the plastic substrate 100. have.

The plastic substrate 100 may be flexible, as described with reference to FIG. 1.

The gate electrode 110 may be formed on the substrate 100. The gate electrode 110 may be formed of a metal. For example, the gate electrode 110 may be formed of a transparent conductive material. Alternatively, the gate electrode 110 includes nickel (Ni), chromium (Cr), molybdenum (Mo), aluminum (Al), titanium (Ti), copper (Cu), tungsten (W), and alloys thereof. can do.

The gate insulating layer 120 may be formed on the gate electrode 110. The gate insulating layer 120 may be formed of a high dielectric material (for example, aluminum oxide or hafnium oxide) such as silicon oxide, silicon nitride, silicon oxynitride, or metal oxide.

The transparent active layer 130 may be formed on the gate insulating layer 120. The transparent active layer 130 may be formed by the method described with reference to FIG. 1. The transparent active layer 130 may be spaced apart from and overlapped with the gate electrode 110 with the gate insulating layer 120 interposed therebetween.

The passivation layer 140 may be formed on the transparent active layer 130. The passivation layer 140 may be formed of silicon oxide, silicon nitride, or silicon oxynitride.

The source electrode 152s may pass through the passivation layer 140 and be connected to a portion of the transparent active layer 130 adjacent to one side of the gate electrode 110. The drain electrode 152d may pass through the passivation layer 140 and be connected to a portion of the transparent active layer 130 adjacent to the other side of the gate electrode 110. The source electrode 152s and the drain electrode 152d may be formed of aluminum or a transparent conductive material (eg, ITO).

3 is a view for explaining a second embodiment of a thin film transistor including a transparent active layer according to an embodiment of the present invention.

Referring to FIG. 3, the thin film transistor may include a transparent active layer 210, a gate insulating layer 220, a gate electrode 230, a passivation layer 240, a source electrode 250s, and a drain electrode on the plastic substrate 200. 250d.

The plastic substrate 200 may be flexible, as described with reference to FIG. 1. The transparent active layer 130 may be formed by the method described with reference to FIG. 1.

The gate insulating layer 220 may be formed on the transparent active layer 210. The gate insulating layer 220 may be formed of the same material as the gate insulating layer 120 described with reference to FIG. 2.

The gate electrode 230 may be formed on the gate insulating layer 220 to overlap the transparent active layer 210. The gate electrode 230 may be formed of the same material as the gate electrode 110 described with reference to FIG. 2.

The passivation layer 240 may be formed on the gate electrode 230. The passivation layer 240 may be formed of an insulating material (eg, silicon oxide, silicon nitride, or silicon oxynitride).

The source electrode 250s may pass through the passivation layer 240 and the gate insulating layer 220 to be connected to a portion of the active layer 210 adjacent to one side of the gate electrode 230. The drain electrode 250d may pass through the passivation layer 240 and the gate insulating layer 220 and be connected to a portion of the active layer 210 adjacent to the other side of the gate electrode 230.

The thin film transistor according to the exemplary embodiment described above may be used in a display device. Hereinafter, a display device including a thin film transistor according to an exemplary embodiment of the present invention will be described with reference to FIG. 4.

4 is a diagram for describing a display device including a thin film transistor according to an exemplary embodiment of the present invention.

Referring to FIG. 4, a display device according to example embodiments includes a display unit 300, a timing controller 310, a gate driver 330, a data driver 340, and a power supply 350.

The display unit 100 may include a gate line, a data line formed to intersect the gate line, and the pixel cell formed in an area defined by the gate line and the data line intersecting.

The pixel cell may include at least one thin film transistor according to example embodiments. The pixel cell may include an organic light emitting diode or a liquid crystal layer. The thin film transistor according to the exemplary embodiments of the present invention included in the pixel cell may be implemented as a PMOS or an NMOS.

The gate line may supply a gate signal GS supplied from the gate driver 330 to the pixel cell. In response to the gate signal GS, the thin film transistor according to the exemplary embodiments of the present invention included in the pixel cell is turned on. The data line may supply the display data voltage DDV supplied from the data driver 340.

The timing controller 310 receives a data signal I-data from the outside and supplies the data signal I-data to the data driver 340 and based on the signal supplied from the outside, the gate control signal GCS and the data control signal DCS. May be provided to the gate driver 330 and the data driver 340, respectively.

The power supply unit 350 supplies a gate-on voltage VON / gate-off voltage VOFF to the gate driver 330, an analog driving voltage AVDD to the data driver 340, and displays the display unit ( The driving voltage VDD and the common voltage Vcom may be supplied to the 100.

Although the thin film transistor according to the exemplary embodiments of the present invention has been described in FIG. 4, it is not limited thereto. The thin film transistor according to the exemplary embodiments of the present invention may be used in various electronic devices.

In addition, although the transparent active layer according to the embodiment of the present invention has been described as being used in the thin film transistors in FIGS. 2 to 4, the present invention is not limited thereto.

Hereinafter, the characteristic evaluation and results of the transparent active layer and the thin film transistor including the same according to the embodiment of the present invention will be described.

Thin Film Deposition According to Examples and Comparative Examples

DEZn was prepared as a first source containing zinc and 4-mercaptophenol was prepared as a second source containing sulfur. The ratio of the step of providing DEZn and the step of providing 4-mercaptophenol was deposited on the plastic substrate while varying as shown in Table 1 below.

Specifically, the ratio of the DEZn providing step of supplying DEZn and H ₂ O into the chamber while maintaining the temperature in the chamber at 80 ° C., and the 4-mercaptophenol providing step of supplying DEZn and 4-mercaptophenol into the chamber are 13: 1, 10: 1, and 7: 1, respectively, to form a transparent active layer (ZnO: 4 MP) according to the first to third embodiments.

Further, while maintaining the temperature in the chamber at 80 ° C., DEZn and H ₂ O were supplied into the chamber to deposit a ZnO thin film transparent active layer according to the first comparative example, and DEZn was provided to supply DEZn and H ₂ O into the chamber. Step and the ratio of providing 4-mercaptophenol supplying DEZn and 4-mercaptophenol into the chamber at 17: 1 and 3: 1, respectively, to provide a transparent active layer (ZnO: 4MP) according to the second and third comparative examples. Was deposited.

division DEZn delivery step: 4-mercaptophenol delivery step First Comparative Example ZnO Thin Film Deposition without 4-mercaptophenol Second comparison example 20: 1 First embodiment 13: 1 Second embodiment 10: 1 Third embodiment 7: 1 Third Comparative Example 3: 1

5A to 5E illustrate current voltage characteristics of a thin film transistor including a transparent active layer according to an exemplary embodiment of the present invention.

5A to 5E, thin film transistors are manufactured using transparent active layers deposited according to the first to third embodiments and the first to third comparative examples described above, and current and voltage characteristics are illustrated in FIGS. 5A to 5. 5e, the composition ratio of the transparent active layers was measured as shown in Table 2 below, and the mobility and the on / off ratio of the thin film transistors of the transparent active layers were measured as shown in Table 3 below.

division % Zn % O % S % C First Comparative Example 52.09 47.91 0.00 0.00 Second comparison example 45.85 44.66 2.02 8.47 First embodiment 43.90 44.47 2.60 10.93 Second embodiment 35.19 36.28 5.86 22.67 Third embodiment 33.98 35.99 6.45 23.58 Third Comparative Example 26.63 29.17 10.12 34.08

division Mobility (cm ² / Vs) on / off ratio First Comparative Example 12.35 7 * 10 ⁴ Second comparison example 8.99 1.1 * 10 ⁵ First embodiment 7.76 1 * 10 ⁶ Second embodiment 7.55 2 * 10 ⁶ Third embodiment 7.21 6 * 10 ⁶ Third Comparative Example 0.162 4 * 10 ³

5 to 5E and <Table 2>, the higher the ratio of the DEZn providing step compared to the 4-mercaptophenol providing step, the higher the ratio of ZnO in the transparent active layers, the higher the mobility of the transparent active layer You can see the increase. Further, according to the first to third embodiments of the present invention, when the ratio of providing DEZn and providing 4-mercaptophenol is performed at 13: 1 to 7: 1, It can be seen that the high on / off ratio. More specifically, when the ratio of providing DEZn and providing 4-mercaptophenol is 13: 1, the ratio of DEZn is about 10 times higher than that of 20: 1, and DEZn is provided. It can be seen that the ratio of the step to provide, and 4-mercaptophenol having a ratio of about 7: 1 has an on / off ratio of about 1,500 times compared to the case of 3: 1. In other words, in accordance with an embodiment of the present invention, the ratio of providing DEZn and providing 4-mercaptophenol while maintaining the temperature in the chamber at a low temperature (eg, 80 ° C.) so that the plastic substrate can be used. It can be seen that controlling the ratio from 13: 1 to 7: 1 is an efficient method of depositing a transparent active layer having high mobility and high on / off ratio simultaneously.

6 is a graph illustrating a growth rate of a transparent active layer according to an embodiment of the present invention.

Referring to FIG. 6, according to the third embodiment described above, a DEZn providing step and a 4-mercaptophenol providing step were performed at 7: 1 to deposit a transparent active layer. At this time, the growth rate of the transparent active layer was measured as shown in FIG. 6 while varying the temperature in the chamber.

As can be seen in Figure 6, when the temperature in the chamber is higher than 100 ℃, it can be seen that the growth rate is rapidly reduced. That is, when the temperature in the chamber is higher than 100 ° C, the packing in the molecules in DEZn and 4-mercaptophenol is reduced, it can be seen that the quality of the transparent active layer is lowered, and also the process efficiency is lowered. In other words, it can be seen that keeping the temperature in the chamber below 100 ° C. is an efficient way of depositing a high quality transparent active layer.

7 is a graph measuring elastic modulus and hardness of a transparent active layer according to an embodiment of the present invention.

Referring to FIG. 7, elastic modulus and hardness of the transparent active layer according to the first and second embodiments, the first comparative example, and the third comparative example described above were measured. As can be seen in Figure 7, as the 4-mercaptophenol providing step increases compared to the DEZn providing step, it can be seen that the amount of 4-mercaptophenol in the transparent active layer is increased, thereby improving the flexibility. In other words, by adjusting the ratio of the DEZn providing step and the 4-mercaptophenol providing step, it can be seen that the flexibility of the transparent active layer can be easily adjusted.

8A and 8B are graphs illustrating current voltage characteristics according to bias stress of a thin film transistor according to an exemplary embodiment of the present invention, and FIGS. 8C and 8D are thresholds according to bias stress of a thin film transistor according to an exemplary embodiment of the present invention. A graph measuring voltage characteristics.

8A to 8D, the thin film transistor including the ZnO thin film transparent active layer according to the first comparative example described above, and the DEZn providing step and the 4-mercaptophenol providing step according to the third embodiment are performed at 7: 1. Current voltage characteristics and threshold voltage characteristics of the thin film transistor including the prepared transparent active layer were measured.

More specifically, a bias voltage of 15 V is applied to the thin film transistor including the ZnO thin film transparent active layer according to the first comparative example, and a bias voltage of 20 V is applied to the thin film transistor including the transparent active layer according to the third embodiment and the current is applied. Voltage characteristics were evaluated. In addition, a bias voltage of 10 V and 15 V is applied to the thin film transistor including the ZnO thin film transparent active layer according to the first comparative example, and -10 V, -15 V, and -20 V to the thin film transistor including the transparent active layer according to the third embodiment. , 10V, 15V, and 20V bias voltage were applied and threshold voltage characteristics were measured.

8A to 8D, the thin film transistor including the transparent active layer prepared by performing the DEZn providing step and the 4-mercaptophenol providing step 7: 1 according to an embodiment of the present invention has a significant reliability against bias stress. It can be confirmed that high.

9 is a graph analyzing a defect in a transparent active layer according to an embodiment of the present invention.

9, for the ZnO thin film transparent active layer according to the first comparative example and the transparent active layer according to the third embodiment, defects in the transparent active layer are measured using photo-excited charge collection spectroscopy (PECCS) analysis. It was.

As can be seen in the dotted line of Figure 9, compared with the ZnO thin film transparent active layer according to the first comparative example prepared by providing DEZn without providing 4-mercaptophenol, the agent prepared by providing 4-mercaptophenol It can be seen that the defects in the transparent active layer according to the third embodiment are remarkably small. In other words, it can be seen that defects in ZnO can be efficiently removed by 4-mercaptophenol provided during the deposition of the transparent active layer.

As mentioned above, although this invention was demonstrated in detail using the preferable embodiment, the scope of the present invention is not limited to a specific embodiment, Comprising: It should be interpreted by the attached Claim. In addition, those skilled in the art should understand that many modifications and variations are possible without departing from the scope of the present invention.

100, 200: substrate
110, 230: gate electrode
120, 220: gate insulating film
130, 210: active film
150d, 152d, 250d: drain electrode
150s, 152s, 250s: source electrode
140, 240: passivation membrane

Claims (9)

delete Board;
A transparent active layer disposed on the substrate and comprising 35.99 to 36.28 atomic% oxygen, 22.67 to 23.58 atomic% carbon, 5.86 to 6.65 atomic% sulfur, and 33.98 to 35.19 atomic% zinc;
A gate electrode overlapping the transparent active layer; And
And a gate insulating film between the gate electrode and the transparent active layer.
The method of claim 2,
When the PECCS analysis of the transparent active layer, a thin film transistor comprising a lower peak value than zinc oxide (ZnO) at 2.25eV ~ 2.5eV.
The method of claim 2,
The transparent active layer is a thin film transistor comprising a low modulus of elasticity (elastic modulus) and a low hardness (hardness) compared to zinc oxide (ZnO).
The method of claim 2,
The transparent active layer is a thin film transistor comprising an atomic layer deposition method.
The method of claim 5,
The transparent active layer, a thin film transistor comprising a DEZn and produced using 4-mercaptophenol.
The method of claim 2,
A thin film transistor comprising an on / off ratio of 10 ⁶ or greater.
The method of claim 2,
The transparent active layer includes a thin film transistor comprising a mobility of 7 cm ² / Vs or more.
The method of claim 2,
The substrate is a thin film transistor comprising a plastic substrate.

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