KR102005451B1 - High Electron Mobility Transistor - Google Patents

High Electron Mobility Transistor Download PDF

Info

Publication number
KR102005451B1
KR102005451B1 KR1020130018234A KR20130018234A KR102005451B1 KR 102005451 B1 KR102005451 B1 KR 102005451B1 KR 1020130018234 A KR1020130018234 A KR 1020130018234A KR 20130018234 A KR20130018234 A KR 20130018234A KR 102005451 B1 KR102005451 B1 KR 102005451B1
Authority
KR
South Korea
Prior art keywords
layer
contact
channel
source electrode
drain electrode
Prior art date
Application number
KR1020130018234A
Other languages
Korean (ko)
Other versions
KR20140016800A (en
Inventor
황인준
최효지
김종섭
오재준
Original Assignee
삼성전자주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자주식회사 filed Critical 삼성전자주식회사
Priority to US13/953,165 priority Critical patent/US9076850B2/en
Publication of KR20140016800A publication Critical patent/KR20140016800A/en
Application granted granted Critical
Publication of KR102005451B1 publication Critical patent/KR102005451B1/en

Links

Images

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Manufacturing & Machinery (AREA)

Abstract

A high electron mobility transistor is disclosed.
The disclosed high electron mobility transistor includes a channel layer, a contact layer for an ohmic contact formed on the channel layer, doped n-type and formed of a III-V compound semiconductor, and a channel supply layer.

Description

[0002] High electron mobility transistors

An embodiment of the present invention relates to a high electron mobility transistor capable of ohmic contact without a high temperature process.

The nitride semiconductor device can be used, for example, as a power device used for power control. One of the power devices is a high electron mobility transistor (HEMT). The HEMT includes a channel layer and a channel supply layer on the channel layer, and includes a 2-Dimensional Electron Gas (2DEG) used as a carrier in the channel layer. Since 2DEG is used as a carrier, the electron mobility of HEMTs is higher than that of conventional transistors. The HEMT includes a compound semiconductor having a wide band gap. Therefore, the breakdown voltage of a HEMT may be higher than that of a conventional transistor. The breakdown voltage of the HEMT may increase in proportion to the thickness of the compound semiconductor layer including the 2DEG, for example, the GaN layer.

 The HEMT may include semiconductor layers having different band gaps. In the HEMT, a semiconductor layer having a large bandgap serves as a donor. A 2DEG (2-dimensional electron gas) can be formed in a semiconductor layer having a small band gap by the semiconductor layer having a large bandgap. 2DEG in HEMTs can be used as channels.

Then, the source electrode and the drain electrode are ohmically contacted on the channel supply layer, and a high-temperature process is required to lower the contact resistance. However, the high temperature process can damage other semiconductor layers.

Embodiments of the present invention provide a high electron mobility transistor capable of ohmic contact without a high temperature process.

A HEMT according to an embodiment of the present invention includes a channel layer including a 2DEG; A contact layer formed on the channel layer, doped n-type, for an ohmic contact formed of a III-V compound semiconductor; A channel supply layer on the contact layer; A gate electrode provided on a part of the channel layer; And source and drain electrodes disposed on both sides of the gate electrode.

A recess may be formed in a part of the channel supply layer, the contact layer and the channel layer, and the gate electrode may be provided in the recess.

And a gate insulating layer may be further provided on the channel supply layer between the source electrode and the drain electrode.

An undoped GaN layer may further be provided between the contact layer and the channel supply layer.

The undoped GaN layer may have a thickness in the range of 5-50 nm.

The contact layer may be formed of n-type GaN.

The channel layer may be formed of an undoped GaN layer, an InGaN layer, or an AlGaN layer.

The channel supply layer may include at least one of an AlN layer, an AlGaN layer, an AlInN layer, and an AlInGaN layer.

The channel supply layer may be doped n-type.

The channel supply layer may include a plurality of layers depending on the Al content or the In content.

A buffer layer may be further provided under the channel layer, and the buffer layer may include at least one of a GaN layer, an AlGaN layer, and an AlN layer.

The channel layer may be formed of a p-type GaN layer or a graded AlGaN layer.

At least one of the source electrode and the drain electrode may be in contact with the contact layer.

One of the source electrode and the drain electrode may be in contact with the contact layer and the other of the source electrode and the drain electrode may be in contact with the channel layer.

The lower surface of the source electrode contacts the contact layer, and the lower surface of the drain electrode contacts the contact layer.

The lower surface of the source electrode may contact the channel supply layer and the lower surface of the drain electrode may contact the channel supply layer.

At least one lower surface of the source electrode and the drain electrode may be in contact with the channel layer.

And a lower surface of at least one of the source electrode and the drain electrode may be in contact with the undoped GaN layer.

One of the source electrode and the drain electrode may be in contact with the contact layer and the other of the source electrode and the drain electrode may be in contact with the channel layer.

The lower surface of the source electrode contacts the contact layer, and the lower surface of the drain electrode contacts the contact layer.

The lower surface of the source electrode may contact the channel supply layer and the lower surface of the drain electrode may contact the channel supply layer.

An undoped GaN layer may further be provided between the contact layer and the channel supply layer.

The undoped GaN layer may have a thickness in the range of 5-50 nm.

One of the source electrode and the drain electrode is in contact with the contact layer and the other of the source electrode and the drain electrode is in contact with the undoped GaN layer.

The high electron mobility transistor according to the embodiment of the present invention can perform ohmic contact without a high temperature process and can reduce the damage of other semiconductor layers due to the high temperature process. In addition, an n-type nitride semiconductor layer may be provided to reduce contact resistance and to reduce current collapse due to a buffer trap.

1 schematically shows a HEMT according to an embodiment of the present invention.
Figs. 2 to 4 show examples of modification of the arrangement of electrodes in the HEMT shown in Fig.
5 illustrates a layer structure in which a buffer layer and a substrate are further provided in the HEMT shown in FIG.
FIG. 6 shows an example in which the undoped nitride semiconductor layer is further provided in the HEMT shown in FIG.
7 schematically shows a HEMT according to another embodiment of the present invention.
FIGS. 8 to 10 are views for explaining the operation principle of the HEMT shown in FIG.
FIG. 11 shows an example in which the undoped nitride semiconductor layer is further provided in the HEMT shown in FIG.
Figs. 12 to 14 show examples of modification of the arrangement of electrodes in the HEMT shown in Fig.

Hereinafter, a high electron mobility transistor (HEMT) according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

Like reference numerals in the drawings denote like elements, and the sizes and thicknesses of the respective elements may be exaggerated for convenience of explanation. On the other hand, the embodiments described below are merely illustrative, and various modifications are possible from these embodiments. In the following, what is referred to as "upper" or "upper"

Figure 1 schematically illustrates a HEMT 10 according to one embodiment of the present invention. The HEMT 10 includes a channel layer 11, a channel layer 20 for forming a channel in the channel layer 11, and a channel layer 12 for forming an ohmic contact between the channel layer 11 and the channel layer 20. And a contact layer 15. The channel layer 11 may be a semiconductor layer, for example, an undoped GaN layer, an InGaN layer, or an AlGaN layer. However, the present invention is not limited thereto, and the channel layer 11 may be a material layer different from the semiconductor layer if the 2DEG can be formed.

On the other hand, GaN-based semiconductors have excellent energy bandgaps, high thermal and chemical stability, and high electron saturation rate (~ 3 × 10 7 cm / sec), and thus they are used not only as optical devices but also as high- Application is possible. Electronic devices using GaN-based semiconductors have various properties such as high breakdown field (~ 3 × 10 6 V / cm), high maximum current density, stable high temperature operation characteristics, and high thermal conductivity. In the case of a HEMT using a GaN-based heterojunction structure, since the band-discontinuity between the channel layer and the channel supply layer is large, electrons can be concentrated at a high concentration at the junction interface, thereby increasing electron mobility .

The channel supply layer 20 may be any one of an AlN layer, an AlGaN layer, an AlInN layer, an AlGaInN layer, and a combination layer thereof. Also, the channel supply layer 20 may be doped with n-type. The channel supply layer 20 may include a material having a different polarization characteristic from the channel layer 11. The channel supply layer 20 may be formed of a material having a band gap larger than that of the channel layer 11. 1 shows an example in which the channel supply layer 20 is composed of one layer, but it is also possible that the channel supply layer 20 is composed of a plurality of layers.

A 2DEG (2DEG) layer may be formed on a part of the channel layer 11. In the channel layer 11, a 2DEG layer can be formed by a spontaneous polarization (P SP ) and a piezo polarization (P PE ) due to tensile strain.

The contact layer 15 may be doped n-type with a layer for an ohmic contact and may be formed of a Group III-V compound semiconductor. For example, the contact layer 15 may be doped n-type to a material such as a channel. For example, the contact layer 15 may be formed of n-type GaN or n-type InGaN.

A gate electrode 32 may be provided on a part of the channel layer 11 and a source electrode 31 and a drain electrode 33 may be provided on both sides of the gate electrode 32. The source electrode 31 and the drain electrode 33 may contact at least one of the channel layer 11, the contact layer 15, and the channel supply layer 20, respectively. Here, the contact may include at least a part of the source electrode and the drain electrode being in contact with each other.

For example, the lower surface of the source electrode 31 and the drain electrode 33 may be in contact with the contact layer 15 as shown in FIG. The source electrode 31 and the drain electrode 33 are spaced apart from each other. A gate electrode 32 may be provided between the source electrode 31 and the drain electrode 33. The source and drain electrodes 31 and 33 may be formed to be in contact with the contact layer 15 by etching the channel supply layer 20 of the region where the source electrode is to be formed and the region where the drain electrode is to be formed . Here, it is also possible that a portion of the channel layer 20 and a portion of the contact layer 15 are etched into a region where the source electrode is to be formed and a drain electrode is to be formed. The 2DEG layer formed in the channel layer 11 may be used as a current channel between the source electrode 31 and the drain electrode 33. [ The source electrode 31 and the drain electrode 33 are in ohmic contact with the contact layer 15 formed of the n-type III-V group compound semiconductor, whereby the ohmic contact can be formed without a high-temperature process. Thus, damage to other layers due to the high temperature process in the process for the ohmic contact can be reduced. Then, the contact layer is doped with n-type, so that the contact resistance can be lowered. For example, when the contact layer is formed of n-type GaN and the channel supply layer 20 is formed of AlGaN, an n GaN / Ti / Al ohmic contact may be formed.

Meanwhile, a recess 22 may be formed under the gate electrode 32. The recesses 22 may be formed by etching the channel layer 20 and the contact layer 15. Alternatively, the recesses 22 may be formed by etching the channel supply layer 20, the contact layer 15, and a part of the channel layer 11. A gate electrode 32 may be provided in the recess 22. 2DEG may not be formed in the region corresponding to the recess 22, or may have different characteristics (electron concentration, etc.) from the remaining region. Normally off can be implemented through the recesses 22. The threshold voltage (Vth) of the HEMT can be increased by the recess (22). Therefore, the HEMT according to the present embodiment can operate in an enhancement mode (E-mode). The E-mode HEMT can be advantageously applied to various circuit configurations as compared to a depletion mode (D-mode) HEMT.

A gate insulating layer 25 may be further provided on the channel supply layer 20 between the source electrode 31 and the drain electrode 33. The gate insulating layer 25 may be formed along the channel supply layer 20 and the recesses 22. The gate insulating layer 25 is, for example, Al 2 O 3, SiO x , Si x N y, Sc 2 O 3, AlN, Ga 2 O 3, Gd 2 O 3, Al x Ga 2 (1-x) O 3 , MgO, and combinations thereof. Although not described herein, any gate insulating layer material used in conventional transistors can be applied as the gate insulating layer 25 material. Since the gate electrode 32 does not need to form a Schottky contact with the channel supply layer 20 when the gate insulating layer 25 is used, the kind of material (conductor) usable as the gate electrode 32 is Can be increased than when a Schottky contact is used. The gate electrode 32, the source electrode 31, and the drain electrode 33 may be formed of the same material.

Figs. 2 to 4 show examples of modification of the arrangement of the source electrode and the drain electrode in the HEMT 10 shown in Fig.

2, the lower surface of the source electrode 31a is arranged to be in contact with the channel layer 11, and the lower surface of the drain electrode 33a is arranged to be in contact with the channel layer 11, for example, . A part of one side of the source electrode 31a may contact the contact layer 15 and a part of one side of the drain electrode 33a may contact the contact layer 15. [

As shown in Fig. 3, it is also possible that the source electrode and the drain electrode are arranged so as to be in contact with different layers, respectively. For example, the lower surface of the source electrode 31b may be arranged to contact the contact layer 15 and the lower surface of the drain electrode 33b may be arranged to contact the channel layer 11. Alternatively, the lower surface of the source electrode 31b may contact the channel layer 11, and the lower surface of the drain screw 33b may be disposed on the contact layer 15. Alternatively, the lower surface of either the source electrode or the drain electrode may be in contact with the channel supply layer 20, and the lower surface of the other electrode may be disposed in the channel layer 11 or the contact layer 15.

It is also possible that the lower surface of the source electrode 31c is in contact with the channel supply layer 20 and the lower surface of the drain electrode 33c is in contact with the channel supply layer 20 as shown in Fig. . The HEMT according to the embodiment of the present invention can reduce the current collapse due to the buffer trap according to the arrangement of the source electrode and the drain electrode.

Next, FIG. 5 shows an example of a HEMT 10A having a substrate 6 and a buffer layer 8 in the HEMT 10 shown in FIG. The substrate 6 may be formed of, for example, Si, sapphire, SiC, GaN, or the like. The buffer layer 8 may be provided to mitigate the difference in lattice constant and thermal expansion coefficient between the substrate 10 and the channel layer 11 to prevent the crystallinity of the channel layer 11 from being degraded. The buffer layer 8 may be formed of, for example, AlN, GaN, AlGaN, AlInN, AlGaInN or the like. The buffer layer 8 may be formed of one layer or a plurality of layers. In some cases, a seed layer (not shown) may be further provided between the substrate 6 and the buffer layer 8. The seed layer may be a base layer for growth of the buffer layer 8. The substrate 6 and the buffer layer 8 can be removed after fabricating the HEMT. In other words, the substrate and the buffer layer in the HEMT can be selectively provided.

FIG. 6 shows an example in which the undoped nitride semiconductor layer 23 is further provided in the HEMT 10 shown in FIG. The HEMT 10B shown in FIG. 6 may include an undoped nitride semiconductor layer 23 between the contact layer 15 and the channel feed layer 25. In FIG. The undoped nitride semiconductor layer 23 may be provided between the channel supply layer 20 and the channel layer 11 to increase the electron mobility. The undoped nitride semiconductor layer 23 is formed of, for example, u-GaN and may have a thickness of 5 to 50 nm. Since the contact layer 15 is doped with n-type and the electron mobility at the interface with the channel supply layer 20 can be reduced, the electron mobility reduction can be compensated for by the undoped nitride semiconductor layer 23 The electron mobility characteristics can be improved.

Next, FIG. 7 shows a HEMT 100 according to another embodiment of the present invention.

The HEMT 100 includes a channel layer 111, a channel forming layer 120 for forming a channel in the channel layer 111, and a channel forming layer 120 for forming an ohmic contact between the channel layer 111 and the channel forming layer 120. And a contact layer 115. The channel layer 111 may be formed of, for example, a p-type doped nitride semiconductor layer or a graded aluminum nitride semiconductor layer. For example, a p-type GaN layer may be used as the p-type doped nitride semiconductor layer, and g-AlGaN (graded-AlGaN) may be used as the graded aluminum nitride semiconductor layer.

8-10 illustrate doping effects through progressive polarization gradual polarization when a graded aluminum nitride semiconductor layer is used for the channel layer 111. FIG.

8 shows a case where the polarization density P of the channel layer 111 gradually increases from the lower surface to the upper surface and the polarization direction of the entire channel layer 111 is directed downward. In FIG. 8, downward arrows on the right side of the channel layer 111 indicate changes in the polarization density in the channel layer 111. The change in polarization density is shown in five steps, but this is done for convenience of illustration and explanation. The change in the polarization density may be continuous depending on the thickness of the channel layer 111. [ The portion with a large downward arrow has a higher polarization density (P) than the portion without a downward arrow. This fact also applies to Figs. 9 and 10. As the polarization density gradually decreases from the upper surface to the lower surface of the channel layer 111, a positive polarization charge (+) exists in the channel layer 111. Negative charges, that is, free electrons, can be generated in the channel layer 111 to cancel such positive polarity charge (+). Thus, the channel layer 111 exhibits an n-doped effect. 5, ρ p represents the polarization charge density in the channel layer 111, and ρ free represents the free electron density generated in the channel layer 111.

9 shows a case where the polarization density P of the channel layer 111 gradually increases from the upper surface to the lower surface and the polarization direction of the entire channel layer 40 is directed downward. 6, the downward arrows on the right side of the channel layer 111 indicate a change in the polarization density in the channel layer 111. In FIG. As the polarization density gradually increases from the upper surface to the lower surface of the channel layer 111, a negative polarization charge (-) is present in the channel layer 111. Positive electric charges are generated in the channel layer 111 to cancel the negative polarity charge (-). Thus, in the case of FIG. 9, the channel layer 111 exhibits a p-doped effect. 9, ρ p represents the polarization charge density in the channel layer 111, and ρ free represents the positive charge density generated in the channel layer 111.

10 shows the polarization density P slope when the top surface of the channel layer 111 is formed to have an N-face. The polarization density P gradually increases from the lower surface to the upper surface, and the entire polarization direction of the channel layer 111 is directed upward. In FIG. 10, the right arrows of the channel layer 111 indicate the change in polarization density in the channel layer 111 according to the thickness of the channel layer 111. As the polarization density gradually increases from the lower surface to the upper surface of the channel layer 111, a negative polarization charge (-) is present in the channel layer 111. Positive electric charges are generated in the channel layer 111 to cancel the negative polarity charge (-). 9, the channel layer 111 exhibits a p-doped effect. 9, ρ p represents the polarization charge density in the channel layer 111, and ρ free represents the positive charge density generated in the channel layer 111.

The channel supply layer 120 may be one of an AlN layer, an AlGaN layer, an AlInN layer, an AlGaInN layer, and a combination layer thereof. Also, the channel supply layer 120 may be doped with n-type conductivity.

The contact layer 115 may be doped n-type into a layer for an ohmic contact and may be formed of a Group III-V compound semiconductor. For example, the contact layer 15 may be formed of n-type GaN.

A gate electrode 132 may be provided on a part of the channel layer 111 and a source electrode 131 and a drain electrode 133 may be provided on both sides of the gate electrode 132. The source electrode 131 and the drain electrode 133 may contact at least one of the channel layer 111, the contact layer 115, and the channel supply layer 120, respectively. Here, the contact may include at least a part of the source electrode and the drain electrode being in contact with each other.

For example, the lower surface of the source electrode 131 and the drain electrode 133 may be in contact with the contact layer 115 as shown in FIG. However, the arrangement of the source electrode and the drain electrode is not limited to this. For example, the lower surface of the source electrode and the drain electrode may be in contact with the same layer. The lower surface of the source electrode and the drain electrode may be in contact with the channel layer or channel supply layer. Or the lower surface of the source electrode and the drain electrode may be in contact with different layers, respectively. For example, the lower surface of one of the source electrode and the drain electrode may be in contact with the channel layer, and the lower surface of the other electrode may be disposed in the contact layer. Alternatively, the lower surface of one of the source electrode and the drain electrode may be disposed on the lower surface of the channel supply layer, and the lower surface of the other electrode may be disposed on the contact layer.

The source electrode 131 and the drain electrode 133 are spaced apart from each other. A gate electrode 132 may be provided between the source electrode 131 and the drain electrode 133. The source electrode 131 and the drain electrode 133 may be formed in contact with the contact layer 115. The source electrode 131 and the drain electrode 133 may be formed on the channel layer 120, . Here, the channel layer 120 and a part of the contact layer 115 may be etched into a region where the source electrode is to be formed and a drain electrode is to be formed. The source electrode 131 and the drain electrode 133 are ohmically contacted with the contact layer 115 formed of the n-type III-V group compound semiconductor, whereby the ohmic contact can be formed without a high temperature process. Thus, damage to other layers due to the high temperature process in the process for the ohmic contact can be reduced. Then, the contact layer is doped with n-type, so that the contact resistance can be lowered

Meanwhile, a recess 122 may be formed under the gate electrode 132. The recess 122 may be formed by etching the channel layer 120 and the contact layer 115. Alternatively, the recess 122 may be formed by etching the channel supply layer 120, the contact layer 115, and a part of the channel layer 111. A gate electrode 132 may be formed on the recess 122.

A gate insulating layer 125 may be further provided on the channel supply layer 120 between the source electrode 131 and the drain electrode 133. The gate insulating layer 125 may be formed along the channel supply layer 120 and the recess 122. The gate insulating layer 125 may be formed of Al 2 O 3 , SiO x , Si x N y , Sc 2 O 3 , AlN, Ga 2 O 3 , Gd 2 O 3 , Al x Ga 2 (1-x) O 3 , MgO, and combinations thereof.

FIG. 11 shows an example in which the undoped nitride semiconductor layer 123 is further provided in the HEMT 100 shown in FIG. The HEMT 100A shown in FIG. 11 may include an undoped nitride semiconductor layer 123 between the contact layer 115 and the channel supply layer 125. The undoped nitride semiconductor layer 123 may be provided to increase electron mobility between the channel layer 120 and the channel layer 111. The undoped nitride semiconductor layer 123 may have a thickness of, for example, 5 to 50 nm. Since the contact layer 115 is doped with n-type to reduce the electron mobility at the interface with the channel supply layer 120, it is possible to compensate for the electron mobility reduction by the undoped nitride semiconductor layer 123 The electron mobility characteristics can be improved.

Next, Figs. 12 to 14 show examples of modification of the arrangement of electrodes in the HEMT 100A shown in Fig.

The lower surface of the source electrode 131a may be in contact with the undoped nitride semiconductor layer 123 and the drain electrode 133a may be in the contact layer 115 as shown in FIG. Alternatively, the lower surface of the source electrode 131a may be disposed in the contact layer 115, and the drain electrode 133a may be in contact with the undoped nitride semiconductor layer 123.

Alternatively, as shown in FIG. 13, the lower surface of the source electrode 131b may be in contact with the channel layer 111, and the lower surface of the drain electrode 133b may be in contact with the contact layer 115. Or the lower surface of the source electrode 131b is in contact with the contact layer 115 and the lower surface of the drain electrode 133b is in contact with the channel layer 111. [

And a reverse diode structure by contacting the source electrode 131b with the channel layer 111. [ Thereby, a reverse diode element can be implemented in a single HEMT device without separately providing a reverse diode. The drain electrode 133b may be in ohmic contact with the contact layer 215 at an intermediate temperature.

14, the lower surface of the source electrode 131c is in contact with the undoped nitride semiconductor layer 123, the lower surface of the drain electrode 133c is in contact with the undoped nitride semiconductor layer 123, As shown in FIG. It is also possible that the lower surface of the source electrode 131c is in contact with the channel layer 111 and the lower surface of the drain electrode 133c is in contact with the channel layer 111 although not shown in the drawing. The HEMT according to the present embodiment can reduce the current collapse due to the buffer trap according to the arrangement of the source electrode and the drain electrode. Since the operation principle of the HEMT is as described with reference to FIG. 1, the detailed description will be omitted here.

Although the HEMT according to the embodiment of the present invention has been described with reference to the embodiments shown in the drawings for the sake of understanding, the HEMT according to the embodiment of the present invention is merely an example and those skilled in the art will understand that various modifications and equivalent implementations You will understand that an example is possible. Accordingly, the true scope of the present invention should be determined by the appended claims.

10, 10A, 10B, 100, 100A ... HEMT,
11,111 ... channel layer, 15,115 ... contact layer
20,120 ... channel supply layer, 22,122 ... recess
25,125 ... gate insulating layer, 31,131 ... source electrode
32,132 ... gate electrode, 33,133 ... drain electrode
23, 123 ... undoped nitride semiconductor layer

Claims (24)

A channel layer comprising a 2DEG;
A contact layer formed on the channel layer, doped n-type, for an ohmic contact formed of a III-V compound semiconductor;
A channel supply layer on the contact layer;
A gate electrode provided on a part of the channel layer; And
And source and drain electrodes disposed on both sides of the gate electrode. The method according to claim 1,
A recess is formed in a part of the channel supply layer, the contact layer and the channel layer, and the gate electrode is provided in the recess. The method according to claim 1,
And a gate insulating layer is further provided on the channel supply layer between the source electrode and the drain electrode. 4. The method according to any one of claims 1 to 3,
And an undoped GaN layer is further provided between the contact layer and the channel supply layer. 5. The method of claim 4,
Wherein the undoped GaN layer has a thickness in the range of 5-50 nm. 4. The method according to any one of claims 1 to 3,
And the contact layer is formed of n-type GaN. 4. The method according to any one of claims 1 to 3,
The channel layer is formed of an undoped GaN layer, an InGaN layer, or an AlGaN layer. 4. The method according to any one of claims 1 to 3,
Wherein the channel supply layer comprises at least one of an AlN layer, an AlGaN layer, an AlInN layer, and an AlInGaN layer. 9. The method of claim 8,
Wherein the channel feed layer is an n-type doped HEMT. 4. The method according to any one of claims 1 to 3,
Wherein the channel supply layer comprises a plurality of layers depending on an Al content or an In content. 4. The method according to any one of claims 1 to 3,
Wherein the buffer layer further comprises at least one of a GaN layer, an AlGaN layer, and an AlN layer. 4. The method according to any one of claims 1 to 3,
The channel layer is formed of a p-type GaN layer or a graded AlGaN layer. 4. The method according to any one of claims 1 to 3,
Wherein at least one of the source electrode and the drain electrode contacts the contact layer. 14. The method of claim 13,
Wherein one of the source electrode and the drain electrode is in contact with the contact layer and the other of the source electrode and the drain electrode is in contact with the channel layer. 14. The method of claim 13,
Wherein the lower surface of the source electrode contacts the contact layer and the lower surface of the drain electrode contacts the contact layer. 4. The method according to any one of claims 1 to 3,
Wherein the lower surface of the source electrode is in contact with the channel supply layer and the lower surface of the drain electrode is in contact with the channel supply layer. 13. The method of claim 12,
And a lower surface of at least one of the source electrode and the drain electrode is in contact with the channel layer. 5. The method of claim 4,
And a lower surface of at least one of the source electrode and the drain electrode is in contact with the undoped GaN layer. 19. The method of claim 18,
Wherein one of the source electrode and the drain electrode is in contact with the contact layer and the other of the source electrode and the drain electrode is in contact with the undoped GaN layer. 5. The method of claim 4,
Wherein the lower surface of the source electrode contacts the contact layer and the lower surface of the drain electrode contacts the contact layer. 18. The method of claim 17,
A lower surface of the source electrode is in contact with the channel layer, and a lower surface of the drain electrode is in contact with the channel supply layer. delete delete delete
KR1020130018234A 2012-07-30 2013-02-20 High Electron Mobility Transistor KR102005451B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US13/953,165 US9076850B2 (en) 2012-07-30 2013-07-29 High electron mobility transistor

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR20120083510 2012-07-30
KR1020120083510 2012-07-30

Publications (2)

Publication Number Publication Date
KR20140016800A KR20140016800A (en) 2014-02-10
KR102005451B1 true KR102005451B1 (en) 2019-07-30

Family

ID=50265717

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020130018234A KR102005451B1 (en) 2012-07-30 2013-02-20 High Electron Mobility Transistor

Country Status (1)

Country Link
KR (1) KR102005451B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114078966B (en) * 2020-08-13 2023-12-01 复旦大学 Radio frequency AlGaN/GaN device with composite channel structure and manufacturing method thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010199481A (en) 2009-02-27 2010-09-09 Sanken Electric Co Ltd Field-effect semiconductor device and method of manufacturing the same

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100912592B1 (en) * 2007-09-19 2009-08-19 전자부품연구원 High electron mobility transistor and method for manufacturing thereof
KR101720589B1 (en) * 2010-10-11 2017-03-30 삼성전자주식회사 E-mode High Electron Mobility Transistor and method of manufacturing the same
KR101813177B1 (en) * 2011-05-06 2017-12-29 삼성전자주식회사 High electron mobility transistor and method of manufacturing the same

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010199481A (en) 2009-02-27 2010-09-09 Sanken Electric Co Ltd Field-effect semiconductor device and method of manufacturing the same

Also Published As

Publication number Publication date
KR20140016800A (en) 2014-02-10

Similar Documents

Publication Publication Date Title
US10043896B2 (en) III-Nitride transistor including a III-N depleting layer
KR101773259B1 (en) A STRUCTURE FOR A GALLIUM NITRIDE (GaN) HIGH ELECTRON MOBILITY TRANSISTOR
JP5793120B2 (en) Composite semiconductor device having SOI substrate with integrated diode
US8519439B2 (en) Nitride semiconductor element with N-face semiconductor crystal layer
JP6173661B2 (en) III-nitride device manufacturing method and III-nitride device
KR101922122B1 (en) Normally off high electron mobility transistor
US9337301B2 (en) Aluminum nitride based semiconductor devices
US9076850B2 (en) High electron mobility transistor
US8330187B2 (en) GaN-based field effect transistor
US9245738B2 (en) High electron mobility transistor and method of manufacturing the same
KR101980197B1 (en) High electron mobility transistor and method of manufacturing the same
JP2013038409A (en) Composite semiconductor device with integrated diode
US20150123139A1 (en) High electron mobility transistor and method of manufacturing the same
CN110021661B (en) Semiconductor device and method for manufacturing the same
JP2015177064A (en) semiconductor device
KR20140011791A (en) High electron mobility transistor and method of manufacturing the same
US9252253B2 (en) High electron mobility transistor
US20150263155A1 (en) Semiconductor device
JP5997234B2 (en) Semiconductor device, field effect transistor, and electronic device
CN104704615A (en) Switching element
US9887267B2 (en) Normally-off field effect transistor
KR102005451B1 (en) High Electron Mobility Transistor
US9054171B2 (en) HEMT semiconductor device
CN118302866A (en) Semiconductor device and method for manufacturing the same
KR101934851B1 (en) High electron mobility transistor

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant