KR102002613B1 - Silicon micro-sctructure and method for making the same - Google Patents

Abstract

The present invention relates to a silicon microstructure, wherein the silicon microstructure according to the present invention comprises a silicon substrate; A first silicon layer formed on the silicon substrate, the first silicon layer being formed in such a manner that the width of the section gradually decreases from the silicon substrate; And a second silicon layer formed on the first silicon layer and being formed in such a shape that the width of the section gradually increases as the distance from the silicon substrate increases, the first silicon layer and the second silicon layer And are integrally formed to be connected to each other.
According to the present invention, there is provided a silicon microstructure which is applied to a sensor and can exhibit excellent sensitivity, and a method of manufacturing the same.

Description

Technical Field [0001] The present invention relates to a silicon microstructure and a method of manufacturing the same,

The present invention relates to a silicon microstructure and a method of manufacturing the same, and relates to a silicon microstructure which can be applied to an optical sensor to exhibit excellent sensitivity and a method of manufacturing the same.

Studies on micro-sized patterned structures have continued. Particularly, it is applied to a sensor which is installed indispensably in an electronic device and deviates from a laboratory unit. As the tendency of miniaturization of such electronic device is increased, interest in maximizing the miniaturization and performance of the sensor is increasing in the electronic device market.

However, as the process is greatly improved, it is difficult to reduce the size of the sensor through the production of various types of micro or nano unit structures, but it is still difficult to improve the characteristics.

In particular, in the case of a conventional optical sensor including a microstructure, there is a limitation in reacting only to light of a specific wavelength range, so that it is difficult to apply a single microstructure to various electronic devices.

In addition, a conventional optical sensor using a microstructure has a limitation in showing superior sensitivity even in terms of performance.

SUMMARY OF THE INVENTION Accordingly, the present invention has been made to solve the above-mentioned problems occurring in the prior art, and it is an object of the present invention to provide a silicon microstructure which can be applied to a sensor and exhibit excellent sensitivity, and a method of manufacturing the same.

According to the present invention, this object is achieved by a semiconductor device comprising: a silicon substrate; A first silicon layer formed on the silicon substrate, the first silicon layer being formed in such a manner that the width of the section gradually decreases from the silicon substrate; And a second silicon layer formed on the first silicon layer and formed in such a manner that the width of the section gradually increases as the distance from the silicon substrate increases, And are integrally connected to each other to form a micropattern.

The light emitting device may further include a light absorbing layer stacked on an outer surface of the micro pattern.

The light absorption layer may be at least one selected from the group consisting of aluminum oxide, silicon oxide, magnesium oxide, indium oxide, zinc oxide, tin oxide, titanium oxide, manganese oxide, tungsten oxide and silicon nitride.

The light absorbing layer may include a first absorbing layer laminated with a material selected from aluminum oxide, silicon oxide, and titanium oxide; And a second absorbing layer laminated with a material selected from silicon nitride and silicon oxynitride.

In addition, a plurality of the micro patterns may be spaced apart from each other in the width direction.

In addition, the width of a virtual cross section which is a boundary between the first silicon layer and the second silicon layer may be 0.3 占 퐉 or more.

In addition, the width (x) of the imaginary cross section and the width (y) of the outer surface of the second silicon layer which are the boundary between the first silicon layer and the second silicon layer can satisfy the following expression.

[Equation]

Also, at least a part of the outer surface of the first silicon layer and the second silicon may have a curvature.

According to another aspect of the present invention, there is provided a semiconductor device comprising: a first etching step of etching a silicon substrate to form pillars; And a second etching step of etching the pillar portion so that a micropattern having a gradually decreasing width of the cross section is formed as the pillar portion is further away from the both ends of the pillar portion, the pillar portion is etched in the second etching step, A first silicon layer and a second silicon layer disposed on the first silicon layer are formed.

In addition, in the second etching step, the width (x) of the imaginary cross section that is the boundary between the first silicon layer and the second silicon layer and the width (y) of the outer surface of the second silicon layer satisfy the following formula The etching time can be adjusted to satisfy the above condition.

[Equation]

(X) of a virtual cross section that is a boundary of the second silicon layer and the width (y) of the outer surface of the second silicon layer before the first etching step, And calculating the etching time of each of the first etching step and the second etching step.

Further, in the calculating step, the width W of the column portion to be etched in the first etching step may be determined by the following equation.

[Equation]

(Where, _V R is the ratio of the rate at which the second etching width (y) width (x) of the speed and the boundary surface that is etched in the top surface of the silicon layer in a second etching step)

The method may further include a light absorption layer laminating step of forming a light absorption layer on the micro pattern.

According to another aspect of the present invention, there is provided an optical device using a silicon microstructure, which comprises a chipset electrically connected to the silicon microstructure.

According to the present invention, there is provided a silicon microstructure capable of realizing a sensor with excellent sensitivity using silicon and a method of manufacturing the same.

In the case of a sensor to which the microstructure of the present invention is applied, it is advantageous in that it reacts with light of all wavelengths without discriminating ultraviolet rays, visible rays, and infrared rays with high sensitivity.

In addition, by optimizing the numerical and proportions of the structure, the optical response sensitivity can be maximized.

In addition, it is possible to increase the production yield and minimize the defect by controlling the etching time in each step after calculating the optimization size in advance considering the etching speed.

Further, by forming the upper end portion of the micro pattern at a relatively large width, it is possible to minimize the outflow of the incident light incident to the outside.

Further, the photoreaction sensitivity can be improved by trapping the photoreceptor through the plasmonics effect of the light absorbing layer.

In addition, by allowing the photons to be repeatedly reflected again by the inclined surfaces of the micropattern, the probability of being absorbed into the light absorbing layer can be increased.

Etching step of the method of manufacturing a substrate,
Fig. 3 is a view for explaining the process of the second etching step of the method of manufacturing the silicon microstructure of Fig. 1,
Fig. 4 is a view for explaining the process of the light absorption layer laminating step of the method of manufacturing the silicon microstructure of Fig. 1,
5 shows various modifications of the silicon microstructure according to an embodiment of the present invention,
6 is a view for explaining the principle of a silicon microstructure according to an embodiment of the present invention,
7 is data of the responsivity of the silicon microstructure according to an embodiment of the present invention,
8 is data obtained by measuring a current flow according to a voltage in a plurality of regions when a silicon microstructure according to an embodiment of the present invention is processed on the same wafer,
9 is data obtained by measuring the degree of photoreaction by x / y of a silicon microstructure according to an embodiment of the present invention.

Hereinafter, a silicon microstructure according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

1 is a schematic process flow diagram of a method of manufacturing a silicon microstructure according to an embodiment of the present invention.

Referring to FIG. 1, a method of manufacturing a silicon microstructure S100 according to an embodiment of the present invention includes a calculation step S110, a first etching step S120, a second etching step S120, (S130).

The calculation step S110 may be performed in the first etching step S120 and the second etching step S130 in the first etching step S120 and the second etching step S130, The etching conditions are calculated in advance, which will be described later.

Fig. 2 is intended to explain the process of the first etching step of the method of manufacturing the silicon microstructure of Fig.

Referring to FIG. 2, the first etching step is a step of etching the silicon (Si) substrate 110 to form the pillars 111. In this step, the column portion 111 protruding from the silicon substrate is formed through dry etching or wet etching.

The etching time is controlled in the first etching step S120 so that the width y of the upper end of the second silicon layer 122 formed in the second etching step S130 described later and the width y of the first silicon layer 121, The ratio of the width x of the interface between the first silicon layer 122 and the second silicon layer 122 (hereinafter referred to as 'interface') can be controlled. More details of this will be described later.

3 is intended to explain the process of the second etching step of the method of manufacturing the silicon microstructure of FIG.

Referring to FIG. 3, in the second etching step S130, the column portion 110 is secondarily etched to form a micropattern 120 composed of a first silicon layer 121 and a second silicon layer 122 . In this step, the columnar section 111 is etched by wet etching or dry etching, and a micro pattern 120 having a width decreasing toward the center is formed.

More specifically, in this step, a micropattern 120, in which the first silicon layer 121 and the second silicon layer 122 are integrally formed, is formed on the silicon substrate 110. The side surface of the columnar section 111 is patterned by etching. In this step, by controlling the etching time, the micropattern 120 having a shape in which the width of the end surface gradually decreases from both ends toward the imaginary center portion is formed.

At this time, the first silicon layer 121 and the second silicon layer 122 are integrally held together and the width (x (x)) of the imaginary interface at which the first silicon layer 121 and the second silicon layer 122 are in contact ) Is preferably 0.3 m or more. That is, in the case where excessive etching is performed in this step or a region where a part of the first silicon layer 121 and a part of the second silicon layer 122 are separated due to an unintended process problem occurs , There is a problem that the photoreaction sensitivity of an optical device manufactured based thereon is very low. Therefore, it is preferable that the width (x) of the interface is connected without being separated, more preferably 0.3 mu m.

On the other hand, the calculation step (S110) for calculating the process conditions in advance in the above-described etching step will be described in detail. The calculation step (S110) includes the boundary surface calculation step, the second silicon layer calculation step, the column part calculation step, And a setting step.

First, in the interface calculation step, the width x of the interface between the first silicon layer 121 and the second silicon layer 122 is set as described above. As described above, the width x of the interface is set to a value larger than 0 and preferably set to a value of 0.3 m or more.

Next, in the second silicon layer calculation step, the size of the width (y) of the top surface of the second silicon layer 122 is calculated.

In this step, first, the sizes of the respective portions of the first silicon layer 121 and the second silicon layer 122 formed in the second etching step S130 are designed to satisfy the following expressions.

[Equation 1]

(Where x is the width of the interface between the first silicon layer and the second silicon layer and y is the width of the top surface of the second silicon layer)

That is, the optimum ratio of the width (y) of the top surface of the second silicon layer 122 is determined within the range of the above-mentioned expression (1) while the size of the interface width x is set to the optimum value (Y) of the width of the upper surface of the second silicon layer 122 is finally calculated.

When each value is determined, the column calculating step is performed. In other words, the state in which two calculates the ratio (R _V) of the rate at which the etching width (y) width (x) of the speed and the boundary surfaces that are etched in the top surface of the second silicon layer 122 in the etching step (S130) The size of the width W of the columnar section 111 formed by the first etching step S120 is inversed.

[Equation 2]

(Where W is the width of the column formed after the first etching step)

Next, in the etching condition setting step, the conditions of the first etching step (S120) and the second etching step (S130) are calculated. That is, in the first etching step S120, the etching time is calculated so as to form the column portion 111 having the value W calculated by the above-mentioned formula 2, and in the first etching step S120, A condition that the width of the interface becomes x and the width of the top surface of the second silicon layer 122 becomes y by adjusting the etching time in the second etching step S130 after forming the portion 111 Time).

Meanwhile, in the second etching step S130 in this embodiment, at least a part of the outer surface of the first silicon layer 121 and the second silicon layer 122 has a curvature, so that the sensitivity of the sensor using the present silicon microstructure Can be further improved.

Fig. 4 is a view for explaining the process of the light absorption layer laminating step of the manufacturing method of the silicon microstructure of Fig. 1, and Fig. 5 is a view showing various modifications of the silicon microstructure according to an embodiment of the present invention.

4, in the light absorbing layer laminating step S140, a separate light absorbing layer 130 is laminated on the outer surface of the micropattern 120 composed of the first silicon layer 121 and the second silicon layer 122 .

In the present invention, the light absorption layer 130 may be at least one selected from the group consisting of aluminum oxide, silicon oxide, magnesium oxide, indium oxide, zinc oxide, tin oxide, titanium oxide, manganese oxide, tungsten oxide and silicon nitride.

More specifically, the photopolymerizable layer 130 may be formed of any one of Al ₂ O ₃ , SiO ₂ , MgO, InO ₂ , Zn ₂ O, SnO ₂ , TiO ₂ , MnO ₂ , TnO ₂ , W ₂ O ₃ , The pattern 120 may be formed by laminating on the outer surface.

5, the light absorbing layer 130 may include a plurality of layers, that is, a first layer 131 and a second layer 132, according to another embodiment of the present invention.

The first layer 131 is a layer composed of any one of the various oxides described above and specifically includes a layer made of an oxide of aluminum, silicon oxide, magnesium oxide, indium oxide, zinc oxide, tin oxide, titanium oxide, , And tungsten oxide on the outer surface of the micro pattern 120. [0033]

The second layer 132 is a layer made of a nitride material, and is formed by laminating silicon nitride on the outer surface of the first layer.

Hereinafter, an optical device using the silicon microstructure according to the present invention will be described.

The optical sensing sensitivity of an optical device using the above-described silicon microstructure is measured as follows.

When the sensitivity of the optical element to which the microstructure of the present invention is applied is measured, the sensitivity is high in the whole wavelength band. In addition, the sensitivity is greatly improved as compared with the conventional optical device.

FIG. 6 is intended to illustrate the principle that a silicon microstructure according to an embodiment of the present invention reacts with a photon.

Hereinafter, the principle of sensitivity improvement according to the present invention will be described in detail with reference to FIG. First, the light impinging on the space between the micro patterns is absorbed into the stacked light absorbing layer 130, and then flows into the micro pattern 120.

That is, in the present invention, the light absorption layer 130 composed of an oxide or a nitride traps an incident light through a plasmonics phenomenon, thereby blocking the light for a longer time, and the light absorption layer 130 Is very likely to be incident into the micropattern 120 composed of silicon (Si).

That is, according to the present invention, the light absorbing layer 130 traps more light intensities for a longer time, allowing the micropattern 120 to react to more light particles, thereby greatly increasing the overall sensitivity.

In addition, since the light particles incident once into the space between the micro patterns 120 are repeatedly reflected by the inclined surfaces formed by the first silicon layer 121 and the second silicon layer 122, The probability of reabsorption into the absorbent layer 130 is greatly increased.

Particularly, since the width of the cross section of the end portion of the second silicon layer 122 is relatively large, the probability of being emitted to the outside of the incident light entrance is very low, and the incident light particles in the space between the micro patterns 120 The light is not emitted to the outside but is repeatedly reflected again in the space between the micro patterns 120 and absorbed by the light absorbing layer 130.

FIG. 7 (a) shows the photoreactivity according to the wavelength of the conventional micro structure, and FIG. 7 (b) shows the responsivity measurement data of the silicon micro structure according to an embodiment of the present invention.

That is, the microstructure of this embodiment shows a photoresponse of 1000 times or more in all wavelength bands as compared with the conventional microstructure.

This is because the micro pattern 120 of the present embodiment has a shape gradually increasing in width toward both ends with respect to the boundary surface, thereby minimizing the outflow path of the photo-impinging layer, and preventing the photon from being trapped for a long time by the plasmonics effect of the light- And the photoreceptor is repeatedly reflected through the inclined surface in a wide space on the side of the micropattern 120 to increase the reac- tion rate, thereby increasing the photoreaction sensitivity.

Fig. 8 is a view showing a process of fabricating a plurality of silicon microstructures by the process of the present embodiment on the same wafer, and measuring the current flow for each voltage at a plurality of arbitrary points.

That is, as shown in FIG. 8, when the process of this embodiment is performed, it can be seen that there is almost no difference in the currents flowing when the same voltage is applied at different points on the same wafer. This is because, in the case of microstructures manufactured by the silicon microstructure manufacturing method of the present invention, the microstructures overcome the differences occurring in the microstructuring process and have a uniform quality.

The silicon microstructure manufacturing method according to this embodiment can produce a silicon microstructure having uniform characteristics and photoreactivity, and thus can solve the conventional problem of having different characteristics on the same wafer, will be.

9 is data obtained by measuring the degree of photoreaction by x / y of a silicon microstructure according to an embodiment of the present invention.

9, x / y value (where x is the width of the interface between the first silicon layer and the second silicon layer and y is the width of the top surface of the second silicon layer) The more the photoreaction output characteristic (current) is increased.

The photoreaction output shows the largest value at x / y value of 0.4 and slightly decreases at values exceeding 0.4. Therefore, it can be seen that the photoreaction characteristics of the silicon microstructure of the present embodiment vary depending on the x / y value, and it is found that the photoreaction characteristics are excellent within the following ranges.

[Equation]

Furthermore, the x / y value of the silicon microstructure of the present embodiment can be controlled in consideration of the application, the processing environment, and the cost to be used, thereby allowing the user to arbitrarily adjust the photoreaction characteristics and sensitivity.

The scope of the present invention is not limited to the above-described embodiments, but may be embodied in various forms of embodiments within the scope of the appended claims. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the appended claims.

110: silicon substrate 111:
120: micro pattern 121: first silicon layer
122: second silicon layer 130: light absorbing layer

Claims (14)

A silicon substrate;
A first silicon layer formed on the silicon substrate, the first silicon layer being formed in such a manner that the width of the section gradually decreases from the silicon substrate;
And a second silicon layer provided on the first silicon layer and formed in such a shape that the width of the section gradually increases as the distance from the silicon substrate increases,
Wherein the first silicon layer and the second silicon layer are integrally connected to each other to form a micropattern,
And a light absorbing layer laminated on an outer surface of the micro pattern,
Wherein the light absorbing layer comprises: a first absorbing layer laminated with a material selected from the group consisting of aluminum oxide, silicon oxide and titanium oxide; And a second absorbing layer laminated with a material selected from the group consisting of silicon nitride and silicon oxynitride. delete delete delete The method according to claim 1,
Wherein the plurality of micro patterns are spaced apart from each other in the width direction. The method according to claim 1 or 5,
Wherein a width of an imaginary cross section that is a boundary between the first silicon layer and the second silicon layer is 0.3 占 퐉 or more. The method of claim 6,
Wherein a width (x) of an imaginary cross section that is a boundary between the first silicon layer and the second silicon layer and a width (y) of an outer side surface of the second silicon layer satisfy the following expression: .
[Equation]

The method of claim 7,
Wherein at least a part of the outer surface of the first silicon layer and the second silicon has a curvature. delete delete delete delete delete The silicon microstructure of claim 1;
And a chipset electrically connected to the silicon microstructure. ≪ Desc / Clms Page number 20 >

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