KR101989528B1 - image display device and method of displaying image - Google Patents

Abstract

An object of the present invention is to provide an image display apparatus and an image display method capable of generating an image signal such that there is no screen noise when an LCD panel in which pixels are arranged in a diagonal lattice is used among a plurality of LCD panels .
Side LCD panel in which pixels are arranged in a lattice pattern and a rear-side LCD panel in which pixels are arranged in a diagonal lattice pattern, and the backlight is transmitted in order of the rear-side LCD panel and the front-side LCD panel A first controller (33) for generating and supplying output RGB image signals (R3, G3, B3) from the RGB image signals to the front side LCD panel; And a second controller (34) for generating and supplying an output gray image signal (W4), in which pixels are arranged in a diagonal lattice pattern, as a gray scale image signal to the rear side LCD panel, and the second controller , Calculating a position correspondence relationship between each of the pixels arranged in a diagonal lattice pattern and each of the pixels arranged in a lattice form and calculating the position correspondence relationship between each of the output gray image signals (W4) And a resolution conversion processing section (342) for generating the resolution conversion processing section (342).

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an image display device,

The present invention relates to an image display apparatus and an image display method.

In a conventional image display apparatus using a single LCD panel, the input image is corrected by the line gamma in the panel driver, thereby realizing the linearity of the gradation when viewed with the naked eye.

However, in practice, since the backlight is transmitted through the liquid crystal panel to perform luminance representation, a so-called black floating phenomenon occurs, in particular, in which the gradation characteristic of the black region is poor and the luminance is observed in the bright direction as compared with the ideal luminance .

This phenomenon occurs when the LCD panel is not completely shielded from light when the dark area is displayed on the LCD panel, and the backlight illuminates. A contrast ratio of about 10000: 1 is achieved in a conventional CRT, and a contrast ratio of about 1000000: 1 is realized in an organic EL panel. However, according to this phenomenon, the contrast ratio of only about 1500: 1 is realized in the conventional image display apparatus using one LCD panel.

Therefore, in order to improve the contrast ratio of the image display apparatus using such a single LCD, an image display apparatus using two LCD panels has been proposed (for example, see Patent Documents 1 and 2). Any of the image display apparatuses is configured to use two LCD panels, and the transmission ratio of the backlight is adjusted by the rear LCD and RGB display is performed by the front LCD panel, thereby improving the contrast ratio.

14 shows a conventional image display apparatus 100 using two LCD panels. The LCD panel on the rear side backlight 103 side is referred to as an LV panel (Light Valve Panel) 102, and the front side LCD panel on the side closer to the viewer of the image is referred to as an RGB panel 101. The RGB panel 101 is composed of R, G, and B subpixels. On the other hand, the LV panel 102 combines the R, G, and B sub-pixels into one pixel. In other words, one pixel of the LV panel 102 is common to one pixel of the RGB panel 101, and one pixel corresponds to one pixel.

In the conventional configuration using the two LCD panels, since the pixels of the RGB panel 101 correspond to the pixels of the LV panel 102 on a one-to-one basis, a slight deviation And a moire may be seen when an image is displayed. In order to solve this problem, it has been attempted to solve the minute misalignment that causes moiré by arranging the pixel shape of the LV panel to be larger than the pixel of the RGB panel and arranging the pixels in a diagonal lattice pattern.

Patent Document 1: JP-A-5-88197 Patent Document 2: International Publication No. 2007/108183

In the case where the pixel shape of the LV panel is made larger than the pixel of the RGB panel and the pixels are arranged in the diagonal lattice as described above, the pixels of the RGB panel and the pixels of the LV panel do not correspond one- It is not easy to generate an image signal to be displayed on the LV panel so that there is no screen noise.

An object of the present invention is to provide an image display apparatus and an image display method capable of generating an image signal such that there is no screen noise when an LCD panel in which pixels are arranged in a diagonal lattice is used among a plurality of LCD panels .

The image display apparatus according to the present invention is constituted by overlapping a front side LCD panel in which pixels are arranged in a lattice form and a rear side LCD panel in which pixels are arranged in a diagonal lattice pattern, A first controller for generating an output RGB image signal from the RGB image signal and supplying the RGB image signal to the front side LCD panel; And a second controller which generates an output gray image signal in which pixels are arranged in a diagonal lattice pattern and supplies the output gray image signal to the rear side LCD panel, Calculating a position correspondence relationship of each of the pixels arranged in a lattice form, and based on the position correspondence, And a resolution conversion processing section for generating a signal.

The image display method according to the present invention is also configured by overlapping a front side LCD panel in which pixels are arranged in a lattice form and a rear side LCD panel in which pixels are arranged in a diagonal lattice pattern, And an image display method for performing image display by transmitting an image in the order of the front side LCD panel, comprising the steps of: generating an output RGB image signal from an RGB image signal and supplying the RGB image signal to the front side LCD panel; A pixel corresponding to a gray scale image signal is arranged in a diagonal lattice pattern on the basis of the position correspondence relationship from the RGB image signal, And generates and outputs the arranged output gray image signal to the rear side LCD panel.

According to the present invention, it is possible to provide an image display apparatus and an image display method capable of generating an image signal such that there is no screen noise when an LCD panel in which pixels are arranged in a diagonal lattice is used among a plurality of LCD panels.

1 is a signal processing block diagram of an image display apparatus according to an embodiment of the present invention.
2 is a schematic cross-sectional view of the image display device of the above embodiment.
3 is a partially enlarged view of (a) a schematic plan view and (b) a schematic plan view of the image display apparatus of the above embodiment.
4 is a more detailed signal processing block diagram of the RGB controller and the LV controller included in the image display apparatus of the above embodiment.
5 is an explanatory diagram of bit expansion processing by the bit expansion circuit of the above embodiment.
6 is an explanatory diagram of local edge hold processing by the edge hold circuit of the above embodiment.
Fig. 7 is an explanatory view of a pixel of the LV panel in the above embodiment. Fig.
Fig. 8 is an explanatory diagram for calculation of the positional correspondence relationship in the above embodiment. Fig.
9 is a signal processing block diagram of the resolution conversion processing unit of the embodiment.
10 is a signal processing block diagram of the pixel correspondence relationship calculation circuit of the above embodiment.
11 is a signal processing block diagram of the output gray image brightness calculating circuit of the above embodiment.
12 is an explanatory diagram of the resolution conversion processing unit of the embodiment.
13 is a signal processing block diagram of the output gray image brightness calculating circuit of the first modification of the above embodiment.
14 is an explanatory diagram of a conventional image display apparatus using two LCD panels.

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

The image display apparatus of the present embodiment is configured by superimposing a front side LCD panel in which pixels are arranged in a lattice pattern and a rear side LCD panel in which pixels are arranged in a diagonal lattice pattern and a backlight is formed on the rear side LCD panel, A first controller for generating an output RGB image signal from the RGB image signal and supplying the RGB image signal to the front side LCD panel, and a second controller for converting the RGB image signal into a gray scale image signal And a second controller for generating an output gray image signal in which pixels are arranged in a diagonal lattice pattern and supplying the output gray image signal to the rear side LCD panel, wherein the second controller comprises: a plurality of pixels arranged in a diagonal lattice pattern; And a resolution conversion processing section for calculating a position correspondence relationship between each pixel and generating an output gray image signal based on the position correspondence relationship.

1 is a signal processing block diagram of the image display apparatus 10 according to the present embodiment. The image display apparatus 10 is provided with an image display apparatus main body 20 and an LCD module 30.

The image display apparatus main body 20 is provided with an image processing engine 21. The LCD module 30 includes an interface 31, a bit expansion circuit 32, an RGB controller (first controller) 33, an LV (light valve) controller (second controller) 34, an RGB panel A front side LCD panel 35, and an LV panel (rear side LCD panel 36).

The image processing engine 21 in the image display apparatus main body 20 generates an RGB image and transmits it to the LCD module 30. [ The I / F 31 in the LCD module 30 receives the RGB image generated by the image processing engine 21 and outputs the luminance value of each of the subpixels R, G, and B of each pixel to the bit expansion circuit 32). The bit expansion circuit 32 performs bit extension processing as described below for the RGB image and transmits the RGB expanded image signal to the RGB controller 33 and the LV controller 34. [

The RGB controller 33 generates an output RGB image signal from the RGB image signal received from the bit expanding circuit 32 and supplies it to the RGB panel 35. [ The LV controller 34 generates an output gray image signal which is a gray scale image signal represented only by light and dark from white to black from the RGB image signal received from the bit expansion circuit 32 And supplies it to the LV panel 36.

The RGB panel 35 receives and displays the output RGB image signal. Further, the LV panel 36 receives and displays the output gray image signal.

2 is a schematic cross-sectional view of the image display apparatus 10 shown in Fig. The image display apparatus 10 is provided with a lamination 38 for bonding the backlight unit 37 and the RGB panel 35 and the LV panel 36 in addition to the RGB panel 35 and the LV panel 36. [

The RGB panel 35 includes a color filter substrate 35b, a TFT substrate 35c, a polarizing film 35a, and a driving IC 35d. The color filter substrate 35b is a substrate on which a black matrix and R, G, and B color filters are arranged and a common electrode or the like is formed. The TFT substrate 35c is a substrate on which TFTs, electrodes, and the like are formed on the liquid crystal side.

The polarizing film 35a polarizes the light emitted from the backlight unit 37. The driving IC 35d displays the RGB image processed by the RGB controller 33 on the RGB panel 35 by driving the TFT substrate 35c.

On the other hand, the LV panel 36 includes a glass substrate 36a, a TFT substrate 36b, a polarizing film 36c, and a driving IC 36d. The glass substrate 36a corresponds to the color filter substrate 35b of the RGB panel 35, but unlike the color filter substrate 35b, it does not have a black matrix and a color filter. This is based on the LV panel 36 displaying gray scale output gray image signals.

The TFT substrate 36b and the polarizing film 36c are the same as the TFT substrate 35c and the polarizing film 35a of the RGB panel 35. [ The driving IC 36d displays the output gray image signal processed by the LV controller 34 on the LV panel 36 by driving the TFT substrate 36b.

The backlight unit 37 includes a light guide panel 37a and a light source 37b. The light source 37b irradiates the light to the light guide panel 37a. The light guide panel 37a refracts the light irradiated from the light source 37b and irradiates the LV panel 36 with the light. The light emitted from the light guide panel 37a passes through the overlapped LV panel 36 and the RGB panel 35 in order to reach the human eye viewing the image display apparatus.

The contrast ratio of each of the RGB panel 35 and the LV panel 36 is 1,500: 1, which is the same as that of the conventional one LCD panel. However, by using two LCD panel structures as shown in Fig. 2, the contrast ratio is improved to 2,250,000: 1.

3 (a) is a schematic plan view of the image display apparatus 10, and Fig. 3 (b) is an enlarged view of a portion seen in a direction of arrow A in Fig. 3 (a). When viewed from the front, the RGB panel 35 and the LV panel 36 are arranged so as to overlap each other as shown in Fig. 3 (a).

As shown in Fig. 3 (b), in the RGB panel 35, the pixels 41 are arranged in a lattice pattern. On the other hand, in the LV panel 36, each pixel 45 is formed in a rhombic shape, and rhombic pixels 45 are arranged diagonally. That is, paying attention only to the arrangement of pixels, the pixels 45 in the LV panel 36 are arranged such that the pixels arranged in a lattice are rotated by 45 degrees, that is, arranged in a diagonal lattice pattern. Thereafter, the pixels 41 arranged in the lattice arrangement of the RGB panel 35 as the first pixels 41 and the pixels 45 arranged in the diagonal lattice pattern of the LV panel 36 as the second pixels 41, (45), respectively.

As shown in Fig. 3, the area of the LV panel 36 is larger than the area of the RGB panel 35. Fig. This is due to the following reasons. The RGB panel 35 displays the RGB image and the LV panel 36 adjusts the brightness of the RGB image displayed on the RGB panel 35 for each second pixel 45. [ Since the second pixel 45 of the LV panel 36 is in the rhombic shape, the outer periphery 36e of the LV panel 36 is formed in a wavy shape. Therefore, when the RGB panel 35 and the LV panel 36 are the same size, the outer periphery 35e of the RGB panel 35, which is originally to be displayed as a straight line, is cut and displayed in a wavy shape. When the RGB panel 35 and the LV panel 36 are overlapped with each other as shown in Fig. 3 (a), the outer periphery 35e of the RGB panel 35 is sufficiently outside the outer periphery of the LV panel 36 And 36e are positioned in the left-right direction.

The second pixel 45 of the LV panel 36 is larger than the first pixel 41 of the RGB panel 35 in order to reliably eliminate the moiré.

4 is a more detailed signal processing block diagram of the bit expanding circuit 32, the RGB controller 33, and the LV controller 34 included in the image display apparatus 10 of the present embodiment.

The RGB controller 33 includes a delay circuit 331 and an RGB gradation conversion circuit 332 and six color balance controllers 333 each having six LUTs (look up tables 3321, 3322, 3323, 3324, 3325, and 3326) .

The LV controller 34 includes a gray image brightness calculation section 341 and a resolution conversion processing section 342. The gray image brightness calculation section 341 includes a gray converter 3411, an LV gradation conversion circuit (gray gradation conversion circuit) 3412 having one LUT 3412, an edge hold circuit 3413, and an LPF (low pass filter) (3414). The resolution conversion processing section 342 includes a pixel correspondence relationship calculation circuit 3421 and an output gray image brightness calculation circuit 3422. [

The components of the bit expanding circuit 32, the RGB controller 33, and the LV controller 34 will be described in accordance with the signal flow order.

The bit expanding circuit 32 receives the RGB image signals R, G and B transmitted by the I / F 31 shown in Fig. 1 and outputs the RGB image signals R, G and B The RGB image signals (RGB image signals, R1, G1, and B1) after the bit construction are generated by performing bit extension processing on the luminance values of the pixels. The pixels are arranged in a lattice corresponding to the first pixels 41 of the RGB panel 35 in the RGB image signals R, G and B inputted to the bit expansion circuit 32. [ The bit expanding circuit 32 includes corresponding bit expanding circuits 321, 322 and 323 for each of the RGB image signals R, G and B. Here, the bit extending circuit 321 corresponding to the image signal R will be described. The bit expanding circuits 322 and 323 corresponding to the image signals G and B are configured similarly to the bit expanding circuit 321 corresponding to the image signal R. [

The bit expansion circuit 321 performs bit expansion processing with 12 bits for each input 8-bit RGB image. The bit extension processing is to extend the bit length precisely in advance in order to prevent the bit precision from deteriorating in the subsequent processing.

The bit expansion circuit 321 of the present embodiment expands the 8-bit data 50, that is, the 8-bit image signal to 12-bit data, for example, as shown in Fig. 5 . In the case of quantizing an image signal originally analogue to 8 bits, a round-to-bit change in the bit resolution or lower is discarded. However, since an image has a high correlation between adjacent pixels, it can be restored to some extent by introducing the following method.

FIG. 5B is an explanatory diagram of a pixel to be processed, that is, a pixel of interest X5, and FIG. 5C is an example of a bit extension processing sequence expressed in a program format. The bit expanding circuit 321 performs the bit expanding circuit 321 with respect to the eight pixels X1 to X4 and X6 to X9 adjacent to the target pixel X5 in the neighborhood of the target pixel X5 with respect to the variable dc initialized to zero, -1 when the luminance value of the pixel X5 is smaller than the luminance value of each adjacent pixel, and -1 when the luminance value of the pixel X5 is larger than the luminance value of each adjacent pixel.

Further, the bit expanding circuit 321 adds 8 bits of the total value, that is, the value obtained by dividing dc by 8, to the pixel of interest X5 as the weight 51 of the decimal point or less, Extension is performed.

For example, when the luminance values of neighboring pixels are all large relative to the luminance value of the pixel X5, the luminance value of each pixel is rounded to 8 bits, The original value of the luminance value of the target pixel X5 is assumed to be a continuous concave shape and the original analog value of the luminance value of the target pixel X5 is estimated to be larger than the data rounded by 8 bits.

On the other hand, when the luminance values of the surrounding pixels are all small relative to the luminance value of the pixel X5, the waveform at the analog value, which is the original value before the luminance value of each pixel is rounded to 8 bits, is a continuous convex shape , It is estimated that the analog value which is the original value of the luminance value of the target pixel X5 is smaller than the data rounded by 8 bits. Thus, the bit extension circuit 321 performs bit extension processing as shown in FIG. 5 on the basis of this basis.

The pixels are arranged in a lattice corresponding to the first pixels 41 of the RGB panel 35 in the RGB image signals R1, G1 and B1 after bit expansion which are bits expanded by the bit expansion circuit 32 have.

The bit expansion circuit 32 outputs the RGB image signals R1, G1 and B1 after the bit expansion to the delay circuit 331 of the RGB controller 33 and the gray image luminance calculation section 341 of the LV controller 34, To the gray converter 3411, in detail.

The RGB controller 33 receives the RGB image signals R1, G1 and B1 after the bit expansion and generates the output RGB image signals R3, G3 and B3 and supplies them to the RGB panel 35. [ In all the image signals handled in the internal processing of the RGB controller 33, the pixels are arranged in a lattice pattern corresponding to the first pixels 41 of the RGB panel 35. In other words, also in the output RGB image signals (R3, G3, B3) outputted by the RGB controller 33, pixels are arranged in a lattice corresponding to the first pixel 41 of the RGB panel 35. [

The delay circuit 331 of the RGB controller 33 receives the RGB image signals R1, G1, and B1 after bit expansion. The delay circuit 331 appropriately delays the received RGB image signals (R1, G1, B1). The term "appropriately delayed" means that the processing delay of the gray converter 3411, the edge hold circuit 3413 and the LPF circuit 3414 in the LV controller 34 is compensated for and the delay circuit 331 and the RGB gradation And the intermediate gray image signal W3 transmitted from the LV controller 34 to the RGB image signals R2, G2, and B2 after the gray level conversion, which are transmitted to the color balance controller 333 via the conversion circuit 332, will be.

The delay circuit 331 transmits the RGB image signals (R1, G1, B1) to which the delay has been applied to the RGB gradation conversion circuit 332. [

The gray image brightness calculation section 341 of the LV controller 34 generates the intermediate gray image signal W3 from the RGB image signals R1, G1 and B1 after bit expansion. In the intermediate gray image signal W3, pixels are arranged in a lattice corresponding to the first pixels 41 of the RGB panel 35. [ The gray image brightness calculation section 341 determines the brightness value of each pixel in the intermediate gray image signal W3 having the pixel configuration corresponding to the first pixel 41 of the RGB panel 35, The resolution conversion processing section 342 of the LV panel 36 converts the intermediate gray image signal W3 having the pixel configuration corresponding to the first pixel 41 to the second pixel 45 of the LV panel 36, Into an output gray image signal W4 arranged in a lattice pattern, and supplies an output gray image signal W4 to the LV panel 36. [

The pixel configuration corresponding to the first pixel 41 of the RGB panel 35 in each image signal handled by the gray image brightness calculation section 341 including the intermediate gray image signal W3 is the pixel configuration corresponding to the resolution conversion processing section Is not actually outputted to the LV panel 36 because it is converted into the pixel configuration corresponding to the second pixel 45 of the LV panel 36 by the first pixel 342. The pixel configuration corresponding to the first pixel 41 of the RGB panel 35 before conversion to the pixel configuration corresponding to the second pixel 45 of the LV panel 36 A pixel in each image signal is called a virtual pixel.

The gray converter 3411 which is the front end circuit of the gray image brightness calculation section 341 receives the RGB image signals R1, G1 and B1 after the bit expansion from the bit expansion circuit 32. [

The gray converter 3411 generates an initial gray image signal W1 which is a gray scale image signal from the RGB image signals R1, G1 and B1. That is, the gray converter 3411 outputs, to each of the virtual pixels, the luminance value of each of the RGB subpixels, that is, the maximum value among the RGB image signals (R1, G1, B1) And converts it to a representative value W1, thereby converting it into a gray image.

The gray converter 3411 transmits the luminance value to each LV gradation conversion circuit 3412 as an initial gray image signal W1 for each of the virtual pixels of the generated gray image.

The RGB gradation conversion circuit 332 of the RGB controller 33 receives the RGB image signals R1, G1 and B1 from the delay circuit 331 and performs gradation conversion on the RGB image signals R1, G1 and B1, And generates RGB image signals (R2, G2, B2) after conversion. The LV gradation conversion circuit 3412 of the LV controller 34 receives the initial gray image signal W1 from the gray converter 3411 and performs gray level conversion on the initial gray image signal W1 to output the gray image signal W1 after the gray level conversion. (W2).

In this embodiment, the LUT (R) as the LUT for the subpixel, the LUT (G) as the LUT for the subpixel, the LUT (B) as the LUT for the subpixel B, and the LUT W) is used. The RGB gradation conversion circuit 332 in the RGB controller 33 has one LUT (R) 3321, LUT (G) 3322 and LUT (B) 3323 and three LUTs 3324, 3325, and 3326, respectively. The LV gradation conversion circuit 3412 in the LV controller 34 is provided with an LUT (W) 3412.

The gradation conversion characteristics of the LUT (R) 3321, the LUT (G) 3322 and the LUT (B) 3323 are realized by a gamma curve (Y = X ^? On the other hand, the tone conversion characteristics of the LUT (W) 3412 are such that the transmitted light of the two LCD panels is measured while changing the LV value with respect to the RGB values, and the final synthesis result is γ = 2.2 Output characteristics of the LV.

The RGB gradation conversion circuit 332 of the RGB controller 33 transmits the RGB image signals (R2, G2, B2) after the gradation conversion to the color balance controller 333. The RGB gradation conversion circuit 332 of the RGB controller 33 performs gradation conversion on each of the RGB image signals R1, G1 and B1 in the LUT (W) 3324, 3325 and 3326, RGB signals L _R , L _G and L _B are generated and transmitted to the color balance controller 333. The LV gradation conversion circuit 3412 of the LV controller 34 also transmits the gray image signal W2 after the gradation conversion to the edge hold circuit 3413. [

The edge hold circuit 3413 generates a gray image signal after the edge hold processing by applying the local edge hold processing to the gray image signal W2 after the gray level conversion. The edge hold circuit 3413 performs local enlargement processing of the edge region of the image. For two LCD panels, there is no problem when viewed from the front. However, when viewed from the diagonal direction, the position of the front and rear display images deviate from each other due to the panel thickness, resulting in a double image and a color shift there is a problem. In order to solve this problem, the edge hold circuit 3413 performs the viewing angle correction on the LV image and expands the edge, which is a portion with a large luminance difference, in the dark direction to enlarge the brightly displayed region.

6 is a diagram showing waveforms of the operation results of the local edge hold processing by the edge hold circuit 3413. As shown in Fig. 6 (a) is an input waveform for the edge hold circuit 3413, and Fig. 6 (b) is an output waveform for the input waveform in Fig. 6 (a). Each white circle in Fig. 6 corresponds to the luminance value of each virtual pixel in the gray image signal W2 after gradation change. On the other hand, the black circles in Fig. 6 (b) correspond to the luminance values of the edge-processed virtual pixels.

As shown in Fig. 6, the edge hold circuit 3413 replaces the luminance value of the previous or next virtual pixel with the luminance value of the edge pixel. By performing the correction to improve the brightness of the adjacent virtual pixels in this manner, the image is prevented from darkening when viewed from the diagonal of the image display apparatus 10. [

The edge hold circuit 3413 performs such local edge hold processing on the horizontal direction and the vertical direction of the grayscale-converted gray image signal W2, and generates a gray image signal after the edge hold processing To the LPF circuit 3414 shown in Fig.

The LPF circuit 3414 receives the gray image signal after the edge hold processing and applies the low pass filter to the gray image signal after the edge hold processing to generate the intermediate gray image signal W3. The image in which the viewing angle is corrected by performing the edge hold processing has the luminance value of each virtual pixel adjusted as described above but the luminance value after the adjustment is changed .

The LPF circuit 3414 transmits the intermediate gray image signal W3 to the color balance controller 333 of the RGB controller 33 and the resolution conversion processing section 342.

A color balance controller 333, FIG. 4 as such, RGB image signal after grayscale conversion (R2, G2, B2), the gradation converting RGB signals (L _R, L _G, L _B) and the intermediate gray image signal shown in ( G3 and B3 by performing color balance correction processing on the RGB image signals R2, G2 and B2 after the tone conversion.

More specifically, the color balance controller 333 calculates the luminance ratio by dividing each of the gradation-converted RGB signals (L _R , L _G , and L _B ) by the intermediate gray image signal (W 3) The output RGB image signals (R3, G3, B3) are generated by multiplying the converted RGB image signals (R2, G2, B2) by the luminance ratio.

(Equation 1)

For example, let us consider a case where RGB represents a pixel representing a color mixture (R> G> B) other than 0. As described above, the gray converter 3411 generates the gray image for the RGB image so as to be represented by the maximum value of the luminance values of the respective RGB sub-pixels of each pixel. Thus, the intermediate gray image signal W3 having a luminance value equal to that of R, which is the sub-pixel having the maximum luminance value, is generated.

When these RGB image signals (R2, G2, B2) and the intermediate gray image signal W3 after the gray level conversion are synthesized and transmitted by using the RGB panel 35 and the LV panel 36, The color balance is lost because the intermediate gray image signal W3 is larger than the luminance value of the gray image signal originally required for the G2 and B2 expressions for G2 and B2.

The luminance values of the LV images originally required to obtain the original RGB luminance of the RGB image signals after the color balance correction are converted into the luminance values of the three LUTs W (R, G, B) in the RGB gradation conversion circuit 332 Converted RGB signals (L _R , L _G , L _B ), which are generated by performing the gradation conversion on the image signals A, _B , In other words, in order to obtain the original luminance of G and B, it is necessary to change the luminance value in the LV image for each color of RGB. However, since one pixel of the LV panel is larger than each sub-pixel of the RGB panel, each pixel of the LV image can not be changed for each of the RGB colors. Therefore, the grayscale of the RGB panel side is adjusted to obtain a desired synthetic transmittance in all colors.

Therefore, it is considered to adjust the RGB panel side tone so that the combined transmittances of the RGB panel and the LV panel before and after the adjustment become the same, and derive the adjusted brightness value. For this purpose, for each gradation conversion RGB image signals (R2, G2, B2) after, L _R / W3, L _G / W3, L _B / W3 and the multiplication as a luminance ratio, that is, in the formula 1 R3, G3 , And B3, respectively. As a result, when R3, G3, and B3 are displayed on the RGB panel 35, W3 is displayed on the LV panel 36, and they are synthetically transmitted so that the color balance can be adjusted.

The color balance controller 333 transmits the output RGB image signals (R 3, G 3, B 3) generated as described above to the RGB panel 35.

The resolution conversion processing section 342 of the LV controller 34 receives the intermediate gray image signal W3 from the LPF circuit 3414 and converts each of the pixels arranged in the diagonal lattice and the pixels arranged in the lattice And generates an output gray image signal W4 based on the positional correspondence. In other words, the resolution conversion processing section 342 calculates the pixel correspondence relationship between the pixels constituting the pixels in the lattice arrangement corresponding to the first pixels 41 as described above through the calculation of the positional relationship and the generation of the output gray image signal W4 Into an output gray image signal W4 having a pixel configuration in which the pixels are arranged in a diagonal lattice corresponding to the second pixel 45 of the LV panel 36 do. First, the relationship between the pixel configuration of the intermediate gray image signal W3, that is, the pixel configuration of the virtual pixel and the pixel configuration of the second pixel 45 of the LV panel 36 is described, and then the pixel correspondence relationship calculation circuit 3421 , And output gray image brightness calculation circuit 3422 will be described.

FIG. 7 is an explanatory view of pixel coordinate values of the LV panel. FIG. 7 shows the relationship between the virtual pixel 44 of the intermediate gray image signal W3 and the second pixel 45 of the LV panel 36 arranged in a lattice. The virtual pixel 44 is conceptually formed by vertically and horizontally partitioned by a plurality of vertical boundary lines 44a and a horizontal boundary line 44b. 7, the virtual pixel 44 has a rectangular shape. However, since the vertical boundary line 44a and the horizontal boundary line 44b are conceptual only as described above, the virtual pixel 44 is actually a strict rectangle There is no need, and a shape close to it may be used.

3, the LV panel 36 has a larger shape than the RGB panel 35. In addition, 7, the active area 42 located inside the active boundary line 44c, that is, the lower right end in Fig. 7, is divided by the active border line 44c shown by the bold line in the actual RGB panel 35, And the output RGB image signals (R3, G3, B3) are displayed. 7, the vertical boundary line 44a and the horizontal boundary line 44b are indicated by two-dot chain lines in the region on the opposite side of the active region 42 from the active boundary line 44c, that is, the non-active region 43 . In the non-active area 43, the first pixel 41 is not actually provided in the RGB panel 35, but in the calculation of the positional correspondence to be described later, the virtual pixel 44 is present .

Among all the virtual pixels 44 located in the entire region including the non-active region 43, the virtual pixel 44A located at the upper leftmost position on the FIG. 7 is referred to as an origin pixel 44A. Further, when the virtual pixel 44 is i-th from the origin pixel 44A in the vertical direction and j-th from the origin pixel 44A in the horizontal direction, the virtual pixel 44 is located at the (i, j) that will be to represent the coordinates of the upper left corner of the virtual pixel 44 in (y _i, x _j). For example, the origin pixel 44A is located at (0, 0) and the coordinate value (y _o , x _o ) of the upper left O is (0, 0). 7 virtual pixel (44B) which is located on the right side of the origin pixel (44A) from the (0,1) located in the second, shown as the coordinate of the upper left is B (y _0, x _1). Furthermore, the virtual pixel 44 represented by 44C in FIG. 7 is located at the (5, 7) th coordinate, and the coordinate value of the upper left C is expressed as (y ₅ , x ₇ ).

Next, the second pixel 45 arranged in a diagonal lattice pattern is formed by dividing the second pixel 45 in the diagonal direction by a plurality of diagonal boundary lines 45a, which is conceptual in Fig. 7, the second pixel 45 is formed in a rhombic shape because it is divided by the diagonal border 45a. However, since the diagonal border 45a is conceptual in the above-described manner, the second pixel 45 Is not necessarily required to have an exact rhombic shape, but may be a shape close to the rhombic shape.

It is needless to say that the second pixel 45 is provided in an area corresponding to the active area 42 of the RGB panel 35. Since the LV panel 36 is larger than the RGB panel 35 as described above And an area corresponding to the inactive area 43 of the RGB panel 35 is provided.

The second pixel 45A located at the upper leftmost position in Fig. 7 is referred to as an origin pixel 45A. In the case where the second pixel 45 is the m-th pixel from the origin pixel 45A in the vertical direction and the n-th pixel from the origin pixel 45A in the horizontal direction, the second pixel 45 is located at the (m, , And the center coordinate value of the second pixel 45 is represented by (y ' _m , x' _n ).

Here, when the center coordinate values (y ' _m ) in the vertical direction of the plurality of second pixels 45 are the same, the plurality of second pixels 45 are assumed to be in the same row. Similarly, when the center coordinate values (x ' _n ) in the horizontal direction are the same, the plurality of second pixels 45 are assumed to be in the same row. For example, the origin pixel 45A is located at the (0, 0) -th place, and the coordinate value of the center D _A is represented by (y ' _o , x' _o ). 7, the second pixel 45B located at the right lower end of the origin pixel 45A is located at the (1, 1) -th position, and the coordinate value of the center D _B is represented as (y ₁ , x ₁ ). The origin pixel 45A and the second pixel 45B are located in different rows or different columns. 7, the second pixel 45C located at the lower side of the origin pixel 45A is located at the (2, 0) -th position, and the coordinate value of the center D _C is represented as (y ₂ , x ₂ ). The origin pixel 45A and the second pixel 45C are located in the same column in different rows. 7, the second pixel 45E located on the right side of the origin pixel 45A is located at the (0, 2) th position, and the coordinate value of the center D _E is represented as (y ₀ , x ₂ ). The origin pixel 45A and the second pixel 45E are located in the same row or another column. In Fig. 7, the row number m of the second pixel 45 and the column number n of the second pixel 45 are displayed at the right end and the lower end, respectively.

The second pixel 45 is counted as described above. For example, the second pixel 45 may be counted as shown in FIG. 7, for example, in a place where the odd number is one of the (0, 1) The second pixel 45 is not located.

FIG. 8 is a partially enlarged view of FIG. 7, which focuses on the second pixel 45L which is one second pixel 45. FIG. The operation principle of the pixel correspondence relationship calculation circuit 3421 will be described with reference to the drawings. In the figure, the second pixel 45L overlaps with a plurality of virtual pixels 44F, 44G, 44H, and 44K arranged in a lattice pattern. The center of the second pixel 45L is denoted by DL (y ' _m , x' _n ) in FIG. Each of the upper left corner of the virtual pixel (44F, 44G, 44H, 44K ) _{is, F (y i, x j} ), G (y i, x j +1), H (y i +1, x j), K (y _{i +1} , x _{j + 1} ). The luminance value of the pixel corresponding to the virtual pixel, the resolution converting processing unit 342, mid-gray image signal (W3) to the entered at each (44F, 44G, 44H, 44K ) is d _f, d _g, d _h, d _k .

The pixel correspondence relationship calculation circuit 3421 first calculates offset values (x ' _o , y' _o ) in the horizontal direction and the vertical direction by the following equation (2).

(Equation 2)

In the above equation, RGB_H_Size and RGB_V_Size are the horizontal and vertical resolutions of the RGB panel 35, and LV_H_Size and LV_V_Size are the resolutions of the LV panel 36 in the horizontal and vertical directions, respectively. RGB_H_Size is a value of, for example, 1920, and LV_H_Size is a value of, for example, 1771 or the like. In this case, x ' _o is close to 1.084.

Next, the pixel correspondence relationship calculation circuit 3421 obtains the center coordinates D _L (y ' _m , x' _n ) of the second pixel 45L by the following equation (3).

(Equation 3)

As described above, the equation 3 is obtained by multiplying the row number of the second pixel 45L, the column number m, and the column number by the resolution ratio, and then adding the coordinate value of the origin pixel 45A to obtain the center coordinates D _L (y ' _m , x ' _n ).

Furthermore, the pixel correspondence relationship calculation circuit 3421 separates each of y ' _m and x' _n calculated by the equation (3) into an integer part and a decimal part. The integer part of each of the y ' _m and x' _n is a part of the upper left part of the virtual pixel 44F positioned at the upper left of the virtual pixel 44F, which is an integer having the smallest coordinate value among the plurality of virtual pixels 44F, 44G, 44H, Corresponds to the coordinate (y _i x _j ) of the point F. And the following x _'n fractional part, that is the x' a value obtained by subtracting the x _j from _n a, y _'m fractional part of, that is, y' values obtained by subtracting the y _i from _m to b. In this way, it is determined by calculation whether the virtual pixel 44 in which the center D _L of the second pixel 45L is located is the virtual pixel 44F and the center D _L is on the virtual pixel 44F I ask.

In this manner, the pixel correspondence relationship calculation circuit 3421 calculates the positional correspondence relationship between the center position D _L of the second pixel 45L and the virtual pixel 44 corresponding to the center position D _L. The positional relationship is calculated based on the resolution ratio of the RGB panel 35 and the LV panel 36, as shown in Equation (3).

The output gray image brightness calculation circuit 3422 calculates the brightness value of each second pixel 45L of the output gray image signal W4 based on the position correspondence relationship calculated by the pixel correspondence relationship calculation circuit 3421, On the basis of the luminance value of the corresponding virtual pixel 44F in the positional correspondence relationship of the intermediate gray image signal W3. The luminance value of the second pixel 45L of the output gray image signal W4 is set to the corresponding virtual pixel 44F and the virtual pixel 44F in the positional correspondence relationship of the intermediate gray image signal W3, Is determined by calculating a weighted average of the luminance values of the respective virtual pixels 44 in accordance with the distance from the center position D _L of the second pixel 45L of the output gray image signal W4.

The luminance value D of the second pixel 45L is set so as to correspond to the corresponding virtual pixel 44F and the virtual pixels 44G and 44H adjacent to the right side and the lower side of the virtual pixel 44F, from the luminance value _(f d, d _g, d _h, d _k) of the virtual pixel (44K) which is located at the bottom right side of (44F) it is calculated from the equation below.

(Equation 4)

The output gray image brightness calculation circuit 3422 calculates the brightness value D with respect to all the second pixels 45 and outputs the result as the output gray image signal W4 to the LV panel 36 do.

Next, a more detailed configuration of the resolution conversion processing section 342 will be described with reference to Figs. 9 to 11. Fig. 9, 10, and 11 are signal processing block diagrams of the resolution conversion processing section 342, the pixel correspondence relationship calculation circuit 3421, and the output gray image brightness calculation circuit 3422, respectively.

The resolution conversion processing section 342 includes six line memories 60 for receiving the intermediate gray image signal W3. From the gray image brightness calculation section 341 shown in Fig. 4, the intermediate gray image signal W3 is transmitted in units of rows of the virtual pixels 44 as shown in Fig. In each of the line memories 60, the luminance value of the virtual pixel 44 for one row of the received intermediate gray image signal W3 is stored. When the luminance value of the new row of the intermediate gray image signal W3 is received, the first memory address calculating circuit 62 calculates the luminance value of the intermediate gray image signal W3 based on the value of the empty line memory 60 And allocates the line memory 60 corresponding to the used row. The allocation information of the line memory 60 is supplied as a selector signal to the selector 61a located at the previous stage of the line memory 60 and directly receiving the intermediate gray image signal W3. The selector 61a selects the line memory 60 based on the selector signal and stores the luminance value data of the line received by the intermediate gray image signal W3 in the selected line memory 60. [

A selector 61b is connected to the rear end of the line memory 60. The line memory 60 is connected to the pixel correspondence relationship calculating circuit 3421 and the output gray image brightness calculating circuit 3422 via the selector 61b have. As shown in Fig. 7, an arbitrary one row of the second pixel 45, which is a set having the same vertical coordinate in the center, i.e., the row number (m), is arranged in approximately two rows of the virtual pixel 44 There is. Therefore, basically, the luminance value corresponding to one row of the second pixel 45 may be selected so that the two line memories 60 can be simultaneously accessed by the latter selector 61b.

In this embodiment, however, three line memories 60 are provided so that three line memories 60 can be simultaneously accessed from the selector 61b at the rear stage to the pixel correspondence relationship calculating circuit 3421 and the output gray image brightness calculating circuit 3422, Respectively. This is because one gate line of the LV panel 36 is provided over two rows of the second pixel 45 as follows.

The allocation of the second pixels 45 arranged in a diagonal lattice pattern to each gate line of the LV panel 36 in this embodiment is shown in Fig. In Fig. 12, each gate line 47 is shown in a bold line. In the present embodiment, only the second pixel 45 having the row number m of 0 is assigned to the first gate line 47a, but the row number m is set to be the same for the second gate line 47b 1 and a second pixel 45 having a row number m of 2 are assigned to the second pixel 45. [ The second pixel 45 corresponding to the two kinds of row numbers having the row number m different by 1 in the second and subsequent gate lines 47b, 47c, 47d, 47e, 47f, Are assigned to the gate lines 47. [ Thus, each of the second and subsequent gate lines 47b, 47c, 47d, 47e, 47f, and 47g has a wavy shape.

Here, the output gray image signal W4 needs to be outputted from the LV controller 34 to the LV panel 36 in the unit of the gate line 47. Therefore, except for the first gate line 47a, the pixel correspondence relationship calculation circuit 3421 and the output gray image luminance calculation circuit 3422 refer to the consecutive three rows of the virtual pixel 44 at the same time, The luminance values of two rows of the pixel 45 whose row number m is different by 1 are simultaneously calculated to generate a signal corresponding to one gate line 47. [ Therefore, in the present embodiment, there are three connection lines between the rear stage selector 61b of the line memory 60 and the pixel correspondence relationship calculation circuit 3421 and the output gray image luminance calculation circuit 3422. [

10A shows an integer part of the center coordinate (x ' _n ) in the horizontal direction of the second pixel 45 corresponding to the column number (n) from the column number n of the pixel correspondence relationship calculation circuit 3421, That is, a circuit for calculating x _j and a fractional part, that is, a. The column number n stored in the register 71a and the integer RGB_H_Size / LV_H_Size stored in the memory 70a are multiplied by the multiplier 72a and the result is stored in the memory 70b The offset value (x ' _o ) is added by the adder 73a. As a result, Equation (3) is realized.

The output result of the adder 73a, that is, the center coordinate (x ' _n ) is input to the separator 74a and divided into the integer part and the decimal part, and these are stored in the register 71c and the register 71d, respectively.

Figure 10 (b), the integer portion of the pixel correspondence relation calculating circuit, since the line number m of the (3421), the second pixel 45, the coordinates (y _'m) in the vertical direction corresponding to the line number (m) , _I. E., Y _i , and the fractional part, b. The coordinates (y _'m) in, Figure 10 (a) described has the coordinates (x a' have the above formula 3 is realized by a constitution the same as _n),. The center coordinate (y ' _m ) is input to the separator 74b and divided into an integer part and a decimal part, which are stored in the register 71e and the register 71f, respectively.

10 (c) is a diagram showing an integer part x _j of x ' _n calculated by the block diagram shown in Figs. 10 (a) and 10 (b) and stored in the register 71c, It is that y _'m of the integer part from the y _i, also the center of the second pixel (45L) shown in FIG. 8 coordinate (D _L) are located virtual pixel (44F), the right side of the virtual pixel (44F), the lower and right lower end of a block diagram of a circuit for acquiring a virtual pixel (44G, 44H, 44K), and each brightness value _(f d, d _g, d _h, d _k). In Fig. 10 (c), the selector 61b located at the rear end of the line memory 60 and the first memory address arithmetic circuit 62 supplying the address signal to the line memory 60 are omitted And is directly read from the three line memories 60 selected by the selector 61b based on the integer part x _j of x ' _n stored in the register 71c.

In Fig. 10 (c), the luminance values corresponding to the jth column of the virtual pixel 44 are read from each of the three line memories 60 first. These three values are supplied to the selector 75. The selector 75 is supplied with a value i and a value i + 1, which are generated by the Y direction address control circuit 76, based on the integer part y _i of y ' _m as a selector signal, ( _Df , _dh) corresponding to the jth column of the i-th and (i + 1) -th rows of the virtual pixel 44 from the three values supplied from the line memory 60, And stores them in the registers 77a and 77c directly connected to the selector 75. [

Subsequently, the luminance values corresponding to the (j + 1) th column of the virtual pixel 44 are read from each of the three line memories 60. The selector 75 is still supplied with the value i and the value i + 1 and two values are supplied to the selector 75. From the three values supplied from the line memory 60, ) of the select value (d _g, d _k) corresponding to the i th and the i + 1-th row, j + 1 th column. At this time, the values d _f and d _h stored in the registers 77a and 77c are shifted to the registers 77b and 77d, which are further rear ends of the registers 77a and 77c, _g and d _k are stored in the registers 77a and 77c so that all the related luminance values d _f , d _g , d _h and d _k are stored in the registers 77b, 77a, 77d and 77c, respectively.

Fig. 11 is a block diagram corresponding to the process of calculating the luminance value by the equation (4) in the output gray image luminance calculation circuit 3422. Fig. The weight generation circuit 78 calculates the weight value a of the center coordinate x ' _n stored in the registers 71d and 71f in the block diagram shown in Figs. 10 (a) and 10 based on the decimal value (b) of the coordinates (y _'m), the weight for (2-b) × (2 -a), (2-b) × a, b × (2-a), b × a And the four multipliers 79, respectively. 8 corresponding to the second pixel 45L in Fig. 8, which are acquired in the registers 77b, 77a, 77d, and 77c in Fig. 10 (c) The luminance values d _f , d _g , d _h , and d _{k of the} virtual pixels 44 _F , 44 _G , 44 _H , and 44 _K are supplied. Each of the four multipliers 79 multiplies the corresponding weight value and the luminance value and supplies it to the adder 80. [ The adder 80 adds the four values supplied from the multipliers 79 to calculate the luminance value D of the second pixel 45L and stores the luminance value D in the register 81. [

In this way, the pixel correspondence relationship calculation circuit 3421 and the output gray image brightness calculation circuit 3422 are provided for each of the second pixels 45L arranged in a diagonal lattice with a corresponding virtual pixel 44F, 44G and 44K near the first pixel 44F are calculated and the luminance value D of the second pixel 45 is calculated from the luminance values of the virtual pixels 44F, 44G, 44H, and 44K have. In the above description, the luminance value of the second pixel 45L corresponding to the position is calculated for any arbitrary row number m and column number n. However, in actual processing, calculation of the luminance value Are successively performed from the gate line 47a located at the uppermost position in the vertical direction among the gate lines 47 shown in Fig. 12 in the downward direction. Also in the same gate line 47, the processing is sequentially performed from the second pixel 45 located at the leftmost side toward the right direction.

As described above, the pixel correspondence relationship calculation circuit 3421 and the output gray image luminance calculation circuit 3422 calculate the luminance value of all the second pixels 45 belonging to the gate line 47 with respect to one gate line 47 . This luminance value is stored in the line memory 63 located at the rear end shown in Fig. Four line memories 63 are provided at the rear ends of the pixel correspondence relationship calculating circuit 3421 and the output gray image brightness calculating circuit 3422 and the second memory address calculating circuit 65 is provided with The empty line memory 63 or the line memory 63 corresponding to the gate line 47 to which the luminance value has already been transmitted to the LV panel 36 is allocated. The allocation information of the line memory 63 is supplied as a selector signal to the selector 64a which is located at the front end of the line memory 63 and directly receives the luminance value of the second pixel 45. [ The selector 64a selects the line memory 63 based on the selector signal and stores the luminance value data of the second pixel 45 of the processing gate line 47 in the selected line memory 63 .

12, the two data lines 47a and 47b from the top correspond to the inactive area 43, and the virtual pixel 44 corresponding to the intermediate gray image signal W3 The luminance value of the second pixel 45 can not be calculated in this region because the luminance value does not exist. Therefore, these two data lines 47a and 47b are set to have the same value as the value of the gate line 47c after calculating the value of the third gate line 47c from the top. That is, when the luminance value of the second pixel 45 of the gate line 47c is calculated and output to the line memory 63, the same value is applied to the other two line memories 63, the data lines 47a and 47b, For example. Thus, three line memories 63 may be used for recording the value at the same time.

While the luminance values of the gate lines 47a, 47b and 47c stored as described above are respectively transmitted to the LV panel 36, the luminance value of the second pixel 45 of the next gate line 47d is calculated Therefore, a separate line memory 63 for storing this is required. For this reason, four line memories 63 are provided.

The luminance value data stored in the line memory 63 is stored as an output gray image signal W4 to the LV panel 36 via the selector 64b.

The RGB panel 35 receives and displays the output RGB image signals (R3, G3, B3). Further, the LV panel 36 receives and displays the output gray image signal W4.

Next, an image display method using the image display apparatus 10 will be described with reference to Figs. 1 to 12. Fig.

The present image display method is configured by superimposing a front side LCD panel in which pixels are arranged in a lattice pattern and a rear side LCD panel in which pixels are arranged in a diagonal lattice pattern and the backlight is reflected by the rear side LCD panel, And outputting an RGB image signal from the RGB image signal and supplying the RGB image signal to the front side LCD panel, each of the pixels arranged in a diagonal lattice pattern, And generates an output gray image signal in which pixels, which are gray scale image signals, are arranged in a diagonal lattice pattern on the basis of the positional correspondence relationship from the RGB image signals, To the panel.

The output gray image signal is generated by generating an intermediate gray image signal, which is the same pixel arrangement as the front side LCD panel, from the RGB image signal, the center position of the pixel arranged on the diagonal lattice of the rear side LCD panel, And calculating the positional correspondence of the pixels arranged in the lattice of the intermediate gray image signal corresponding to the center position.

The generation of the output gray image signal further includes calculating the luminance value of each pixel of the output gray image signal based on the luminance value of the corresponding pixel in the positional correspondence relationship of the intermediate gray image signal.

The image processing engine 21 in the image display apparatus main body 20 first generates an RGB image and transmits it to the LCD module 30. [ The I / F 31 in the LCD module 30 receives the RGB image generated by the image processing engine 21 and outputs the luminance value of each of the subpixels (R, G, B) (32).

The bit expansion circuit 32 generates an RGB image transmitted by the I / F 31 and transmits it to the LCD module 30. [ The I / F 31 in the LCD module 30 receives the RGB image generated by the image processing engine 21 and outputs the luminance value of each of the subpixels R, G, and B of each pixel to the bit expansion circuit 32).

The bit expanding circuit 32 receives the RGB image signals R, G and B transmitted by the I / F 31 and outputs the luminance values of the subpixels of the RGB image signals R, And the RGB image signals (R1, G1, B1) after bit expansion are generated. The bit expansion circuit 32 outputs the RGB image signals R1, G1 and B1 after the bit expansion to the delay circuit 331 of the RGB controller 33 and the gray image luminance calculation section 341 of the LV controller 34, To the gray converter 3411, in detail.

The gray converter 3411 receives the RGB image signals R1, G1, and B1 after bit expansion from the bit expansion circuit 32. [ The gray converter 3411 generates a gray image and transmits the luminance value to the LV gradation conversion circuit 3412 as an initial gray image signal W1 for each of the virtual pixels of the generated gray image.

The LV gradation conversion circuit 3412 receives the initial gray image signal W1 from the gray converter 3411 and performs gray level conversion on the initial gray image signal W1 to generate the gray image signal W2 after the gray level conversion, To the edge hold circuit 3413.

The edge hold circuit 3413 receives the grayscale-converted gray image signal W2 and applies a local edge-hold process to the grayscale-converted gray image signal W2 to generate a gray image signal after the edge-hold process . The edge hold circuit 3413 transmits the gray image signal after the edge hold processing to the LPF circuit 3414.

The LPF circuit 3414 receives the gray image signal after the edge hold processing and applies the low pass filter to generate the intermediate gray image signal W3. The LPF circuit 3414 transmits the intermediate gray image signal W3 to the color balance controller 333 of the RGB controller 33 and the resolution conversion processing section 342. [

The RGB gradation conversion circuit 332 of the RGB controller 33 receives the RGB image signals R1, G1 and B1 via the delay circuit 331 and performs gradation conversion to obtain the RGB image signals R2, B2. The RGB gradation conversion circuit 332 transmits the RGB image signals (R2, G2, B2) after the gradation conversion to the color balance controller 333. RGB grayscale conversion circuit 332 are also RGB picture signals (R1, G1, B1), LUT (W) (3324, 3325, 3326) by performing the grayscale conversion on each gradation conversion RGB signals (L _R, L _G for , L _B ), and transmits it to the color balance controller 333.

Receiving a color balance controller 333, RGB image after gradation conversion signals (R2, G2, B2), the gradation converting RGB signals (L _R, L _G, L _B) and the intermediate gray image signal (W3), and grayscale conversion The output RGB image signals R3, G3, and B3 are generated by performing color balance correction processing on the subsequent RGB image signals R2, G2, and B2. The color balance controller 333 transmits the output RGB image signals (R 3, G 3, B 3) to the RGB panel 35.

The resolution conversion processing section 342 of the LV controller 34 receives the intermediate gray image signal W3 from the LPF circuit 3414. [ After the pixel correspondence relation calculating circuit (3421) is the center coordinate D _L (y _'m, x' _n) for each second pixel (45L), it was calculated by the formula 2, formula 3, such as the y _'m , x ' _n are divided into an integer part and a decimal part.

The output gray image brightness calculation circuit 3422 calculates the brightness value D for each second pixel 45L by using the corresponding virtual pixel 44F and the virtual pixel 44F adjacent to the right and lower sides of the virtual pixel 44F (D _f , d _g , d _h , and d _k ) of the pixels 44K and 44K located at the right lower end of the pixel 44F. The output gray image brightness calculation circuit 3422 generates the output gray image signal W4 in this way and supplies the output gray image signal W4 to the LV panel 36 as the output gray image signal W4.

The RGB panel 35 receives and displays the output RGB image signals (R3, G3, B3). The LV panel 36 also receives and displays the output gray image signal W4.

Next, effects of the image display apparatus and the image display method will be described.

According to the above arrangement, the pixel correspondence relationship calculation circuit 3421 calculates the pixel correspondence relationship between the virtual pixel (i) and the virtual pixel (i) of the intermediate gray image signal W3, which has the same arrangement as the first pixel arranged in the lattice- The RGB panel 35 and the LV panel 36 are overlapped by calculating the positional correspondence relationship between the first pixel 44 and the second pixel 45 of the LV panel 36 by using Equations 2 and 3 as described above The first pixel 41 corresponding to the center position of each second pixel 45 of the LV panel 36 is obtained. The output gray image brightness calculation circuit 3422 determines the brightness value of the second pixel 45 based on the brightness value of the virtual pixel 44 corresponding to the center position of each second pixel 45 .

Thereby, when the human looking at the image display device 10 from the front, the backlight light is reflected by the second pixel 45 and the first pixel 45, which are related by the positional correspondence relationship between the LV panel 36 and the RGB panel 35 41 and the second pixel 45 and the first pixel 41, in which the luminance value of the second pixel 45 is determined based on the luminance value of the virtual pixel 44 corresponding to the first pixel 41, ) In this order. In other words, since the light reaching the human eye is synthesized and transmitted through the second pixel 45 and the first pixel 41, which correspond to each other properly and whose luminance values are appropriately set, Screen noise is not generated even when the LCD panel 36 is used.

The output gray image brightness calculation circuit 3422 compares the brightness values of the respective second pixels 45 of the LV panel 36 with the corresponding virtual pixels 44 in the positional correspondence relationship with the virtual pixels 44 By calculating the weighted average of the luminance values of the respective virtual pixels 44 in accordance with the distance from the center position D _L of the second pixel 45L. Therefore, each second pixel 45 is displayed by a luminance value very close to the corresponding virtual pixel 44 in the positional correspondence before the luminance value is converted by the resolution conversion processing unit 342. [ Therefore, even when the LCD panel 36 arranged in a diagonal lattice pattern is used, the image quality is not greatly hindered.

The gray image brightness calculation section 341 of the LV controller 34 also calculates the gray image brightness of the RGB pixels 35 from the RGB image signals R1, And the resolution conversion processing section 342 generates the gray image signal W3 based on the center position of the second pixel 45 arranged on the diagonal lattice of the LV panel 36 and the intermediate gray image And the position correspondence of the virtual pixels 44 arranged in a lattice of the signal W3 is calculated. The resolution conversion processing unit 342 converts the intermediate gray image signal W3 that is the same pixel arrangement as the first pixel 41 of the RGB panel 35 generated by the gray image brightness calculation unit 341 into the LV panel 36 into the output gray image signal W4 in which the pixels are arranged in a diagonal lattice pattern in correspondence with the second pixel 45. [ As described above, in the case where the processing in the resolution conversion processing section 342 is such that the processing result in the previous stage of the resolution conversion processing section 342, which corresponds to the gray image brightness calculation section 341 of this embodiment, No conversion processing is performed. Therefore, regardless of the processing of the previous stage, it is possible to perform appropriate conversion processing without being dependent on it, and the versatility is high.

As described with the equations (2) and (3), the positional relationship is calculated based on the resolution ratio of the RGB panel (35) and the LV panel (36). That is, since the position correspondence can be calculated by a simple calculation, it is possible to reduce the circuit scale and increase the processing speed.

<First Modification>

Next, a first modification of the image display apparatus 10 and the image display method shown in the above embodiment will be described. 13 is a block diagram of a circuit used when calculating the luminance value D of the second pixel 45L in the output gray image brightness calculating circuit of the first modification. The first modified example is different from the image display device 10 shown in the above-described embodiment in the circuit for calculating the luminance value D of the second pixel 45L in the output gray image luminance calculation circuit and the calculation method Is different.

In the first modification, the luminance value D of the second pixel 45L as shown in Fig. 8 is divided into a corresponding virtual pixel 44F and a virtual pixel 44F adjacent to the right and lower sides of the virtual pixel 44F It is calculated by a linear expression from the pixel (44G, 44H) and the luminance value _(f d, d _g, d _h, d _k) of the virtual pixel (44K) which is located at the bottom right side of the virtual pixel (44F).

(Equation 5)

That is, in the first modification, the luminance value of the second pixel 45 of the output gray image signal W4 is compared with the corresponding virtual pixel 44 in the positional correspondence relationship of the intermediate gray image signal W3, Is determined by calculating the maximum value of the luminance value of each virtual pixel 44 between the virtual pixels 44 in the vicinity of the pixel 44. [

According to the above-described configuration, it is needless to say that the same effect as that of the above-described embodiment does not occur in the screen noise.

The luminance value of the second pixel 45 of the output gray image signal W4 is set so as to correspond to the corresponding virtual pixel 44 in the positional correspondence relationship of the intermediate gray image signal W3, It is determined by calculating the maximum value of the luminance values of the respective virtual pixels 44 between the virtual pixels 44 in the vicinity of the pixel 44. This makes it possible to prevent the displayed image from becoming totally dark.

As shown in Fig. 13, a circuit for determining the maximum value of the four luminance values d _f , d _g , d _h , and d _k can be realized by one comparator 90. That is, the circuit configuration can be made smaller than in the above-described embodiment.

&Lt; Second Modified Example &

Next, a second modification of the image display apparatus 10 and the image display method shown in the above embodiment will be described. The second modified example is different from the image display device 10 shown in the above-described embodiment in the circuit for calculating the luminance value D of the second pixel 45L in the output gray image luminance calculation circuit and the calculation method different.

In the second modification, the luminance value of the second pixel 45L of the output gray image signal W4 as shown in Fig. 8 is converted into the luminance value of the corresponding virtual pixel 44F in accordance with the luminance values of the pixels.

According to the above-described configuration, it is needless to say that the same effect as that of the above-described embodiment does not occur in the screen noise.

In the second modification, it is possible to make the circuit configuration smaller than the above-described embodiment.

Further, the image display apparatus and the image display method of the present invention are not limited to the above-described embodiments and modifications described with reference to the drawings, and various modifications may be made in the technical scope thereof.

For example, in the above embodiment, the luminance value D of the second pixel 45L is set so that the luminance value D of the corresponding virtual pixel 44F and the luminance value D of the right- but to obtain from the virtual pixel (44G, 44H) and the virtual luminance value of the pixel virtual pixel (44K) which is located at the bottom right side of _{(44F) (d f, d} g, d h, d k), are not limited herein. For example, the center position D _L of the second pixel 45L is positioned at the upper left F (y _i , x _j ) of the corresponding lower pixel K (y _{i +1} , x _{j + 1} ) , It is determined from the luminance values of the virtual pixel 44F and the virtual pixels adjacent to the left and upper sides of the virtual pixel 44F and the upper left side of the virtual pixel 44, The virtual pixel 44 serving as a basis for calculating the luminance value may be changed in accordance with the position of the center position D _L in the pixel 44.

10, the offset value (x ' _o ) and the integer (RGB_H_Size / LV_H_Size) are stored in the memory, but they may be stored in the LUT.

Further, in the above-described embodiment and modified examples, the RGB controller 33 and the gray image brightness calculation section 341 are not limited to the above configuration. For example, the gray image brightness calculation section 341 may calculate the gray image brightness from the RGB image signal without changing the pixel configuration, that is, to the first pixel 41 of the RGB panel 35 Any of them may be used as long as they generate the intermediate gray image signal W3 in which the pixels are arranged in a lattice.

In addition, as long as the spirit of the present invention does not depart from the spirit of the present invention, it is possible to select the configurations listed in the above-described embodiment and modified examples, or appropriately change them to other configurations.

10: Image display device
30: LCD module
32: bit expansion circuit
33: RGB controller (first controller)
331: Delay circuit
332: RGB gradation conversion circuit
333: Color Balance Controller
34: LV controller (second controller)
341: Gray image brightness calculation unit
3411: Gray Converter
3412: LV gradation conversion circuit (gray gradation conversion circuit)
3413: Edge hold circuit
3414: LPF circuit
342: resolution conversion processing unit
3421: pixel correspondence relationship calculation circuit
3422: output gray image luminance calculation circuit
35: RGB panel (front side LCD panel)
36: LV panel (rear side LCD panel)
41: first pixel (pixel)
44: virtual pixel (pixel)
45: second pixel (pixel)
R1, G1, B1: RGB image signal after bit expansion (RGB image signal)
R2, G2, and B2: RGB image signals after gradation conversion
R3, G3, B3: Output RGB image signal
W1: initial gray image signal
W2: Gray image signal after gradation conversion
W3: Medium gray image signal
W4: Output gray image signal

Claims (14)

Side LCD panel in which pixels are arranged in a lattice pattern and a rear-side LCD panel in which pixels are arranged in a diagonal lattice pattern, and the backlight is transmitted in order of the rear-side LCD panel and the front-side LCD panel An image display apparatus for performing image display,
A first controller for generating an output RGB image signal from the RGB image signal and supplying the RGB image signal to the front side LCD panel,
And a second controller for generating, from the RGB image signal, an output gray image signal in which pixels, which are gray scale image signals, are arranged in a diagonal lattice pattern to supply the output gray image signal to the rear side LCD panel,
Wherein the second controller is configured to calculate a position correspondence relationship between each of the pixels arranged in a diagonal lattice form and each of the pixels arranged in a lattice form and generate the output gray image signal based on the position correspondence relationship And a resolution conversion processing unit,
The second controller includes a gray image brightness calculating unit for generating, from the RGB image signal, an intermediate gray image signal which is the same pixel arrangement as the front side LCD panel,
The resolution conversion processing unit calculates the positional correspondence relationship between the center position of the pixel arranged on the diagonal lattice of the rear side LCD panel and the pixel arranged on the lattice of the intermediate gray image signal corresponding to the center position And a pixel correspondence relationship calculation circuit.
delete The method of claim 1, wherein
And the resolution conversion processing unit includes an output gray image brightness calculating circuit for calculating a brightness value of each pixel of the output gray image signal based on a brightness value of a corresponding pixel in the positional correspondence relationship of the intermediate gray image signal FIG.
The method of claim 3, wherein
The output gray image brightness calculation circuit calculates the brightness value of the pixel of the output gray image signal between the corresponding pixel in the positional correspondence relationship of the intermediate gray image signal and the pixel near the pixel, By calculating a weighted average of the luminance values of the pixels by the distance from the center position of the pixel of the image signal.
The method of claim 3, wherein
Wherein the output gray image brightness calculation circuit calculates the brightness value of the pixel of the output gray image signal in such a manner that the brightness value of the pixel of the output gray image signal is different between the pixel corresponding to the position of the intermediate gray image signal and the pixel near the pixel, By calculating the maximum value of the luminance value.
The method of claim 3, wherein
Wherein the output gray image brightness calculation circuit determines the brightness value of the pixel of the output gray image signal to match the brightness value of the corresponding pixel in the positional correspondence relationship of the intermediate gray image signal.
7. A method according to any one of claims 3 to 6
The gray image brightness calculating section calculates,
A gray converter for generating an initial gray image signal which is a gray scale image signal from the RGB image signal,
A gray gradation conversion circuit for performing gray level conversion on the initial gray image signal to generate a gray image signal after gray level conversion,
An edge hold circuit for applying a local edge hold process to the gray-scale converted gray image signal to generate a gray image signal after the edge hold process,
And a low pass filter circuit for applying the low pass filter to the gray image signal after the edge hold processing to generate the intermediate gray image signal.
7. The method according to any one of claims 1 to 6,
The first controller,
An RGB gradation conversion circuit for generating an RGB image signal after gradation conversion of the RGB image signal,
And a color balance controller for generating the output RGB image signal by performing color balance correction processing on the RGB image signal after the gradation conversion.
7. The method according to any one of claims 1 to 6,
Wherein the position correspondence relationship is calculated based on a resolution ratio of the front side LCD panel and the rear side LCD panel.
7. The method according to any one of claims 1 to 6,
Wherein an area of the rear side LCD panel is larger than an area of the front side LCD panel.
7. The method according to any one of claims 1 to 6,
Wherein a pixel of the rear side LCD panel is larger than a pixel of the front side LCD panel.
Side LCD panel in which pixels are arranged in a lattice pattern and a rear-side LCD panel in which pixels are arranged in a diagonal lattice pattern, and the backlight is transmitted in order of the rear-side LCD panel and the front-side LCD panel An image display method executed by an image display apparatus performing image display,
Generates an output RGB image signal from the RGB image signal, supplies it to the front side LCD panel,
Calculating a position correspondence relationship between each of the pixels arranged in a diagonal lattice pattern and each of the pixels arranged in a lattice, calculating, from the RGB image signal, Generates an output gray image signal arranged in a diagonal lattice pattern and supplies it to the rear side LCD panel,
The generation of the output gray image signal may be performed,
Generating an intermediate gray image signal which is the same pixel arrangement as the front side LCD panel from the RGB image signal,
An image display method comprising calculating the positional correspondence relationship between a center position of a pixel arranged on a diagonal lattice of the rear side LCD panel and a pixel arranged in a lattice of the intermediate gray image signal corresponding to the center position .
delete The method of claim 12, wherein
Wherein the generation of the output gray image signal includes calculating the luminance value of each pixel of the output gray image signal based on the luminance value of the corresponding pixel in the positional correspondence relationship of the intermediate gray image signal .

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