KR101973731B1 - 버퍼 충만도에 기초한 캐시에 대한 프리페치 - Google Patents
버퍼 충만도에 기초한 캐시에 대한 프리페치 Download PDFInfo
- Publication number
- KR101973731B1 KR101973731B1 KR1020157014676A KR20157014676A KR101973731B1 KR 101973731 B1 KR101973731 B1 KR 101973731B1 KR 1020157014676 A KR1020157014676 A KR 1020157014676A KR 20157014676 A KR20157014676 A KR 20157014676A KR 101973731 B1 KR101973731 B1 KR 101973731B1
- Authority
- KR
- South Korea
- Prior art keywords
- cache
- slots
- request
- prefetch
- requests
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0893—Caches characterised by their organisation or structure
- G06F12/0897—Caches characterised by their organisation or structure with two or more cache hierarchy levels
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/669,502 US8909866B2 (en) | 2012-11-06 | 2012-11-06 | Prefetching to a cache based on buffer fullness |
| US13/669,502 | 2012-11-06 | ||
| PCT/US2013/068433 WO2014074489A1 (en) | 2012-11-06 | 2013-11-05 | Prefetching to a cache based on buffer fullness |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20150082457A KR20150082457A (ko) | 2015-07-15 |
| KR101973731B1 true KR101973731B1 (ko) | 2019-04-29 |
Family
ID=49627073
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020157014676A Active KR101973731B1 (ko) | 2012-11-06 | 2013-11-05 | 버퍼 충만도에 기초한 캐시에 대한 프리페치 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US8909866B2 (enExample) |
| EP (1) | EP2917840B1 (enExample) |
| JP (1) | JP6105742B2 (enExample) |
| KR (1) | KR101973731B1 (enExample) |
| CN (1) | CN104769560B (enExample) |
| IN (1) | IN2015DN03878A (enExample) |
| WO (1) | WO2014074489A1 (enExample) |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9749414B2 (en) * | 2013-08-29 | 2017-08-29 | International Business Machines Corporation | Storing low retention priority data in a dispersed storage network |
| US9811467B2 (en) * | 2014-02-03 | 2017-11-07 | Cavium, Inc. | Method and an apparatus for pre-fetching and processing work for procesor cores in a network processor |
| US9959506B1 (en) * | 2014-06-17 | 2018-05-01 | Amazon Technologies, Inc. | Predictive content retrieval using device movements |
| US9558127B2 (en) * | 2014-09-09 | 2017-01-31 | Intel Corporation | Instruction and logic for a cache prefetcher and dataless fill buffer |
| RU2018118175A (ru) * | 2015-10-22 | 2019-11-25 | Интервет Интернэшнл Б.В. | Вакцина для защиты mda-позитивного животного от расстройства, возникающего в результате инфекции, вызванной lawsonia intracellularis |
| US9934149B2 (en) | 2016-03-31 | 2018-04-03 | Qualcomm Incorporated | Prefetch mechanism for servicing demand miss |
| US10509732B2 (en) * | 2016-04-27 | 2019-12-17 | Advanced Micro Devices, Inc. | Selecting cache aging policy for prefetches based on cache test regions |
| US10073785B2 (en) * | 2016-06-13 | 2018-09-11 | Advanced Micro Devices, Inc. | Up/down prefetcher |
| US10353819B2 (en) * | 2016-06-24 | 2019-07-16 | Qualcomm Incorporated | Next line prefetchers employing initial high prefetch prediction confidence states for throttling next line prefetches in a processor-based system |
| CN106487711B (zh) * | 2016-10-13 | 2020-02-21 | 福建星海通信科技有限公司 | 一种缓存动态分配的方法以及系统 |
| CN108446240A (zh) * | 2016-12-12 | 2018-08-24 | 中国航空工业集团公司西安航空计算技术研究所 | 基于缓存单元id的存储管理电路 |
| US10776043B2 (en) * | 2018-08-31 | 2020-09-15 | Arm Limited | Storage circuitry request tracking |
| CN112997162B (zh) * | 2018-11-20 | 2025-10-28 | 华为技术有限公司 | 一种删除内存中索引项的方法、装置 |
| WO2021066687A1 (en) * | 2019-10-02 | 2021-04-08 | Telefonaktiebolaget Lm Ericsson (Publ) | Entities, system and methods performed therein for handling memory operations of an application in a computer environment |
| US20210182214A1 (en) * | 2019-12-17 | 2021-06-17 | Advanced Micro Devices, Inc. | Prefetch level demotion |
| WO2021118645A1 (en) * | 2020-05-30 | 2021-06-17 | Futurewei Technologies, Inc. | Systems and methods for adaptive hybrid hardware pre-fetch |
| JP2022107377A (ja) * | 2021-01-08 | 2022-07-21 | 富士通株式会社 | 情報処理装置、コンパイル方法、及びコンパイルプログラム |
| US20240393959A1 (en) * | 2021-09-10 | 2024-11-28 | Purdue Research Foundation | Memory management method for pseudo-functional differentiable programming |
| CN117992364A (zh) * | 2024-01-31 | 2024-05-07 | 鼎道智芯(上海)半导体有限公司 | 数据预取方法和装置 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060224860A1 (en) | 2005-04-01 | 2006-10-05 | Stmicroelectronics, Inc. | Apparatus and method for supporting execution of prefetch threads |
| US20090037663A1 (en) | 2006-02-28 | 2009-02-05 | Fujitsu Limited | Processor equipped with a pre-fetch function and pre-fetch control method |
| US20100306477A1 (en) | 2009-05-28 | 2010-12-02 | Luttrell Mark A | Store prefetching via store queue lookahead |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6065110A (en) * | 1998-02-09 | 2000-05-16 | International Business Machines Corporation | Method and apparatus for loading an instruction buffer of a processor capable of out-of-order instruction issue |
| US6212603B1 (en) | 1998-04-09 | 2001-04-03 | Institute For The Development Of Emerging Architectures, L.L.C. | Processor with apparatus for tracking prefetch and demand fetch instructions serviced by cache memory |
| US6029294A (en) * | 1998-07-23 | 2000-02-29 | Saringer Research Inc. | Mechanism for generating wave motion |
| JP3512678B2 (ja) * | 1999-05-27 | 2004-03-31 | 富士通株式会社 | キャッシュメモリ制御装置および計算機システム |
| US6571318B1 (en) | 2001-03-02 | 2003-05-27 | Advanced Micro Devices, Inc. | Stride based prefetcher with confidence counter and dynamic prefetch-ahead mechanism |
| US20040103251A1 (en) * | 2002-11-26 | 2004-05-27 | Mitchell Alsup | Microprocessor including a first level cache and a second level cache having different cache line sizes |
| US20060143401A1 (en) * | 2004-12-27 | 2006-06-29 | Jacob Doweck | Method and apparatus for prefetching based on cache fill buffer hits |
| US7908236B2 (en) * | 2006-07-20 | 2011-03-15 | International Business Machines Corporation | Using multiple data structures to manage data in cache |
| US7484042B2 (en) * | 2006-08-18 | 2009-01-27 | International Business Machines Corporation | Data processing system and method for predictively selecting a scope of a prefetch operation |
| JP5444889B2 (ja) * | 2009-06-30 | 2014-03-19 | 富士通株式会社 | 演算処理装置および演算処理装置の制御方法 |
| CN101634970B (zh) * | 2009-08-26 | 2011-09-07 | 成都市华为赛门铁克科技有限公司 | 预取长度调整方法、装置和存储系统 |
| US8856451B2 (en) | 2010-08-26 | 2014-10-07 | Advanced Micro Devices, Inc. | Method and apparatus for adapting aggressiveness of a pre-fetcher |
| US8880847B2 (en) * | 2010-09-28 | 2014-11-04 | Texas Instruments Incorporated | Multistream prefetch buffer |
-
2012
- 2012-11-06 US US13/669,502 patent/US8909866B2/en active Active
-
2013
- 2013-11-05 KR KR1020157014676A patent/KR101973731B1/ko active Active
- 2013-11-05 EP EP13795065.5A patent/EP2917840B1/en active Active
- 2013-11-05 CN CN201380058101.8A patent/CN104769560B/zh active Active
- 2013-11-05 JP JP2015541846A patent/JP6105742B2/ja active Active
- 2013-11-05 WO PCT/US2013/068433 patent/WO2014074489A1/en not_active Ceased
- 2013-11-05 IN IN3878DEN2015 patent/IN2015DN03878A/en unknown
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060224860A1 (en) | 2005-04-01 | 2006-10-05 | Stmicroelectronics, Inc. | Apparatus and method for supporting execution of prefetch threads |
| US20090037663A1 (en) | 2006-02-28 | 2009-02-05 | Fujitsu Limited | Processor equipped with a pre-fetch function and pre-fetch control method |
| US20100306477A1 (en) | 2009-05-28 | 2010-12-02 | Luttrell Mark A | Store prefetching via store queue lookahead |
Also Published As
| Publication number | Publication date |
|---|---|
| EP2917840B1 (en) | 2018-12-26 |
| JP6105742B2 (ja) | 2017-03-29 |
| US8909866B2 (en) | 2014-12-09 |
| EP2917840A1 (en) | 2015-09-16 |
| IN2015DN03878A (enExample) | 2015-10-02 |
| WO2014074489A1 (en) | 2014-05-15 |
| CN104769560B (zh) | 2017-04-12 |
| JP2016509272A (ja) | 2016-03-24 |
| CN104769560A (zh) | 2015-07-08 |
| KR20150082457A (ko) | 2015-07-15 |
| US20140129772A1 (en) | 2014-05-08 |
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