KR101922681B1 - 셰이더 코어에서 셰이더 자원 할당을 위한 정책 - Google Patents

셰이더 코어에서 셰이더 자원 할당을 위한 정책 Download PDF

Info

Publication number
KR101922681B1
KR101922681B1 KR1020147017104A KR20147017104A KR101922681B1 KR 101922681 B1 KR101922681 B1 KR 101922681B1 KR 1020147017104 A KR1020147017104 A KR 1020147017104A KR 20147017104 A KR20147017104 A KR 20147017104A KR 101922681 B1 KR101922681 B1 KR 101922681B1
Authority
KR
South Korea
Prior art keywords
pipeline
queue
calculation
pipeline queue
priority
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
KR1020147017104A
Other languages
English (en)
Korean (ko)
Other versions
KR20140101384A (ko
Inventor
로버트 스콧 하토그
마크 레더
마이클 맨토
렉스 매커리
세바스티앙 누스바움
필립 제이. 로저스
랄프 클레이 테일러
토마스 워렐
Original Assignee
어드밴스드 마이크로 디바이시즈, 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 어드밴스드 마이크로 디바이시즈, 인코포레이티드 filed Critical 어드밴스드 마이크로 디바이시즈, 인코포레이티드
Publication of KR20140101384A publication Critical patent/KR20140101384A/ko
Application granted granted Critical
Publication of KR101922681B1 publication Critical patent/KR101922681B1/ko
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3888—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple threads [SIMT] in parallel
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Image Processing (AREA)
  • Image Generation (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
KR1020147017104A 2011-12-14 2012-12-14 셰이더 코어에서 셰이더 자원 할당을 위한 정책 Active KR101922681B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/325,286 US20130155077A1 (en) 2011-12-14 2011-12-14 Policies for Shader Resource Allocation in a Shader Core
US13/325,286 2011-12-14
PCT/US2012/069836 WO2013090773A2 (en) 2011-12-14 2012-12-14 Policies for shader resource allocation in a shader core

Publications (2)

Publication Number Publication Date
KR20140101384A KR20140101384A (ko) 2014-08-19
KR101922681B1 true KR101922681B1 (ko) 2018-11-27

Family

ID=47754935

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020147017104A Active KR101922681B1 (ko) 2011-12-14 2012-12-14 셰이더 코어에서 셰이더 자원 할당을 위한 정책

Country Status (6)

Country Link
US (2) US20130155077A1 (enExample)
EP (1) EP2791795B1 (enExample)
JP (1) JP6189858B2 (enExample)
KR (1) KR101922681B1 (enExample)
CN (1) CN103999051B (enExample)
WO (1) WO2013090773A2 (enExample)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8578129B2 (en) * 2011-12-14 2013-11-05 Advanced Micro Devices, Inc. Infrastructure support for accelerated processing device memory paging without operating system integration
JP5238876B2 (ja) * 2011-12-27 2013-07-17 株式会社東芝 情報処理装置及び情報処理方法
US8977997B2 (en) * 2013-03-15 2015-03-10 Mentor Graphics Corp. Hardware simulation controller, system and method for functional verification
GB2524063B (en) 2014-03-13 2020-07-01 Advanced Risc Mach Ltd Data processing apparatus for executing an access instruction for N threads
US9766954B2 (en) * 2014-09-08 2017-09-19 Microsoft Technology Licensing, Llc Configuring resources used by a graphics processing unit
US9779535B2 (en) 2014-03-19 2017-10-03 Microsoft Technology Licensing, Llc Configuring resources used by a graphics processing unit
US20160260246A1 (en) * 2015-03-02 2016-09-08 Advanced Micro Devices, Inc. Providing asynchronous display shader functionality on a shared shader core
US9652817B2 (en) * 2015-03-12 2017-05-16 Samsung Electronics Co., Ltd. Automated compute kernel fusion, resizing, and interleave
CN105446939B (zh) * 2015-12-04 2019-02-26 上海兆芯集成电路有限公司 由装置端推核心入队列的装置
US10210593B2 (en) * 2016-01-28 2019-02-19 Qualcomm Incorporated Adaptive context switching
US20180109469A1 (en) * 2016-10-17 2018-04-19 International Business Machines Corporation Systems and methods for controlling process priority for efficient resource allocation
US10026145B2 (en) * 2016-12-13 2018-07-17 Qualcomm Incorporated Resource sharing on shader processor of GPU
US10147159B2 (en) 2017-04-07 2018-12-04 Microsoft Technology Licensing, Llc Ink render using high priority queues
US10282812B2 (en) * 2017-04-09 2019-05-07 Intel Corporation Page faulting and selective preemption
US20180307533A1 (en) * 2017-04-21 2018-10-25 Intel Corporation Faciltating multi-level microcontroller scheduling for efficient computing microarchitecture
GB2563588B (en) 2017-06-16 2019-06-26 Imagination Tech Ltd Scheduling tasks
US10558418B2 (en) * 2017-07-27 2020-02-11 Advanced Micro Devices, Inc. Monitor support on accelerated processing device
CN109697115B (zh) * 2017-10-20 2023-06-06 伊姆西Ip控股有限责任公司 用于调度应用的方法、装置以及计算机可读介质
US10796472B2 (en) * 2018-06-30 2020-10-06 Intel Corporation Method and apparatus for simultaneously executing multiple contexts on a graphics engine
US11593311B2 (en) * 2019-09-24 2023-02-28 Ati Technologies Ulc Compression system with longest match processing for generating compressed data
US11210757B2 (en) * 2019-12-13 2021-12-28 Advanced Micro Devices, Inc. GPU packet aggregation system
US11403729B2 (en) 2020-02-28 2022-08-02 Advanced Micro Devices, Inc. Dynamic transparent reconfiguration of a multi-tenant graphics processing unit
US12033275B2 (en) * 2021-09-29 2024-07-09 Advanced Micro Devices, Inc. System and methods for efficient execution of a collaborative task in a shader system
US11941723B2 (en) 2021-12-29 2024-03-26 Advanced Micro Devices, Inc. Dynamic dispatch for workgroup distribution
US11941742B2 (en) 2022-06-23 2024-03-26 Apple Inc. Tiled processor communication fabric
US20240419482A1 (en) * 2023-06-16 2024-12-19 Advanced Micro Devices, Inc. GPU Circuit Self-Context Save During Context Unmap
US20250110776A1 (en) * 2023-09-29 2025-04-03 Advanced Micro Devices, Inc. Hardware queue priority mechanism
US20250217195A1 (en) * 2023-12-30 2025-07-03 Advanced Micro Devices, Inc. Local launch in workgroup processors
CN119127314B (zh) * 2024-11-08 2025-03-04 湖南进芯电子科技有限公司 一种数字信号处理器的指令执行方法及数字信号处理器

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6781956B1 (en) 1999-09-17 2004-08-24 Cisco Technology, Inc. System and method for prioritizing packetized data from a distributed control environment for transmission through a high bandwidth link
US20060085600A1 (en) 2004-10-20 2006-04-20 Takanori Miyashita Cache memory system
US20110115802A1 (en) * 2009-09-03 2011-05-19 Michael Mantor Processing Unit that Enables Asynchronous Task Dispatch
US20110154346A1 (en) * 2009-12-23 2011-06-23 Jula Alin N Task scheduler for cooperative tasks and threads for multiprocessors and multicore systems

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4953081A (en) * 1988-12-21 1990-08-28 International Business Machines Corporation Least recently used arbiter with programmable high priority mode and performance monitor
US5371887A (en) * 1989-09-05 1994-12-06 Matsushita Electric Industrial Co., Ltd. Time-shared multitask execution device
JPH0535509A (ja) * 1991-07-29 1993-02-12 Nec Corp 階層構造キユーのチエーン破壊ガード方式
US5884077A (en) * 1994-08-31 1999-03-16 Canon Kabushiki Kaisha Information processing system and method in which computer with high load borrows processor of computer with low load to execute process
US6055579A (en) * 1997-11-17 2000-04-25 Silicon Graphics, Inc. Distributed control and synchronization of multiple data processors using flexible command queues
US7234144B2 (en) * 2002-01-04 2007-06-19 Microsoft Corporation Methods and system for managing computational resources of a coprocessor in a computing system
US7673304B2 (en) * 2003-02-18 2010-03-02 Microsoft Corporation Multithreaded kernel for graphics processing unit
US7421694B2 (en) * 2003-02-18 2008-09-02 Microsoft Corporation Systems and methods for enhancing performance of a coprocessor
US7337443B2 (en) * 2003-06-30 2008-02-26 Microsoft Corporation Method and apparatus for processing program threads
US7830389B2 (en) * 2006-10-03 2010-11-09 Honeywell International Inc. Dual processor accelerated graphics rendering
US8085272B1 (en) * 2006-11-03 2011-12-27 Nvidia Corporation Method and system for improving data coherency in a parallel rendering system
US20090160867A1 (en) * 2007-12-19 2009-06-25 Advance Micro Devices, Inc. Autonomous Context Scheduler For Graphics Processing Units
DE102008007723A1 (de) 2008-02-06 2009-08-20 Osram Gesellschaft mit beschränkter Haftung Beleuchtungsmodul, Leuchte und Verfahren zur Beleuchtung
US8368701B2 (en) * 2008-11-06 2013-02-05 Via Technologies, Inc. Metaprocessor for GPU control and synchronization in a multiprocessor environment
WO2011053891A2 (en) 2009-10-31 2011-05-05 Rutgers, The State University Of New Jersey Virtual flow pipelining processing architecture

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6781956B1 (en) 1999-09-17 2004-08-24 Cisco Technology, Inc. System and method for prioritizing packetized data from a distributed control environment for transmission through a high bandwidth link
US20060085600A1 (en) 2004-10-20 2006-04-20 Takanori Miyashita Cache memory system
US20110115802A1 (en) * 2009-09-03 2011-05-19 Michael Mantor Processing Unit that Enables Asynchronous Task Dispatch
US20110154346A1 (en) * 2009-12-23 2011-06-23 Jula Alin N Task scheduler for cooperative tasks and threads for multiprocessors and multicore systems

Also Published As

Publication number Publication date
JP2015502618A (ja) 2015-01-22
US20130155077A1 (en) 2013-06-20
JP6189858B2 (ja) 2017-08-30
WO2013090773A2 (en) 2013-06-20
WO2013090773A3 (en) 2013-08-08
CN103999051A (zh) 2014-08-20
EP2791795B1 (en) 2018-09-05
CN103999051B (zh) 2018-07-31
EP2791795A2 (en) 2014-10-22
KR20140101384A (ko) 2014-08-19
US20180321946A1 (en) 2018-11-08
US10579388B2 (en) 2020-03-03

Similar Documents

Publication Publication Date Title
KR101922681B1 (ko) 셰이더 코어에서 셰이더 자원 할당을 위한 정책
EP2652615B1 (en) Graphics compute process scheduling
US8963933B2 (en) Method for urgency-based preemption of a process
EP2652614B1 (en) Graphics processing dispatch from user mode
US20120229481A1 (en) Accessibility of graphics processing compute resources
US20120179851A1 (en) Computer System Interrupt Handling
US10242420B2 (en) Preemptive context switching of processes on an accelerated processing device (APD) based on time quanta
US20120180072A1 (en) Optimizing Communication of System Call Requests
US9256465B2 (en) Process device context switching
US8803891B2 (en) Method for preempting graphics tasks to accommodate compute tasks in an accelerated processing device (APD)
US20130141447A1 (en) Method and Apparatus for Accommodating Multiple, Concurrent Work Inputs
US20120198458A1 (en) Methods and Systems for Synchronous Operation of a Processing Device
WO2012082777A1 (en) Managed task scheduling on an accelerated processing device (apd)
US20130135327A1 (en) Saving and Restoring Non-Shader State Using a Command Processor
US9329893B2 (en) Method for resuming an APD wavefront in which a subset of elements have faulted
US20130141446A1 (en) Method and Apparatus for Servicing Page Fault Exceptions
US20130155079A1 (en) Saving and Restoring Shader Context State
WO2013090605A2 (en) Saving and restoring shader context state and resuming a faulted apd wavefront
US20120194528A1 (en) Method and System for Context Switching

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

A302 Request for accelerated examination
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0302 Request for accelerated examination

St.27 status event code: A-1-2-D10-D17-exm-PA0302

St.27 status event code: A-1-2-D10-D16-exm-PA0302

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U12-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

U11 Full renewal or maintenance fee paid

Free format text: ST27 STATUS EVENT CODE: A-4-4-U10-U11-OTH-PR1001 (AS PROVIDED BY THE NATIONAL OFFICE)

Year of fee payment: 8