KR101901525B1 - Multi-mode system integration laboratory apparatus and method for avionics system with hierarchical architecture - Google Patents

Abstract

The present invention relates to a multi-mode integrated test apparatus for an avionics system designed with a hierarchical structure, and a method thereof. According to an embodiment of the present invention, the multi-mode integrated test apparatus for an avionics system designed with a hierarchical structure comprises: a plurality of host PCs for performing a multi-mode verification test on each test target equipment for an avionics system connected to each bus with a hierarchical structure; a model unit for realizing and managing model SW corresponding to each test target equipment; and a multi-mode verification test formation unit for forming a multi-mode verification test environment through a combination of actual equipment and the model SW by connecting the test target equipment or the model unit to each of the host PCs under the control of each of the host PCs.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multimode integrated test apparatus and a method thereof,

The present invention relates to a multi-mode integrated test apparatus and method for an avionics system designed in a hierarchical structure, and more particularly, to a multi-mode integrated test apparatus and method for a multi- The present invention relates to a multimode integrated test apparatus and method for a hierarchical avionics system for providing an integrated test environment capable of performing independent or integrated verification for an avionics system.

Recently, various electronic equipments are increasingly loaded on aircraft. Accordingly, it is emphasized that tests for ensuring reliability of software embedded in electronic equipment are also important.

Generally, the software performance test embedded in the aircraft's electronic equipment is performed by verifying the unit under test (UUT) using input and output signals to and from other equipment.

To this end, a test bench is constructed to simulate the signals of other electronic equipment interlocked with the test target equipment, provide input signals to the test target equipment, and confirm the reaction output signals of the test target equipment. These test devices can be extended to the System Integration Laboratory (SIL), which can be used to test a plurality of test equipment in an aircraft at the same time, and can be used to verify avionics system design. In addition, the integrated test system is composed of connecting the actual equipment mounted on the aircraft in the same way as the aircraft, and in order to perform various step-by-step verification tests, a software model simulating actual mounted equipment is developed together to provide functions such as failure simulation.

On the other hand, the avionics system can be designed as an interworking structure between various on-board devices using data buses such as MIL-STD-1553B, ARINC 653, and AFDX.

In particular, avionics systems use multiple remote terminals (RTs), such as MIL-STD-1553B, when using multiple buses consisting of a bus controller (BC) and a remote terminal (RT) And a bus controller (BC) for controlling the bus controller (BC). 1 is a view showing an example of an aviation electronic system using MIL-STD-1553B. The aeronautical electronic system of FIG. 1 shows a case in which the bus controller (BC) of the lower bus is designed as a four-level hierarchical architecture composed of the remote terminals (RT) of the upper bus. For example, the bus controller (B) of the bus B, which is the lower bus, is composed of the remote terminal (RT) of the bus A which is the upper bus.

In order to carry out the systematic performance verification, it is necessary to carry out a step-by-step verification procedure which is performed by the individual verification of each subsystem from the hierarchical structure and the integration verification between the multiple subsystems and further the integration verification of the whole system.

Thus, it takes much time and effort to perform the step-by-step verification procedure for the avionics system sequentially. Conversely, if all the verification tests are simultaneously performed to shorten the test time, it is inefficient in terms of cost since an integrated testing device must be separately constructed for each verification test.

Therefore, in order to sequentially perform the step-by-step verification of the avionics system, the time and cost required for the verification procedure can be remarkably reduced through the multi-mode integrated testing apparatus capable of performing individual or integrated verification tests between each subsystem or multiple subsystems simultaneously There is a need to propose a way to reduce this.

Korean Patent Publication No. 10-2014-000233 Korean Registered Patent No. 10-1016812 (registered on February 15, 2011)

An object of the present invention is to provide a hierarchical structure for providing an integrated test environment capable of simultaneously performing individual or integrated verification of equipment connected to each bus by forming a plurality of modes for verification test through a combination of an actual equipment or a model SW And to provide a multimode integrated test apparatus and method therefor.

The multi-mode integrated test apparatus for avionics system designed in a hierarchical structure according to an embodiment of the present invention includes a plurality of multi-mode test apparatuses for performing multi- Host PC; A model unit for implementing and managing a model SW corresponding to each of the test target equipments; And a multi-mode verification test forming unit for forming a multi-mode verification test environment through a combination between the test target equipment or the actual equipment according to the connection of the model unit and the model SW to each of the host PCs under the control of each of the host PCs, Wherein each of the devices under test is a bus controller or a remote terminal that is hierarchically connected to each bus, and the hierarchical structure is such that a bus controller of a lower bus is connected to a remote Terminal.

Each of the host PCs can simultaneously perform an individual verification test or an integrated verification test included in the multi-mode verification test.

Each of the host PCs performs a continuous mode verification that concurrently performs an individual verification test on some buses in a specific mode and then simultaneously performs an integrated verification on the same bus and an existing verification test on the remaining buses through mode conversion Can be performed.

The model unit may execute a model SW corresponding to each of the test target equipments and simulate input / output signals of the respective test target equipments.

According to an embodiment of the present invention, an external communication unit may be further included for converting the input and output signals simulated by the model unit into a communicable state for each of the test target equipments.

The multi-mode verification test forming unit may include a switching element at an intersection where each of the host PCs is connected to the test target equipment or the model unit.

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The type of mode formed by the multi-mode verification test forming unit may be determined through a combination of the actual equipment of the bus controller equipment and the model SW.

Each of the host PCs can perform a verification test according to the combination of the actual equipment of the remote terminal and the model SW according to the determined mode.

Wherein the multimode verification test forming unit connects the first host PC to the actual equipment of the first bus controller and performs the second test on the second bus controller located on the upper or lower bus of the first bus controller, The first host PC can be connected to the model SW of the bus controller.

Wherein the multimode verification test forming unit connects a first host PC to an actual equipment of the plurality of first bus controllers at the time of integrated verification of the plurality of first bus controllers, The first host PC can be connected to the model SW of the second bus controller located on the lower bus.

The multi-mode verification test forming unit may form 'N (N + 1) / 2' verification tests for '2 ^N-1 ' multiple modes in the case of N hierarchical structures.

The multimode integrated test method for an avionics system designed in a hierarchical structure according to an embodiment of the present invention includes a host PC for performing a multimode verification test for each test target equipment for an avionics system, Forming a multi-mode verification test environment through a combination of an actual equipment connected to each of the host PCs and a model SW according to each control; And performing a verification test for each of the host PCs in a corresponding mode of the formed multimode verification test, wherein each of the test target devices includes a bus controller or a remote terminal (Remote Terminal), and the hierarchical structure may be that the bus controller of the lower bus is configured as a remote terminal of the upper bus.

According to one embodiment, after the step of performing, when the continuous mode verification is requested from the host PC, completing an individual verification test for a plurality of specific buses in the corresponding mode; And simultaneously performing an integrated verification for the specific bus and an existing verification test for the remaining buses through mode conversion after the individual verification test is completed.

The present invention also provides a computer-readable storage medium having recorded thereon a program for performing a multi-mode verification test on each test object equipment for an avionics system connected in a hierarchical structure on each bus, Forming a multi-mode verification test environment through a combination of an actual equipment connected to each of the host PCs and a model SW according to the control of each of the host PCs; And performing a verification test for each of the host PCs in a corresponding mode of the formed multimode verification test, wherein each of the test target devices includes a bus controller or a remote terminal (Remote Terminal), and the hierarchical structure may be that the bus controller of the lower bus is configured as a remote terminal of the upper bus.

The present invention can provide an integrated test environment capable of simultaneously performing individual or integrated verification of equipment connected to each bus by forming a multi-mode for verification test through a combination of real equipment or model SW.

Further, the present invention can significantly reduce the time required for the verification procedure by simultaneously performing individual or integrated verification tests between each subsystem or a plurality of subsystems of the avionics system.

In addition, the present invention provides a multimode integrated test apparatus capable of simultaneously performing various tests with one integrated test apparatus, thereby improving the test efficiency, thereby reducing the test time, manpower, and cost required during the verification period.

1 is a view showing an example of an aviation electronic system using MIL-STD-1553B,
Fig. 2 is a view for explaining the configuration of the equipment model for the individual verification test of the bus B, Fig.
3 is a diagram of a multimode integrated test apparatus for an avionics system designed in a hierarchical structure according to an embodiment of the present invention,
FIG. 4 is a diagram illustrating an example of generating a multi-mode of the multi-mode integrated test apparatus of FIG. 3,
5 to 8 are diagrams illustrating modes of the multimode integrated test apparatus of FIG.

For a better understanding of the present invention, a preferred embodiment of the present invention will be described with reference to the accompanying drawings. The embodiments of the present invention may be modified into various forms, and the scope of the present invention should not be construed as being limited to the embodiments described in detail below. The present embodiments are provided to enable those skilled in the art to more fully understand the present invention. Therefore, the shapes and the like of the elements in the drawings can be exaggeratedly expressed to emphasize a clearer description. It should be noted that in the drawings, the same members are denoted by the same reference numerals. Detailed descriptions of well-known functions and constructions which may be unnecessarily obscured by the gist of the present invention are omitted.

Herein, as an embodiment of the present invention, a stepwise verification of an avionics system designed with a hierarchical structure of four buses is performed as shown in FIG. 1, but the stepwise verification of an avionics system designed with a hierarchical structure of N buses It will be understood by those of ordinary skill in the art that the present invention can be extended even when performing verification.

Referring to FIG. 1, a hierarchical avionics system consists of a plurality of remote terminals (RT) and a bus control (BC) for each bus. At this time, each of the buses (A), (B), (C), and (D) (B) is a remote terminal (RT) of a bus A which is an upper bus, a third terminal (C) is a remote terminal (RT) of a bus B which is an upper bus, (RT). As such, the avionics system can be designed in a hierarchical structure.

Hereinafter, a case will be described in which a step-by-step verification is performed sequentially for systematic verification of the avionics system designed in a hierarchical structure.

- Step 1: Individual verification for each bus (A, B, C, D)

- Step 2: Integration verification between two busses (AB, BC, CD)

- Step 3: Integration verification between 3 busses (ABC, BCD)

- Step 4: Integrate the entire system (ABCD)

In this way, step-by-step verification of the hierarchical avionics system is carried out in 10 separate or integrated verification tests in four stages. In general, N step-by-step verification is performed for a total of 'N (N + 1) / 2' types of individual or integrated verification tests.

Specifically, for each step verification test, the integrated testing device can be configured using each device-specific model.

First, if we look at 'Step 1: Individual verification for each bus (A, B, C, D)',

In the individual verification of 'bus A', the first equipment (a) uses the actual equipment, and the second equipment (b) uses the model. The model of the second device (B) simulates only the function of the devices connected to the lower buses (B, C, D) and the first device (A). And, the remote terminal (RT) of 'Bus A' (-1) equipment, ... , (A-I) 'Bus A' individual verification is performed with various real equipment / model combinations for the equipment.

Referring to FIG. 2, when the bus B is individually verified, the second device (B) uses the real equipment, and the first device (A) and the third device (C) use the model. The model of the first equipment (A) simulates the function of the equipment connected to the bus A, which is the upper bus, with the second equipment (B), and the model of the third equipment (C) C, and D 'of the equipment connected to the second device (b). Fig. 2 is a view for explaining the configuration of the equipment model for the individual verification test of the bus B. Fig. Here, 'B' is the remote terminal (RT) of the (B-1) equipment, ... , And (B-J) equipment, the 'Bus B' individual verification is performed.

In case of individual verification of Bus C, the third equipment (c) uses the real equipment, the second equipment (b) and the fourth equipment (d) use the model. The model of the second device (b) simulates the function of the third device (c) that is connected to the buses 'A and B', and the model of the fourth device (d) Only the functions that are linked to the third device (c) among the functions of the devices connected to 'bus D' are simulated. And, the remote terminal (RT) of 'bus C' (da-1) equipment, ... , And (C) individual equipment / model combinations for (C) equipment.

For the individual verification of 'bus D', the fourth equipment (D) uses the real equipment and the third equipment (D) uses the model. The model of the third equipment (c) simulates only the function of the equipment connected to the buses 'buses A, B, and C', which is interlocked with the fourth equipment (d). And, the remote terminal (RT) of 'bus D' (LA-1) equipment, ... , And (LA-L) equipment, the 'Bus D' individual verification is performed.

Next, if we look at 'Phase 2: Integration verification between two buses (AB, BC, CD)',

When the bus AB is integrated, the first equipment (a) and the second equipment (b) use real equipment, and the third equipment (c) uses model. The model of the third equipment (c) simulates only the functions of the equipment connected to the buses 'C and D', which are linked to the second equipment (b). The 'bus AB' integration verification is performed with various real equipment / model combinations for remote terminal (RT) devices of 'bus AB'.

When the bus BC is integrated, the second equipment (b) and the third equipment (c) use real equipment, while the first equipment (a) and the fourth equipment (d) use models. The model of the first equipment (A) simulates the function of the equipment connected to the bus A and the second equipment (B), and the model of the fourth equipment (D) Only the function of the connected equipment with the third equipment (c) is simulated. In addition, 'bus BC' integration verification is performed with various real equipment / model combinations for remote terminal (RT) equipment of 'bus BC'.

When verifying the integration of 'bus CD', the third equipment (c) and the fourth equipment (d) use real equipment and the second equipment (b) uses model. The model of the second device (b) simulates only the function of the third device (c) among the functions of the devices connected to the buses 'buses A and B'. And, the 'bus CD' integration verification is performed by various real equipment / model combination for remote terminal (RT) equipment of 'bus CD'.

Next, if you look at 'Step 3: Integration verification between three buses (ABC, BCD)',

In the case of bus ABC integration verification, the first equipment (a), the second equipment (b) and the third equipment (c) use real equipment and the fourth equipment (d) uses model. The model of the fourth device (D) simulates only the function of the third device (C) among the functions of the devices connected to the sub-bus 'bus D'. In addition, 'bus ABC' integration verification is performed with various real equipment / model combinations for remote terminal (RT) devices of 'bus ABC'.

(B), (b), (c), and (d) are used for real equipment and the first equipment (a) uses models. The model of the first equipment (A) simulates only the function of the equipment connected to 'bus A' and the function of the second equipment (B). Also, 'bus BCD' integration verification is performed by various real equipment / model combinations for remote terminal (RT) devices of 'bus BCD'.

Next, if you look at the 'Step 4: Integrating the entire system (ABCD)',

When verifying the integration of bus ABCD, the first equipment (a), the second equipment (b), the third equipment (c), and the fourth equipment (d) In addition, 'bus ABCD' integration verification is performed with various real equipment / model combinations for remote terminal (RT) devices of 'bus ABCD'.

As described above, in order to sequentially perform the step-by-step verification of the avionics system designed in a hierarchical structure, 10 types of individual or integrated verification tests in four stages should be performed. In this case, it takes a lot of time to perform the respective verification tests sequentially, and a considerable cost is required when each of the integrated testing devices necessary for each verification test is separately provided.

3 is a diagram of a multimode integrated test apparatus for an avionics system designed in a hierarchical structure according to an embodiment of the present invention.

A multimode integrated testing apparatus (hereinafter referred to as "multimode integrated testing apparatus") 100 for an avionics system designed in a hierarchical structure according to an embodiment of the present invention is a system for testing Multiple modes can be configured to provide an integrated test environment that can simultaneously run individual or integrated verification of equipment connected to each bus.

As shown in FIG. 3, the multi-mode integrated testing apparatus 100 includes a real-time simulation unit 110 and a plurality of host PCs 120.

The real-time simulation unit 110 simulates the input / output signals in cooperation with a plurality of UUTs 10. To this end, the real-time simulation unit 110 includes a multi-mode verification test forming unit 111, a model unit 112, and an external communication unit 113.

The multimode verification test forming unit 111 selects whether to perform the verification test with the mounting ratio of each test target equipment 10 or with the model SW of each test target equipment 10.

The multimode verification test forming unit 111 is connected between the host PC 120 and the actual equipment connected to the test target equipment 10 or the model unit 112 and the model SW The combination forms a multimode verification test environment for testing individual or integrated verification of each test target device in various modes.

Here, the device under test 10 is an actual equipment connected to each bus, and includes a bus controller BC and a remote terminal RT. Accordingly, the model unit 112 includes a model SW corresponding to the bus controller BC and a model SW corresponding to the remote terminal RT.

The mode type formed by the multi-mode verification test forming unit 111 is determined through a combination of the actual equipment of the bus controller (BC) equipment and the model SW. The remote terminal (RT) equipment performs the verification test according to the combination of the real equipment and the model SW in the determined mode.

As described above, the multi-mode verification test forming unit 111 establishes a connection relationship with the test target equipment 10 or the model unit 112 under the control of the host PC 120. [ At this time, the multi-mode verification test forming unit 111 may determine whether the host PC 120 and the test unit 10 are connected to the host PC 120 and the model unit 112, (Not shown) at the intersection where the test target equipment 10 or the model unit 112 is connected to the host PC 120 in order to establish a connection relationship to the host PC 120 do.

However, the multi-mode verification test forming unit 111 does not simultaneously connect the specific real equipment and the corresponding model SW. That is, the multimode verification test forming unit 111 does not simultaneously connect the first equipment (a) and the model SW of the first equipment (a) corresponding thereto.

The multimode verification test forming unit 111 performs N (N + 1) / 2 'verification tests (individual or integrated verification tests) for' 2 ^N-1 ' .

The model unit 112 constructs and manages a model SW corresponding to each test target equipment 10. [ For example, the model unit 112 constructs the model SW of the first equipment (a) corresponding to the actual equipment first equipment (a). At this time, the model unit 112 executes the model SW corresponding to each test target equipment 10 to simulate the input / output signals of each test target equipment 10 intact.

The external communication unit 113 converts the input / output signal simulated by the model unit 112 into a state capable of communicating with the device under test 10.

A plurality of host PCs 120 transmit a control command for forming a multimode verification test of the multimode verification test forming unit 111 to the multimode verification test forming unit 111.

At this time, the plurality of host PCs 120 include a first host PC?, A second host PC?, A third host PC?, And a fourth host PC? And functions for controlling the operation of the unit 111. At this time, the plurality of host PCs 120 provide a user interface environment for controlling the operation of the multi-mode verification test by the user. That is, the user inputs the output signal (that is, the input signal of the UUT) of the other device model SWs interlocked with the test target device 10 to the input function (e.g., touch, mouse, keyboard operation, . ≪ / RTI > The user can confirm the reaction output signal of the test target device 10 (that is, the input signal of the other device model SWs) using the output function (for example, monitor, etc.) of the host PC 120.

Thereafter, the host PCs 120 perform individual or integrated verification on the test target equipment 10 connected to each bus in a hierarchical structure according to the multi-mode verification test formed by the multi-mode verification test forming unit 111 do.

At this time, a plurality of host PCs 120 may perform verification by transiting to a mode for performing integration verification on the same buses in another mode after completing individual verification tests on some buses in a specific mode.

FIG. 4 is a diagram illustrating an example of multi-mode generation of the multimode integrated test apparatus of FIG.

The multimode integrated test apparatus 100 can be configured in eight modes in the case of the verification test of FIG. 1 described above.

Referring to FIG. 4, a portion indicated by '0' in the left table generates an individual verification between the two buses, and a portion indicated by '1' generates an integrated verification between the two buses.

For example, in the case of mode 3 in the right table, '1' is displayed only between 'bus B and C' in the left table. In this case, the multimode integrated test apparatus 100 performs the integration verification for the 'bus BC' and the individual verification for the remaining 'bus A and D'.

The multimode integrated test apparatus 100 can simultaneously perform a plurality of individual or integrated verifications in each mode generated as described above.

For example, the multimode integrated test apparatus 100 simultaneously performs three tests in mode 2 as follows.

Referring to Test 1, the multimode integrated test apparatus 100 performs an individual verification for 'Bus A'. In this case, the first equipment (A) performs the verification test with the mounting ratio and simulates the remaining equipment with the model of the second equipment (B).

Referring to Test 2, the multimode integrated test apparatus 100 performs an individual verification for 'bus B'. In this case, the second equipment (B) performs the verification test with the mounting ratio and simulates the remaining equipment with the model of the first equipment (A) and the equipment of the third equipment (C).

Referring to Test 3, the multimode integrated test apparatus 100 performs an integrated verification on the bus CD. In this case. The third equipment (c) and the fourth equipment (d) perform the verification test with the mounting ratio and simulate the remaining equipment with the model of the second equipment (b).

Referring to FIG. 4, it can be seen that eight multi-mode configurations are possible for the avionics system of FIG. 1, which requires a four-step verification procedure for four buses. In general, '2 ^N-1 ' multi-modes may be configured for the hierarchical structure of N buses.

5 to 8 are diagrams illustrating modes of the multimode integrated test apparatus of FIG.

The multimode verification test forming unit 111 of the multimode integrated testing apparatus 100 connects the host PC 120 to the test target equipment 10 or the model unit 110 under the control of the host PC 120, To perform various mode conversion.

Specifically, FIG. 5 shows a case where the multi-mode verification test forming unit 111 performs 'mode 1' in FIG.

5, a portion indicated by a black dot in the multimode verification test forming unit 111 is connected to the host PC 120 as a test equipment 10 or a model unit 112 as a model SW .

Here, a portion indicated by a large black dot indicates a connection state with respect to the bus controller BC, and a portion indicated with a small black dot indicates a connection state with respect to the remote terminal RT.

The multimode verification test forming unit 111 may be configured to test the host PC 120 by using an actual equipment / model for setting the connection state of the test target equipment 10 or the model unit 112 corresponding to the bus controller BC, And determines the execution mode of the real-time simulation unit 110 as 'mode 1' through combination. At this time, each of the host PCs 120 performs an individual verification test for 'bus A, B, C, D'.

In this way, the multimode integrated testing apparatus 100 can perform various tests on the test target devices 10 corresponding to the remote terminals (RT) indicated by small black spots in the mode determined through the actual equipment / model combination of the bus controller (BC) Verification is possible with equipment / model combination.

In Mode 1, each of the host PCs 120 performs the following verification test.

The first host PC (α) performs the verification test on the first equipment (A) with the mounting ratio and performs the verification test on the second equipment (B) with the model SW. At this time, the first host PC (a) performs 'test 1' in mode 1 of FIG. Then, (a-1) equipment performs verification test with mounting ratio, and (i -i) equipment performs verification test with model SW.

The second host PC (β) performs the verification test on the second equipment (B) with the mounting ratio, and performs the verification test on the first equipment (A) and the third equipment (C) with the model SW. At this time, the second host PC (beta) performs 'test 2' in mode 1 of FIG. Then, the (B-1) equipment and the (B-J) equipment perform the verification test with the mounting ratio.

The third host PC (γ) carries out the verification test with the third equipment (C) and carries out the verification test with the second equipment (B) and the fourth equipment (D) with the model SW. At this time, the third host PC (gamma) performs 'test 3' in mode 1 of FIG. (1) The equipment performs the verification test with the model SW, and the (D-K) equipment performs the verification test with the mounting ratio.

The fourth host PC (δ) performs the verification test on the fourth equipment (D) by the mounting ratio, and the third equipment (C) performs the verification test on the model SW. At this time, the fourth host PC (delta) performs 'test 4' in mode 1 of FIG. The equipment (LA-1) and (LA-L) equipment performs verification test with mounting ratio.

FIG. 6 shows a case where the multi-mode verification test forming unit 111 performs 'mode 2' in FIG.

In mode 2, each of the host PCs 120 performs the following verification test.

The first host PC (α) performs the verification test on the first equipment (A) with the mounting ratio and performs the verification test on the second equipment (B) with the model SW. At this time, the first host PC (a) performs 'test 1' in mode 2 of FIG. Then, (a-1) equipment performs verification test with mounting ratio, and (i -i) equipment performs verification test with model SW.

The second host PC (β) performs the verification test on the second equipment (B) with the mounting ratio, and performs the verification test on the first equipment (A) and the third equipment (C) with the model SW. At this time, the second host PC (beta) performs 'test 2' in mode 2 of FIG. Then, the (B-1) equipment and the (B-J) equipment perform the verification test with the mounting ratio.

The third host PC (γ) carries out the verification test with the third equipment (C) and the fourth equipment (D) with the mounting ratio, and performs the verification test with the second equipment (B) with the model SW.

At this time, the third host PC (gamma) performs 'test 3' in mode 2 of FIG. (1) The equipment performs the verification test with the model SW, and the (D-K) equipment performs the verification test with the mounting ratio. In addition, the (LA-1) equipment performs the verification test with the model SW, and the (LA-L) equipment performs the verification test with the mounting ratio.

FIG. 7 shows a case where the multi-mode verification test forming unit 111 performs 'mode 6' in FIG.

In mode 6, each of the host PCs 120 performs the following verification test.

The first host PC (α) carries out a verification test on the first equipment (A) and the second equipment (B) with the mounting ratio, and performs the verification test on the third equipment (C) with the model SW. At this time, the first host PC (a) performs 'test 1' in mode 6 of FIG. Then, (a-1) equipment performs verification test with mounting ratio, and (i -i) equipment performs verification test with model SW. In addition, the (B-1) equipment and the (B-J) equipment perform verification tests with the mounting ratio.

The second host PC (β) performs the verification test with the second equipment (B) with the model SW, and performs the verification test with the third equipment (C) and the fourth equipment (D) with the mounting ratio. At this time, the second host PC (beta) performs 'test 2' in mode 6 of FIG. (1) The equipment performs the verification test with the model SW, and the (D-K) equipment performs the verification test with the mounting ratio. In addition, the (LA-1) equipment performs the verification test with the model SW, and the (LA-L) equipment performs the verification test with the mounting ratio.

FIG. 8 shows a case where the multi-mode verification test forming unit 111 performs 'mode 8' in FIG.

In mode 8, the first host PC (a) performs the following verification test.

The first host PC α performs a verification test on the first equipment A, the second equipment B, the third equipment C, and the fourth equipment R on the mounting ratio. At this time, the first host PC (alpha) performs 'test 1' in mode 8 of FIG. Then, (a-1) equipment performs verification test with mounting ratio, and (i -i) equipment performs verification test with model SW. In addition, the (B-1) equipment and the (B-J) equipment perform verification tests with the mounting ratio. In addition, the (C-1) equipment performs the verification test with the model SW, and the (D-K) equipment performs the verification test with the mounting ratio. In addition, the (LA-1) equipment performs the verification test with the model SW, and the (LA-L) equipment performs the verification test with the mounting ratio.

Therefore, since each of the host PCs 120 of the multimode integrated testing apparatus 100 can simultaneously perform tests of different stages in each mode, the verification time can be effectively shortened through a flexible test schedule. This is because each of the host PCs 120 of the multimode integrated testing apparatus 100 does not perform the verification test according to a general test procedure in which all the tests of a specific stage are performed and then the next stage is entered.

For example, when each of the host PCs 120 performs individual tests for each bus in mode 1, if individual verification for 'buses A and B' is completed first, it is converted to mode 5 and integrated verification for 'bus AB' Can be performed simultaneously with the individual verification for the existing bus C, D (i.e., continuous mode verification). That is, the host PC 120 can simultaneously perform an integrated verification test for some buses that have been individually verified in the continuous mode verification and an existing verification test for the remaining buses.

 After that, each of the host PCs 120 can convert to mode 3, 6, 7, etc. and perform a subsequent test after the verification of the 'bus C' is completed.

9 is a diagram of a multimode integrated test method for an avionics system designed in a hierarchical structure according to an embodiment of the present invention.

The multimode integrated testing apparatus 100 performs a multimode verification through a combination of an actual equipment connected to the test target equipment 10 or the model unit 112 and a model SW to each host PC under the control of the host PC 120 Thereby forming a test environment (S201).

Formation of the multi-mode verification test environment is performed through the multi-mode verification test configuration unit 111 as described above, and detailed description thereof will be omitted.

Thereafter, the multimode integrated testing apparatus 100 performs a verification test for each host PC 120 in the corresponding mode (S202). At this time, the multi-mode integrated testing apparatus 100 completes individual verification for some buses in the corresponding mode (S203) when it wants to proceed with the continuous mode verification (S203), and then performs integration The verification and the existing verification test for the remaining buses are performed at the same time (S205).

In addition, the multi-mode integrated testing apparatus 100 ends verification according to confirmation of completion of verification or performs all the changes to perform a verification test for each host PC 120 in the changed mode (S206).

On the other hand, when the continuous mode verification does not proceed (S203), the multimode integrated testing apparatus 100 performs a mode conversion after completing the corresponding mode and performs a verification test for each host PC 120 in the converted mode (S207).

It will be apparent to those skilled in the art that various modifications and equivalent arrangements may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. Accordingly, it is to be understood that the present invention is not limited to the above-described embodiments. Accordingly, the true scope of the present invention should be determined by the technical idea of the appended claims. It is also to be understood that the invention includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.

10: Equipment to be tested 110: Real-time simulation unit
111: mode performing unit 112:
113: external communication unit 120: host PC

Claims (16)

Multiple host PCs for performing multi-mode verification tests on each of the test target equipment for avionics systems hierarchically connected to each bus;
A model unit for implementing and managing a model SW corresponding to each of the test target equipments; And
A multi-mode verification test forming unit for forming a multi-mode verification test environment through a combination of the test target equipment or actual equipment according to the connection of the model unit and the model SW to each of the host PCs under the control of each of the host PCs; , ≪ / RTI &
Each of the test target equipments includes:
A bus controller or a remote terminal that is hierarchically connected to each bus,
Wherein the hierarchical structure comprises:
A multimode integrated test apparatus for avionics systems designed in a hierarchical structure in which the bus controller of the lower bus is configured as a remote terminal of the upper bus.
The method according to claim 1,
Each of the host PCs,
A multimode integrated test system for aeronautical electronic systems designed in a hierarchical structure that simultaneously conducts individual verification tests or integrated verification tests included in the multimode verification test.
The method according to claim 1,
Each of the host PCs,
Designed as a hierarchical structure that performs sequential mode verification that concurrently performs individual verification tests on some buses in a specific mode and then performs an integrated verification on the same buses and an existing verification test on the remaining buses through mode conversion Multi - mode integrated test equipment for avionics systems.
The method according to claim 1,
The model unit includes:
A multi-mode integrated test system for avionics system designed with a hierarchical structure that simulates input / output signals of each test target device by executing a model SW corresponding to each of the test target equipments.
5. The method of claim 4,
An external communication unit for converting an input / output signal simulated by the model unit into a communicable state for each of the test target equipments;
A multi-mode integrated test apparatus for an avionics system.
The method according to claim 1,
Wherein the multi-mode verification test forming unit comprises:
And a switching element at an intersection to which the test target equipment or the model unit is connected to each of the host PCs.
delete delete The method according to claim 1,
The type of mode formed by the multi-mode verification test forming unit may include:
A multimode integrated test system for avionics systems designed in a hierarchical structure determined through a combination of the actual equipment of the bus controller equipment and the model SW.
10. The method of claim 9,
Each of the host PCs,
And a verification test is performed according to the combination of the actual equipment of the remote terminal and the model SW according to the determined mode.
The method according to claim 1,
Wherein the multi-mode verification test forming unit comprises:
A first host PC connected to an actual equipment of the first bus controller and connected to a model switch of a second bus controller located at an upper or lower bus of the first bus controller, Multi - mode integrated test system for avionics system designed as a hierarchical structure connecting 1 host PC.
The method according to claim 1,
Wherein the multi-mode verification test forming unit comprises:
A first host PC connected to an actual equipment of the plurality of first bus controllers and a second bus located at an upper or lower bus of the plurality of first bus controllers, A multimode integrated test apparatus for an avionics system designed in a hierarchical structure connecting the first host PC to a model SW of a controller.
The method according to claim 1,
Wherein the multi-mode verification test forming unit comprises:
In the case of the hierarchical structure of the N stages, the multi-mode integration test for the avionics system designed in the hierarchical structure forming the type of the N (N + 1) / 2 'verification tests for the' 2 ^N-1 ' Device.
The host PC for performing the multimode verification test for each of the test target equipment for the avionics system hierarchically connected to the respective buses is controlled by a combination of the actual equipment connected to each of the host PCs and the model SW, Forming a mode verification test environment; And
Performing a verification test for each host PC in a corresponding mode of the formed multimode verification test,
Each of the test target equipments includes:
A bus controller or a remote terminal that is hierarchically connected to each bus,
Wherein the hierarchical structure comprises:
A multimode integrated test method for an avionics system designed in a hierarchical structure wherein the bus controller of the lower bus is configured as a remote terminal of the upper bus.
15. The method of claim 14,
After the step of performing, if the continuous mode verification is requested from the host PC, completing an individual verification test for a plurality of specific buses in the mode; And
Performing concurrent verification of the specific bus and an existing verification test of the remaining buses through mode conversion after the individual verification test is completed;
The method comprising the steps of: (a)
A computer-readable storage medium having recorded thereon a program,
The program includes:
The host PC for performing the multimode verification test for each of the test target equipment for the avionics system hierarchically connected to the respective buses is controlled by a combination of the actual equipment connected to each of the host PCs and the model SW, Forming a mode verification test environment; And
Performing a verification test for each host PC in a corresponding mode of the formed multimode verification test,
Each of the test target equipments includes:
A bus controller or a remote terminal that is hierarchically connected to each bus,
Wherein the hierarchical structure comprises:
And the bus controller of the lower bus is configured as a remote terminal of the upper bus. ≪ Desc / Clms Page number 20 >

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