KR101873633B1 - Method for preparing high temperature creep resistant grounded substrate for semiconductor equipment through physical vapor deposition - Google Patents
Method for preparing high temperature creep resistant grounded substrate for semiconductor equipment through physical vapor deposition Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 32
- 239000000758 substrate Substances 0.000 title claims abstract description 28
- 239000004065 semiconductor Substances 0.000 title claims abstract description 26
- 238000005240 physical vapour deposition Methods 0.000 title claims description 30
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 22
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 20
- 239000011247 coating layer Substances 0.000 claims abstract description 17
- 238000004519 manufacturing process Methods 0.000 claims abstract description 14
- 239000000463 material Substances 0.000 claims abstract description 9
- 229910000990 Ni alloy Inorganic materials 0.000 claims abstract description 7
- 239000010935 stainless steel Substances 0.000 claims abstract description 5
- 229910001220 stainless steel Inorganic materials 0.000 claims abstract description 4
- 229910000831 Steel Inorganic materials 0.000 claims abstract description 3
- 239000010959 steel Substances 0.000 claims abstract description 3
- 229910052751 metal Inorganic materials 0.000 claims description 11
- 239000002184 metal Substances 0.000 claims description 11
- 238000000576 coating method Methods 0.000 claims description 9
- 239000011248 coating agent Substances 0.000 claims description 8
- 238000001771 vacuum deposition Methods 0.000 claims description 7
- 229910052799 carbon Inorganic materials 0.000 claims description 4
- 239000010410 layer Substances 0.000 claims description 4
- 238000000059 patterning Methods 0.000 claims description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 3
- 238000005498 polishing Methods 0.000 claims description 3
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 2
- 230000005611 electricity Effects 0.000 claims description 2
- AZDRQVAHHNSJOQ-UHFFFAOYSA-N alumane Chemical group [AlH3] AZDRQVAHHNSJOQ-UHFFFAOYSA-N 0.000 claims 1
- 238000005516 engineering process Methods 0.000 abstract description 2
- 238000000151 deposition Methods 0.000 description 6
- 230000008021 deposition Effects 0.000 description 6
- 239000007921 spray Substances 0.000 description 4
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000003912 environmental pollution Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 229910021645 metal ion Inorganic materials 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 229910001256 stainless steel alloy Inorganic materials 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
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Abstract
본 발명은 반도체 장비용 내열 크리프 접지칩을 제조하는 방법에 관한 것으로, 구체적으로 PVD를 이용한 반도체 장비용 내열 크리프 접지칩 제조방법에 관한 것이다. 본 발명의 기술방안은 스테인레스, 니켈합금 또는 내열강자재를 반도체 장비용 내열 크리프 접지칩의 서브스트레이트로 하여, PVD 기술을 적용해 상기 서브스트레이트 표면에 비산화 순수 알루미늄 코팅층을 제조하여, 반도체 장비용 내열 크리프 접지칩을 제조하는 것이다. 본 발명은 한 편으로는 순수 알루미늄의 전기 전도성능 및 이의 대규모 집적회로 공정과의 호환성을 사용하고, 한 편으로는 서브스트레이트의 역학성능을 사용하여 접지 칩 내열 크리프 성능이 부족한 문제를 해결하고자 하는데 있다.The present invention relates to a method for manufacturing a heat resistant creep ground chip for a semiconductor device, and more particularly, to a method for manufacturing a heat resistant creep ground chip for a semiconductor device using PVD. The technical solution of the present invention is to prepare a non-oxidized pure aluminum coating layer on the surface of the substrate by applying PVD technology to a stainless steel, nickel alloy or heat resistant steel material as a substrate of heat resistant creep ground chip for semiconductor equipment, Creep ground chips. The present invention, on the one hand, uses the electrical conductivity of pure aluminum and its compatibility with large-scale integrated circuit processes, and on the one hand, the dynamics of the substrate is used to solve the problem of insufficient creep performance of the ground chip have.
Description
본 발명은 반도체 장비용 내열 크리프 접지칩 제조방법에 관한 것으로, 구체적으로 PVD를 이용한 반도체 장비용 내열 크리프 접지칩 제조방법에 관한 것이다. The present invention relates to a method for manufacturing a heat resistant creep ground chip for a semiconductor device, and more particularly, to a method for manufacturing a heat resistant creep ground chip for a semiconductor device using PVD.
반도체 장비 중의 접지칩은 고온 플라즈마 복사와 불화가스가 공동으로 작용하는 환경에 위치해, 양호한 전기 전도성능이 요구될 뿐 아니라, 내열 크리프성능에 대한 기준 역시 갈수록 높아지고 있다. 순수 알루미늄 재료는 주로 알루미늄이 양호한 전도성을 갖는 것 이외에 집적회로의 식각, 노광 및 코팅 등 공정과정에서 부품에 대한 오염이 가장 적기 때문에, 반도체 장비, 특히 대규모 집적회로 장비에 사용되는 이상적인 전기 전도 재료이다. 그러나 알루미늄은 용해점이 비교적 낮아, 온도가 비교적 낮은(300℃ 이하) 경우에만 사용 가능하고, 또한 공정 최적화 설계요구에 따라, 접지칩이 위치한 챔버의 온도가 끊임없이 높아지면서, 챔버 온도는 이미 350℃를 넘었으며, 이 또한 여전히 높아지면서, 심지어 400℃를 초과하게 되는데, 이 때 순수 알루미늄 재료 자체만으로는 이미 그 사용기준을 만족할 수 없다. 스테인레스, 니켈합금 등은 우수한 고온성능을 구비하고 있지만 전기 전도성이 떨어지고, 또한 강한 플라즈마 복사 조건에서는 철, 니켈 등 유해금속 이온을 방출하여, 반도체 공정환경을 오염시키기 때문에, 식각, 노광 및 코팅 과정의 부품 폐기를 초래한다.The grounding chip in the semiconductor equipment is located in an environment where the high temperature plasma radiation and the fluorine gas are jointly operated, and not only good electric conduction performance is required, but also the standard for the heat-resistant creep performance is increasing. Pure aluminum materials are ideal electrical conduction materials for use in semiconductor equipment, especially large scale integrated circuit equipment, because aluminum has the least conductivity and the least contamination of parts during processing such as etching, exposure and coating of integrated circuits . However, aluminum is relatively low in melting point and can only be used when the temperature is relatively low (below 300 ° C), and as the process optimization design demands, the temperature of the chamber in which the ground chip is located is constantly rising, And it is still higher, even exceeding 400 ° C, at which time pure aluminum material alone can not meet its use criteria. Stainless steel and nickel alloys have excellent high temperature performance but they deteriorate electric conductivity and also release harmful metal ions such as iron and nickel under strong plasma radiation conditions and contaminate the semiconductor processing environment. Resulting in the disposal of parts.
본 발명이 해결하고자 하는 기술과제는 PVD(물리기상증착)를 이용한 반도체 장비용 내열 크리프 접지칩의 제조방법을 제공하는 것으로, 스테인레스, 니켈합금 또는 내열강 등 고온 역학성능이 비교적 우수한 자재를 반도체 장비용 내열 크리프 접지칩의 서브스트레이트로 사용하여, 그 해당 표면에 두께가 균일하고, 접합력이 우수한 비산화 순수 알루미늄 도금층을 제조해, 한 편으로는 순수 알루미늄의 전기 전도성능 및 이의 대규모 집적회로 공정과의 호환성을 이용하고, 다른 한 편으로는 서브스트레이트의 역학성능을 이용해 접지칩의 내열 크리프가 부족한 문제를 해결하는 것이다.The present invention provides a method for manufacturing a heat resistant creep ground chip for a semiconductor device using PVD (Physical Vapor Deposition). The method includes the steps of forming a material having relatively high mechanical durability such as stainless steel, nickel alloy, It is used as a substrate of heat-resistant creep ground chip to produce a non-oxidized pure aluminum plating layer having uniform thickness and good bonding strength on its surface. On the one hand, the conductivity of pure aluminum and its large- And on the other hand, the problem of insufficient thermal creep of the grounded chip due to the mechanical performance of the substrate is solved.
본 발명의 기술 해결방안은 다음과 같다. The technical solution of the present invention is as follows.
PVD를 이용한 반도체 장비용 내열 크리프 접지칩의 제조방법은 스테인레스, 니켈합금 또는 내열강(耐熱鋼)재료를 반도체 장비용 내열 크리프 접지칩의 서브스트레이트로 하고, PVD 기술을 적용해 상기 서브스트레이트 표면에 비산화 순수 알루미늄 도금층을 제작하여, 반도체 장비용 내열 크리프 접지칩을 얻는 것이다. A method for manufacturing a heat-resistant creep ground chip for a semiconductor device using PVD is a method for manufacturing a creep ground chip of a heat-resistant creep ground chip for a semiconductor equipment by using a stainless steel, a nickel alloy or a heat resistant steel material, And a pure aluminum oxide plated layer is produced to obtain a heat-resistant creep ground chip for semiconductor equipment.
상기 PVD를 이용한 반도체 장비용 내열 크리프 접지칩을 제조하는 방법은 구체적으로 다음과 같다:A method for manufacturing a heat resistant creep ground chip for a semiconductor device using the PVD is as follows:
(1) 상기 서브스트레이트 전처리: 상기 서브스트레이트 표면에 먼저 패턴처리를 하고, 패턴처리의 패러미터는 320#이며 샌드페이퍼로 폴리싱을 진행해, 서브스트레이트 표면의 카본피막을 제거하고, 다시 무수에탄올을 사용해 세정한다. (1) Substrate pretreatment: The surface of the substrate is subjected to patterning first, and the parameter of the pattern processing is 320 #, polishing is performed with sandpaper to remove the carbon coating on the surface of the substrate, and then cleaned with anhydrous ethanol .
(2) 물리기상증착 공정으로 순수 알루미늄 코팅층을 제작하고, PVD 진공코팅시스템을 사용하여 기체상태의 알루미늄원자를 상기 서브스트레이트 표면에 정향(定向) 증착되도록 하여, 비산화 순수 알루미늄 코팅층을 형성한다. (2) A pure aluminum coating layer is formed by a physical vapor deposition process, and a gaseous aluminum atom is deposited on the surface of the substrate using a PVD vacuum coating system to form a non-oxidized pure aluminum coating layer.
상기 PVD를 이용한 반도체 장비용 내열 크리프 접지칩을 제조하는 방법에 있어서, 그 물리기상증착 공정 패러미터는: 거리 550㎜; 캐소드 전압 20~40V; 전류 70~90A; 진공도 1×10-3~6×10-3Pa; 보조증착 전압 800V; 보조증착 전류 1A; 순수 알루미늄 코팅층 두께 1~50마이크로미터이다. A method for manufacturing a heat resistant creep ground chip for a semiconductor device using the PVD, the physical vapor deposition process parameters comprising: a distance of 550 mm; Cathode voltage 20 ~ 40V; Current 70 to 90A; Vacuum of 1 × 10 -3 ~ 6 × 10 -3 Pa; Auxiliary deposition voltage 800V; Auxiliary deposition current 1A; Pure aluminum coating layer thickness is 1 ~ 50 micrometer.
상기 PVD를 이용한 반도체 장비용 내열 크리프 접지칩을 제조하는 방법에 있어서, 이 중 상기 PVD 진공코팅시스템은: 진공실, 회전스탠드, 금속캐소드, 집속코일, 전원, 보조 캐소드, 애노드, 전압게이지와 편향 솔레노이드 코일을 포함하고, 2개의 회전스탠드는 진공실에 대칭으로 설치되고, 회전스탠드는 상기 서브스트레이트를 놓기 위해 사용되며, 회전스탠드 사이에 편향 솔레노이드 코일을 설치하고, 금속캐소드와 편향 솔레노이드 코일은 서로 대응되며; 회전스탠드와 보조캐소드는 서로 대응되어, 보조캐소드와 회전스탠드 사이의 통로 양측에 각각 캐소드를 설치하고, 보조캐소드와 회전스탠드 상의 서브스트레이트 사이에 전압게이지를 설치하며, 금속캐소드는 전원을 통해 전기를 공급하고, 금속캐소드의 양측에 집속코일을 설치한다. The PVD vacuum coating system includes a vacuum chamber, a rotating stand, a metal cathode, a focusing coil, a power source, an auxiliary cathode, an anode, a voltage gauge and a deflection solenoid Wherein the rotating stand is used to place the substrate and a deflection solenoid coil is provided between the rotating stands and the metal cathode and the deflection solenoid coil correspond to each other ; The rotating stand and the auxiliary cathode correspond to each other, a cathode is provided on each side of the passage between the auxiliary cathode and the rotating stand, a voltage gauge is provided between the auxiliary cathode and the substrate on the rotating stand, And a focusing coil is provided on both sides of the metal cathode.
상기 PVD를 이용한 반도체 장비용 내열 크리프 접지칩을 제조하는 방법에 있어서, 이 중 상기 회전스탠드의 외부는 환형벨트로 형성되고, 환형벨트에 하나의 개구를 설치하며, 개구부는 스프링으로 연결된다.A method for manufacturing a heat resistant creep ground chip for a semiconductor device using the PVD, wherein the outer surface of the rotary stand is formed as an annular belt, and one opening is provided in the annular belt, and the opening is connected with a spring.
1. 본 발명은 PVD법을 이용하여 반도체 장비용 내열 크리프 접지칩(1-50 마이크로미터)을 제조하는데, 이는 콜드 스프레이방법(100 마이크로미터 이상)과 비교하면 제조되는 코팅층 두께가 얇고, 서브스트레이트와 접합이 양호하며, 코팅이 치밀해, 도전성능이 양호하다. 1. The present invention produces heat resistant creep ground chips (1-50 micrometers) for semiconductor equipment using PVD method, which is thin compared to the cold spray method (100 micrometers or more) And the coating is dense and the conductive performance is good.
2. 본 발명은 PVD방법을 적용하는 것으로, 순수 알루미늄 코팅층이 진공 조건하에서 기상증착을 형성하기 때문에, 따라서 코팅층이 치밀하고 산화가 없으므로, 접지 칩의 도전성능을 제고한다. 2. The present invention applies the PVD method and improves the conductive performance of the ground chip because the pure aluminum coating layer forms vapor deposition under vacuum conditions and therefore the coating layer is dense and oxidation-free.
3. 본 발명은 증착효과가 높고, 안전하며, 원가가 낮고, 환경오염이 없다는 등의 특징을 더 갖고 있다. 3. The present invention is further characterized in that the deposition effect is high, safe, low in cost, and free from environmental pollution.
4. 반도체 장비에서 접지 칩은 매우 얇고 부드러운 상태이기 때문에, 소프트 칩으로 불린다. 소프트 칩에 두께가 균일하고, 접합력이 양호한 도전층을 제조하는, 것은 매우 구현하기 어렵다. 본 발명은 회전스탠드와 편향 솔레노이드 코일을 적용해, 큰 파티클의 알루미늄의 생산을 감소시키고, PVD 방법으로 알루미늄 코팅층을 제작함으로써, 스프레이의 코팅 두께가 균일하고 접합력이 양호하도록 하여, 박막두께를 1-50 마이크로미터 범위로 제어하고, 접합강도는 10 - 15MP에 달하게 할 수 있다. 4. In semiconductor equipment, the ground chip is called a soft chip because it is very thin and soft. It is very difficult to realize a conductive layer having a uniform thickness on a soft chip and a good bonding strength. The present invention employs a rotating stand and a deflection solenoid coil to reduce the production of aluminum in large particles and to produce an aluminum coating layer by the PVD method so that the coating thickness of the spray is uniform and the bonding force is good, 50 micrometer range, and the bonding strength can reach 10 - 15 MP.
도 1은 본 발명의 PVD 진공 코팅 시스템 구조도.
도 2는 본 발명의 회전스탠드 구조도.1 is a structural view of a PVD vacuum coating system of the present invention.
2 is a structural view of a rotating stand of the present invention.
도 1, 2를 참조하면, PVD 진공 코팅시스템은: 진공실(1), 회전스탠드(2), 금속캐소드(3)(순수 알루미늄 바), 집속코일(4), 전원(5), 보조 캐소드(7), 애노드(8) 전압게이지(9)와 편향 솔레노이드 코일(6)을 포함하고, 2 개의 회전스탠드(2)는 진공실(1)에 대칭으로 설치되고, 회전스탠드(2) 사이에 편향 솔레노이드 코일(6)을 설치하고, 금속캐소드(3)와 편향 솔레노이드 코일(6)은 서로 대응되며; 회전스탠드(2)와 보조 캐소드(7)는 서로 대응되고, 보조캐소드(7)과 회전스탠드(2) 사이의 통로 양측에 각각 애노드(8)을 설치하고, 보조 캐소드(7)과 회전스탠드(2) 상의 반도체 장비용 내열 크리프 접지칩의 서브스트레이트 사이에 전압게이지(9)를 설치하고, 금속캐소드(3)은 전원(5)을 통해 전기를 공급하며, 금속캐소드(3)의 양측에 집속코일(4)를 설치한다. 회전스탠드(2)의 외부는 환형벨트(10)로 형성되고, 환형벨트(10)에는 하나의 개구가 설치되며, 개구부는 스프링(11)으로 연결되고, 반도체 장비용 내열 크리프 접지칩의 서브스트레이트를 환형벨트(10) 상에 놓고, 양쪽단을 고정하여, 스프링(11)의 장력으로 상기 서브스트레이트가 팽팽하도록 하게 하면, 코팅과정 중 온도의 변화로 인해 서브스트레이트가 형태 변화를 일으키는 영향을 줄일 수 있고, 따라서 코팅품질을 높이게 된다.Referring to Figures 1 and 2, a PVD vacuum coating system comprises: a vacuum chamber 1, a
구체적인 단계는 다음과 같다.The concrete steps are as follows.
(1) 상기 서브스트레이트의 전처리: 상기 서브스트레이트 표면에 먼저 패턴처리를 하고, 패턴처리의 패러미터는 320#이며 샌드페이퍼로 폴리싱을 진행해, 서브스트레이트 표면의 카본피막을 제거하고, 다시 무수에탄올을 사용해 세정한다.(1) Pretreatment of the substrate: The surface of the substrate was subjected to patterning first, and the parameter of the patterning process was 320 #, and polishing with sandpaper was carried out to remove the carbon coating on the surface of the substrate, do.
(2) 물리기상증착 공정을 사용해 순수 알루미늄 코팅층을 제작하고, PVD 진공코팅시스템을 사용해, 기체상태의 알루미늄원자를 상기 서브스트레이트 표면에 정향 증착되도록 하여, 비산화 순수 알루미늄 코팅층을 형성함으로써, 반도체 장비용 내열 크리프 접지칩을 제조한다. 상기 물리기상증착 공정 패러미터는: 거리 550㎜; 캐소드 전압 20~40V; 전류 70~90A; 진공도 1×10-3~6×10-3Pa; 보조증착 전압 800V; 보조증착 전류 1A; 코팅층 두께 1~50마이크로미터이다. (2) a pure aluminum coating layer is formed using a physical vapor deposition process, and a gaseous aluminum atom is deposited on the surface of the substrate by using a PVD vacuum coating system to form a non-oxidized pure aluminum coating layer, Cost heat-resistant creep ground chip. The physical vapor deposition process parameters are: distance 550 mm; Cathode voltage 20 ~ 40V; Current 70 to 90A; Vacuum of 1 × 10 -3 ~ 6 × 10 -3 Pa; Auxiliary deposition voltage 800V; Auxiliary deposition current 1A; The thickness of the coating layer is 1 to 50 micrometers.
본 실시 예 중, 특정한 공정을 사용해 진공상태에서의 금속 알루미늄 코팅층의 증착을 구현할 수 있는데, 이런 공정과정은 니켈 합금 등 재료 위에 균일하고 치밀한 A1의 코팅층을 형성하되, 서브스트레이트 자재의 성능에 영향을 주지 않는 것으로, 고성능 비산화 코팅층 제작을 위해서 일종의 중요한 공정방법을 제공하였고, PVD법을 사용해 니켈합금 표면에 성공적으로 성능이 뛰어난 도전코팅층을 형성한 것이다. 도전코팅층의 구체적인 성능 패러미터는: 전기 전도성 5-7×10-8 옴/미터, 결합강도 10-15MP로, 상세한 내용은 표 1을 참고한다. In this embodiment, the deposition of a metal aluminum coating layer in a vacuum state can be realized using a specific process, which process forms a uniform and dense Al coating layer on a material such as a nickel alloy, but affects the performance of the substrate material It provides an important process for forming a high-performance nonoxidation coating layer and has successfully formed a conductive coating layer on the nickel alloy surface using PVD. Specific performance parameters of the conductive coating layer are: electric conductivity 5-7 x 10-8 ohm / meter, bonding strength 10-15 MP, see Table 1 for details.
표 1: 콜드 스프레이와 PVD법으로 제조한 내열 크리프 접지칩에 대한 성능 비교Table 1: Performance comparison of creep ground chip made by cold spray and PVD method
냉각분사로 제조한 접지 칩과 비교하여 보면, PVD법을 이용해 제조한 반도체 장비용 내열 크리프 접지칩은 코팅층이 얇다는 특징을 갖는다. Compared with the ground chip manufactured by cooling injection, the heat-resistant creep ground chip for semiconductor equipment manufactured by the PVD method is characterized in that the coating layer is thin.
이상은 본 발명의 바람직한 실시 예이며, 본 발명의 구상을 벗어나지 않는 전제 하에, 기타의 PVD기술을 사용해 제조한 반도체 공정 장비용 내열 크리프 접지칩, 역시 본 발명의 보호범위로 간주해야 한다. The above is a preferred embodiment of the present invention, and the heat-resistant creep ground chip for semiconductor process equipment manufactured using other PVD technology under the premise of the present invention should also be regarded as the scope of protection of the present invention.
Claims (5)
상기 방법은 스테인레스, 니켈합금 또는 내열강 자재를 반도체 장비용 내열 크리프 접지칩의 서브스트레이트로 하고,
상기 서브스트레이트 표면에 먼저 패턴 처리를 하고, 패턴처리의 패러미터는 320#이며 샌드페이퍼로 폴리싱을 진행해, 서브스트레이트 표면의 카본피막을 제거하고, 다시 무수에탄올을 사용해 세정함으로써, 상기 서브스트레이트를 전처리한 후,
물리기상증착 공정을 사용해 순수 알루미늄층을 제조하고, PVD진공 코팅 시스템을 이용하여 기체의 알루미늄 원자가 상기 전처리된 서브스트레이트 표면에 정향 증착되도록 함으로써,
상기 서브스트레이트 표면에 비산화 순수 알루미늄 코팅층을 형성하여, 반도체 장비용 내열 크리프 접지칩을 제조하고,
상기 PVD 진공 코팅 시스템은 진공실, 회전스탠드, 금속캐소드, 집속코일, 전원, 보조캐소드, 애노드, 전원게이지와 편향 솔레노이드 코일을 포함하고; 두 개의 회전스탠드는 진공실에 대칭으로 설치되고, 회전스탠드 사이에 편향 솔레노이드 코일을 설치하고, 금속캐소드와 편향 솔레노이드 코일이 서로 대응되게 설치되며; 회전스탠드와 보조캐소드가 서로 대응되어, 보조캐소드와 회전스탠드 사이의 통로 양측에 애노드를 각각 설치하고, 보조캐소드와 회전스탠드 위의 상기 서브스트레이트 사이에 전압게이지를 설치하며, 금속캐소드가 전원을 통해 전기를 공급하고, 금속캐소드의 양측에 집속코일을 설치하는 것을 특징으로 하는, PVD를 이용한 반도체 장비용 내열 크리프 접지칩 제조방법.
A method of manufacturing a heat resistant creep ground chip for a semiconductor device using PVD,
The method comprises forming a substrate of a heat resistant creep ground chip for a semiconductor device by using a stainless steel, nickel alloy, or heat resistant steel material,
The surface of the substrate was subjected to patterning first, the pattern processing parameter was 320 #, polishing was carried out with sandpaper, the carbon coating on the surface of the substrate was removed, and the substrate was washed with anhydrous ethanol to pretreat the substrate ,
By using a physical vapor deposition process to produce a pure aluminum layer and allowing the aluminum atoms of the gas to be deposited on the pretreated substrate surface using a PVD vacuum coating system,
Forming a non-oxidized pure aluminum coating layer on the substrate surface to produce a heat resistant creep ground chip for a semiconductor device,
The PVD vacuum coating system includes a vacuum chamber, a rotating stand, a metal cathode, a focusing coil, a power source, an auxiliary cathode, an anode, a power gauge and a deflection solenoid coil; The two rotating stands are symmetrically installed in the vacuum chamber, and a deflection solenoid coil is installed between the rotating stands, and the metal cathode and the deflection solenoid coil are provided so as to correspond to each other; The rotating stand and the auxiliary cathode correspond to each other so that the anode is provided on each side of the passage between the auxiliary cathode and the rotating stand and a voltage gauge is provided between the auxiliary cathode and the substrate on the rotating stand, A method of manufacturing a heat resistant creep ground chip for a semiconductor device using PVD, characterized by supplying electricity and providing a focusing coil on both sides of a metal cathode.
상기 회전스탠드의 외부는 환형벨트로 형성되고, 환형벨트에는 하나의 개구가 설치되며, 개구부는 스프링으로 연결되는 것을 특징으로 하는 PVD를 이용한 반도체 장비용 내열 크리프 접지칩 제조방법.
The method according to claim 1,
Wherein the outer surface of the rotating stand is formed of an annular belt, and the annular belt is provided with one opening, and the opening is connected by a spring.
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| CN104294206A (en) * | 2014-10-09 | 2015-01-21 | 沈阳富创精密设备有限公司 | Preparation method of high-temperature creep resistant grounding substrate for semiconductor equipment |
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