KR101866563B1 - Mask, organic light-emitting display device and method of manufacturing the same - Google Patents

Abstract

A method of manufacturing an organic light emitting display device includes forming a planarization film on a substrate, positioning a mask having at least a light amount adjustment region on the planarization film, irradiating light to the substrate, Forming a first electrode and an organic light emitting layer on the planarizing film; forming banks to surround the first electrode and the organic light emitting layer; forming a second electrode on the bank and the organic light emitting layer; Thereby forming a sealing film.

Description

[0001] The present invention relates to a mask, an organic light-emitting display device, and a method of manufacturing the same,

Embodiments relate to masks used in the fabrication of organic light emitting displays.
An embodiment relates to an organic light emitting display.
An embodiment relates to a method of manufacturing an organic light emitting display device.

Display devices capable of displaying information are being actively developed. The display device includes a liquid crystal display device, an organic light emitting display device, a plasma display device, and a field emission display device.
Among them, the organic light emitting display has advantages such as spontaneous emission, wide viewing angle, high resolution, easy manufacturing process, fast response speed, and low voltage driving.
Due to these advantages, organic light emitting display devices are attracting attention as next generation display devices.
Various organic light emitting display devices have been proposed.
Among them, a structure for forming a flattening film and minimizing the step coverage of a device formed thereafter is disclosed in Patent Publication No. 10-2009-0120825.
The edge regions of the planarizing film are patterned by an exposure process. Since light is irradiated perpendicularly to the substrate, the edge regions of the planarizing film are formed perpendicular to the substrate.
Thus, since the layers formed on the edge regions of the vertically formed planarizing film are also formed perpendicular to the substrate, the layers formed on the edge regions of the planarizing film are hardly formed or formed very thinly.
As a result, very thin layers on the edge region of the flattening film have the problem that external moisture, oxygen or the like is permeated through the edge region of the flattening film to the thin film transistor or metal lines formed below the flattening film.
The electrical characteristics of the thin film transistor may be deteriorated due to moisture or oxygen, or the electrical characteristics may be deteriorated due to corrosion of the metal lines.
In addition, since the light emitting layer of each pixel of the organic light emitting element adjacent to the edge region of the planarization film due to moisture or oxygen becomes incapable of emitting light, the light emitting area can eventually be reduced.

The embodiment provides a mask capable of forming an inclined surface in the edge region of the planarizing film.
An embodiment provides an organic light emitting display device capable of blocking moisture permeation and a method of manufacturing the same.

According to an embodiment, a method of manufacturing an organic light emitting display includes: forming a planarization film on a substrate including a thin film transistor, the active region and the inactive region being defined; Positioning a mask having at least a light amount control region on the planarization film; Forming an inclined surface in the edge region of the planarization film corresponding to the light amount control region by irradiating light; Forming a first electrode and an organic light emitting layer on the planarization layer; Forming a bank to surround the first electrode and the organic light emitting layer; Forming a second electrode on the bank and the organic light emitting layer; And forming a sealing film on the second electrode.
According to an embodiment, a mask for forming a film including an edge region having an inclined surface on a substrate on which an active region and an inactive region are defined includes at least a light amount adjusting region, and the light amount adjusting regions have a constant width And the gap between the slits is increased from the active region to the inactive region.
According to an embodiment, a mask for forming a film including an edge region having an inclined surface on a substrate on which an active region and an inactive region are defined includes at least a light amount control region, and the light amount control region has a width different from each other Having a plurality of slits.
According to an embodiment, an organic light emitting display includes: a substrate having an active region and a non-active region defined; A thin film transistor on the substrate; A planarization film on the thin film transistor; An inclined surface formed in an edge region of the planarization film corresponding to a light amount control region of the mask; A first electrode and an organic emission layer on the planarization layer; A bank formed to surround the first electrode and the organic light emitting layer; A second electrode on the bank and the organic light emitting layer; And an encapsulating film on the second electrode.

The embodiment forms the edge region of the planarization film as a sloped surface.
Therefore, the bank and the sealing film formed on the flattening film are each thickly formed, so that the infiltration of oxygen and moisture can be intrinsically blocked by the edge region of the flattening film and the bank and sealing film formed thereon.
Thus, deterioration in electrical characteristics of the thin film transistor formed under the planarizing film and the metal line can be prevented.
The light emitting area of each pixel of the organic light emitting element adjacent to the edge region of the planarization film due to moisture or oxygen can be prevented from being reduced due to the non-luminous emission.

1 is a plan view showing an organic light emitting display according to an embodiment.
FIG. 2 is a cross-sectional view of the organic light emitting diode display of FIG. 2 taken along the line I-I '.
FIGS. 3 to 8 are views showing a process of manufacturing the organic light emitting diode display of FIG. 1. FIG.
9 is a view showing a light amount adjusting region of the mask according to the first embodiment.
10 is a view showing a light amount adjusting region of the mask according to the second embodiment.
11 is a view showing a light amount adjusting region of the mask according to the third embodiment.
12 is a view showing a light amount adjusting region of the mask according to the fourth embodiment.
13 is a view showing a light amount adjusting region of the mask according to the fifth embodiment.

In describing an embodiment according to the invention, in the case of being described as being formed "above" or "below" each element, the upper (upper) or lower (lower) Directly contacted or formed such that one or more other components are disposed between the two components. Also, in the case of "upper (upper) or lower (lower)", it may include not only an upward direction but also a downward direction based on one component.
1 is a plan view showing an organic light emitting display according to an embodiment.
Referring to FIG. 1, an organic light emitting display according to an embodiment may include an active region A / A and a non-active region N / A.
The active area A / A may be an area for displaying an image, and the inactive area N / A may be an area where no image is displayed.
The active region A / A may include a plurality of pixel regions. Different information can be displayed for each pixel region.
The plurality of pixel regions may be formed by the intersection of a plurality of gate lines (not shown) and a plurality of data lines (not shown).
A plurality of power supply lines (not shown) may be disposed in parallel with the plurality of data lines.
A thin film transistor, an organic light emitting diode, and a storage capacitor may be formed in the pixel region.
The thin film transistor may be at least two or more. That is, a switching transistor having a function as a switch for selecting and supplying each pixel region may be formed in the pixel region and a driving transistor for generating a driving current for driving the organic light emitting element.
Therefore, a gate line, a data line, a power supply line, a switching transistor, a driving transistor, an organic light emitting diode, and a storage capacitor may be formed in the pixel region
A pad electrode and a connection electrode may be formed in the inactive region N / A.
The pad electrode may be at least one of a gate pad electrode, a data pad electrode 35 and a power supply voltage pad electrode 41.
The connection electrode may be at least one of a gate connection electrode, a data connection electrode 37, and a power supply voltage connection electrode 43.
The active area A / A may further include an edge area E / A in addition to a plurality of pixel areas.
The edge region E / A may be defined between the plurality of pixel regions and the inactive region N / A.
That is, the edge region E / A may be defined to surround the periphery of the plurality of pixel regions in the active region A / A.
The edge region E / A may be a region in contact with the inactive region N / A.
FIG. 2 is a cross-sectional view of the organic light emitting diode display of FIG. 2 taken along the line I-I '.
Referring to FIGS. 1 and 2, a thin film transistor 3 and a gate contact electrode 5 may be formed on a substrate 1.
The substrate 1 may be defined as an active region A / A and an inactive region N / A. The active region A / A occupies most of the area including the center of the substrate 1, and the inactive region N / A may be defined to surround the active region A / A.
The active area A / A may include a plurality of pixel areas and an edge area E / A surrounding the plurality of pixel areas.
In FIG. 2, an active region A / A including one pixel region and an edge region E / A and an inactive region N / A surrounding the active region A / A are shown.
The pixel region may be formed by a gate line, a data line, and a power source voltage line. The gate line and the data line may be formed to intersect with each other, and the power source voltage line may be formed parallel to the data line.
The thin film transistor 3 may be a driving transistor for driving the organic light emitting diode 20.
The thin film transistor 3 may be a bottom gate type transistor having a gate electrode disposed below the semiconductor layer or a top gate type transistor having a gate electrode disposed on the semiconductor layer.
The thin film transistor 3 may include a gate electrode, a semiconductor layer, a source electrode, and a drain electrode.
The gate electrode may extend from the gate line. Also, the gate contact electrode 5 may extend from the gate line.
In other words, the gate electrode may be formed to extend from one side of the gate line, and the gate contact electrode 5 may extend from the other side of the gate line.
Therefore, a gate contact electrode 5 may be formed on one side of each gate line, and a plurality of gate electrodes may be formed on the other side of each gate line, which are spaced apart from each other and extend to each pixel region.
The gate contact electrode 5, the gate electrode, and the gate line may be formed of the same material in the same layer.
The gate contact electrode 5, the gate electrode and the gate line may include at least one or multiple layers selected from the group consisting of Au, Ti, Ni, Cu, Al, Cr, Ag, But is not limited thereto.
The gate contact electrode 5 may be electrically connected to the gate pad electrode 13 via the gate connection electrode 9.
Although not shown, a voltage supply line and a source voltage contact electrode (not shown) may also be formed of the same material in the same layer as the gate contact electrode 5, the gate electrode, and the gate line.
A data connection electrode 37 is formed on one side of each data line, and a plurality of source electrodes extending to each pixel region may be formed on the other side of each data line.
The source electrode and the data line may be formed of the same material on the same layer.
The source electrode and the data line may include at least one or a plurality of layers selected from the group consisting of Au, Ti, Ni, Cu, Al, Cr, Ag, .
A gate insulating film 7 may be formed on the gate line, the gate electrode, and the gate contact electrode 5.
A gate connecting electrode 9 may be formed on the gate insulating film 7. The gate connecting electrode 9 may be electrically connected to the gate contact electrode 5 through the gate insulating film 7. [
The gate connection electrode 9 may be formed of the same material in the same layer as the source electrode and the data line.
A power supply voltage connection electrode 43 may be formed of the same material in the same layer as the source electrode and the data line.
The power supply voltage contact electrode may be electrically connected to the power supply voltage pad electrode 41 via the power supply voltage connection electrode 43.
The passivation layer 11 may be formed on the source electrode, the data line, the gate connection electrode 9, and the power supply voltage connection electrode 43.
The protective layer 11 may be formed of an inorganic material. The inorganic material may be silicon oxide (SiO _x ) or silicon nitride (SiN _x ).
A planarizing layer 15 may be formed on the protective layer 11.
The planarization layer 15 may be formed of an organic material. The organic material may be an acryl-based resin or a polyimide.
The planarization layer 15 may have a thickness greater than at least the protective layer 11. That is, the top surface of the planarization film 15 may have a flat surface without step coverage.
The gate insulating film 7 and the protective film 11 are formed in the entire region of the substrate 1 while the planarizing film 15 has a smaller area than at least the gate insulating film 7 and the protective film 11 Lt; / RTI >
Therefore, the edge region of the planarization film 15 can be positioned in the edge region E / A of the substrate 1. [
The area of the planarization layer 15 is smaller than the area of the protective layer 11 so that the gate pad electrode 13, the data pad electrode 35 and the power supply voltage pad electrode 41, .
Each of the gate pad electrode 13, the data pad electrode 35 and the power supply voltage pad electrode 41 penetrates the protective film 11 without passing through the flattening film 15, And may be electrically connected to the connection electrode 37 and the power supply voltage connection electrode 43.
Therefore, the planarization layer 15 is not formed in the regions where the gate pad electrode 13, the data pad electrode 35, and the power supply voltage pad electrode 41 are to be formed.
The edge region of the active region A / A or the edge region of the planarization film 15 located in the edge region E / A of the substrate 1 is in contact with the active region A / (N / A) to the inactive region (N / A). In other words, the edge region of the planarization layer 15 may have an inclined surface from the active region A / A to the inactive region N / A.
The inclination angle? Of the planarizing film 15 may be in a range of 10 ° to 45 ° with respect to the upper surface of the substrate 1.
The inclination angle θ of the planarization layer 15 is determined by the thickness of the planarization layer 15 and the edge regions of the planarization layer 15 and the pad electrodes such as the gate pad electrode 13, The margin between the voltage pad electrodes 41, and the like.
As the inclination angle? Of the planarizing film 15 is smaller, the layers formed by the post-processing on the edge region of the planarizing film 15 are formed thicker and the moisture permeability by oxygen, moisture, Can be improved.
A first electrode 21 and an organic light emitting layer 23 are formed on the planarization film 15 in each pixel region and an electrode film 21a is formed on the protective film 11 of the inactive region N / And the organic light emitting layer 23a may be formed. At least one of the gate pad electrode 13, the data pad electrode 35 and the power supply voltage pad electrode 41 may be formed by the electrode film 21a and the organic light emitting film 23a.
The electrode film 21a may be formed of the same material as the first electrode 21. The electrode film 21a and the first electrode 21 may be formed of a reflective electrode material capable of reflecting light. As the reflective electrode material, one or two or more alloys selected from the group consisting of Ag, Al, Ni, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au and Hf may be used.
The electrode film 21a and the first electrode 21 may be formed as a double layer of a reflective film made of a reflective material and a transmissive film made of a transmissive material on the reflective film. The reflective material may be a material having a reflective function and need not be a material having an electrode function. Therefore, the reflective material may be the same material as the reflective electrode material, or may not be the same material.
At least one selected from the group consisting of ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO, and GZO may be used as the transmissive material.
The organic light emitting layer 23 a may be formed of the same material as the organic light emitting layer 23.
The organic light emitting layer 23a and the organic light emitting layer 23 may be formed of an organic light emitting material.
The organic emission layer 23 may be a red organic emission layer that emits red light, a green organic emission layer that emits green light, and a blue emission layer that emits blue light.
The organic light emitting layer 23 may include a hole injecting layer, a hole transporting layer, a light emitting layer, an electron transporting layer, and an electron injecting layer.
The first electrode 21 may be electrically connected to the drain electrode of the thin film transistor 3 through the planarization layer 15.
The electrode film 21a of the gate pad electrode 13 may be electrically connected to the gate connection electrode 9 through the protective film 11. [
An electrode film (not shown) of the data pad electrode 35 may be electrically connected to the data connection electrode 37 through the protective film 11.
An electrode film (not shown) of the power supply voltage pad electrode 41 may be electrically connected to the power supply voltage connection electrode 43 through the protection film 11.
A bank 31 may be formed on the organic light emitting layer 23 and the planarization layer 15. The bank 31 may be formed to define each pixel region.
The bank 31 may be formed of an organic material. As the organic material, an acryl based resin or a polyimide may be used.
The banks 31 are not formed on the organic light emitting layer 23 of each pixel region.
The bank 31 may be formed on an edge region of the planarizing film 15. [ Since the edge region of the planarization film 15 has a sloped surface, the bank 31 can be easily formed on the edge region of the planarization film 15. Accordingly, the bank 31 formed on the edge region of the planarizing film 15 can be formed relatively thick. In other words, since the edge region of the planarization film 15 is formed as a sloped surface, the bank 31 has substantially the same thickness on the upper surface of the planarization film 15 and the edge region of the planarization film 15 .
A second electrode 25 may be formed on the bank 31 of each pixel region. In other words, the second electrode 25 may be formed in common to the pixel regions.
The second electrode 25 may be formed of a metal material. As the metal material, at least one selected from the group consisting of Au, Ti, Ni, Cu, Al, Cr, Ag, Pt and Mo or an alloy thereof may be used.
The organic light emitting diode 20 may be formed of the first electrode 21, the organic light emitting layer 23, and the second electrode 25.
The second electrode 25 may be formed on the organic light emitting layer 23 through the banks 31 in the respective pixel regions. A sealing film 33 may be formed on the second electrode 25 and the bank 31.
The sealing film 33 may include a multilayer film in which an organic film and an inorganic film are alternately stacked.
The sealing film 33 may include a multilayer film in which an organic film and an inorganic film are alternately stacked, and an adhesive film, a protective film, and a polarizing film formed on the multilayer film.
The sealing film 33 formed on the bank 31 corresponding to the edge region of the flattening film 15 is also formed on the upper surface of the flattening film 15 because the edge region of the flattening film 15 has an inclined surface. The thickness of the sealing film 33 may be approximately the same as the thickness of the sealing film 33 formed on the bank 31 corresponding to the sealing film 33. [
By forming the edge regions of the planarization film 15 as inclined surfaces in this manner, the banks 31 and the encapsulation films 33 formed on the planarization film 15 are each formed thick so that penetration of oxygen, moisture, Can be intrinsically blocked by the edge region of the film 15 and the bank 31 and the encapsulating film 33 formed thereon. Thus, deterioration in electrical characteristics of the thin film transistor 3 and the metal line formed under the planarizing film 15 can be prevented. Further, since the light emitting layer of each pixel of the organic light emitting element adjacent to the edge region of the planarization film due to moisture or oxygen becomes incapable of emitting light, the light emitting area can eventually be reduced.
FIGS. 3 to 8 are views showing a process of manufacturing the organic light emitting diode display of FIG. 1. FIG.
In the following description of the manufacturing process of the organic light emitting display device, the components already described with reference to FIG. 1 will be briefly described.
The contents omitted from the following description can be easily understood from the contents described above with reference to Fig.
As shown in Fig. 3, after the mask 100 is placed on the protective film 11, light can be irradiated.
The thin film transistor 3, the gate contact electrode 5, the gate insulating film 7, the protective film 11 and the planarization film 15 can be formed on the substrate 1 before the mask 100 is placed . Since these components have been described in detail above, detailed description thereof is omitted here.
The mask 100 may include a transmissive region 110, a blocking region 120, and a light amount regulating region 130.
The transmissive region 110 is a region that transmits light as it is, and the blocking region 120 is a region that blocks light.
The light amount adjusting region 130 is a region through which light amounts different from each other are transmitted according to a position. For example, the light amount controlling region 130 may be controlled so that a larger amount of light is transmitted from the active region A / A to the inactive region N / A.
The light amount adjusting region 130 may be formed in various ways.
For example, as shown in FIG. 9, the light amount adjusting region 130 may include a plurality of slits 133 having a constant width.
The gap between the slits 133 may be increased from the active area A / A to the inactive area N / A. The increase width of the interval between the slits 133 may be constant or may not be constant.
Due to the light amount control region 130, the amount of light transmitted through the light amount controlling region 130 can be increased from the active region A / A to the inactive region N / A.
For example, as shown in FIG. 10, the light amount adjusting region 130 may include a plurality of slits 133 having different widths.
The gap between the slits 133 may be increased from the active area A / A to the inactive area N / A. The increase width of the interval between the slits 133 may be constant or may not be constant.
The width of each slit 133 may be increased from the active area A / A to the inactive area N / A. The increase width of each slit 133 may be constant or may not be constant.
Due to the light amount control region 130, the amount of light transmitted through the light amount controlling region 130 can be increased from the active region A / A to the inactive region N / A.
For example, as shown in FIG. 11, the light amount adjusting region 130 may include a plurality of slits 133 having different widths.
The intervals between the slits 133 may be constant.
The width of each slit 133 may be increased from the active area A / A to the inactive area N / A. The increase width of each slit 133 may be constant or may not be constant.
Due to the light amount control region 130, the amount of light transmitted through the light amount controlling region 130 can be increased from the active region A / A to the inactive region N / A.
For example, as shown in FIGS. 12 and 13, the light amount adjusting region 130 may include a plurality of slits 133 having a constant width.
The gap between the slits 133 may be increased from the active area A / A to the inactive area N / A. The increase width of the interval between the slits 133 may be constant or may not be constant.
In addition, the side surface of each slit 133 may include projections and depressions 135.
The irregularities 135 may be inclined or rounded around the peak
As shown in Fig. 12, the irregularities 135 formed on the side surfaces of the slits 133 may have the same size.
13, the size of the unevenness 135 formed on the side surface of each slit 133 can be increased from the active area A / A to the inactive area N / A.
Due to the light amount control region 130, the amount of light transmitted through the light amount controlling region 130 can be increased from the active region A / A to the inactive region N / A.
Although not shown, a light amount adjusting region 130 having the same shape as that of FIG. 13 and having a width of each slit 133 from the active region A / A to the inactive region N / A may be used.
The amount of light adjustment region 130 close to the inactive region N / A can transmit a light amount substantially equal to or the same as that of the transmission region 110.
4, the planarizing film 15 corresponding to the transmissive region 110 of the mask 100 is completely irradiated with light and the planarizing film 15 corresponding to the blocking region 120 is irradiated with light The light is not irradiated.
The planarization layer 15 corresponding to the light amount control region 130 of the mask 100, that is, the edge region of the planarization layer 15, is exposed to different amounts of light. That is, the light amount gradually increased from the active area A / A to the inactive area N / A may be exposed to the edge area of the planarization layer 15.
The planarizing film 15 can be developed by a developing process. The planarization layer 15 corresponding to the transmissive region 110 of the mask 100 may be completely removed so that the protective layer 11 formed under the planarization layer 15 is exposed.
The edge area of the planarization layer 15 corresponding to the light amount control area 130 is gradually reduced from the active area A / A to the inactive area N / A And may be formed as an inclined surface.
5, an etching process is performed so that the protective film 11 is selectively patterned so that the first contact hole 17 and the gate connection electrode 9 (see FIG. 5), in which the drain electrode of the thin film transistor 3 is exposed, The second contact hole 19 may be formed.
The second contact hole 19 is a region where the gate pad electrode 13 is to be formed later.
As shown in FIG. 6, after the shadow mask is placed on the planarizing film 15, a deposition process can be performed.
The shadow mask 150 may include a transmissive region 160 and a blocking region 170.
The reflective electrode material and the organic luminescent material may be continuously deposited on the substrate 1 by the deposition process.
The reflective electrode material and the organic luminescent material are deposited on the planarization layer 15 corresponding to one transmissive region 160 of the shadow mask 150 to form the first electrode 21 and the organic luminescent layer 23, As shown in FIG. The first electrode 21 may be formed of the reflective electrode material, and the organic emission layer 23 may be formed of the organic emission material.
The first electrode 21 may be electrically connected to the drain electrode of the thin film transistor 3 through the first contact hole 17.
The first electrode 21 and the organic light emitting layer 23 may be formed separately in each pixel region. That is, the first electrode 21 formed in each pixel region and the organic light emitting layer 23 are separated from each other.
Therefore, different brightnesses can be realized for each pixel region by a driving current applied to the first electrode 21 of each pixel region.
The reflective electrode material and the organic light emitting material are deposited on the protective film 11 corresponding to another transmissive region 160 of the shadow mask 150 to form an electrode film 21a and an organic light emitting film 23a The gate pad electrode 13 may be formed of the same material.
The electrode film 21a may be formed of the reflective electrode material, and the organic light emitting layer 23a may be formed of the organic light emitting material.
The gate pad electrode 13, that is, the electrode film 21a may be electrically connected to the gate connection electrode 9 through the second contact hole 19.
7, the banks 31 may be formed on the planarization film 15. [ And the pixel region can be divided by the bank 31. [
Accordingly, the bank 31 may include a groove 53 in which the organic light emitting layer 23 of the pixel region is exposed. The groove 53 may be formed through the bank 31 to expose the organic light emitting layer 23.
The bank 31 may be formed to surround the first electrode 21 and the organic light emitting layer 23. That is, the bank 31 may be formed along the edge region of the upper surface of the organic light emitting layer 23. [
The bank 31 may be formed on an edge region of the planarizing film 15. [ The banks 31 formed on the edge regions of the planarizing film 15 are formed in the banks 31 formed on the upper surface of the planarizing film 15 and the banks 31 formed on the upper surface of the planarizing film 15, May be formed to have the same or substantially similar thickness.
The second electrode 25 may be formed on the bank 31 as shown in FIG.
The second electrode 25 may be formed in common to each pixel region. In other words, the second electrodes 25 formed on the pixel regions may be integrally connected to each other. The second electrode 25 may be formed in a plate shape in each pixel region.
The second electrode 25 may be in surface contact with the organic light emitting layer 23 of each pixel region through the groove 53.
A sealing film 33 may be formed on the second electrode 25 and the bank 31.
The sealing film 33 may include a multilayer film in which an organic film and an inorganic film are alternately stacked.
The sealing film 33 may include a multilayer film in which an organic film and an inorganic film are alternately stacked, and an adhesive film, a protective film, and a polarizing film formed on the multilayer film.
The sealing film 33 formed on the bank 31 corresponding to the edge region of the flattening film 15 is formed on the upper surface of the flattening film 15, The thickness of the sealing film 33 may be equal to or substantially the same as the thickness of the sealing film 33 formed on the bank 31 corresponding to the substrate 31. [
As described above, in the embodiment, the edge region of the planarization film 15 is formed as a sloped surface by using the mask having the light amount control region 130, 31 and the encapsulation film 33 are formed to be thick so that moisture and oxygen are prevented from being wetted and damage to the thin film transistor and the metal line can be prevented.

1: substrate 3: thin film transistor
5: Gate contact electrode 7: Gate insulating film
9: gate connecting electrode 11: protective film
13: gate pad electrode 15: planarization film
17, 19: contact hole 20: organic light emitting element
21: first electrode 23: organic light emitting layer
25: second electrode 31: bank
33: sealing film 35: data pad electrode
37: data connection electrode 41: power supply voltage pad electrode
43: power supply voltage connection electrode 53: groove
100: mask 110: transmission region
120: blocking area 130: light amount adjusting area
133: slit 135: concave and convex
150: Shadow mask 160: Transmission region
170: blocking area A / A: active area
E / A: Edge area N / A: Inactive area

Claims (20)

Forming a planarization film on a substrate including a thin film transistor and defining active and inactive regions;
Positioning a mask having at least a light amount control region on the planarization film;
Forming an inclined surface in the edge region of the planarization film corresponding to the light amount control region by irradiating light;
Forming a first electrode and an organic light emitting layer on the planarization layer;
Forming a bank to surround the first electrode and the organic light emitting layer;
Forming a second electrode on the bank and the organic light emitting layer; And
And forming a sealing film on the second electrode. The method according to claim 1,
And the bank and the sealing film are formed on edge regions of the planarizing film. The method according to claim 1,
Wherein the first electrode is connected to the thin film transistor through the planarization layer. The method according to claim 1,
Wherein an amount of light passing through the light amount adjusting region increases from the active region toward the inactive region. 5. The method of claim 4,
Wherein the light amount adjusting region includes a plurality of slits having a constant width,
Wherein the gap between the plurality of slits increases from the active region toward the inactive region. 6. The method of claim 5,
And a side surface of each of the plurality of slits has a concavo-convex shape. The method according to claim 6,
And the concavities and convexities of the plurality of slits have the same size. The method according to claim 6,
Wherein the size of the irregularities of each of the plurality of slits is increased from the active region toward the inactive region. 5. The method of claim 4,
Wherein the light amount adjusting region includes a plurality of slits having different widths. 10. The method of claim 9,
Wherein a width of each of the plurality of slits increases from the active region toward the inactive region. 10. The method of claim 9,
Wherein the gap between the plurality of slits increases from the active region toward the inactive region. 10. The method of claim 9,
Wherein the spacing between the plurality of slits is constant with respect to each other. delete delete delete delete delete delete A substrate on which an active region and an inactive region are defined;
A thin film transistor on the substrate;
A planarization film on the thin film transistor;
A first electrode and an organic emission layer on the planarization layer;
A bank formed to surround the first electrode and the organic light emitting layer;
A second electrode on the bank and the organic light emitting layer; And
And a sealing film on the second electrode,
And the side surface corresponding to the edge region of the planarization film is a tilted surface. 20. The method of claim 19,
Wherein an inclination angle between the inclined surface and the upper surface of the substrate has a range of 10 to 45 degrees.

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