KR101832561B1 - Resonator package and method for manufacturing the same - Google Patents

Resonator package and method for manufacturing the same Download PDF

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Publication number
KR101832561B1
KR101832561B1 KR1020150126960A KR20150126960A KR101832561B1 KR 101832561 B1 KR101832561 B1 KR 101832561B1 KR 1020150126960 A KR1020150126960 A KR 1020150126960A KR 20150126960 A KR20150126960 A KR 20150126960A KR 101832561 B1 KR101832561 B1 KR 101832561B1
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South Korea
Prior art keywords
lower electrode
hard mask
etching
electrode
etching step
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KR1020150126960A
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Korean (ko)
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KR20160137309A (en
Inventor
김태윤
이영규
이문철
이재창
김덕환
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삼성전기주식회사
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Priority to US15/058,713 priority Critical patent/US10367471B2/en
Priority to CN201610168833.8A priority patent/CN106169916B/en
Publication of KR20160137309A publication Critical patent/KR20160137309A/en
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Publication of KR101832561B1 publication Critical patent/KR101832561B1/en
Priority to US16/292,715 priority patent/US20190199319A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/02007Details of bulk acoustic wave devices
    • H03H9/02086Means for compensation or elimination of undesirable effects
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/15Constructional features of resonators consisting of piezoelectric or electrostrictive material
    • H03H9/17Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator
    • H03H9/178Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator of a laminated structure of multiple piezoelectric layers with inner electrodes

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  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Abstract

A method of fabricating a resonator package according to an embodiment of the present invention may include etching a lower electrode by a hard mask, wherein the lower electrode is etched only in a part of its thickness in at least one step.
In another aspect of the present invention, there is provided a resonator package comprising: a lower electrode provided on a second surface of a piezoelectric layer having an insulating layer on one surface thereof and formed at least in a portion different from a thickness of the piezoelectric layer; A dielectric layer provided on the other surface of the lower electrode, and an upper electrode provided on the other surface of the dielectric layer provided with the lower electrode on one surface.

Figure R1020150126960

Description

[0001] Resonator package and method for manufacturing same [0002]

The present invention relates to a resonator package and a method of manufacturing the same.

BACKGROUND ART [0002] With the recent rapid development of mobile communication devices, demands for ultra-small filters, oscillators and the like are increasing. A bulk acoustic wave (BAW) resonator is known as a means for implementing such a micro filter and an oscillator.

Such a bulk acoustic resonator is advantageous in that it can be mass-produced at a low cost and can be implemented in a very small size. In addition, a high quality factor, which is a main characteristic of the filter, can be obtained, and the filter can be used in a microwave frequency band.

In constructing the filter with the bulk acoustic resonator, a capacitor structure is often included in a chip in a circuit.

Here, the resonator is composed of a lower electrode, a piezoelectric layer and an upper electrode, and a capacitor is composed of a lower electrode, a dielectric layer, and an upper electrode. In order to simplify the process and reduce the material, the upper electrode of the resonator and the lower electrode of the capacitor The same material and the same process.

1 to 4, the upper electrode 10 ', the lower electrode 20', the dielectric layer 30 ', the piezoelectric layer 40', and the piezoelectric layer 40 ' ', And an insulating layer 50'. This is particularly shown in Figure 4 (e).

In order to secure the crystallinity of the piezoelectric layer 40 ', a metal such as Ru is frequently used for the lower electrode 20' deposited on the piezoelectric layer 40 'of the resonator. The patterning of the Ru metal is often implemented by dry etching using a hard mask HM such as oxide.

Conventionally, since the lower electrode 20 'of the capacitor is patterned by one dry etching using the hard mask HM, a reverse slope (RS) is likely to occur on the short side of the lower electrode 20'. That is, the gas G2 for etching the lower electrode 20 'can not be etched with respect to the hard mask HM, so that the uppermost portion of the lower electrode 20' adjacent to the hard mask HM is not etched, Only the lower electrode 20 'is etched to form a reverse-side mirror RS whose lower end portion is more etched.

Accordingly, the coverage of the dielectric layer 30 'formed on the upper surface of the lower electrode 20' of the capacitor becomes poor and a short between the upper electrode 10 'and the lower electrode 20' And the coverage of the upper electrode 10 'is poor.

The present invention provides a resonator package capable of preventing a short circuit between an upper electrode and a lower electrode of a capacitor and a problem of poor coverage of the upper electrode and a method of manufacturing the resonator package.

The method of fabricating a resonator package according to an embodiment of the present invention is characterized in that the lower electrode is etched by a hard mask while only a part of the thickness of the lower electrode is etched during formation of the lower electrode.

In other words, the method of manufacturing a resonator package according to an embodiment of the present invention includes a hard mask first etching step for performing a first etching for a hard mask provided on one surface of a lower electrode, a hard mask first etching step after the hard mask first etching step A lower electrode first etching step of performing a first etching on the lower electrode using the etched hard mask and etching only a part of the entire thickness of the lower electrode, a first etching step of etching the lower electrode first etching step after the lower electrode first etching step, A hard mask second etching step for performing a second etching for the hard mask and a second etching for the lower electrode subjected to the first etching using the hard mask secondarily etched after the hard mask second etching step May include a lower electrode second etching step.

In another aspect of the present invention, there is provided a resonator package comprising: a lower electrode provided on a second surface of a piezoelectric layer having an insulating layer on one surface thereof and formed at least in a portion different from a thickness of the piezoelectric layer; A dielectric layer provided on the other surface of the lower electrode, and an upper electrode provided on the other surface of the dielectric layer provided with the lower electrode on one surface.

Here, the lower electrode may have at least one of a stepped step and a regular slanted surface at one end thereof.

The resonator package of the present invention and its manufacturing method have an advantage of preventing a short circuit between an upper electrode and a lower electrode serving as capacitors.

In addition, there is an advantage that the coverage failure of the upper electrode can be prevented.

FIGS. 1 to 3 are photographs of a conventional resonator package, showing a short defect between the upper electrode and the lower electrode, and a poor coverage of the upper electrode.
4 shows a conventional method of manufacturing a resonator package.
5 is a view showing a method of manufacturing a resonator package of the present invention.

Hereinafter, specific embodiments of the present invention will be described in detail with reference to the drawings. It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the inventive concept. Other embodiments falling within the scope of the inventive concept may readily be suggested, but are also considered to be within the scope of the present invention.

The same reference numerals are used to designate the same components in the same reference numerals in the drawings of the embodiments.

The resonator package of the present invention and its manufacturing method have been proposed to prevent a problem that a short between the upper electrode 10 and the lower electrode 20 of the capacitor is generated and a coverage failure of the upper electrode 10 occurs.

Specifically, the resonator package of the present invention includes a lower electrode 20 provided on the other surface of a piezoelectric layer 40 having an insulating layer 50 formed on one surface thereof and formed at least in a part different in thickness from the other part, The dielectric layer 30 provided on the other surface of the lower electrode 20 provided with the layer 40 and the upper electrode 10 provided on the other surface of the dielectric layer 30 provided with the lower electrode 20 on one surface thereof .

In addition, the lower electrode 20 of the resonator package according to another embodiment of the present invention may have at least one stepped stepped portion and a regular slanted surface formed at one end thereof.

In other words, the resonator package according to an embodiment of the present invention includes an upper electrode 10, a lower electrode 20, a dielectric layer 30 located between the upper electrode 10 and the lower electrode 20, The piezoelectric layer 40 provided on the other surface opposite to one surface of the lower electrode 20 provided with the lower electrode 20 and the piezoelectric layer 40 provided on the lower surface of the piezoelectric layer 40, The lower electrode 20 may include at least one of a stepped stepped shape and a regularly sloped shape at one end thereof.

Here, the upper electrode 10 may be formed of copper (Cu) or titanium (Ti), and the lower electrode 20 may be formed of Ru or the like.

The upper electrode 10 and the lower electrode 20 may be electrically connected to the electrode wiring pattern. The electrode wiring pattern may extend to the lower side of the substrate, and an electrode pad may be provided on the electrode wiring pattern on the lower side of the substrate.

Particularly, since the lower electrode 20 is formed at a time of two or more etching operations to provide a transition section in which the thickness gradually becomes thinner, it is possible to prevent occurrence of a reverse slope and to improve the coverage defectiveness of the dielectric layer 30 The upper electrode 10 is formed on one side of the dielectric layer 30 but is provided on the other side of the dielectric layer 30 so that the upper electrode 10 is formed on one side of the dielectric layer 30, It is possible to prevent a problem that a short (S) due to contact with the lower electrode 20 occurs.

Accordingly, it is possible to prevent the coverage failure (Cf) of the upper electrode 10, thereby providing a resonator package having excellent quality.

In other words, as shown in FIGS. 1 to 4, since the conventional resonator package is patterned by the single dry etching using the hard mask HM, the lower electrode 20 'is formed on the short side of the lower electrode 20' Reverse Slope (RS) was easy to occur.

That is, the gas G2 for etching the lower electrode 20 'can not be etched with respect to the hard mask HM so that the upper portion of the lower electrode 20' adjacent to the hard mask HM is not etched, Only the lower-end lower electrode 20 'is etched to form a reverse-side mirror RS whose lower end portion is more etched.

This forms a discontinuous portion in the formation of the dielectric layer 30 'on the upper surface of the lower electrode 20', resulting in a poor coverage.

Accordingly, the upper electrode 10 'is formed discontinuously even when the upper electrode 10' is formed on the upper surface of the dielectric layer 30 ', so that the lower electrode 20' is connected to the upper electrode 10 ' Short, and the coverage of the upper electrode 10 'is poor.

However, according to the present invention, it is possible to prevent a reverse slope from being formed in the lower electrode 20 by the lower electrode 20 which is different in thickness from at least one portion. Accordingly, it is possible to prevent the defective coverage of the dielectric layer 30 and the upper electrode 10, and to prevent a short circuit between the upper electrode 10 and the lower electrode 20.

The lower electrode 20 may be formed in a shape such that a reverse slope RS is formed at one end of the lower electrode 20 and a shape of a normal slope NS is formed .

As another form of the lower electrode 20, a stepped step may be formed at one end of the lower electrode 20.

The insulating layer 50 is formed on the substrate and the insulating layer 50 may be formed of a material such as silicon dioxide (SiO 2) or aluminum oxide (Al 2 O 2) by chemical vapor deposition, RF magnetron sputtering Magnetron sputtering or evaporation on the substrate.

On the other hand, the piezoelectric layer 40 is a part causing a piezoelectric effect to convert electrical energy into mechanical energy in the form of elastic waves. The piezoelectric layer 40 is made of aluminum nitride (AlN), zinc oxide (ZnO), lead zirconium titanium oxide (PZT; PbZrTiO) .

The piezoelectric layer 40 filters a radio signal having a specific frequency by using a piezo electric effect.

The resonator package manufacturing method of the present invention is characterized in that the lower electrode 20 is etched by the hard mask HM while only a part of the thickness of the lower electrode 20 is etched during the formation of the lower electrode 20 .

In addition, the method of manufacturing a resonator package of the present invention may be characterized in that the etching of the lower electrode 20 is formed by at least two steps of etching with a hard mask HM patterned into at least two shapes.

Specifically, referring to FIG. 5, the resonator package manufacturing method of the present invention includes a hard mask (HM) first etching step (see FIG. 5) for performing a primary etching on the hard mask HM provided on one surface of the lower electrode 20 5 (b)), the lower electrode 20 is firstly etched using the hard mask HM which is first etched after the first etching step of the hard mask HM, 5 (c)) of the lower electrode 20 to etch only a part of the entire thickness of the hard mask HM after the first etching step of the lower electrode 20, (HM) second etching step (FIG. 5 (d)) for performing a secondary etching on the hard mask HM and the hard mask HM secondarily etched after the second hard mask HM And a second etching step (Fig. 5 (e)) of the lower electrode 20 for performing a secondary etching on the lower electrode 20 subjected to the primary etching.

As described above, the method of manufacturing the resonator package of the present invention is a method of patterning the lower electrode 20 by dry etching two or more times, and the soft mask SM is formed on the hard mask HM provided on one surface of the lower electrode 20, (HM) for performing a first-order etching on the hard mask (HM), removing the soft mask (SM) after the first hard mask (HM) The lower electrode 20 is formed by etching a portion of the entire thickness of the lower electrode 20 by etching the lower electrode 20 using the patterned hard mask HM, A first hard mask HM for performing a second etching using the soft mask SM on the hard mask HM firstly etched after the first etching step of the lower electrode 20, (HM) after the second etching step, And a second etching step of removing the soft mask SM and performing a secondary etching on the lower electrode 20 subjected to the primary etching using the hard mask HM having been secondarily patterned .

Here, in the present invention, the etching of the lower electrode 20 twice or more is performed for the following reason.

That is, according to the conventional technique, the gas G2 for etching the lower electrode 20 'can not be etched with respect to the hard mask HM, and the etching gas G2 is applied to the piezoelectric layer 40' The portion of the upper electrode 20 'adjacent to the hard mask HM is protected by the hard mask HM so that only the lower electrode 20' is etched and the lower electrode is etched more The problem of the occurrence of a short between the upper electrode 10 'and the lower electrode 20' and the coverage failure (Cf) of the upper electrode 10 'is generated because the reverse slope RS is formed To prevent it.

In order to implement the resonator package manufacturing method of the present invention, a preparation step including a hard mask (HM), a lower electrode 20, a piezoelectric layer 40, and an insulating layer 50 is performed. This preparation step is shown in Fig. 5 (a).

Thereafter, a hard mask (HM) first etching step for patterning the hard mask HM using a first etching gas G1 is performed on the lower electrode 20 in a shape to be patterned. The reason why the hard mask HM is patterned is that since the lower electrode 20 is formed of ruthenium and thus etching by the soft mask SM is difficult, To pattern the lower electrode (20).

That is, since the hard mask HM can be patterned by etching with the soft mask SM, the hard mask HM is first patterned, and then the hard mask HM is patterned using the patterned hard mask HM. The electrode 20 is patterned.

In other words, the hard mask (HM) first etching step of the resonator package manufacturing method of the present invention is performed by patterning the hard mask HM by a pattern of a soft mask SM provided on the hard mask HM .

Particularly, the present invention provides patterning of the lower electrode 20 using the hard mask HM more than two times so that a problematic reverse slope shape is not formed when the hard mask HM is used. This first hard mask (HM) etching step is shown in Fig. 5 (b).

The first etching gas G1 etches only the hard mask HM, and the lower electrode 20 is provided with a gas which is difficult to etch.

In other words, the hard mask (HM) first etching step of the method of manufacturing a resonator package of the present invention is characterized in that the lower electrode 20 is not etched but a first etching gas G1, which etches only the hard mask HM, Is performed using the above-mentioned method.

Meanwhile, a first etching step is performed on the lower electrode 20 for etching the lower electrode 20 after the first etching step of the hard mask HM. At this time, the etching of the lower electrode 20 And the second etching gas G2, which is difficult to etch for the hard mask HM, is used.

That is, the first etching step of the lower electrode 20 of the resonator package manufacturing method of the present invention is performed using a second etching gas which etches only the lower electrode 20 without etching the hard mask HM .

In the first etching step of the lower electrode 20, the entire thickness of the lower electrode 20 is not etched, but only a certain thickness is etched. When viewed in cross section of the lower electrode 20 , And step-like stepped portions are formed.

This is to induce the shape of a normal slope (NS) in order to prevent a reverse slope (RS) from being formed in the lower electrode 20 by the second etching gas G2.

This first etching step of the lower electrode 20 is shown in Fig. 5 (c).

After the first etching step of the lower electrode 20 is completed, a hard mask (HM) second etching step for performing the etching again on the hard mask HM is performed.

That is, a soft mask SM is provided on one side of the hard mask HM, and a second etching is performed on the hard mask HM by spraying a first etching gas G1.

In other words, the hard mask (HM) second etching step of the method of manufacturing a resonator package of the present invention is characterized in that the lower electrode 20 is not etched but a first etching gas G1, which etches only the hard mask HM, Is performed using the above-mentioned method.

Here, the second hard mask (HM) second etching step may be characterized in that the second hard mask HM is patterned by a pattern of a soft mask SM provided on the hard mask HM .

The first etching step of the lower electrode 20 is shown in Fig. 5 (d).

Next, when the second etching of the hard mask HM is completed, the lower electrode 20 performing a second etching for the lower electrode 20 is subjected to a second etching step, Since the lower electrode 20 is formed to include the step portion in the first etching step, when the second etching gas G2 is injected at the same flow rate, the lower electrode 20 is exposed to the piezoelectric layer 40 The thickness variation portion of the stepped portion is further formed with the regular slope NS because the etching of the edge portion is performed more frequently.

That is, the second etching step of the lower electrode 20 of the resonator package manufacturing method of the present invention is performed using a second etching gas which etches only the lower electrode 20 without etching the hard mask HM .

This second etching step of the lower electrode 20 is shown in Fig. 5 (e).

Then, a step of forming a dielectric layer 30 is performed, in which a dielectric layer 30 is formed on the etched lower electrode 20, which is shown in FIG. 5 (f).

A step of forming an upper electrode 10 for finally forming an upper electrode 10 on the dielectric layer 30 is performed after the step of forming the dielectric layer 30 as shown in Figure 5 (g).

The manufacture of the resonator package in this way prevents shorts (S) between the upper electrode 10 and the lower electrode 20, which has been experimentally proven.

In other words, when the resonator package was fabricated by the above-described method and the result of the electrostatic discharge (ESD) test was confirmed, when the conventional method was used, the defect due to the short (S) occurred at about 50% After the improvement by the method of the present invention, it was proved that a remarkable effect was obtained by issuing only about 1% of the shot (S) even at a higher voltage of 500 V.

10: upper electrode 20: lower electrode
30: dielectric layer 40: piezoelectric layer
50: insulation layer SM: soft mask
HM: Hard mask G1, G2: Etching gas

Claims (13)

Forming a piezoelectric layer;
Forming a lower electrode on the piezoelectric layer;
Forming a dielectric layer to cover the lower electrode; And
Forming an upper electrode on the dielectric layer so as to be disposed on the lower electrode;
/ RTI >
Wherein the forming of the lower electrode comprises etching a portion of the lower electrode so that the thickness of the lower electrode is stepped differently than the thickness of the other portions.
The method according to claim 1,
Wherein the etching of the lower electrode is formed by etching in at least two stages by a hard mask patterned into at least two shapes.
3. The method of claim 2,
A hard mask first etching step for performing a first etching for the hard mask provided on one surface of the lower electrode;
A lower electrode first etching step of performing a first etching on the lower electrode using the hard mask that is firstly etched after the hard mask first etching step, but etching only a part of the entire thickness of the lower electrode;
A hard mask second etching step of performing a second etching on the hard mask subjected to the first etching after the lower electrode first etching step; And
A lower electrode second etching step of performing a second etching on the lower electrode subjected to the first etching using the hard mask secondarily etched after the hard mask second etching step;
Gt; a < / RTI > resonator package.
delete delete The method of claim 3,
Wherein the hard mask first etching step and the hard mask second etching step pattern the hard mask by a pattern of a soft mask provided on the hard mask.
A piezoelectric layer;
A lower electrode formed on the piezoelectric layer and formed to be stepped differently from a thickness of a portion of the piezoelectric layer;
A dielectric layer formed to cover the lower electrode; And
An upper electrode formed on the dielectric layer so as to be disposed on the lower electrode;
≪ / RTI >
delete 8. The method of claim 7,
Wherein the lower electrode has a regular slope at one end.
At least one acoustic resonator having a piezoelectric layer between the first electrode and the second electrode; And
At least one capacitor located outside the acoustic resonator;
Lt; / RTI >
The capacitor
A lower electrode formed to have a stepped portion;
A dielectric layer located above the lower electrode to cover the step; And
An upper electrode positioned above the dielectric layer;
≪ / RTI >
11. The method of claim 10,
And the lower electrode is located on top of the piezoelectric layer.
12. The method of claim 11,
And an insulating layer located under the piezoelectric layer.
11. The method of claim 10,
And the lower electrode extends from the first electrode disposed on the piezoelectric layer.
KR1020150126960A 2015-05-21 2015-09-08 Resonator package and method for manufacturing the same KR101832561B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US15/058,713 US10367471B2 (en) 2015-05-21 2016-03-02 Resonator package and method of manufacturing the same
CN201610168833.8A CN106169916B (en) 2015-05-21 2016-03-23 Resonator package and method of manufacturing the same
US16/292,715 US20190199319A1 (en) 2015-05-21 2019-03-05 Resonator package and method of manufacturing the same

Applications Claiming Priority (2)

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KR1020150070825 2015-05-21
KR20150070825 2015-05-21

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003519919A (en) * 2000-01-07 2003-06-24 セイコーエプソン株式会社 Method for manufacturing thin film transistor
JP2010041051A (en) * 2008-08-06 2010-02-18 Tokyo Electron Ltd Method for utilizing multilayer/multi-input/multi-output (mlmimo) model to metal gate structure

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003519919A (en) * 2000-01-07 2003-06-24 セイコーエプソン株式会社 Method for manufacturing thin film transistor
JP2010041051A (en) * 2008-08-06 2010-02-18 Tokyo Electron Ltd Method for utilizing multilayer/multi-input/multi-output (mlmimo) model to metal gate structure

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