KR101821678B1 - Compound Semiconductor Thin Film Solar Cell having Mesh type Electrode and the Fabrication Method thereof - Google Patents

Abstract

The present invention relates to a compound semiconductor solar cell. Specifically, the compound semiconductor solar cell comprises: a substrate on which a rear electrode is formed; a light absorbing layer, which is a compound semiconductor, positioned in an upper part of the rear electrode; a semiconductor layer positioned in an upper part of the light absorbing layer, and being in contact with the light absorbing layer; and a mesh-type surface electrode positioned by being in contact with the surface of the semiconductor layer in an upper part of the semiconductor layer. The mesh-type surface electrode includes a conductive wire network, and is in surface-contact with the semiconductor layer. The compound semiconductor solar cell can be operated for a long period of time by improving reliability.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compound semiconductor solar cell having a meshed electrode,

The present invention relates to a compound semiconductor-based solar cell and a method of manufacturing the same, and more particularly, to a compound semiconductor-based solar cell having a very simple structure and suitable for mass production and commercialization, And more particularly, to a compound semiconductor-based solar cell equipped with the same.

Recently, as concerns about environmental problems and depletion of natural resources have increased, there is no problem about environmental pollution, and there is a growing interest in solar cells as energy-efficient alternative energy sources. Solar cells are classified into silicon semiconductor solar cells, compound semiconductor solar cells, and laminated solar cells, depending on their constituents. Compound solar cells based on CIGS are not only as efficient as silicon semiconductor solar cells, And it is very popular as a next-generation solar cell that can replace silicon semiconductor solar cells.

 However, the compound semiconductor-based solar cell is complicated in its lamination structure such as substrate-back electrode-light absorption layer-buffer layer-multilayered window layer-metal grid electrode, and in order to manufacture each layer, This is a situation where investment is required, and as a process that requires less mass production is required, it is hampering commercialization.

In order to solve such a problem, the applicant of the present invention has proposed a compound semiconductor based solar cell having a simple structure and capable of commercial mass production through Korean Patent No. 10-1568148. However, as a result of continuous research, it has been found that, in the case of a compound semiconductor solar cell in which a metal grid-window layer-buffer layer is implemented as a single composite layer as provided in Korean Patent No. 10-1568148, It is confirmed that there is a limit. Therefore, in order to develop a conventional solar cell having a simple structure and having a metal grid-window layer-buffer layer and a solar cell having higher efficiency than the solar cell provided in Korean Patent No. 10-1568148, As a result, the present invention has been completed.

Korean Patent No. 10-1568148

An object of the present invention is to provide a thin film type compound semiconductor solar cell which has an extremely simple lamination structure and is capable of simplifying a manufacturing process and reducing costs, is advantageous for commercialization, has excellent photoelectric conversion efficiency, .

A solar cell according to the present invention is a compound semiconductor solar cell, comprising: a substrate on which a rear electrode is formed; A light absorbing layer disposed on the rear electrode and being a compound semiconductor; A semiconductor layer disposed on the light absorption layer and in contact with the light absorption layer; And a mesh type front electrode disposed on the semiconductor layer in contact with the surface of the semiconductor layer, wherein the mesh type front electrode includes a network of conductive wires, and is in surface contact with the semiconductor layer.

In the solar cell according to an embodiment of the present invention, the mesh-type front electrode may include a capping layer that surrounds the surface of the conductive wire and bonds at least a part of the conductive wire to the surface of the semiconductor layer. have.

In the photovoltaic cell according to an embodiment of the present invention, the network of the conductive wires may be a structure in which conductive wires physically deformed to be irregularly intertwined to form a surface region parallel to the surface of the semiconductor layer by pressing.

In the solar cell according to an embodiment of the present invention, the capping layer may be a metal, a transparent conductive oxide, or a semiconductor.

In a solar cell according to an embodiment of the present invention, the semiconductor layer may be doped with an n-type dopant or may be doped with a dopant such as ZnS (O, OH), Zn (O, S), ZnS, CdS, Zn _x Cd ₁ one or two or more of them may be selected from _-x S (real number 0 <x <1), In ₂ S ₃ , In (OH, S), SnS ₂ , CdSe and ZnSe.

In the solar cell according to an embodiment of the present invention, the thickness of the capping layer may be 1 to 100 nm.

In the solar cell according to an embodiment of the present invention, the compound semiconductor of the light absorbing layer may be a compound which is a chalcogen compound of copper and one or more elements selected from group 12 to group 14.

A method of manufacturing a compound semiconductor solar cell according to the present invention comprises the steps of: a) forming a light absorbing layer which is a compound semiconductor on a substrate having a rear electrode formed thereon; b) forming a semiconductor layer on the light absorption layer so as to contact with the light absorption layer; c) applying a conductive wire to the surface of the semiconductor layer to form a conductive wire network; And d) forming a capping layer surrounding the surface of the conductive wire, the capping layer binding at least a portion of the conductive wire to the surface of the semiconductor layer.

In the manufacturing method according to an embodiment of the present invention, the step c) includes the steps of: c1) applying a conductive wire to the surface of the semiconductor layer to produce a structure in which conductive wires are irregularly entangled; And c2) compressing and physically deforming the structure.

In the manufacturing method according to an embodiment of the present invention, the capping layer in the step d) may be formed by vapor deposition or electrolytic plating.

The solar cell according to the present invention can be applied to a substrate-back electrode-light absorbing layer-buffer layer-not a conventional complex laminated film structure of a window layer-metal grid having a multi-layer structure of extrinsic and extrinsic, - Semiconductor layer - It has a simple structure of mesh type front electrode, simplification of device structure and fabrication process, and solar cell can be mass-produced at low cost, which is advantageous for commercialization.

In addition, the solar cell according to the present invention has a structure in which a semiconductor layer and a mesh-type front electrode that are in surface contact with the semiconductor layer are provided independently of each other, not in a structure in which a conductive network is embedded in the semiconductor layer, Can have a remarkably improved efficiency as compared with a solar cell composed of a single composite layer and can have the same or better efficiency as a conventional solar cell having a metal grid-window layer-buffer layer.

In addition, the solar cell according to the present invention includes a semiconductor layer and a mesh-type front electrode that is in surface contact with the semiconductor layer, not the structure in which a conductive network is embedded in the semiconductor layer. Therefore, the transparent conductive electrode, which is vulnerable to deterioration, There is an advantage of having improved reliability.

1 is a cross-sectional view of a solar cell according to an embodiment of the present invention,
2 is a cross-sectional view of a solar cell according to another embodiment of the present invention,
3 is a cross-sectional view of a solar cell according to another embodiment of the present invention,
4 is a process diagram illustrating a process of forming a conductive wire network in an embodiment of the present invention,
5 is a cross-sectional view illustrating a mesh-type front electrode portion in surface contact with a semiconductor layer and a semiconductor layer in an embodiment of the present invention.

Hereinafter, a compound semiconductor solar cell of the present invention and a method of manufacturing the same will be described in detail with reference to the accompanying drawings. The following drawings are provided by way of example so that those skilled in the art can fully understand the spirit of the present invention. Therefore, the present invention is not limited to the following drawings, but may be embodied in other forms, and the following drawings may be exaggerated in order to clarify the spirit of the present invention. Hereinafter, the technical and scientific terms used herein will be understood by those skilled in the art without departing from the scope of the present invention. Descriptions of known functions and configurations that may be unnecessarily blurred are omitted.

The present invention relates to a compound semiconductor solar cell having a conventional structure and a solar cell having a conventional structure and a solar cell having a structure proposed by the applicant of the present invention, A solar cell having photoelectric conversion efficiency superior to that of the solar cell provided in the Japanese Patent Registration No. 10-1568148 is provided.

A compound semiconductor solar cell according to the present invention includes: a substrate having a rear electrode formed thereon; A light absorbing layer disposed on the rear electrode and being a compound semiconductor; A semiconductor layer disposed on the light absorption layer and in contact with the light absorption layer; The mesh type front electrode includes a conductive wire network and is in surface contact with the semiconductor layer. The mesh type front electrode is disposed in contact with the semiconductor surface on the semiconductor.

The mesh-type front electrode positioned in contact with the semiconductor layer on the semiconductor layer and in surface contact with the semiconductor layer prevents the photocurrent from disappearing and the front electrode positioned in contact with the semiconductor layer has a porous structure, The photoelectric conversion efficiency can be improved. Furthermore, it can have a simpler structure, with the window layer and the metal grid excluded.

In the solar cell according to an embodiment of the present invention, the surface contact between the mesh-type front electrode and the semiconductor layer may be performed by a capping layer surrounding the conductive wire network itself or the conductive wire network. That is, the mesh-type front electrode includes a capping layer that surrounds the surface of the conductive wire itself or the conductive wire that forms the conductive wire network, and binds at least a part of the conductive wire to the surface of the semiconductor layer .

1, a solar cell according to an embodiment of the present invention includes a substrate 100, a rear electrode 200 disposed on the substrate 100, and a rear electrode 200 disposed on the rear electrode 200. [ A semiconductor layer 400 disposed on the light absorbing layer 300 and in contact with the light absorbing layer 300; a semiconductor layer 400 disposed on the semiconductor layer 400 in contact with the surface of the semiconductor layer 400; Shaped front electrode 500 includes a network of conductive wires 510 and a conductive wire 510 may be in surface contact with the semiconductor layer 400. [

2, a solar cell according to an embodiment of the present invention includes a substrate 100, a rear electrode 200 positioned on the substrate 100, and a rear electrode 200 disposed on the rear electrode 200. [ A semiconductor layer 400 disposed on the light absorbing layer 300 and in contact with the light absorbing layer 300; a semiconductor layer 400 disposed on the semiconductor layer 400 in contact with the surface of the semiconductor layer 400; Shaped front electrode 500 surrounds the surface of the network of conductive wires 510 and the surface of the conductive wire 510 and connects the conductive wire 510 network to the semiconductor layer 400 And the mesh type front electrode 500 may be in surface contact with the semiconductor layer 400 by the capping layer 520. [

When the mesh-like front electrode 500 includes the capping layer 520, the front electrode may have a shape corresponding to that of the conductive wire network. In detail, the front electrode having the shape corresponding to the conductive wire network means that the front electrode has the same shape as the shape of the conductive wire network, but the size is the same or larger. At this time, the same shape may mean that intentional shape modification is not performed. That is, the front electrode has the same shape as that of the conductive wire network, but may have a structure in which the size thereof is increased by the capping layer.

1 and 2, a solar cell according to an exemplary embodiment of the present invention is characterized in that all the surfaces of the semiconductor layer are not covered with the front electrodes, and the front electrodes are made of a porous (A region of the semiconductor layer) that is not covered with the front electrode and exposed to the surface (the region of the semiconductor layer) due to the network structure and is exposed to the surface without being covered by the front electrode (Region of the semiconductor layer) may be uniformly mixed.

In addition, as shown in Fig. 1, the conductive wire network itself providing a low-resistance optical path can be in surface contact with the semiconductor layer, and as shown in Fig. 2, Layer contact with the layer. 3, the front electrode 500 includes a network of conductive wires 510 and a capping layer 520, wherein both the network of the conductive wires 510 and the capping layer 520 Or may be in surface contact with the semiconductor layer.

When the front electrode, together with the capping layer, includes a network of conductive wires having a smooth curvilinear cross-section, as in the example shown in Fig. 2, after the conductive wire is applied to the surface of the semiconductor layer, a capping layer By a very simple and easy process to form, a mesh-type front electrode having stable electrical conductivity and strongly bonded to the semiconductor layer can be formed, which is more commercial.

In addition, a porous network structure in which strip-shaped conductive members as shown in FIG. 1 are regularly or irregularly connected, can be manufactured by a deposition process using a deposition mask or the like. However, as the mask itself is expensive, it is inevitable to raise the cost, and furthermore, the deposition process requires a high vacuum, requires expensive precursor materials, slows the processing speed, and decreases the productivity with increasing process cost.

In order to solve such a problem, as shown in FIG. 1, a conductive wire network in surface contact with a semiconductor layer may be a structure in which conductive wires, which are physically deformed to form a surface region parallel to the surface of the semiconductor layer, are irregularly entangled have.

In detail, FIG. 4 is a process diagram showing the formation process of the conductive wire network of FIG. 1 or FIG. Applying an electrically conductive wire 510 'as it is in an as-fabricated or purchased state to the surface of the semiconductor layer 400 without artificial physical deformation, as in the example shown in FIG. 4; And pressing the applied conductive wire 510 'to produce a physically deformed conductive wire 510 having a surface area parallel to the surface of the semiconductor layer 400. 4, a network of conductive wires 510 in surface contact with the semiconductor layer 400 by physical compression can be formed without using a deposition requiring high cost and difficult process control. At this time, the metal wires can be bonded to each other by compression bonding. It goes without saying that the compression force for deformation can be appropriately adjusted depending on the degree of deformation and the kind of the metal wire. In a specific, non-limiting example, when the metal wire is a metal of FCC structure such as silver, it may be pressed at a pressure of 1 to 100 MPa.

It is preferable that the capping layer be provided even when the conductive wire network is in surface contact with the semiconductor layer by a conductive wire that is physically deformed so that a surface region parallel to the surface of the semiconductor layer is formed by compression.

This is because, even if a physical contact between the conductive wire network and the semiconductor layer occurs due to the physical deformation of the conductive wire, the interface adhesion between the conductive wire and the semiconductor layer is weak, and uniform surface contact is difficult.

As described above with reference to FIGS. 2 and 3, the mesh-like front electrode includes a conductive wire network and a capping layer surrounding the conductive wire network and binding the conductive wire network to the semiconductor layer.

The capping layer which surrounds the conductive wire network and binds the conductive wire network to the semiconductor layer can greatly improve the adhesion between the conductive wire network and the semiconductor layer and also allows the conductive wires to contact each other more strongly and stably So that the contact resistance between the conductive wires can be reduced. This means that the internal resistance of the solar cell, including the resistance of the conductive wire network itself, and the interface resistance between the front electrode and the semiconductor layer, can be significantly reduced by the capping layer.

Further, the capping layer can direct the flow of the photocurrent to guide the photocurrent toward the conductive wire network, and can also serve to alleviate the sharp energy level difference between the conductive wire and the semiconductor layer have. In addition, the capping layer surrounding the conductive wire network can protect the conductive wire network from the external environment, preventing the electrical characteristics of the conductive wire network from deteriorating, and also serve as a protective layer for protecting the conductive wire network have.

Particularly, it is very important that the capping material of the capping layer is wrapped around the conductive wire network so that the entire space of the conductive wire network is not filled up, and that even after the capping layer is formed, the front electrode can maintain the shape corresponding to the shape of the conductive wire network Do.

This is because when the capping material of the capping layer fills all the empty space of the conductive wire network and a structure in which a conductive network is embedded substantially in the capping material of the capping layer is formed, .

The capping layer preferably has a thickness of 1 to 100 nm in view of the improvement of the adhesion with the semiconductor layer, the prevention of the photocurrent loss due to the charge transfer in the in-plane direction, and the increase of the incident light amount by the porous structure.

In a solar cell according to an embodiment of the present invention, the capping material of the capping layer may be a metal, a transparent conductive oxide, or a semiconductor material. At this time, the capping material of the capping layer is preferably a semiconductor material so as to serve as a protective layer for protecting the conductive wire from the outside, such as prevention of oxidation of the conductive wire, and to ensure stable electrical contact between the semiconductor layer and the conductive wire.

In the solar cell according to an embodiment of the present invention, the compound semiconductor forming the light absorbing layer may be a chalcogen compound of copper and one or more elements selected from group 12 to group 14. Specifically, the compound semiconductor may include a copper-indium-chalcogen compound, a copper-indium-gallium-chalcogen compound, or a copper-zinc-tin-chalcogen compound. More specifically, the compound semiconductor may be CIS (Cu-In-Se or Cu-In-S), CIGS (Cu-In-Ga-Se or Cu- -S), CZTS (Cu-Zn-Sn-Se or Cu-Zn-Sn-S) or CZTSS (Cu-Zn-Sn-Se-S). More specifically, the compound semiconductor is _{CuIn x Ga 1-x Se 2} (0 <x <1 in _{real), CuIn x Ga 1-x} S2 (0 <x <1 in real), CuIn _x Ga _1-x than ( _{Se y S 1-y) 2} (0 <x <1 a real, 0 <y <1 is _{accidentally), Cu 2 Zn x Sn 1} -x Se 4 (0 <x <1 in real), Cu ₂ Zn _x Sn _1-x S ₄ (real number with 0 <x <1) or Cu ₂ Zn _x Sn _1-x (Se _y S _{1 -y} ) ₄ (real number with 0 < However, the present invention is not limited thereto, and a chalcogen compound may be used as a light absorbing layer used in a conventional compound semiconductor-based solar cell. The thickness of the light absorbing layer is not particularly limited as long as the thickness of the light absorbing layer used in a typical compound semiconductor based solar cell is sufficient and can be, for example, from 1.5 to 3 탆. Of course.

The semiconductor layer provided on the light absorbing layer forms a light absorbing layer and a built-in potential (pn junction, depletion layer). Electrons can be selectively and spontaneously moved from the light absorbing layer to the semiconductor layer, and the lattice constant And can form a high-quality interface. As a specific example, when the compound semiconductor is a chalcogen compound of copper and one or more selected elements from Groups 12-14, the semiconductor layer may comprise a buffer material used as a buffer layer in conventional compound semiconductor solar cells.

Specifically, the semiconductor layer may be doped with an n-type dopant or ZnS (O, OH), Zn (O, S), ZnS, CdS, Zn _x Cd ₁ -xS <1, real number), In ₂ S ₃ , In (OH, S), SnS ₂ , CdSe and ZnSe. Hereinafter, the case of doping with an n-type dopant is referred to as extrinsic, and the case of not doping with a conductive impurity including an n-type dopant and a p-type dopant is referred to as intrinsic. More specifically, the semiconductor layer is made of a material selected from the group consisting of extrinsic ZnS (O, OH), extrinsic Zn (O, S), extrinsic ZnS, extrinsic CdS, extrinsic Zn _x Cd _{1 -x} S (OH, S), extrinsic SnS ₂ , extrinsic CdSe, extrinsic ZnSe, intrinsic ZnS (0 <x <1), extrinsic In ₂ S ₃ , (O, OH), intrinsic Zn (O, S), intrinsic ZnS, intrinsic CdS, intrinsic Zn _x Cd _{1 -x} S (0 <x <1), intrinsic In ₂ S ₃ , One or more selected from lignin In (OH, S), intrinsic SnS ₂ , intrinsic CdSe and intrinsic ZnSe.

At this time, when the semiconductor layer contains an n-type dopant (when it contains an extrinsic semiconductor material), it means that at least a part of the semiconductor layer is doped with an n-type dopant. When the semiconductor layer is doped with an n-type dopant, the concentration of the n-type dopant can be changed in the thickness direction, which is the direction from the surface in contact with the light absorbing layer of the semiconductor layer to the facing surface thereof. Specifically, the concentration of the n-type dopant in the semiconductor layer may continuously or discontinuously increase in the thickness direction, which is the direction from the surface in contact with the light absorbing layer to the facing surface thereof. In this case, the discontinuous increase also includes a structure in which an extrinsic region doped with an n-type dopant is located above the intrinsic region not doped with an n-type dopant, and the doping profile of the n-type dopant in the extrinsic region Direction) can be continuously or discontinuously increased. The intrinsic region is composed of intrinsic ZnS (O, OH), intrinsic Zn (O, S), intrinsic ZnS, intrinsic CdS, intrinsic Zn _x Cd _{1 -x} S (0 < ), Intrinsic In ₂ S ₃ , intrinsic In (OH, S), intrinsic SnS ₂ , intrinsic CdSe, and intrinsic ZnSe, and the extrinsic region may include extrinsic Extrinsic ZnS, extrinsic CdS, extrinsic Zn _x Cd _{1 -x} S (real number 0 <x <1), extrinsic ZnS (O, OH), extrinsic Zn And may include one or more selected from the group consisting of In ₂ S ₃ , Ext ₂ In ₃ (OH, S), Extrinsic SnS ₂ , Extrinsic CdSe and Extrinsic ZnSe. In this case, the semiconductor layer may have a structure in which the intrinsic region and the extrinsic region are sequentially formed in the thickness direction, or the n-type dopant may have a profile continuously or discontinuously increasing in the thickness direction (from the light absorption layer to the front electrode direction) have.

The n-type dopant is one or more elements selected from Al, Ga, B, Sn, Sb, F, Cl, Mn, Co, Ni, Fe, Ti, Mo, Nb, P, O, In, More specifically, one or more elements selected from Ga, Al, BIn, F, Cr and Zn may be mentioned.

The semiconductor layer contains an n-type dopant and the n-type dopant has a concentration profile continuously or discontinuously increasing in the thickness direction of the semiconductor layer, whereby a stable and wide depletion layer can be formed between the light absorption layer and the semiconductor layer, Photoelectrons can be separated and moved.

The conductive wire of the conductive wire network may be a metal wire and the conductive wire network may further comprise a conductive carbon body such as a carbon nanotube, a conductive carbon wire (conductive carbon fiber), and a graphene together with a metal wire. That is, the conductive wire network is a network structure in which metal wires are irregularly in contact with each other to provide a continuous current path for movement, or between metal wires, between conductive metal pieces and between metal wires and conductive carbon bodies irregularly contact each other, Or the like. The metal of the metal wire may be one or more selected from gold, silver, aluminum, copper, and the like, but is not limited thereto, and may be used as long as it is stable and has excellent electrical conductivity. The carbon nanotubes can be single-walled, double walled, thin multi-walled, multi-walled, roped or a mixture thereof. Graphene may be single layer graphene, multilayer graphene, or a mixture thereof.

The short axis diameter of the conductive wire may be from 5 nm to 100 μm and the short axis ratio of the conductive wire may be 50 to 20,000 in view of providing a smooth current path even by simple contact between the conductive wires. As described above with reference to Fig. 4, when the surface contact between the conductive wire and the semiconductor layer is made by the physically deformed conductive wire, it is advantageous that the conductive wire is microwire. As a specific example, the micro-wire may mean a wire having a minor axis diameter of 0.5 to 100 m. It is also advantageous that the conductive wires are nanowires when the conductive wire network is physically unified, by integrally joining the metal wires irregularly contacted or tangled by heat or light. As a specific example, a nanowire may mean a wire having a minor axis diameter of 5 to 500 nm, more specifically 5 to 100 nm.

The conductive wire network may be a structure in which conductive wires are physically contacted with each other or intertwined structures, or an integral structure in which portions where conductive wires are in contact with each other are fusion-bonded. In detail, the conductive wire network may be a structure of a conductive wire in which conductive wires are in contact with each other at random, and in which a contact region in contact with each other by heat or light is fusion-bonded. It is needless to say that the heat treatment temperature and the light irradiation conditions can be appropriately adjusted depending on the material of the conductive wire. In a specific, non-limiting example, when the conductive wire is silver, the heat treatment temperature may be 80 to 250 DEG C, and the light irradiation may be performed by irradiating the white light source including the xenon lamp with a short pulse or an intensity of 5 to 50 J / Pulse irradiation.

The conductive wire network has a surface coverage of 1% to 15%, which is the area covered by the conductive wire network by the conductive wire network, on the projection image of the conductive wire network, relative to the surface of the semiconductor layer where the conductive wire network is located. Lt; / RTI &gt; Specifically, the surface coverage may be a value * 100 (%) on the projected image of the conductive network, the area covered by the surface of the semiconductor layer by the conductive wire network divided by the surface area of the semiconductor layer where the conductive wire network is located . At this time, the projected image of the conductive wire network may be a two-dimensional image of a conductive wire network formed by irradiating parallel light in the direction of lamination of the light absorption layer and the semiconductor layer. When the conductive wire network has such a surface coverage, the current path can be stably formed, and at the same time, a decrease in the light transmittance due to the front electrode can be prevented. That is, a solar cell according to an embodiment of the present invention may contain a conductive wire network such that the above-described surface coverage is 1% to 15%, preferably 2% to 10%, and more preferably 3% to 5% Conductivity wire networks can have a sheet resistance of less than or equal to tens of ohms / square (Ω / sq.) When coverage is greater than 1%. Also, when the surface coverage is greater than 10%, the conductive wire network may have a sheet resistance of less than or equal to several ohms / square (Ω / sq.). The sheet resistance of several ohm / square (Ω / sq.) Or less is similar or equivalent electrical conductivity to the conventional metal grid electrode.

The capping layer may be a surface coating layer which surrounds the conductive wires irregularly contacting with each other, and may have a thickness of 1 to 100 nm, and preferably 5 to 50 nm, more preferably 10 to 30 nm at the stable surface contact side.

Specifically, the capping material of the capping layer is selected from the group consisting of gold, silver, aluminum, copper and the like; A transparent conductive oxide selected from the group consisting of fluorine-containing tin oxide (FTO), indium doped tin oxide (ITO), and gallium-containing zinc oxide (GZO); (O, OH), Zn (O, S), ZnS, CdS, Zn _x Cd _{1 -x} S (0 <x <1), which is doped with an n-type dopant or not doped with an n- In ₂ S ₃ , In (OH, S), SnS ₂ , CdSe and ZnSe. The n-type dopant may be one or more selected from Al, Ga, B, Sn, Sb, F, Cl, Mn, Co, Ni, Fe, Ti, Mo, Nb, P, O, In, And one or more elements selected from Ga, Al, B In, F, Cr, and Zn.

The substrate 100 may serve as a support and may include a rigid substrate or a flexible substrate. Specific examples of the rigid substrate include glass substrates containing soda lime glass, ceramic substrates such as alumina, and metal substrates such as stainless steel and copper. As a specific example of the flexible substrate, a polymer substrate such as polyimide, a metal foil such as a stainless steel foil, and the like can be mentioned, but it is needless to say that the present invention can not be limited by the material described.

The rear electrode 200 has high electrical conductivity and can form an ohmic contact with the compound semiconductor of the light absorbing layer 300. The rear electrode 200 may be a material stable in a chalcogen atmosphere, The material used for the back electrode is sufficient. As an example of a specific rear electrode, molybdenum (Mo) may be mentioned, but it goes without saying that the present invention can not be limited by the material of the rear electrode (rear electrode). The thickness of the back electrode may be any thickness that is used in a conventional compound semiconductor-based solar cell. For example, the thickness of the back electrode may range from 0.5 to 2 탆. However, the present invention is not limited to the thickness of the back electrode Of course not.

As described above, in the solar cell according to an embodiment of the present invention, the mesh type front electrode may be provided in contact with the surface of the semiconductor layer, and the porous type of the mesh type front electrode may have a shape in which the front electrode corresponds to the conductive wire network It can be attributed to having. That is, even though the front electrode includes the capping layer, the capping layer is provided in the form of a coating film that coats the surface of the conductive wire network in which the conductive wires are irregularly in contact with each other, And the porosity of the conductive wire network is maintained.

5 is a cross-sectional view illustrating a cross section of a mesh-type front electrode, a semiconductor layer 400, and a light absorption layer 300 in a solar cell according to an embodiment of the present invention. 5A is a cross-sectional view taken along the longitudinal direction of one conductive wire constituting the conductive network, and FIG. 5B is a cross-sectional view showing a cross-section perpendicular to the longitudinal direction of one conductive wire constituting the conductive network In detail, AA, BB, and CC in Fig. 5 (a). Fig.

In order to improve the photoelectric conversion efficiency of the solar cell, the photoabsorption layer must be polycrystalline in nature, and further, the crystal grains of the compound semiconductor are more advantageous. Accordingly, in the compound semiconductor-based solar cell, the surface of the light absorbing layer is usually present in a step between crystal grains (crystal grains of the compound semiconductor). That is, the light absorbing layer does not have a substantially complete planar surface, but has a rough surface where certain irregularities exist. When the crystal grains are coarsened, the step between the irregularities becomes larger due to coarse crystal grains. The semiconductor layer located on the light absorption layer also has a surface unevenness (step difference) similar to the light absorption layer due to the surface unevenness (step difference) of the light absorption layer.

As shown in Fig. 5 (a), due to unavoidable surface irregularities on the surface of the semiconductor layer, the conductive wire constituting the conductive wire network partly contacts the semiconductor layer and other parts are not in contact with the semiconductor layer It may float above the semiconductor layer. Thus, when forming the network of conductive wires on the surface of the semiconductor layer by the application of the conductive wires, a part of the network of the conductive wires comes into contact with the semiconductor layer at random and the other part does not come into physical contact with the semiconductor layer, And not only an increase in the interface resistance between the semiconductor layers but also an unstable physical contact. The capping layer can firmly attach the conductive wire network to the semiconductor layer, such as soldering, and provide a stable, directional current path to the conductive wire. At this time, the mesh-type front electrode may be formed on the capping layer 520 in a state where the conductive wire 510 is in contact with the semiconductor layer 400, as shown in a cross-sectional view of AA in FIGS. 5A and 5B The conductive wire 510 itself may be bonded to the semiconductor layer 400 and may be in surface contact with the semiconductor layer 400. As shown in the sectional view of CC in Figures 5A and 5B, The conductive wire 510 is bonded to the semiconductor layer 400 through the capping layer 520 and may be in surface contact with the semiconductor layer 400 by the capping layer 520. [ At this time, the portion of the conductive wire network that is not bonded to the semiconductor layer may be in a state of being capped by the capping layer as shown in the sectional view of BB in Figs. 5 (a) and 5 Or floating over the semiconductor layer in an untouched state.

As shown in FIG. 5, the solar cell according to an embodiment of the present invention is particularly effective in a more realistic case where fine irregularities exist on the surface of the light absorbing layer.

The present invention provides a method of manufacturing the above-described compound semiconductor solar cell. At this time, the material, structure, shape (size) and the like of each layer are the same or similar to those of the above-described compound semiconductor solar cell.

A manufacturing method according to the present invention comprises the steps of: a) forming a light absorbing layer which is a compound semiconductor on a substrate on which a rear electrode is formed; b) forming a semiconductor layer on the light absorption layer so as to contact with the light absorption layer; c) applying a conductive wire to the surface of the semiconductor layer to form a conductive wire network; And d) forming a capping layer surrounding the surface of the conductive wire, the capping layer binding at least a portion of the conductive wire to the surface of the semiconductor layer.

In the step a), the light absorbing layer may be a method of producing a known chalcogen compound-based light absorbing layer. For example, a light absorbing layer growth method known in Korean Patent Publication No. 2009-0043245, US Patent No. 7,547,569, US Patent No. 6,258,620, US Patent No. 5,981,868, and the like can be used. By way of non-limiting example, the light absorbing layer can be formed by any of a variety of methods including simultaneous evaporation, sputtering + selenization, electrodeposition, ink printing in which a precursor ink in powder or colloid state is applied and sintered, Pyrolysis method or the like.

The semiconductor layer in step b) may be performed using conventional well known deposition methods. For example, the semiconductor layer may be formed by a chemical vapor deposition (CBD), a successive ionic layer adsorption and reaction (SILAR), a spin coating, a spray coating, a dip coating, a chemical vapor deposition (metal organic chemical vapor deposition), an atomic layer deposition, a sputtering Sputtering method), evaporation deposition method, oxidation method, sulfiding method and the like. At this time, when the semiconductor layer contains an n-type dopant, the concentration profile of the n-type dopant depending on the thickness of the semiconductor layer can be controlled by controlling the supply amount or supply amount of the n-type dopant only when the semiconductor material of the semiconductor layer is deposited .

Step c) may be a step of applying a dispersion in which a conductive wire is dispersed to a semiconductor layer and drying the same to form a conductive wire network, or placing an integrally formed conductive wire network on the semiconductor to contact the semiconductor layer. The conductive wire dispersion may be applied by spin coating, spray coating, dip coating, vacuum filtration, Meyer rod coating, or the like.

The capping layer of step d) may be formed by vapor deposition or electroplating. Specifically, the electrolytic plating can be performed by using a conductive wire network as a single electrode, and more specifically, it is possible to charge a substrate formed with a conductive wire network into a plating bath containing ions of an element constituting the capping material, And then applying a current as one electrode. It is needless to say that the other one electrode may be an ion source at the time of electrolytic plating. Electroplating may be performed in a conventionally known plating bath and conditions depending on the material of the capping layer. As a specific example, when the capping layer is a metal such as copper, a copper plating bath containing copper sulfate, sulfuric acid, chlorine, a brightener or the like is used and a current is applied in the form of a direct current (DC) So that plating can be performed. As a specific example, when the capping layer is a semiconductor such as CdS, plating may be performed using a plating bath containing CdCl ₂ and Na ₂ S ₂ O ₃ as is known. Alternatively, the capping layer may be formed by deposition, and the deposition may be performed using a conventionally known chemical vapor deposition method (organometallic chemical vapor deposition) or the like, and a conductive wire network may provide a preferential nucleation site can do.

In the manufacturing method according to an embodiment of the present invention, the step c) includes the steps of: c1) applying a conductive wire to the surface of the semiconductor layer to produce a structure in which conductive wires are irregularly entangled; And c2) compressing and physically deforming the structure. The step c1) may be a step of coating the semiconductor layer with a dispersion solution in which the conductive wire is dispersed and drying the solution to form a structure. The dispersion may be applied by spin coating, spray coating, dip coating, vacuum filtration, A Meyer rod coating or the like may be used. Step c2) can be carried out by pressing the structure produced in the step c1) using a flat plate-shaped or roller-shaped pressing member. It is a matter of course that the compressive force for deformation can be appropriately adjusted in consideration of the degree of deformation and the material of the conductive wire. In a specific, non-limiting example, when the metal wire is a metal of FCC structure such as silver, it may be pressed at a pressure of 1 to 100 MPa. the metal wires constituting the structure are physically deformed by the pressing of the step c2), and at the same time, the binding between the metal wires can be performed.

Alternatively, the step c) may include the step of applying light or heat to the structure c3), after the step c1), before or after the step c2, and melt bonding the contact area where the conductive wires are in contact with each other. That is, the conductive wires are brought into contact with each other at random or by applying light or heat to the entangled structure, thereby fusing the contact areas between the conductive wires to produce a single physically uniform network rather than individual wires. Such an integral network is advantageous for a flexible solar cell because the contact resistance between the conductive wires is remarkably low, which is advantageous for electric conduction and the network can be stably maintained even with repeated physical deformation.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, Those skilled in the art will recognize that many modifications and variations are possible in light of the above teachings.

Accordingly, the spirit of the present invention should not be construed as being limited to the embodiments described, and all of the equivalents or equivalents of the claims, as well as the following claims, belong to the scope of the present invention .

Claims (10)

A substrate having a rear electrode formed thereon;
A light absorbing layer disposed on the rear electrode and being a compound semiconductor;
A semiconductor layer disposed on the light absorption layer and in contact with the light absorption layer, the semiconductor layer having surface irregularities;
And a mesh type front electrode disposed on the semiconductor layer in contact with the surface of the semiconductor layer,
The mesh-type front electrode has a porous network structure including a network of conductive wires,
Wherein the conductive wire includes a surface region parallel to a surface having irregularities of the semiconductor layer, the surface region and the surface of the semiconductor layer are in surface contact with each other,
Wherein the conductive wire is a nanowire having a minor axis diameter of 5 to 500 nm,
The mesh-type front electrode includes a capping layer surrounding the surface of the conductive wire and binding at least a part of the conductive wire to the surface of the semiconductor layer,
Wherein the capping layer is a semiconductor. delete The method according to claim 1,
Wherein the network of conductive wires is a structure in which conductive wires are physically deformed to be irregularly entangled to form a surface region parallel to the surface of the semiconductor layer by pressing. delete The method according to claim 1,
The semiconductor layer may be doped with an n-type dopant or may be doped with ZnS (O, OH), Zn (O, S), ZnS, CdS, Zn _x Cd _{1 -x} S In ₂ S ₃ , In (OH, S), SnS ₂ , CdSe and ZnSe. The method according to claim 1,
Wherein the capping layer is 1 to 100 nm thick. The method according to claim 1,
Wherein the compound semiconductor of the light absorbing layer is a chalcogen compound of copper and one or more elements selected from group 12 to group 14. a) forming a light absorption layer which is a compound semiconductor on a substrate on which a rear electrode is formed;
b) forming a semiconductor layer on the light absorption layer so as to contact with the light absorption layer;
c) forming a mesh-type front electrode by applying a conductive wire to the surface of the semiconductor layer to form a conductive wire network; And
d) forming a capping layer surrounding the surface of the conductive wire and binding at least a portion of the conductive wire to the surface of the semiconductor layer;
/ RTI &gt;
The mesh-type front electrode has a porous network structure including a network of conductive wires,
Wherein the conductive wire includes a surface region parallel to a surface having irregularities of the semiconductor layer, the surface region and the surface of the semiconductor layer are in surface contact with each other,
Wherein the conductive wire is a nanowire having a minor axis diameter of 5 to 500 nm,
Wherein the capping layer is a semiconductor. 9. The method of claim 8,
The step c)
c1) applying a conductive wire to the surface of the semiconductor layer to produce a structure in which the conductive wire is irregularly entangled; And
c2) compressing and physically deforming the structure;
Wherein the method comprises the steps of: 9. The method of claim 8,
Wherein the capping layer in step d) is formed by vapor deposition or electrolytic plating.

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