KR101814598B1 - Display panel and display device including the same - Google Patents

Abstract

A display panel according to an embodiment of the present invention includes a substrate including a pixel region and a pad region, a first conductive line and a second conductive line stacked on the substrate, 1 portion and a second portion disposed on the pad region, the second conductive line including a first portion disposed on the pixel region and a second portion disposed on the pad region, The first portion of the first conductive line and the first portion of the second conductive line are parallel to each other and the second portion of the first conductive line and the second portion of the second conductive line may vertically overlap have.

Description

[0001] The present invention relates to a display panel and a display device including the same,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display panel and a display device including the same, and more particularly, to a COG (Chip On Glass) type display panel and a display device including the same.

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a liquid crystal display device, and more particularly, to a pattern formation of an input / output signal transmission pad of a COG mounting structure liquid crystal display device.

Recently, as the information society has developed rapidly, there has been a need for a flat panel display having excellent characteristics such as thinness, light weight, and low power consumption. Among them, a liquid crystal display Color display, and picture quality, and is actively applied to a notebook or desktop monitor.

In general, in a liquid crystal display device, two substrates on which electrodes are formed are arranged so that the surfaces on which the two electrodes are formed face each other, a liquid crystal material is injected between the two substrates, and then an electric field And moving the liquid crystal molecules, thereby expressing the image by the transmittance of light depending on the liquid crystal molecules.

Such a liquid crystal display device is composed of a liquid crystal panel in which liquid crystal is injected between two substrates, a backlight disposed under the liquid crystal panel and used as a light source, and a driving unit for driving the liquid crystal panel on the outer side of the liquid crystal panel.

Here, the driving unit includes a drive IC for applying a signal to the wiring of the liquid crystal panel. According to a method of packaging the driving IC on a liquid crystal panel, a chip on glass (COG) , A tape carrier package (TCP), and a chip on film (COF).

Among them, the COG method is a method in which a driving IC is directly bonded to an array substrate of a liquid crystal display device and the output electrode of the driving IC is directly connected to the wiring pads on the array substrate. The COG method is simple in structure, There are advantages.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a display panel in which the area occupied by a pad is minimized, and a display device including the same.

The problems to be solved by the present invention are not limited to the above-mentioned problems, and other problems not mentioned can be clearly understood by those skilled in the art from the following description.

A display panel according to an embodiment of the present invention includes a substrate including a pixel region and a pad region,

A first conductive line and a second conductive line stacked on the substrate, the first conductive line comprising a first portion disposed on the pixel region and a third portion disposed on the pad region, Wherein the conductive line includes a first portion disposed on the pixel region and a third portion disposed on the pad region, wherein the first portion of the first conductive line and the first portion of the second conductive line are electrically connected to each other And the third portion of the first conductive line and the third portion of the second conductive line may be vertically overlapped.

The length of the third portion of the first conductive line may be different from the length of the third portion of the second conductive line.

The length of the third portion of the second conductive line may be less than the length of the third portion of the first conductive line.

A first pad disposed on an end of the third portion of the first conductive line and electrically connected to the first conductive line and a second pad disposed on an end of the third portion of the second conductive line, And a second pad electrically connected to the conductive line. In a plan view, the first pad and the second pad may be arranged in a line.

Wherein the first conductive line further comprises a second portion disposed on the pad region of the substrate and disposed between the first portion and the third portion, Further comprising a third portion disposed between the first portion and the second portion, wherein the second portion of the first conductive line and the second portion of the second conductive line are disposed vertically They may not overlap.

A display panel according to an embodiment of the present invention includes a first conductive line stacked on the pixel area of the substrate and extending in a first direction on the pad area and the second conductive line, A first pad disposed on an end of the first conductive line, and a second pad disposed on an end of the second conductive line disposed on the pad region, the first pad and the second pad And may be arranged along the first direction.

Wherein the first conductive line comprises a third portion disposed on the pad region and the second conductive line comprises a third portion disposed on the pad region, the third portion of the first conductive line And the third portion of the second conductive line may vertically overlap.

The length of the third portion of the first conductive line may be different from the length of the third portion of the second conductive line.

A third conductive line disposed on the pixel region of the substrate and extending in the first direction on the pad region, the third conductive line comprising a third portion disposed on the pad region, Further comprising a third pad disposed on the pad region and disposed on an end of the third portion of the third conductive line, wherein the third portion of the third conductive line is electrically connected to the third conductive line, 3 portion and the third portion of the second conductive line, and the third pad may be arranged in the first direction along the first pad and the second pad.

The upper surface of the first pad may be located at a different level from the upper surface of the second pad.

The upper surface of the first pad may be located at a lower level than the upper surface of the second pad.

The thickness of the first pad may be the same as the thickness of the second pad.

The thickness of the first pad may be different from the thickness of the second pad.

The thickness of the first pad may be greater than the thickness of the second pad.

A display device according to an embodiment of the present invention includes a substrate including a pixel region and a pad region, a first conductive line and a second conductive line stacked on the substrate, and a second conductive line disposed on the pad region of the substrate, 1 conductive line, and a second pad disposed on the pad region of the substrate, the second pad electrically connected to the second conductive line, and a second pad electrically connected to the pad region of the substrate And a driving circuit electrically connected to the first conductive line and the second conductive line, wherein the first pad and the second pad may be arranged in a line.

Wherein the first conductive line comprises a first portion disposed on the pad region of the substrate and the second conductive line comprises a second portion disposed on the pad region of the substrate, May be vertically overlapped with the second portion.

Wherein the first conductive line comprises a first portion disposed on the pad region of the substrate and the second conductive line comprises a second portion disposed on the pad region of the substrate, May not be vertically overlapped with the second portion.

Wherein the driver circuit is disposed on one surface, the first bump contacting the first pad,

And a second bump disposed on the one surface of the drive circuit and in contact with the second pad, wherein the first bump and the second bump may be arranged in a line.

The maximum thickness of the first bump may be greater than the maximum thickness of the second bump.

According to the embodiment of the present invention, on the pad region of the substrate, a plurality of conductive lines may be arranged vertically to each other so that the pads arranged on one ends of the conductive lines are arranged in a line. Accordingly, a larger number of pads can be arranged in a limited area.

1 is a plan view showing a part of a display device including a display panel according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view taken along the line I-I 'of FIG. 1, illustrating a display device including a display panel according to an embodiment of the present invention.
3 is a plan view showing each of the first through fifth conductive lines shown in FIG.
4 is a cross-sectional view taken along the line I-I 'of Fig. 1 according to the embodiments of the present invention.
5 is a plan view showing a part of a display device including a display panel according to an embodiment of the present invention.
6 is a plan view showing each of the first through fifth conductive lines shown in FIG.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention, and how to accomplish them, will become apparent by reference to the embodiments described in detail below with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims. Like reference numerals refer to like elements throughout the specification.

The terminology used herein is for the purpose of illustrating embodiments and is not intended to be limiting of the present invention. In the present specification, the singular form includes plural forms unless otherwise specified in the specification. As used herein, the terms 'comprises' and / or 'comprising' mean that the stated element, step, operation and / or element does not imply the presence of one or more other elements, steps, operations and / Or additions.

In addition, the embodiments described herein will be described with reference to cross-sectional views and / or plan views, which are ideal illustrations of the present invention. In the drawings, the thicknesses of the films and regions are exaggerated for an effective description of the technical content. Thus, the shape of the illustrations may be modified by manufacturing techniques and / or tolerances. Accordingly, the embodiments of the present invention are not limited to the specific forms shown, but also include changes in the shapes that are generated according to the manufacturing process. For example, the etched area shown at right angles may be rounded or may have a shape with a certain curvature. Thus, the regions illustrated in the figures have schematic attributes, and the shapes of the regions illustrated in the figures are intended to illustrate specific types of regions of the elements and are not intended to limit the scope of the invention.

1 is a plan view showing a part of a display device including a display panel according to an embodiment of the present invention. 2 is a cross-sectional view taken along the line I-I 'of Fig. 3 is a plan view of the first to fifth conductive lines shown in FIG.

1 and 2, a display device 1 may include a display panel 10 and a driving circuit 200 mounted on the display panel 10. [ The display panel 10 may include a substrate 100, conductive lines 111, 113, 115, 117, 119 and pads 121, 123, 125, 127,

The substrate 100 may include a pixel region PXR and a pad region PR around the pixel region PXR. The substrate 100 may be a glass substrate, a plastic substrate including PET (polyethylene terephthalate), PEN (polyethylenenaphthalate), and polyimide.

The first conductive line 111, the second conductive line 113, the third conductive line 115, the fourth conductive line 117 and the fifth conductive line 119 may be sequentially stacked on the substrate 100 have. The first conductive line 111 may be electrically connected to the first lower capacitor electrode (not shown). The second conductive line 113 may be disposed on the first conductive line 111. The second conductive line 113 may be electrically connected to the upper capacitor electrode (not shown). The third conductive line 115 may be disposed on the second conductive line 113. As an example, the third conductive line 115 may correspond to a gate line or a data line. When the third conductive line 115 corresponds to the gate line, the third conductive line 115 can be connected to the gate electrode (not shown) of the thin film transistor for switching the pixel. When the third conductive line 115 corresponds to the data line, the third conductive line 115 can be connected to the source electrode (not shown) and the drain electrode (not shown) of the thin film transistor. The fourth conductive line 117 may be electrically connected to the third conductive line 115 in the pixel region PXR of the substrate 100. For example, the fourth conductive line 117 may correspond to a light shielding line for shielding light from the thin film transistor. The fifth conductive line 119 may be electrically connected to the fourth conductive line 115 in the pixel region PXR of the substrate 100. For example, the fifth conductive line 119 may correspond to a reflection line that reflects light provided on the panel.

The first through fifth conductive lines 111, 113, 115, 117, and 119 may be formed of a conductive material such as aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium At least one of Au, Ni, Ne, Ir, Cr, Ni, Mo, Ti, W and Cu, One can be included.

The first to fifth conductive lines 111, 113, 115, 117 and 119 are arranged in the first direction X and are arranged in the second direction Y intersecting the first direction X Can be extended. The first conductive line 111 may include first through third portions PA1, PB1, and PC1. The second conductive line 113 may include the first to third portions PA2, PB2, PC2. The third conductive line 115 may include first through third portions PA3, PB3, and PC3. The fourth conductive line 117 may include first through third portions PA4, PB4, and PC4. And, the fifth conductive line 119 may include the first to third portions PA5, PB5, and PC5.

The first portions PA1, PA2, PA3, PA4 and PA5 of the first through fifth conductive lines 111, 113, 115, 117 and 119 are arranged on the pixel region PXR of the substrate 100 . The first portions PA1, PA2, PA3, PA4, and PA5 of the first through fifth conductive lines 111, 113, 115, 117, and 119 may be parallel to each other. The second portions PB1, PB2, PB3, PB4, PB5 and the third portions PC1, PC2, PC3, PC4, PC5 of the first through fifth conductive lines 111, 113, 115, 117, May be disposed on the pad region PR of the substrate 100. [

1 and 3, the second portion PB1 of the first conductive line 111 is connected to the first portion PA1 and the third portion PC1 of the first conductive line 111, As shown in FIG. The second portion PB2 of the second conductive line 113 may be disposed between the first portion PA2 and the third portion PC2 of the second conductive line 113. [ May be disposed between the third portion PC3 and the first portion PA3 of the third conductive line 115 of the second portion PB3 of the third conductive line 115. [ The second portion PB4 of the fourth conductive line 117 may be disposed between the first portion PA4 and the third portion PC4 of the fourth conductive line 117. [ The second portion PB5 of the fifth conductive line 119 may be disposed between the first portion PA5 and the third portion PC5 of the fifth conductive line 119. [

The second portions PB1, PB2, PB3, PB4, and PB5 of the first through fifth conductive lines 111, 115, 117, and 119 may not vertically overlap with each other, The third portions PC1, PC2, PC3, PC4, and PC5 of the fifth conductive lines 111, 115, 117, and 119 may vertically overlap each other.

The third portions PC1, PC2, PC3, PC4, and PC5 of the first through fifth conductive lines 111, 115, 117, and 119 may have different lengths. 2, the lengths of the third portions PC1, PC2, PC3, PC4, PC5 of the first through fifth conductive lines 111, 115, 117, The farther from the surface, the shorter it can be.

Specifically, the third portion PC2 of the second conductive line 113 may be shorter than the third portion PC1 of the first conductive line 111, and the third portion PC3 of the third conductive line 115 May be shorter than the third portion PC2 of the second conductive line 113 and the third portion PC4 of the fourth conductive line 117 may be shorter than the third portion PC3 of the third conductive line 115. [ And the third portion PC5 of the fifth conductive line 119 may be shorter than the third portion PC4 of the fourth conductive line 117. [

Pads 121, 123, 125, 127, and 129 may be disposed on one ends of the first through fifth conductive lines 111, 113, 115, 117, In detail, a first pad 121 electrically connected to the first conductive line 111 may be disposed on one end of the third portion PC1 of the first conductive line 111, A second pad 123 electrically connected to the second conductive line 113 may be disposed on one end of the third portion PC2 of the first conductive layer 113. [ A third pad 125 may be disposed on one end of the third portion PC3 of the third conductive line 115 and electrically connected to the third conductive line 115, A fourth pad 127 electrically connected to the fourth conductive line 117 may be disposed on one end of the third portion PC4. A fifth pad 129 electrically connected to the fifth conductive line 119 may be disposed on one end of the third portion PC5 of the fifth conductive line 119. [

In plan view, the first to fifth pads 121, 123, 125, 127, 129 may be arranged along the second direction Y. [ For example, from a plan viewpoint, the first to fifth pads 121, 123, 125, 127, and 129 may be arranged in a line on a third portion PC1 of the first conductive line 111. [

The upper surfaces of the first to fifth pads 121, 123, 125, 127, 129 which directly contact the first to fifth bumps 221, 223, 225, 227, can do. Specifically, the upper surface of the first pad 121 may be located at a lower level than the upper surface of the second pad 123, and the upper surface of the second pad 123 may be located at a lower level than the upper surface of the second pad 123. [ The upper surface of the third pad 125 may be located at a lower level than the upper surface of the fourth pad 127 and the upper surface of the fourth pad 127 may be located at a lower level, May be located at a lower level than the upper surface of the pad 129. [ In one example, the thicknesses of the first through fifth pads 121, 123, 125, 127, and 129 may be equal to each other.

The first to fifth pads 121, 123, 125, 127, and 129 may include a metal material (e.g., copper (Cu)).

According to an example, on the pad region PR of the substrate 100, a plurality of conductive lines may be vertically superimposed on each other to align the pads on each one of the conductive lines in a line. Accordingly, a larger number of pads can be arranged in a limited area.

The first interlayer insulating film ILD1 may be disposed between the first conductive line 111 and the second conductive line 113. [ The first interlayer insulating film ILD1 covers the upper surface of the first conductive line 111 and exposes the upper surface of the first pad 121. [ The second interlayer insulating film ILD2 may be disposed between the second conductive line 113 and the third conductive line 115. [ The second interlayer insulating film ILD2 covers the upper surface of the second conductive line 113 and a portion of the upper surface of the first interlayer insulating film ILD1 and exposes the upper surface of the second pad 123. [ A third interlayer insulating film ILD3 may be disposed between the third conductive line 115 and the fourth conductive line 117. [ The third interlayer insulating film ILD3 covers the upper surface of the third conductive line 115 and a part of the upper surface of the second interlayer insulating film ILD2 and exposes the upper surface of the third pad 125. [ A fourth interlayer insulating film ILD4 may be disposed between the fourth conductive line 117 and the fifth conductive line 119. The fourth interlayer insulating film ILD4 covers the upper surface of the fourth conductive line 117 and a part of the upper surface of the third interlayer insulating film ILD3 and exposes the upper surface of the fourth pad 127. [ A fifth interlayer insulating film ILD5 may be disposed on the fifth conductive line 119 to cover the upper surface of the fifth conductive line 119 and a portion of the upper surface of the fourth interlayer insulating film ILD4. The fifth interlayer insulating film ILD5 may expose the upper surface of the fifth pad 129. [

The first to fifth interlayer insulating films ILD1, ILD2, ILD3, ILD4, and ILD5 may include, for example, a silicon oxide film or a silicon nitride film.

The driving circuit 200 may be disposed on the pad region PR of the substrate 100. [ The first through fifth bumps 221, 223, 225, 227 and 229 arranged on one surface of the driving circuit 200 are arranged on the first through fifth pads 121, 123, 125, 127 and 129 Can be disposed correspondingly. Specifically, the first bump 221 may be in contact with the upper surface of the first pad 121, and the second bump 223 may be in contact with the upper surface of the second pad 123. The third bump 225 may contact the top surface of the third pad 125 and the fourth bump 227 may contact the top surface of the fourth pad 127 and the fifth bump 229 May be in contact with the upper surface of the fifth pad 129.

One side of the first to fifth bumps 221, 223, 225, 227, and 229 that are in contact with one surface of the driving circuit 200 may be located at the same level and the first to fifth bumps 221 and 223 , 225, 227, and 229 may be located at different levels from each other. The first to fifth bumps 221, 223, 225, 227, and 229 may be disposed at different levels.

For example, the first to fifth bumps 221, 223, 225, 227, and 229 may have different thicknesses. Specifically, the maximum thickness T1 of the first bump 221 may be greater than the maximum thickness T2 of the second bump 223, and the maximum thickness T2 of the second bump 223 may be greater than the maximum thickness T2 of the third bump 223. [ 225). ≪ / RTI > The maximum thickness T3 of the third bump 225 may be greater than the maximum thickness T4 of the fourth bump 227 and the maximum thickness T4 of the fourth bump 227 may be greater than the maximum thickness T4 of the fifth bump 229 (T5).

The first to fifth bumps 221, 223, 225, 227 and 229 may include a metal material (for example, indium (In), tin (Sn), lead (Pb)

4 is a cross-sectional view taken along the line I-I 'of Fig. 1 according to the embodiments of the present invention. For simplicity of explanation, the same reference numerals are used for the same components as those of the display device including the display panel described with reference to FIGS. 1 to 3, and a duplicate description will be omitted.

Referring to FIG. 4, the thicknesses of the first through fifth pads 121, 123, 125, 127, and 129 may be different from each other. For example, the thickness t1 of the first pad 121 may be greater than the thickness t2 of the second pad 123, and the thickness t2 of the second pad 123 may be greater than the thickness t2 of the third pad 125 The thickness t3 of the third pad 125 may be thicker than the thickness t4 of the fourth pad 127 and the thickness t4 of the fourth pad 127 may be thicker than the thickness t3, May be thicker than the thickness t5 of the fifth pad 129.

More specifically, the first pad 121 may include five conductive films sequentially stacked on the first conductive line 111. The second pad 123 may include four conductive films sequentially stacked on the second conductive line 113. The third pad 125 may include three conductive films sequentially stacked on the third conductive line 115. The fourth pad 127 may include two conductive films sequentially stacked on the fourth conductive line 117. The fifth pad 129 may include a single conductive film.

5 is a plan view showing a part of a display device including a display panel according to an embodiment of the present invention. 6 is a plan view showing each of the first through fifth conductive lines shown in FIG. For simplicity of explanation, the same reference numerals are used for the same components as those of the display device including the display panel described with reference to FIGS. 1 to 3, and a duplicate description will be omitted.

5 and 6, in plan view, the third portions PC1, PC2, and PC3 of the first through third conductive lines 111, 113, and 115, The three parts (PC5) can be vertically superimposed on each other. From the plan viewpoint, the third portion PC4 of the fourth conductive line 117 is connected to the third portions PC1, PC2, PC3 of the first to third conductive lines 111, 113, 115, 5 < / RTI > conduction line 119, as shown in FIG. More specifically, from a plan viewpoint, the third portion PC4 of the fourth conductive line 117 is connected to the third portions PC1, PC2, PC3 of the first to third conductive lines 111, 113, 115, And the third part (PC5) of the fifth conductive line (119) in the first direction (X).

The first pad 121 may be disposed on the third portion PC1 of the first conductive line 111 and the second pad 123 may be disposed on the third portion PC2 of the second conductive line 113. [ The third pad 125 may be disposed on the third portion PC3 of the third conductive line 115 and the third pad 125 may be disposed on the third portion PC4 of the fourth conductive line 117. [ And the fifth pad 129 may be disposed on the third portion PC5 of the fifth conductive line 119. The fourth pad 127 may be disposed on the third portion PC5 of the fifth conductive line 119, The first to fifth pads 121, 123, 125, 127, 129) may be arranged along the second direction Y. In this case, For example, the first to fifth pads 121, 123, 125, 127, and 129 may be arranged in a line.

According to one example, in AC driving, at least one of the first through fifth conductive lines (e.g., the fourth conductive line) is connected to the remaining conductive lines (e.g., the fourth conductive line) to minimize the electrical interference between the overlapped conductive lines For example, the first conductive line, the second conductive line, the third conductive line, and the fifth conductive line).

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It will be understood. It is therefore to be understood that the above-described embodiments are illustrative and not restrictive in every respect.

Claims (19)

A liquid crystal display comprising: a substrate including a pixel region and a pad region;
A first conductive line and a second conductive line stacked on the substrate, the first conductive line comprising a first portion disposed on the pixel region and a third portion disposed on the pad region, The conductive line includes a first portion disposed on the pixel region and a third portion disposed on the pad region;
A first pad disposed on an end of the third portion of the first conductive line and electrically connected to the first conductive line; And
And a second pad disposed on an end of the third portion of the second conductive line and electrically connected to the second conductive line,
Wherein the first portion of the first conductive line and the first portion of the second conductive line are parallel to each other,
The third portion of the first conductive line and the third portion of the second conductive line are disposed at different levels from the top surface of the substrate,
The extending direction of the third portion of the first conductive line and the extending direction of the third portion of the second conductive line are the same,
Wherein the first pad and the second pad are arranged along the extending direction of each of the third portions.
The method according to claim 1,
Wherein the length of the third portion of the first conductive line is different from the length of the third portion of the second conductive line.
3. The method of claim 2,
Wherein the length of the third portion of the second conductive line is shorter than the length of the third portion of the first conductive line.
delete The method according to claim 1,
The first conductive line further comprises a second portion disposed on the pad region of the substrate and disposed between the first portion and the third portion,
Wherein the second conductive line further comprises a second portion disposed on the pad region of the substrate and disposed between the first portion and the third portion.
delete delete delete delete The method according to claim 1,
Wherein the upper surface of the first pad is located at a different level from the upper surface of the substrate than the upper surface of the second pad.
11. The method of claim 10,
Wherein the upper surface of the first pad is located at a lower level than the upper surface of the second pad.
11. The method of claim 10,
Wherein the thickness of the first pad is equal to the thickness of the second pad. 11. The method of claim 10,
Wherein the thickness of the first pad is different from the thickness of the second pad. 14. The method of claim 13,
Wherein the thickness of the first pad is thicker than the thickness of the second pad.
A semiconductor device comprising: a substrate including a pixel region and a pad region; a first conductive line and a second conductive line stacked on the substrate; and a first pad disposed on the pad region of the substrate and electrically connected to the first conductive line And a second pad disposed on the pad region of the substrate and electrically connected to the second conductive line; And
And a driving circuit mounted on the pad region of the substrate and electrically connected to the first conductive line and the second conductive line,
Wherein the first conductive line includes a first portion disposed on the pixel region and a third portion disposed on the pad region,
The second conductive line includes a first portion disposed on the pixel region and a third portion disposed on the pad region,
Wherein the third portion of the first conductive line and the third portion of the second conductive line are disposed at different levels from an upper surface of the substrate,
The extending direction of the third portion of the first conductive line and the extending direction of the third portion of the second conductive line are the same,
Wherein the first pad and the second pad are arranged along the extending direction of each of the third portions.
delete delete 16. The method of claim 15,
A first bump disposed on one side of the driving circuit, the first bump contacting the first pad; And
And a second bump disposed on the one surface of the driving circuit and contacting the second pad,
Wherein the first bump and the second bump are arranged in a line.
19. The method of claim 18,
Wherein the maximum thickness of the first bumps is thicker than the maximum thickness of the second bumps.

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