KR101788267B1 - 시스템 호출 요청의 통신 최적화 - Google Patents

시스템 호출 요청의 통신 최적화 Download PDF

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KR101788267B1
KR101788267B1 KR1020137017357A KR20137017357A KR101788267B1 KR 101788267 B1 KR101788267 B1 KR 101788267B1 KR 1020137017357 A KR1020137017357 A KR 1020137017357A KR 20137017357 A KR20137017357 A KR 20137017357A KR 101788267 B1 KR101788267 B1 KR 101788267B1
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system call
processor
call request
work item
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KR20140027078A (ko
Inventor
벤자민 토마스 샌더
마이클 호우스톤
뉴톤 체웅
케이스 로웨리
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어드밴스드 마이크로 디바이시즈, 인코포레이티드
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/544—Buffers; Shared memory; Pipes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/522—Barrier synchronisation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/546—Message passing systems or structures, e.g. queues
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/50—Indexing scheme relating to G06F9/50
    • G06F2209/509—Offload

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Advance Control (AREA)
  • Image Generation (AREA)
  • Image Processing (AREA)
KR1020137017357A 2010-12-14 2011-12-14 시스템 호출 요청의 통신 최적화 Active KR101788267B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US42295310P 2010-12-14 2010-12-14
US61/422,953 2010-12-14
US13/307,505 US8752064B2 (en) 2010-12-14 2011-11-30 Optimizing communication of system call requests
US13/307,505 2011-11-30
PCT/US2011/064859 WO2012082867A1 (en) 2010-12-14 2011-12-14 Optimizing communication of system call requests

Publications (2)

Publication Number Publication Date
KR20140027078A KR20140027078A (ko) 2014-03-06
KR101788267B1 true KR101788267B1 (ko) 2017-10-19

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KR1020137017357A Active KR101788267B1 (ko) 2010-12-14 2011-12-14 시스템 호출 요청의 통신 최적화

Country Status (6)

Country Link
US (1) US8752064B2 (enExample)
EP (1) EP2652575A4 (enExample)
JP (1) JP6228459B2 (enExample)
KR (1) KR101788267B1 (enExample)
CN (1) CN103262002B (enExample)
WO (1) WO2012082867A1 (enExample)

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US9513975B2 (en) * 2012-05-02 2016-12-06 Nvidia Corporation Technique for computational nested parallelism
US9038075B2 (en) * 2012-11-26 2015-05-19 Red Hat, Inc. Batch execution of system calls in an operating system
US10235732B2 (en) * 2013-12-27 2019-03-19 Intel Corporation Scheduling and dispatch of GPGPU workloads
US10002080B2 (en) * 2013-12-30 2018-06-19 Michael Henry Kass Memory system address modification policies
US11126559B2 (en) 2013-12-30 2021-09-21 Michael Henry Kass Translation look-aside buffer and prefetch indicator
US10216632B2 (en) 2013-12-30 2019-02-26 Michael Henry Kass Memory system cache eviction policies
US10521390B2 (en) * 2016-11-17 2019-12-31 The United States Of America As Represented By The Secretary Of The Air Force Systems and method for mapping FIFOs to processor address space
WO2019089816A2 (en) 2017-10-31 2019-05-09 Micron Technology, Inc. System having a hybrid threading processor, a hybrid threading fabric having configurable computing elements, and a hybrid interconnection network
US11513839B2 (en) 2018-05-07 2022-11-29 Micron Technology, Inc. Memory request size management in a multi-threaded, self-scheduling processor
US11119782B2 (en) 2018-05-07 2021-09-14 Micron Technology, Inc. Thread commencement using a work descriptor packet in a self-scheduling processor
US11513838B2 (en) 2018-05-07 2022-11-29 Micron Technology, Inc. Thread state monitoring in a system having a multi-threaded, self-scheduling processor
US11126587B2 (en) 2018-05-07 2021-09-21 Micron Technology, Inc. Event messaging in a system having a self-scheduling processor and a hybrid threading fabric
US11157286B2 (en) 2018-05-07 2021-10-26 Micron Technology, Inc. Non-cached loads and stores in a system having a multi-threaded, self-scheduling processor
US11068305B2 (en) 2018-05-07 2021-07-20 Micron Technology, Inc. System call management in a user-mode, multi-threaded, self-scheduling processor
US11513840B2 (en) 2018-05-07 2022-11-29 Micron Technology, Inc. Thread creation on local or remote compute elements by a multi-threaded, self-scheduling processor
US11513837B2 (en) 2018-05-07 2022-11-29 Micron Technology, Inc. Thread commencement and completion using work descriptor packets in a system having a self-scheduling processor and a hybrid threading fabric
US11074078B2 (en) 2018-05-07 2021-07-27 Micron Technology, Inc. Adjustment of load access size by a multi-threaded, self-scheduling processor to manage network congestion
US11119972B2 (en) 2018-05-07 2021-09-14 Micron Technology, Inc. Multi-threaded, self-scheduling processor
US11132233B2 (en) 2018-05-07 2021-09-28 Micron Technology, Inc. Thread priority management in a multi-threaded, self-scheduling processor
CN110716750B (zh) * 2018-07-11 2025-05-30 超威半导体公司 用于部分波前合并的方法和系统
US11250107B2 (en) * 2019-07-15 2022-02-15 International Business Machines Corporation Method for interfacing with hardware accelerators
CN112230931B (zh) * 2020-10-22 2021-11-02 上海壁仞智能科技有限公司 适用于图形处理器的二次卸载的编译方法、装置和介质

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US7386710B2 (en) 2000-02-24 2008-06-10 Altera Corporation Methods and apparatus for scalable array processor interrupt detection and response
US20090144742A1 (en) 2007-11-30 2009-06-04 International Business Machines Corporation Method, system and computer program to optimize deterministic event record and replay
US20090300621A1 (en) 2008-05-30 2009-12-03 Advanced Micro Devices, Inc. Local and Global Data Share
US20100293534A1 (en) 2009-05-15 2010-11-18 Henrique Andrade Use of vectorization instruction sets

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JP2008537268A (ja) 2005-04-22 2008-09-11 アルトリックス ロジック，インク． 可変精度相互接続を具えたデータ処理エレメントの配列
US8106914B2 (en) * 2007-12-07 2012-01-31 Nvidia Corporation Fused multiply-add functional unit
US8312254B2 (en) * 2008-03-24 2012-11-13 Nvidia Corporation Indirect function call instructions in a synchronous parallel thread processor
US9195487B2 (en) * 2009-05-19 2015-11-24 Vmware, Inc. Interposition method suitable for hardware-assisted virtual machine
US8661435B2 (en) * 2010-09-21 2014-02-25 Unisys Corporation System and method for affinity dispatching for task management in an emulated multiprocessor environment
US8725989B2 (en) * 2010-12-09 2014-05-13 Intel Corporation Performing function calls using single instruction multiple data (SIMD) registers

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US7386710B2 (en) 2000-02-24 2008-06-10 Altera Corporation Methods and apparatus for scalable array processor interrupt detection and response
US20090144742A1 (en) 2007-11-30 2009-06-04 International Business Machines Corporation Method, system and computer program to optimize deterministic event record and replay
US20090300621A1 (en) 2008-05-30 2009-12-03 Advanced Micro Devices, Inc. Local and Global Data Share
US20100293534A1 (en) 2009-05-15 2010-11-18 Henrique Andrade Use of vectorization instruction sets

Non-Patent Citations (2)

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readv(2): Linux man page. 2007.10.02. (https://web-beta.archive.org/web/20071002225431/https://linux.die.net/man/2/readv)
Stuart 외 2명. 'GPU-to-CPU Callbacks'. Network and Parallel Computing, Lecture Notes in Computer Science, 2010.08.31.,pp.365-372.

Also Published As

Publication number Publication date
US8752064B2 (en) 2014-06-10
WO2012082867A1 (en) 2012-06-21
EP2652575A4 (en) 2017-05-10
KR20140027078A (ko) 2014-03-06
CN103262002B (zh) 2015-08-05
JP6228459B2 (ja) 2017-11-08
EP2652575A1 (en) 2013-10-23
US20120180072A1 (en) 2012-07-12
CN103262002A (zh) 2013-08-21
JP2013546105A (ja) 2013-12-26

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