KR101782222B1 - System for controlling voltage balancing and multilevel converter including the same - Google Patents

System for controlling voltage balancing and multilevel converter including the same Download PDF

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KR101782222B1
KR101782222B1 KR1020150147635A KR20150147635A KR101782222B1 KR 101782222 B1 KR101782222 B1 KR 101782222B1 KR 1020150147635 A KR1020150147635 A KR 1020150147635A KR 20150147635 A KR20150147635 A KR 20150147635A KR 101782222 B1 KR101782222 B1 KR 101782222B1
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voltage
current
phase
image minute
cell
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KR1020150147635A
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Korean (ko)
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KR20170047134A (en
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김태형
권병기
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주식회사 포스코아이씨티
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/175—Indicating the instants of passage of current or voltage through a given value, e.g. passage through zero
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
    • G01R23/02—Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage
    • G01R23/12—Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage by converting frequency into phase shift
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M2001/0009—

Abstract

A multi-level converter including a voltage equalization control system according to the present invention, which can control voltage between cell inverters of a multilevel converter equally, includes a plurality of cell inverters connected to each phase, A main controller for calculating a voltage command value by using a current component and a compensation voltage for DC terminal voltage unbalance compensation between a plurality of cell inverters and for outputting a voltage reflecting the compensation voltage to a voltage according to the voltage command value, Wherein the main controller uses a first image minute current to eliminate the DC short voltage deviation between each phase and a second image minute current to limit the magnitude of the compensation voltage, And the voltage-divided current component is calculated.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a voltage equalization control system and a multilevel converter including the same,

The present invention relates to a multilevel converter, and more particularly to a multilevel converter including a voltage equalization control system.

A load such as an electric furnace in which reactive power fluctuates abruptly causes a severe current imbalance in the power system. The electric furnace load, which is operated by the generation of an arc, has inherently irregularity and nonlinearity, and the power factor is significantly lower than a normal load.

In order to alleviate the problem of the power quality of the system by the electric furnace, it is recently required to apply STATCOM (STATCOM) to compensate the reactive power to realize system stabilization.

The static type synchronous compensator can be effectively applied to compensate the unbalanced load current although it has a main purpose in stabilizing the line voltage and suppressing the system loss by compensating the reactive power of the large capacity load.

Multi-level converters are being applied to these compensators. A multilevel converter is a high-voltage, high-capacity converter that can be connected to a plurality of single-phase inverters (hereinafter referred to as "cell inverters") in each phase and can obtain high voltages using a semiconductor for low- it means.

1 is a diagram showing a system for controlling a conventional multilevel converter to be applied to a compensator (hereinafter referred to as a " multilevel converter system ").

Referring to FIG. 1, a conventional multi-level converter system is connected to a system to compensate reactive power of the system. The multi-level converters 30a, 30b, and 30c and the multilevel converters 30a, 30b, 40c, 40c connected to one end of each of the reactors 40a, 40b, 40c.

The multilevel converters 30a, 30b and 30c are connected in parallel to the system composed of the power source 10 and the load 20 to compensate the reactive power of the system, thereby improving the power factor of the system.

As shown in Fig. 1, the multi-level converters 30a, 30b and 30c include a multilevel converter 30a connected to A, a multilevel converter 30b connected to B, a multilevel converter connected to C 30c. Each of the multi-level converters 30a, 30b and 30c includes a plurality of cell inverters 31a, and each of the cell inverters 31a may be constituted by an inverter of the H-Bridge type. The capacitors 35a are connected in parallel do.

Since the cell inverter 31a used for such a stationary synchronous compensator adopts a structure in which a DC voltage is supported only by the capacitor 35a without connecting a DC power source to the DC stage, the power supplied from the AC side The DC terminal voltage across both ends of the capacitor 35a may fluctuate.

Therefore, the DC short voltage should basically be controlled so as to stay within the range of the minimum voltage necessary for the cell inverter to operate stably and the maximum voltage not exceeding the overvoltage limit.

In addition, in the stationary synchronous compensator of the multi-level converter structure of the plurality of cell inverters 31a, when the respective cell inverters 31a are directly connected to the system without passing through the transformer as shown in FIG. 1, The equilibrium control should be performed such that the DC step voltage of all the cell inverters 31a has an equal magnitude.

The DC unbalance imbalance between the cell inverters 31a is determined by the operating error between the cell inverters 31a, the unbalance of loss due to the voltage drop difference of the switching elements, the capacitor capacity per cell inverter 31a, And the like.

In order to solve this problem, in the related art, the compensation voltage orthogonal to the voltage is superimposed on the voltage command value transmitted from the main controller, but when the phase current is small, the compensation voltage is calculated as a voltage higher than the rated voltage, .

In order to solve the above problem, if the corresponding compensation voltage is limited to an arbitrary value, the total sum of the compensation voltage values for the cell inverter does not become zero. Accordingly, the conventional multi-level converter control system has another problem in that stable control is difficult because the compensation voltage reference value for each phase of the other compensation controller, for example, the phase compensation controller for controlling the voltage imbalance between phases, is affected.

BACKGROUND ART [0002] Techniques for the background of the present invention are disclosed in Korean Patent Laid-Open Publication No. 10-2015-0075454 (titled "Reactive Power Compensation Device and Reactive Power Compensation Device Inter-Module Voltage Balance Compensation Method," published on Jul. 10-2015-0075453 entitled " Reactive power compensation device, published on Jul. 5, 2015).

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems of the prior art, and it is an object of the present invention to control DC terminals of all cell inverters to have uniform values by eliminating DC terminal voltage deviation between a plurality of cell inverters included in a multi- .

In order to achieve the above object, a multi-level converter including a voltage equalization control system according to the present invention includes: a multi-level converter in which a plurality of cell inverters are connected in series for each phase; A main controller for calculating a voltage command value corresponding to the target current; And a cell controller for controlling the plurality of cell inverters to calculate a compensation voltage for direct current voltage unbalance compensation between the plurality of cell inverters and to output a voltage reflecting the compensation voltage to a voltage according to the voltage command value And the main controller multiplies the first image minute current for eliminating DC phase voltage deviation between each phase and the second image minute current for limiting the magnitude of the compensation voltage to calculate the image minute current component of the target current And a target current calculator for calculating a target current.

The voltage equalization control system according to the present invention is characterized in that the voltage equalization control system includes a plurality of cell inverters connected in series for eliminating the DC terminal voltage deviation An inter-phase equalization controller for calculating a first image minute current; An image minute current superimposer for calculating a second image minute current for direct current voltage unbalance compensation between the plurality of cell inverters based on the phase currents of the phases; A target current calculator for calculating an image minute current component of a target current using the first image minute current and the second image minute current; And a current controller for calculating a voltage command value for the plurality of cell inverters by using a video current component of a target current calculated through the target current calculator.

According to the present invention as described above, the following effects can be obtained.

According to the present invention, by superimposing the image minute current circulating in the delta-connected multi-level converter on the phase current, DC phase voltage imbalance between the cell inverters can be suppressed even when the phase current magnitude is small.

In addition, according to the present invention, since the image minute current is superimposed on the phase current, the DC terminal voltage between the cell inverters can be stably controlled without affecting the compensation current flowing into the system.

1 is a diagram showing a conventional multi-level converter system.
2 is a diagram showing a multilevel converter including a voltage equalization control system according to the present invention.
Fig. 3 is a diagram showing a specific controller configuration of the main controller shown in Fig. 2. Fig.
FIG. 4 is a diagram illustrating a configuration of a direct-current-voltage unbalanced compensation controller between cell inverters of the cell controller of FIG. 2. FIG.
FIG. 5 is a diagram illustrating a voltage of a cell inverter based on a voltage command value of a main controller according to the present invention, a compensation voltage for removing a DC terminal voltage deviation between cell inverters, and a phasor of each phase current.
6 is a diagram illustrating a pager of a compensation voltage and a phase current of a cell controller according to the present invention.
FIGS. 7 and 8 are graphs showing the comparison of the operation characteristics when the inactive current is injected into each phase in the no-load state and when the in-phase current is injected.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention and the manner of achieving them will become apparent with reference to the embodiments described in detail below with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims.

The first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are used only to distinguish one component from another. Therefore, the first component mentioned below may be the second component within the technical spirit of the present invention.

It is to be understood that each of the features of the various embodiments of the present invention may be combined or combined with each other, partially or wholly, technically various interlocking and driving, and that the embodiments may be practiced independently of each other, It is possible.

2 is a diagram showing a multilevel converter including a voltage equalization control system according to the present invention.

2, a multi-level converter including a voltage equalization control system according to the present invention includes a main controller 100, a plurality of cell controllers 200, and a plurality of cell inverters 300. As shown in FIG.

In the embodiment of FIG. 2, one cell controller 200 controls a plurality of cell inverters 300 connected to each phase, but the present invention is not limited thereto.

That is, in the modified embodiment, the cell controller 200 and the cell inverter 300 are connected in a 1: 1 manner, so that one cell controller 200 can control only one cell inverter 300, It is also possible that a plurality of cell controllers 200 are connected and each cell controller 200 controls a plurality of cell inverters 300.

Hereinafter, for convenience of description, it is assumed that the cell controller 200 included in one phase controls the DC voltage of the cell inverter 300 connected to the corresponding cell controller 200. However, the present invention is not limited thereto And each cell controller 200 performs control for each of the A-phase, the B-phase, and the C-phase.

The main controller 100 calculates a voltage command value for outputting a target current to the system and outputs the calculated voltage command value to the cell controller 200. The main controller 100 can transmit and receive a voltage command value to and from a plurality of cell controllers 200 through a CAN (Controller Area Network) communication line 190 in synchronism with each phase, and can include a CAN driver have.

Fig. 3 is a diagram showing a specific controller configuration of the main controller shown in Fig. 2. Fig.

3, the main controller 100 includes an overall average voltage controller 110, a phase-to-phase balancing controller 120, an image minute current superposer 130, a target current calculator 140, and a current controller 150 ).

The total average voltage controller 110 keeps the total amount of the electrostatic energy stored in the DC short-circuit capacitors of the plurality of cell inverters 300 constant. Hereinafter, the voltage across the capacitor will be described as a DC short-circuit voltage.

The total average voltage controller 110 compares the DC voltage reference value v DC (ref) for all the plurality of cell inverters 300 included in each phase and the DC voltage reference value v DC (ref) for all of the plurality of cell inverters 300 included in each phase. ( DCavg ) obtained by averaging the DC short-circuit voltage and averaging the DC short-voltage average value

Figure 112015102873146-pat00001
, And outputs the calculated effective current to the target current calculator 140. [ The effective current (
Figure 112015102873146-pat00002
) Refers to the current required to compensate for the self-loss to keep the total electrostatic energy stored in the dc capacitors constant.

Phase balancing controller 120 removes the DC terminal voltage deviation between the A phase, the B phase, and the C phase.

The phase-to-phase balancing controller 120 receives the DC voltage (v DCa , v DCb , v DCc ) and the DC voltage average value (v DCavg ) for each phase and calculates a first Image minute current (

Figure 112015102873146-pat00003
And outputs the calculated first image minute current to the target current calculator 140. [

The video current superposer 130 adjusts the compensation voltage within the maximum compensation voltage so that the compensation voltage for controlling the DC short-circuit voltage between the plurality of cell inverters 300 determined by the cell controller 200 can be stably realized. And outputs the calculated second image minute current to the target current calculator 140. The target current calculator 140 calculates the second image minute current based on the second image minute current.

That is, in the case of the multilevel converter composed of the delta (?) Connection, the image minute current is circulated inside the wiring but does not affect the compensation current flowing into the system. In the embodiment of the present invention, The current superimposer 130 further calculates the second image minute current and outputs it to the target current calculator 140.

Then, the target current calculator 140 increases the phase current magnitude by superimposing the second image minute current on the first image minute current, thereby controlling DC terminal voltage difference between the plurality of cell inverters 300 determined by the cell controller 200 So that the compensating voltage for the high-frequency signal can be stably realized.

That is, when the compensation voltage of the cell controller 200 is generated to exceed the predetermined maximum compensation voltage, it is difficult to stably control the DC terminal voltage of the cell inverter 300, The compensation voltage for controlling the voltage deviation can affect the overall system control.

Therefore, in the multi-level converter including the voltage equalization control system according to the embodiment of the present invention, when at least one of the phase currents is smaller than the predetermined reference current, I want to solve the instability problem.

In detail, the image minute current superposer 130 according to the embodiment of the present invention adjusts the image minute current < RTI ID = 0.0 >

Figure 112015102873146-pat00004
And the target current calculator 140 superimposes the corresponding image minute current on each phase in the same manner as in Equation 1 below. Therefore, the compensation voltage calculated by the cell controller 200 is determined to be smaller than the maximum compensation voltage, and the cell inverter 300 can be controlled stably.

Figure 112015102873146-pat00005

At this time,

Figure 112015102873146-pat00006
,
Figure 112015102873146-pat00007
,
Figure 112015102873146-pat00008
Means the conventional phase current.

The power of each phase can be represented internally of the both-end voltage (Vab, Vbc, Vca) and phase current in the state where the image minute currents are overlapped. Since the phase current is orthogonal to the line-to-line voltage, the power of each phase appears as shown in equation (2) according to the dot product of the superimposed current and the corresponding line-to-line voltage.

Figure 112015102873146-pat00009

That is, according to the magnitude (I 0comp ) and the phase (0 0comp ) of the superimposed image minute current, active power having different magnitudes and signs for each phase is generated. As a result, the DC terminal voltage of each phase repeats rising and falling . In this case, as the frequency of the first image minute current generated through the phase-to-phase balancing controller 120 and the frequency of the second image minute current generated through the image minute current superposer 130 are similar to each other, The operation performance of the phase balancing controller 120 may be impaired.

Therefore, in the embodiment of the present invention, the image minute current superposer 130 alternates the polarity of the second image minute current with a frequency that is faster than the frequency of the first image minute current generated through the phase- It is possible to flow a current of a magnitude necessary for DC terminal voltage deviation control between the cell inverters 300 while avoiding collision with the operation of the phase-

In particular, the image minute current superimposer 130 may superimpose the first image minute current on the first image so that the second image minute current corresponds to the image d-q axis component of the forward synchronous coordinate axis, as shown in Equation (3) below.

Figure 112015102873146-pat00010

That is, since the second image minute current corresponds to the three-phase coordinate system component of the abc axis as a value determined based on the phase current of each phase, the magnitude is corrected to the dq axis component that can be calculated by the target current calculator 140, To the first image minute current of the second image sensor 120.

In addition, as described above, the image minute current superposer 130 according to the embodiment of the present invention quickly converts the frequency of the second image minute current to a frequency of the first image minute current in the interphase equalization controller 120 The size of the second image minute current can be determined so that the compensation voltage of the cell controller 200 can be calculated to a value within a predetermined range, and specifically, a size that can be calculated within the maximum compensation voltage. However, since the embodiment of the present invention is not limited to this, the magnitude of the second image minute current may be determined to be less than the overload design size of the voltage equalization control system or the minimum range for the voltage equalization control to operate stably.

Hereinafter, a specific configuration of the image minute current superposer 130 will be described. The video current superposer 130 includes a reference current comparator 131 for comparing the phase current of each phase with a predetermined reference current and a frequency converter 132 for converting the frequency of the second video current.

The reference current comparator 131 receives the phase currents I abc (I a , I b , I c ) of each phase and compares the phase currents of the phases with a predetermined reference current. If at least one of the phase currents is smaller than the reference current And the second image minute current is calculated. At this time, the reference current can be set to a different value depending on the characteristics of the multilevel converter, which is the minimum threshold of the phase current that can stably control the DC voltage of the cell inverter 300. That is, in the embodiment of the present invention, when a phase current smaller than the reference current exists so that the DC terminal voltage deviation between the cell inverters 300 can be stably removed, a second image current minus .

The reference current comparator 131 outputs a function "f (1)" when at least one of the phase currents on the A, B and C phases is smaller than the reference current and outputs "0" when all of the phase currents have a value larger than the reference current, dz)).

The frequency converter 132 converts the frequency of the second image minute current generated as a result of the comparison of the reference current comparator 131. Specifically, the frequency converter 132 converts the frequency of the second image minute current so that the frequency of the second image minute current is higher than the frequency of the first image minute current outputted from the phase-to-phase balancing controller 120 (for example, a predetermined multiple).

That is, as described above, the phase-to-phase balancing controller 120 controls the phase of the first image minute current ("

Figure 112015102873146-pat00011
(I 0comp ) calculated through the video current-based current superposer 130 and the first image minute current (I 0comp ) generated through the phase-equilibrium controller 120
Figure 112015102873146-pat00012
The operation performance of the phase balancing controller 120 may be impaired by the second image minute current.

Therefore, the frequency converter 132 according to the embodiment of the present invention converts the frequency of the second image minute current so that the frequency of the second image minute current is faster than the frequency of the first image minute current outputted from the phase-to-phase equalization controller 120, The frequency of the second image minute current is converted at a frequency 10 times higher than the frequency of the first image minute current to avoid collision with the operation of the phase equilibrium controller 120.

The target current calculator 140 calculates the target current for the unbalance compensation or the reactive power compensation of the load current of the system through the multilevel converter based on the load current i Labc of the system. Specifically, the target current calculator 140 calculates the target load current (i Labc ) of the system, the effective current (i Labc ) output from the overall average voltage controller 110

Figure 112015102873146-pat00013
), A first image minute current ("
Figure 112015102873146-pat00014
) And the second video current minus current outputted from the video current superposer (130)
Figure 112015102873146-pat00015
) Is used to calculate the target current.

Particularly, in the embodiment of the present invention, the target current is the normal-minute reference current component (

Figure 112015102873146-pat00016
), A reverse phase reference current component (
Figure 112015102873146-pat00017
), And the image minute reference current component (
Figure 112015102873146-pat00018
).

As described above, the target current calculator 140 according to the embodiment of the present invention calculates the target current value of the last image minute current (I) by further adding the second image minute current calculated from the image minute current superposer 130 to the first image minute current, The ingredients are calculated.

In this case, + e is the positive direction of the synchronous coordinate axis, and -e is the reverse direction of the synchronous coordinate axis, as superscripts included in the respective reference currents. Pqd denotes a positive phase on the d-q axis, nqd denotes a negative phase on the dq axis, and 0qd denotes a zero phase on the dq axis.

The current controller 150 calculates a voltage command value for outputting the target current calculated by the target current calculator 140, and transmits the voltage command value to the cell controller 200. The current controller 150 receives the normal current component ("

Figure 112015102873146-pat00019
), A reverse phase current component (
Figure 112015102873146-pat00020
) And the final image minute current component (
Figure 112015102873146-pat00021
And calculates a voltage command value based on the received voltage command value.

The current controller 150 includes a current controller 151 and a two-phase to three-phase converter 152. The current controller 151 converts the synchronous coordinate system component of the dq axis into the stationary coordinate system component of the? -? Axis and concretely receives the normal minute current component, the reverse phase minute current component and the image minute current component corresponding to the synchronous coordinate system component of the dq axis And outputs a voltage reference value for controlling the target current.

The two-phase-to-three phase converter 152 converts a normal voltage component, a reverse-phase voltage component, and a video component voltage corresponding to the two-phase stationary coordinate system component of the? -Axis into an A-phase voltage component is converted to (e a (ref)), b -phase voltage component (e b (ref)) and C-phase voltage component (e c (ref)). That is, the current controller 150 outputs a voltage command value including an A-phase voltage component, a B-phase voltage component, and a C-phase voltage component to be output by the multi-level converter 300 included in each phase to the cell controller 200 send.

The cell controller 200 is provided for each phase and controls the plurality of cell inverters 300 so that a voltage corresponding to the voltage command value received from the main controller 100 can be outputted.

Particularly, the cell controller 200 according to the embodiment of the present invention not only detects the voltage corresponding to the voltage command value received from the main controller 100, but also the voltage corresponding to the DC terminal voltage difference between the plurality of cell inverters 300 included in the same phase And controls the plurality of cell inverters 300 to output the corresponding compensation voltage.

FIG. 4 is a diagram illustrating a configuration of a direct-current-voltage unbalanced compensation controller between cell inverters of the cell controller of FIG. 2. FIG.

The cell controller 200 includes a compensation voltage phase determination unit 210, a compensation voltage code determination unit 220 and a compensation voltage determination unit 230. The cell voltage control unit 200 includes a plurality of cell inverters 300, The instantaneous value is determined.

The compensation voltage phase determination unit 210 determines a compensation voltage phase in each of the plurality of cell inverters 300. [ More specifically, the compensation voltage phase determination unit 210 includes an all pass filter (APF) 211 and a unit function forming unit 212.

Pass filter 211 is generated so that the voltage in each cell inverter 300 according to the voltage command value of the main controller 100 has a phase relationship of 90 ° with the phase current at all times and the compensation voltage is generated so as to be in parallel with the phase current And determines the phase of the compensation voltage by shifting the phase of the voltage with respect to the voltage according to the voltage command value.

The unit function forming unit 212 changes the phase shifted voltage to a unit function.

The compensation voltage code determination unit 220 determines the compensation voltage code in each of the plurality of cell inverters 300, and specifically determines the sign by determining whether the compensation voltage and the phase current are true / ground. In the present invention, as shown in FIG. 1, the direction in which the current flows out to the system can be defined as a positive value. In this case, if the phase current is lower than the compensation voltage, the sign of the compensation voltage is determined as "+ & The sign of the compensation voltage before the voltage is determined to be "-".

The compensation voltage determining unit 230 determines a compensation voltage magnitude for eliminating the DC short-circuit voltage deviation between the plurality of cell inverters 300. Specifically, the compensation voltage determination unit 230 includes a reference voltage determination unit 231, a compensation power magnitude determination unit 232, and a compensation voltage magnitude determination unit 233.

The reference voltage determination unit 231 determines a reference voltage with respect to the direct-current voltage of the plurality of cell inverters 300.

Specifically, it is as follows.

First, when the number of the cell inverters 300 connected in series on one phase in the delta-connected multilevel converter is N, the voltage instantaneous value according to the voltage command value received from the main controller 100 and the corresponding instantaneous value The instantaneous voltage value in the kth cell inverter 300 included in the inverter 300 is expressed by Equation 4 below.

Figure 112015102873146-pat00022

In this case, x means phase types such as A phase, B phase and C phase, k means a value between 1 and N, and E x (ref) means an effective value (rms).

In order to keep the sum of the direct-current voltages of the all-cell inverter 300 constant at each phase, the active power P x of the phase must always be zero, so that the phase voltage and the phase current satisfy the following equation Should be.

Figure 112015102873146-pat00023

That is, since the phase voltage and the phase current in each phase are orthogonal, the sum of the DC voltages of all the cell inverters 300 included in the phase can be kept constant.

Similarly, the power P xk in each cell inverter 300 can be represented as an inner product of the output voltage of the corresponding cell inverter 300 and the phase current. In this case, the individual powers flowing into the cell inverter 300 are all 0 And therefore each DC voltage may have a value of zero or a positive value or a negative value.

However, even in this case, the sum of the powers of all the cell inverters 300 included in the specific phase must satisfy the following equation (6).

Figure 112015102873146-pat00024

In order to satisfy this requirement, the reference voltage determining unit 231 determines a reference voltage with respect to the DC voltage of the plurality of cell inverters 300 as shown in Equation (7) below. In the embodiment of the present invention, the output voltage of the cell inverter 300 is denoted by e xk , and the DC voltage of the cell inverter 300 is denoted by v xk .

Figure 112015102873146-pat00025

In this manner, the reference voltage determination unit 231 senses the DC voltage of the plurality of cell inverters 300 and determines the reference voltage with respect to the DC voltage at a value obtained by averaging all DC voltages.

Therefore, the incremental voltage generated for voltage equalization in the individual cell inverter 300 is canceled in terms of phases, so that it may not affect the system control.

The compensation power magnitude determination unit 232 determines the compensation magnitude of each of the cell inverters 300 based on Equation 8 and Equation 8 so that the DC voltage of each cell inverter 300 follows the reference voltage for the DC voltage generated through the reference voltage determination unit 231. [ As well as determine the compensation power.

Figure 112015102873146-pat00026

That is, the compensation power size determining unit 232 can determine the effective power to be discharged from each of the cell inverters 300 as shown in Equation (8).

The compensation voltage magnitude determination unit 233 determines the compensation voltage at each of the cell inverters 300.

In particular, as described above, the output voltage of each cell inverter 300 is the sum of the voltage according to the voltage command value transmitted from the main controller 100 and the compensation voltage further generated in each cell inverter 300 And can be expressed as Equation (9) below. At this time, the output voltage of each cell inverter 300 is shown in the form of phasor.

Figure 112015102873146-pat00027

Since the voltage according to the voltage command value transmitted from the main controller 100 is always orthogonal to the phase current so that the effective power in each cell inverter 300 is 0, the effective power in each cell inverter 300 is Is expressed by Equation 10 below.

Figure 112015102873146-pat00028

In other words, the effective power in each cell inverter 300 is represented only by the internal resistance of the compensation voltage and the phase current in each cell inverter 300. In particular, the phase current should not change since it corresponds to a value to satisfy the compensation performance of the multi-level control converter. Therefore, when only the compensation voltage is generated in parallel with the phase current, the active power in each cell inverter 300 required in Equation (8) can be generated by adjusting only the magnitude of the compensation voltage.

FIG. 5 is a diagram illustrating a voltage of a cell inverter based on a voltage command value of a main controller according to the present invention, a compensation voltage for removing a DC terminal voltage deviation between cell inverters, and a phasor of each phase current.

As shown in FIG. 5, the reference voltage (< RTI ID = 0.0 >

Figure 112015102873146-pat00029
) Is the phase current
Figure 112015102873146-pat00030
), And the compensation voltage (
Figure 112015102873146-pat00031
) Is the phase current
Figure 112015102873146-pat00032
). ≪ / RTI >

The compensating voltage magnitude determining unit 233 determines the magnitude of the compensating voltage in each cell inverter 300 from Equation (8) and Equation (10) as shown in Equation (11).

Figure 112015102873146-pat00033

That is, the compensation voltage magnitude determination unit 233 determines the compensation voltage magnitude of each cell inverter 300 as a value obtained by dividing the compensation power of each cell inverter 300 determined through the compensation power magnitude determination unit 232 by the phase current. .

Finally, the cell controller 200 reflects the compensation voltage for controlling the deviation of the direct-current voltage between the cell inverters 300 to the voltage command value received from the main controller 100, The instantaneous value of the output voltage can be generated as shown in Equation (12) below.

Figure 112015102873146-pat00034

5, since the voltages and the compensation voltages according to the voltage command values of the main controller 100 output from the respective cell inverters 300 are orthogonal to each other, the maximum compensation voltage

Figure 112015102873146-pat00035
Is the maximum output voltage of each cell inverter 300 (
Figure 112015102873146-pat00036
) And the voltage according to the voltage command value (
Figure 112015102873146-pat00037
) ≪ / RTI >

Figure 112015102873146-pat00038

6 is a diagram illustrating a pager of a compensation voltage and a phase current of a cell controller according to the present invention.

As shown in FIG. 6, a relatively large phase current (

Figure 112015102873146-pat00039
The cell inverter 300 generates a relatively small compensation voltage (< RTI ID = 0.0 >
Figure 112015102873146-pat00040
), Which is necessary to control the DC short-circuit voltage deviation between the cell inverters 300
Figure 112015102873146-pat00041
·
Figure 112015102873146-pat00042
), But a relatively small phase current (
Figure 112015102873146-pat00043
The cell inverter 300 generates a relatively large compensation voltage (< RTI ID = 0.0 >
Figure 112015102873146-pat00044
) Must be applied to the cell inverter 300 to determine the DC power required to control the DC step voltage deviation between the cell inverters 300
Figure 112015102873146-pat00045
·
Figure 112015102873146-pat00046
Can be generated.

However, the compensation voltage (

Figure 112015102873146-pat00047
) Is the maximum output voltage of the cell inverter 300 shown in Equation (13)
Figure 112015102873146-pat00048
, The effective power for controlling the DC short-circuit voltage deviation between the actual cell inverters 300 is
Figure 112015102873146-pat00049
·
Figure 112015102873146-pat00050
.

Therefore, in the multi-level converter voltage equalization control system according to the embodiment of the present invention, the second image minute current is further generated through the image minute current superposer 130 of the main controller 100, . In addition, the compensation voltage calculated by the cell controller 200 is determined to be a value smaller than the maximum compensation voltage, so that the cell inverter 300 can be stably controlled without collision with the operation of another configuration of the entire system.

Figs. 7 and 8 are diagrams comparing operation characteristics when a reactive current is injected into each phase in a no-load state (I x ? 0) and when an image minute current is injected.

FIG. 7 is a graph showing the operation characteristics when an inactive current is injected in a no-load state, and FIG. 8 is a graph showing operation characteristics when injecting a minute current according to an embodiment of the present invention.

Specifically, in the embodiment of the present invention, it is verified by applying to a test multi-level converter control system having a capacity of 440 V and 30 kVA, and includes 6 cell inverters for each phase, and switching control is performed by applying PSPWM (Phase Shifted PWM) .

FIG. 7A shows the output current of the system, FIG. 7B shows the load current, FIG. 7C shows the line current connected to the system on the line A, (E) means the magnitude of the ineffective current superimposed on the input terminal of the current controller, (f) means the DC terminal voltage in the six cell inverters included in A, and (g) (B) denotes the DC terminal voltage in the six cell inverters included in the B phase, and (h) denotes the DC terminal voltage in the six cell inverters included in the C phase.

FIG. 8A shows the output current of the system, FIG. 8B shows the load current, FIG. 8C shows the line current connected to the system on A, FIG. 8D shows the phase current on A, (F) means a DC terminal voltage in six cell inverters included in A phase, (g) means a DC terminal voltage in B (H) denotes the DC voltage at the six cell inverters included in the C-phase inverter, and (h) denotes the DC voltage at the six cell inverters included in the C-phase inverter.

As shown in Fig. 7 (a), it can be confirmed that the undesired reactive power component current flows into the system side as the reactive currents are superimposed.

7 (f), (g), and (h), when the ineffective current is superimposed in a situation where a deviation occurs in the DC voltage of the cell inverter 300 included in each phase It can be seen that the DC terminal voltage of the cell inverter 300 has a uniform value long after the ineffective current is superimposed on the DC voltage.

8 (a), in the embodiment of the present invention, as the image minute current circulating in each phase is connected, the corresponding image minute current does not flow into the system, It can be confirmed that the equilibrium control of the DC inverter voltage between the cell inverters 300 is possible without affecting the compensation performance of the cell inverter 300.

8 (f), 8 (g), and 8 (h), when the image minute current is superimposed in a situation where a deviation occurs in the DC voltage of the cell inverter 300 included in each phase It can be seen that the DC terminal voltage of the cell inverter 300 has a uniform value in a relatively short time as compared with FIG. At this time, the DC voltage of the cell inverter 300 is pulsated by the superimposed image minute current, but its width is within the range where the controllability of the cell inverter 300 is maintained, so that the entire system can be stably controlled .

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, have. Therefore, the embodiments disclosed in the present invention are intended to illustrate rather than limit the scope of the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. Therefore, it should be understood that the above-described embodiments are illustrative in all aspects and not restrictive. The scope of protection of the present invention should be construed according to the claims, and all technical ideas within the scope of equivalents should be interpreted as being included in the scope of the present invention.

100: main controller 110: overall average voltage controller
120: phase-to-phase balancing controller 130:
131: Reference current comparator 132: Frequency converter
140: target current calculator 150: current controller
151: current controller 152: two-phase-to-three phase converter
190: CAN communication line 200: cell controller
210: compensation voltage phase determination unit 211: global pass filter
212: unit function forming unit 220: compensation voltage code determining unit
230: compensation voltage determining unit 231: reference voltage determining unit
232: compensation power magnitude determining unit 233: compensation voltage magnitude determining unit

Claims (15)

A plurality of cell inverters each connected to each phase;
A main controller for calculating a voltage command value using a video current component of a target current; And
And a cell controller for controlling the plurality of cell inverters to calculate a compensation voltage for direct current voltage unbalance compensation between the plurality of cell inverters and to output a voltage reflecting the compensation voltage to a voltage according to the voltage command value ,
The main controller may calculate the image minute current component of the target current by using a first image minute current to eliminate the DC step voltage difference between the phases and a second image minute current to limit the magnitude of the compensation voltage A multi-level converter comprising a voltage equalization control system. The method according to claim 1,
Wherein the main controller multiplies the first image minute current and the second image minute current of the target current to calculate the image minute current component. The method according to claim 1,
Wherein the main controller includes a target current calculator for calculating a normal current component and a reverse phase current component of the target current using an effective current and a load current of the system,
Wherein the main controller calculates the voltage command value using the image minute current component, the normal current component and the reverse phase current component of the target current. The method of claim 3,
And the effective current is such that the mean value of the DC short-circuit voltage for each phase follows the DC short-circuit voltage reference value. The method according to claim 1,
Wherein the main controller includes a phase equilibrium control system for calculating a first image minute current of the target current based on an average DC voltage value of each phase and a DC voltage of each phase Multi-level converter. The method according to claim 1,
Wherein the main controller includes a reference current comparator that compares the phase current of each phase with a predetermined reference current to calculate a second image minute current of the target current when at least one of the phase currents is smaller than the reference current Wherein the voltage equalization control system comprises: The method according to claim 1,
Wherein the main controller includes a frequency converter for converting the frequency of the second image minute current to a frequency faster than the frequency of the first image minute current so as to avoid interference between the first image minute current and the second image minute current of the target current and,
Wherein the main controller calculates an image minute current component of the target current using the frequency-converted second image minute current. The method according to claim 1,
The magnitude of the compensation voltage is limited to within the maximum compensation voltage,
The maximum compensation voltage is given by Equation
Figure 112015102873146-pat00051
, ≪ / RTI >
Figure 112015102873146-pat00052
Means the maximum compensation voltage,
Figure 112015102873146-pat00053
Means a maximum output voltage at each of the plurality of cell inverters,
Figure 112015102873146-pat00054
Wherein the voltage level of the main controller is a voltage corresponding to a voltage command value of the main controller. The method according to claim 1,
Wherein the cell controller includes: an all pass filter for shifting a phase of a voltage according to the voltage command value in each of the plurality of cell inverters; And
And a unit function forming unit for changing the phase-shifted voltage to a unit function,
Wherein the cell controller determines the compensation voltage phase in each of the plurality of cell inverters using the voltage changed to the unit function. The method according to claim 1,
Wherein the cell controller includes a compensating voltage code determining unit for determining a compensating voltage code in each of the plurality of cell inverters based on whether the compensating voltage is higher or lower than the phase current of each phase, A multilevel converter including a system. The method according to claim 1,
Wherein the cell controller includes: a reference voltage determination unit for determining a reference voltage for a DC voltage of the plurality of cell inverters;
A compensation power magnitude determination unit for determining a compensation power magnitude such that a DC voltage of each of the plurality of cell inverters follows the reference voltage; And
And a compensation voltage magnitude determiner for determining a compensation voltage magnitude in each of the plurality of cell inverters based on the compensation power. And an inverter for calculating a first image minute current for eliminating the DC phase voltage deviation between the phases based on the DC average of the phases of the plurality of cell inverters connected to the phases, An equalization controller;
An image minute current superimposer for calculating a second image minute current for direct current voltage unbalance compensation between the plurality of cell inverters based on the phase currents of the phases;
A target current calculator for calculating an image minute current component of a target current using the first image minute current and the second image minute current; And
And a current control unit for calculating a voltage command value for the plurality of cell inverters by using a video current component of a target current calculated through the target current calculator. 13. The method of claim 12,
The target current calculator further calculates a normal current component and a reverse phase current component of the target current by using an effective current and a system load current so that the DC average of each phase corresponds to the DC voltage reference value ,
Wherein the current controller calculates a voltage command value corresponding to a target current including the image minute current component, the normal current component, and the reverse phase current component. 13. The method of claim 12,
The reference current comparator compares the phase current of each phase with the reference current and calculates the second video current component when at least one of the phase currents is smaller than the reference current; And
And a frequency converter for converting the frequency of the second image minute current to a frequency faster than a frequency of the first image minute current so as to avoid interference between the first image minute current and the second image minute current,
Wherein the current controller calculates an image minute current component of the target current using the frequency-converted second image minute current. 13. The method of claim 12,
Wherein the image minute current superposer calculates the second image minute current so that the compensation voltage is within the maximum compensation voltage,
The maximum compensation voltage is given by Equation
Figure 112017056425598-pat00055
, ≪ / RTI >
Figure 112017056425598-pat00056
Means the maximum compensation voltage,
Figure 112017056425598-pat00057
Means a maximum output voltage at each of the plurality of cell inverters,
Figure 112017056425598-pat00058
Is a voltage according to the voltage command value.
KR1020150147635A 2015-10-22 2015-10-22 System for controlling voltage balancing and multilevel converter including the same KR101782222B1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10439414B2 (en) 2017-03-23 2019-10-08 Eaton Intelligent Power Limited Auto adjusting balancer apparatus

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
권병기 외 2인 :"STATCOM에서 영상분 전류주입에 의한 셀간 전압평형화 제어의 향상", 전력전자학회논문지, 2015.08., pages 321-329.*

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10439414B2 (en) 2017-03-23 2019-10-08 Eaton Intelligent Power Limited Auto adjusting balancer apparatus
US10944280B2 (en) 2017-03-23 2021-03-09 Eaton Intelligent Power Limited Auto adjusting balancer apparatus

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